1/* $NetBSD: a9tmr_var.h,v 1.7 2019/08/10 17:03:59 skrll Exp $ */
2/*-
3 * Copyright (c) 2012 The NetBSD Foundation, Inc.
4 * All rights reserved.
5 *
6 * This code is derived from software contributed to The NetBSD Foundation
7 * by Matt Thomas of 3am Software Foundry.
8 *
9 * Redistribution and use in source and binary forms, with or without
10 * modification, are permitted provided that the following conditions
11 * are met:
12 * 1. Redistributions of source code must retain the above copyright
13 *    notice, this list of conditions and the following disclaimer.
14 * 2. Redistributions in binary form must reproduce the above copyright
15 *    notice, this list of conditions and the following disclaimer in the
16 *    documentation and/or other materials provided with the distribution.
17 *
18 * THIS SOFTWARE IS PROVIDED BY THE NETBSD FOUNDATION, INC. AND CONTRIBUTORS
19 * ``AS IS'' AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED
20 * TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR
21 * PURPOSE ARE DISCLAIMED.  IN NO EVENT SHALL THE FOUNDATION OR CONTRIBUTORS
22 * BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR
23 * CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF
24 * SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS
25 * INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN
26 * CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE)
27 * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE
28 * POSSIBILITY OF SUCH DAMAGE.
29 */
30
31#ifndef _ARM_CORTEX_A9TMR_VAR_
32#define _ARM_CORTEX_A9TMR_VAR_
33
34struct a9tmr_softc {
35	device_t sc_dev;
36	bus_space_tag_t sc_memt;
37	bus_space_handle_t sc_memh;
38	bus_space_handle_t sc_global_memh;
39	struct evcnt sc_ev_missing_ticks;
40	uint32_t sc_freq;
41	u_long sc_autoinc;
42	void *sc_global_ih;
43};
44
45#ifdef _KERNEL
46#include "opt_arm_timer.h"
47struct cpu_info;
48void	a9tmr_init_cpu_clock(struct cpu_info *);
49#ifdef __HAVE_GENERIC_CPU_INITCLOCKS
50void	a9tmr_cpu_initclocks(void);
51#else
52#define a9tmr_cpu_initclocks	cpu_initclocks
53#endif
54int	a9tmr_intr(void *);
55void	a9tmr_update_freq(uint32_t);
56void	a9tmr_delay(unsigned int n);
57
58int	a9ptmr_intr(void *);
59void	a9ptmr_delay(unsigned int n);
60#endif
61
62#endif /* _ARM_CORTEX_A9TMR_VAR_ */
63