1/* $NetBSD: bcm2835_bsc_fdt.c,v 1.6 2021/01/29 14:11:14 skrll Exp $ */ 2 3/* 4 * Copyright (c) 2019 Jason R. Thorpe 5 * Copyright (c) 2012 Jonathan A. Kollasch 6 * All rights reserved. 7 * 8 * Redistribution and use in source and binary forms, with or without 9 * modification, are permitted provided that the following conditions 10 * are met: 11 * 1. Redistributions of source code must retain the above copyright 12 * notice, this list of conditions and the following disclaimer. 13 * 2. Redistributions in binary form must reproduce the above copyright 14 * notice, this list of conditions and the following disclaimer in the 15 * documentation and/or other materials provided with the distribution. 16 * 17 * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS 18 * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED 19 * TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR 20 * PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT HOLDER OR 21 * CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, 22 * EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, 23 * PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; 24 * OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, 25 * WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR 26 * OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF 27 * ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. 28 */ 29 30#include <sys/cdefs.h> 31__KERNEL_RCSID(0, "$NetBSD: bcm2835_bsc_fdt.c,v 1.6 2021/01/29 14:11:14 skrll Exp $"); 32 33#include <sys/param.h> 34#include <sys/bus.h> 35#include <sys/device.h> 36#include <sys/kernhist.h> 37#include <sys/intr.h> 38#include <sys/mutex.h> 39#include <sys/systm.h> 40 41#include <dev/i2c/i2cvar.h> 42 43#include <arm/broadcom/bcm2835reg.h> 44#include <arm/broadcom/bcm2835_bscreg.h> 45#include <arm/broadcom/bcm2835_bscvar.h> 46 47#include <dev/fdt/fdtvar.h> 48 49static int bsciic_fdt_match(device_t, cfdata_t, void *); 50static void bsciic_fdt_attach(device_t, device_t, void *); 51 52CFATTACH_DECL_NEW(bsciic_fdt, sizeof(struct bsciic_softc), 53 bsciic_fdt_match, bsciic_fdt_attach, NULL, NULL); 54 55static const struct device_compatible_entry compat_data[] = { 56 { .compat = "brcm,bcm2835-i2c" }, 57 DEVICE_COMPAT_EOL 58}; 59 60static int 61bsciic_fdt_match(device_t parent, cfdata_t match, void *aux) 62{ 63 struct fdt_attach_args * const faa = aux; 64 65 return of_compatible_match(faa->faa_phandle, compat_data); 66} 67 68static void 69bsciic_fdt_attach(device_t parent, device_t self, void *aux) 70{ 71 struct bsciic_softc * const sc = device_private(self); 72 struct fdt_attach_args * const faa = aux; 73 const int phandle = faa->faa_phandle; 74 75 bus_addr_t addr; 76 bus_size_t size; 77 78 sc->sc_dev = self; 79 sc->sc_iot = faa->faa_bst; 80 81 int error = fdtbus_get_reg(phandle, 0, &addr, &size); 82 if (error) { 83 aprint_error(": unable to get device registers\n"); 84 return; 85 } 86 87 /* Enable clock */ 88 sc->sc_clk = fdtbus_clock_get_index(phandle, 0); 89 if (sc->sc_clk == NULL) { 90 aprint_error(": couldn't acquire clock\n"); 91 return; 92 } 93 94 if (clk_enable(sc->sc_clk) != 0) { 95 aprint_error(": failed to enable clock\n"); 96 return; 97 } 98 99 sc->sc_frequency = clk_get_rate(sc->sc_clk); 100 101 if (of_getprop_uint32(phandle, "clock-frequency", 102 &sc->sc_clkrate) != 0) { 103 sc->sc_clkrate = 100000; 104 } 105 106 if (bus_space_map(sc->sc_iot, addr, size, 0, &sc->sc_ioh)) { 107 aprint_error(": unable to map device\n"); 108 return; 109 } 110 111 aprint_naive("\n"); 112 aprint_normal(": Broadcom Serial Controller\n"); 113 114 bsciic_attach(sc); 115 116 char intrstr[128]; 117 if (!fdtbus_intr_str(phandle, 0, intrstr, sizeof(intrstr))) { 118 aprint_error_dev(sc->sc_dev, "failed to decode interrupt\n"); 119 return; 120 } 121 sc->sc_inth = fdtbus_intr_establish_xname(phandle, 0, IPL_VM, 122 FDT_INTR_MPSAFE, bsciic_intr, sc, device_xname(sc->sc_dev)); 123 if (sc->sc_inth == NULL) { 124 aprint_error_dev(sc->sc_dev, 125 "failed to establish interrupt %s\n", intrstr); 126 return; 127 } 128 aprint_normal_dev(sc->sc_dev, "interrupting on %s\n", intrstr); 129 130 iic_tag_init(&sc->sc_i2c); 131 sc->sc_i2c.ic_cookie = sc; 132 sc->sc_i2c.ic_acquire_bus = bsciic_acquire_bus; 133 sc->sc_i2c.ic_release_bus = bsciic_release_bus; 134 sc->sc_i2c.ic_exec = bsciic_exec; 135 136 fdtbus_register_i2c_controller(&sc->sc_i2c, phandle); 137 138 fdtbus_attach_i2cbus(self, phandle, &sc->sc_i2c, iicbus_print); 139} 140