1/* $NetBSD: meson_sdioreg.h,v 1.1 2019/01/19 20:56:03 jmcneill Exp $ */ 2 3/*- 4 * Copyright (c) 2015 Jared D. McNeill <jmcneill@invisible.ca> 5 * All rights reserved. 6 * 7 * Redistribution and use in source and binary forms, with or without 8 * modification, are permitted provided that the following conditions 9 * are met: 10 * 1. Redistributions of source code must retain the above copyright 11 * notice, this list of conditions and the following disclaimer. 12 * 2. Redistributions in binary form must reproduce the above copyright 13 * notice, this list of conditions and the following disclaimer in the 14 * documentation and/or other materials provided with the distribution. 15 * 16 * THIS SOFTWARE IS PROVIDED BY THE AUTHOR ``AS IS'' AND ANY EXPRESS OR 17 * IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES 18 * OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED. 19 * IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR ANY DIRECT, INDIRECT, 20 * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, 21 * BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; 22 * LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED 23 * AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, 24 * OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY 25 * OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF 26 * SUCH DAMAGE. 27 */ 28 29#ifndef _MESON_SDIOREG_H 30#define _MESON_SDIOREG_H 31 32#define SDIO_ARGU_REG 0x00 33#define SDIO_SEND_REG 0x04 34#define SDIO_CONF_REG 0x08 35#define SDIO_IRQS_REG 0x0c 36#define SDIO_IRQC_REG 0x10 37#define SDIO_MULT_REG 0x14 38#define SDIO_ADDR_REG 0x18 39#define SDIO_EXT_REG 0x1c 40#define SDIO_CCTL_REG 0x40 41#define SDIO_CDAT_REG 0x44 42 43#define SDIO_SEND_COMMAND_INDEX __BITS(7,0) 44#define SDIO_SEND_RESPONSE_BITS __BITS(15,8) 45#define SDIO_SEND_RESPONSE_NO_CRC __BIT(16) 46#define SDIO_SEND_RESPONSE_DATA __BIT(17) 47#define SDIO_SEND_RESPONSE_CRC7_FROM_8 __BIT(18) 48#define SDIO_SEND_CHECK_BUSY_DAT0 __BIT(19) 49#define SDIO_SEND_COMMAND_HAS_DATA __BIT(20) 50#define SDIO_SEND_USE_INT_WINDOW __BIT(21) 51#define SDIO_SEND_REPEAT_PACKAGE __BITS(31,24) 52 53#define SDIO_CONF_COMMAND_CLK_DIV __BITS(9,0) 54#define SDIO_CONF_COMMAND_DISABLE_CRC __BIT(10) 55#define SDIO_CONF_COMMAND_OUT_AT_POSEDGE __BIT(11) 56#define SDIO_CONF_COMMAND_ARG_BITS __BITS(17,12) 57#define SDIO_CONF_NO_DELAY_DATA __BIT(18) 58#define SDIO_CONF_DATA_LATCH_AT_NEGEDGE __BIT(19) 59#define SDIO_CONF_BUS_WIDTH __BIT(20) 60#define SDIO_CONF_M_ENDIAN __BITS(22,21) 61#define SDIO_CONF_WRITE_NWR __BITS(28,23) 62#define SDIO_CONF_WRITE_CRC_OK_STATUS __BITS(31,29) 63 64#define SDIO_IRQS_STATUS __BITS(3,0) 65#define SDIO_IRQS_CMD_BUSY __BIT(4) 66#define SDIO_IRQS_RESPONSE_CRC7_OK __BIT(5) 67#define SDIO_IRQS_DATA_READ_CRC16_OK __BIT(6) 68#define SDIO_IRQS_DATA_WRITE_CRC16_OK __BIT(7) 69#define SDIO_IRQS_IF_INT __BIT(8) 70#define SDIO_IRQS_CMD_INT __BIT(9) 71#define SDIO_IRQS_SOFT_INT __BIT(10) 72#define SDIO_IRQS_SET_SOFT_INT __BIT(11) 73#define SDIO_IRQS_STATUS_INFO __BIT(15,12) 74#define SDIO_IRQS_TIMING_OUT_INT __BIT(16) 75#define SDIO_IRQS_AMRISC_TIMING_OUT_INTEN __BIT(17) 76#define SDIO_IRQS_ARC_TIMING_OUT_INTEN __BIT(18) 77#define SDIO_IRQS_TIMING_OUT_COUNT __BITS(31,19) 78#define SDIO_IRQS_CLEAR \ 79 (SDIO_IRQS_IF_INT|SDIO_IRQS_SOFT_INT|SDIO_IRQS_SET_SOFT_INT|\ 80 SDIO_IRQS_TIMING_OUT_INT) 81 82#define SDIO_IRQC_AMRISC_IF_INTEN __BIT(0) 83#define SDIO_IRQC_AMRISC_CMD_INTEN __BIT(1) 84#define SDIO_IRQC_AMRISC_SOFT_INTEN __BIT(2) 85#define SDIO_IRQC_ARC_IF_INTEN __BIT(3) 86#define SDIO_IRQC_ARC_CMD_INTEN __BIT(4) 87#define SDIO_IRQC_ARC_SOFT_INTEN __BIT(5) 88#define SDIO_IRQC_IF_INT_CONFIG __BITS(7,6) 89#define SDIO_IRQC_FORCE_DATA __BITS(13,8) 90#define SDIO_IRQC_FORCE_ENABLE __BIT(14) 91#define SDIO_IRQC_SOFT_RESET __BIT(15) 92#define SDIO_IRQC_FORCE_OUTEN __BITS(21,16) 93#define SDIO_IRQC_DISABLE_MEM_HALT __BITS(23,22) 94#define SDIO_IRQC_FORCE_DATA_READ __BITS(29,24) 95#define SDIO_IRQC_FORCE_HALT __BIT(30) 96#define SDIO_IRQC_HALT_HOLE __BIT(31) 97 98#define SDIO_MULT_PORT_SEL __BITS(1,0) 99#define SDIO_MULT_MS_ENABLE __BIT(2) 100#define SDIO_MULT_MS_SCLK_ALWAYS __BIT(3) 101#define SDIO_MULT_STREAM_ENABLE __BIT(4) 102#define SDIO_MULT_STREAM_8BIT_MODE __BIT(5) 103#define SDIO_MULT_DATA_CATCH_LEVEL __BITS(7,6) 104#define SDIO_MULT_WRITE_READ_OUT_INDEX __BIT(8) 105#define SDIO_MULT_DATA_CATCH_READOUT_EN __BIT(9) 106#define SDIO_MULT_DAT0_DATA_ON_DAT1 __BIT(10) 107#define SDIO_MULT_DAT1_DATA_SWAPPED __BIT(11) 108#define SDIO_MULT_RESPONSE_READ_INDEX __BITS(15,12) 109#define SDIO_MULT_DATA_CATCH_FINISH_PT __BITS(27,16) 110 111#define SDIO_EXT_CMD_ARG_EXT __BITS(15,0) 112#define SDIO_EXT_DATA_RW_NUMBER __BITS(29,16) 113#define SDIO_EXT_DATA_RW_NO_CRC16 __BIT(30) 114#define SDIO_EXT_CRC_STATUS_4LINE __BIT(31) 115 116#endif /* _MESON_SDIOREG_H */ 117