1/* $NetBSD: pci_axppci_33.c,v 1.41 2021/06/25 13:41:33 thorpej Exp $ */ 2 3/* 4 * Copyright (c) 1995, 1996 Carnegie-Mellon University. 5 * All rights reserved. 6 * 7 * Authors: Jeffrey Hsu and Chris G. Demetriou 8 * 9 * Permission to use, copy, modify and distribute this software and 10 * its documentation is hereby granted, provided that both the copyright 11 * notice and this permission notice appear in all copies of the 12 * software, derivative works or modified versions, and any portions 13 * thereof, and that both notices appear in supporting documentation. 14 * 15 * CARNEGIE MELLON ALLOWS FREE USE OF THIS SOFTWARE IN ITS "AS IS" 16 * CONDITION. CARNEGIE MELLON DISCLAIMS ANY LIABILITY OF ANY KIND 17 * FOR ANY DAMAGES WHATSOEVER RESULTING FROM THE USE OF THIS SOFTWARE. 18 * 19 * Carnegie Mellon requests users of this software to return to 20 * 21 * Software Distribution Coordinator or Software.Distribution@CS.CMU.EDU 22 * School of Computer Science 23 * Carnegie Mellon University 24 * Pittsburgh PA 15213-3890 25 * 26 * any improvements or extensions that they make and grant Carnegie the 27 * rights to redistribute these changes. 28 */ 29 30#include <sys/cdefs.h> /* RCS ID & Copyright macro defns */ 31 32__KERNEL_RCSID(0, "$NetBSD: pci_axppci_33.c,v 1.41 2021/06/25 13:41:33 thorpej Exp $"); 33 34#include <sys/types.h> 35#include <sys/param.h> 36#include <sys/time.h> 37#include <sys/systm.h> 38#include <sys/errno.h> 39#include <sys/device.h> 40 41#include <machine/autoconf.h> 42#include <machine/rpb.h> 43#include <sys/bus.h> 44#include <machine/intr.h> 45 46#include <dev/isa/isavar.h> 47#include <dev/pci/pcireg.h> 48#include <dev/pci/pcivar.h> 49 50#include <alpha/pci/lcavar.h> 51 52#include <alpha/pci/siovar.h> 53#include <alpha/pci/sioreg.h> 54 55#include "sio.h" 56 57static int dec_axppci_33_intr_map(const struct pci_attach_args *, 58 pci_intr_handle_t *); 59 60static void 61pci_axppci_33_pickintr(void *core, bus_space_tag_t iot, bus_space_tag_t memt, 62 pci_chipset_tag_t pc) 63{ 64 65 pc->pc_intr_v = core; 66 pc->pc_intr_map = dec_axppci_33_intr_map; 67 pc->pc_intr_string = sio_pci_intr_string; 68 pc->pc_intr_evcnt = sio_pci_intr_evcnt; 69 pc->pc_intr_establish = sio_pci_intr_establish; 70 pc->pc_intr_disestablish = sio_pci_intr_disestablish; 71 72 /* Not supported on AXPpci33. */ 73 pc->pc_pciide_compat_intr_establish = NULL; 74 75#if NSIO 76 sio_intr_setup(pc, iot); 77#else 78 panic("pci_axppci_33_pickintr: no I/O interrupt handler (no sio)"); 79#endif 80} 81ALPHA_PCI_INTR_INIT(ST_DEC_AXPPCI_33, pci_axppci_33_pickintr) 82 83int 84dec_axppci_33_intr_map(const struct pci_attach_args *pa, pci_intr_handle_t *ihp) 85{ 86 pcitag_t bustag = pa->pa_intrtag; 87 int buspin = pa->pa_intrpin; 88 pci_chipset_tag_t pc = pa->pa_pc; 89 int device, pirq; 90 91#ifndef DIAGNOSTIC 92 pirq = 0; /* XXX gcc -Wuninitialized */ 93#endif 94 95 if (buspin == 0) { 96 /* No IRQ used. */ 97 return 1; 98 } 99 if (buspin < 0 || buspin > 4) { 100 printf("dec_axppci_33_intr_map: bad interrupt pin %d\n", 101 buspin); 102 return 1; 103 } 104 105 pci_decompose_tag(pc, bustag, NULL, &device, NULL); 106 107 switch (device) { 108 case 6: /* NCR SCSI */ 109 pirq = 3; 110 break; 111 112 case 11: /* slot 1 */ 113 switch (buspin) { 114 case PCI_INTERRUPT_PIN_A: 115 case PCI_INTERRUPT_PIN_D: 116 pirq = 0; 117 break; 118 case PCI_INTERRUPT_PIN_B: 119 pirq = 2; 120 break; 121 case PCI_INTERRUPT_PIN_C: 122 pirq = 1; 123 break; 124#ifdef DIAGNOSTIC 125 default: /* XXX gcc -Wuninitialized */ 126 panic("dec_axppci_33_intr_map: bogus PCI pin %d", 127 buspin); 128#endif 129 }; 130 break; 131 132 case 12: /* slot 2 */ 133 switch (buspin) { 134 case PCI_INTERRUPT_PIN_A: 135 case PCI_INTERRUPT_PIN_D: 136 pirq = 1; 137 break; 138 case PCI_INTERRUPT_PIN_B: 139 pirq = 0; 140 break; 141 case PCI_INTERRUPT_PIN_C: 142 pirq = 2; 143 break; 144#ifdef DIAGNOSTIC 145 default: /* XXX gcc -Wuninitialized */ 146 panic("dec_axppci_33_intr_map: bogus PCI pin %d", 147 buspin); 148#endif 149 }; 150 break; 151 152 case 8: /* slot 3 */ 153 switch (buspin) { 154 case PCI_INTERRUPT_PIN_A: 155 case PCI_INTERRUPT_PIN_D: 156 pirq = 2; 157 break; 158 case PCI_INTERRUPT_PIN_B: 159 pirq = 1; 160 break; 161 case PCI_INTERRUPT_PIN_C: 162 pirq = 0; 163 break; 164#ifdef DIAGNOSTIC 165 default: /* XXX gcc -Wuninitialized */ 166 panic("dec_axppci_33_intr_map bogus: PCI pin %d", 167 buspin); 168#endif 169 }; 170 break; 171 172 default: 173 printf("dec_axppci_33_intr_map: weird device number %d\n", 174 device); 175 return 1; 176 } 177 178#if 0 179 printf("dec_axppci_33_intr_map: device %d pin %c: pirq %d\n", 180 device, '@' + buspin, pirq); 181#endif 182 183 return sio_pirq_intr_map(pc, pirq, ihp); 184} 185