mcpcia.c revision 1.8
1/* $NetBSD: mcpcia.c,v 1.8 2000/06/04 19:14:20 cgd Exp $ */ 2 3/*- 4 * Copyright (c) 1999 The NetBSD Foundation, Inc. 5 * All rights reserved. 6 * 7 * This code is derived from software contributed to The NetBSD Foundation 8 * by Jason R. Thorpe of the Numerical Aerospace Simulation Facility, 9 * NASA Ames Research Center. 10 * 11 * Redistribution and use in source and binary forms, with or without 12 * modification, are permitted provided that the following conditions 13 * are met: 14 * 1. Redistributions of source code must retain the above copyright 15 * notice, this list of conditions and the following disclaimer. 16 * 2. Redistributions in binary form must reproduce the above copyright 17 * notice, this list of conditions and the following disclaimer in the 18 * documentation and/or other materials provided with the distribution. 19 * 3. All advertising materials mentioning features or use of this software 20 * must display the following acknowledgement: 21 * This product includes software developed by the NetBSD 22 * Foundation, Inc. and its contributors. 23 * 4. Neither the name of The NetBSD Foundation nor the names of its 24 * contributors may be used to endorse or promote products derived 25 * from this software without specific prior written permission. 26 * 27 * THIS SOFTWARE IS PROVIDED BY THE NETBSD FOUNDATION, INC. AND CONTRIBUTORS 28 * ``AS IS'' AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED 29 * TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR 30 * PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE FOUNDATION OR CONTRIBUTORS 31 * BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR 32 * CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF 33 * SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS 34 * INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN 35 * CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) 36 * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE 37 * POSSIBILITY OF SUCH DAMAGE. 38 */ 39 40/* 41 * Copyright (c) 1998 by Matthew Jacob 42 * NASA AMES Research Center. 43 * All rights reserved. 44 * 45 * Redistribution and use in source and binary forms, with or without 46 * modification, are permitted provided that the following conditions 47 * are met: 48 * 1. Redistributions of source code must retain the above copyright 49 * notice immediately at the beginning of the file, without modification, 50 * this list of conditions, and the following disclaimer. 51 * 2. Redistributions in binary form must reproduce the above copyright 52 * notice, this list of conditions and the following disclaimer in the 53 * documentation and/or other materials provided with the distribution. 54 * 3. The name of the author may not be used to endorse or promote products 55 * derived from this software without specific prior written permission. 56 * 57 * THIS SOFTWARE IS PROVIDED BY THE AUTHOR AND CONTRIBUTORS ``AS IS'' AND 58 * ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE 59 * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE 60 * ARE DISCLAIMED. IN NO EVENT SHALL THE AUTHOR OR CONTRIBUTORS BE LIABLE FOR 61 * ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL 62 * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS 63 * OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) 64 * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT 65 * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY 66 * OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF 67 * SUCH DAMAGE. 68 */ 69 70/* 71 * MCPCIA mcbus to PCI bus adapter 72 * found on AlphaServer 4100 systems. 73 */ 74 75#include <sys/cdefs.h> /* RCS ID & Copyright macro defns */ 76 77__KERNEL_RCSID(0, "$NetBSD: mcpcia.c,v 1.8 2000/06/04 19:14:20 cgd Exp $"); 78 79#include <sys/param.h> 80#include <sys/systm.h> 81#include <sys/device.h> 82#include <sys/malloc.h> 83 84#include <machine/autoconf.h> 85#include <machine/rpb.h> 86#include <machine/pte.h> 87 88#include <alpha/mcbus/mcbusreg.h> 89#include <alpha/mcbus/mcbusvar.h> 90#include <alpha/pci/mcpciareg.h> 91#include <alpha/pci/mcpciavar.h> 92#include <alpha/pci/pci_kn300.h> 93 94#define KV(_addr) ((caddr_t)ALPHA_PHYS_TO_K0SEG((_addr))) 95#define MCPCIA_SYSBASE(mc) \ 96 ((((unsigned long) (mc)->cc_gid) << MCBUS_GID_SHIFT) | \ 97 (((unsigned long) (mc)->cc_mid) << MCBUS_MID_SHIFT) | \ 98 (MCBUS_IOSPACE)) 99 100#define MCPCIA_PROBE(mid, gid) \ 101 badaddr((void *)KV(((((unsigned long) gid) << MCBUS_GID_SHIFT) | \ 102 (((unsigned long) mid) << MCBUS_MID_SHIFT) | \ 103 (MCBUS_IOSPACE) | MCPCIA_PCI_BRIDGE | _MCPCIA_PCI_REV)), \ 104 sizeof(u_int32_t)) 105 106static int mcpciamatch __P((struct device *, struct cfdata *, void *)); 107static void mcpciaattach __P((struct device *, struct device *, void *)); 108struct cfattach mcpcia_ca = { 109 sizeof(struct mcpcia_softc), mcpciamatch, mcpciaattach 110}; 111 112static int mcpciaprint __P((void *, const char *)); 113 114void mcpcia_init0 __P((struct mcpcia_config *, int)); 115 116/* 117 * We have one statically-allocated mcpcia_config structure; this is 118 * the one used for the console (which, coincidentally, is the only 119 * MCPCIA with an EISA adapter attached to it). 120 */ 121struct mcpcia_config mcpcia_console_configuration; 122 123static int 124mcpciaprint(aux, pnp) 125 void *aux; 126 const char *pnp; 127{ 128 register struct pcibus_attach_args *pba = aux; 129 /* only PCIs can attach to MCPCIA for now */ 130 if (pnp) 131 printf("%s at %s", pba->pba_busname, pnp); 132 printf(" bus %d", pba->pba_bus); 133 return (UNCONF); 134} 135 136static int 137mcpciamatch(parent, cf, aux) 138 struct device *parent; 139 struct cfdata *cf; 140 void *aux; 141{ 142 struct mcbus_dev_attach_args *ma = aux; 143 if (ma->ma_type == MCBUS_TYPE_PCI) 144 return (1); 145 return (0); 146} 147 148static void 149mcpciaattach(parent, self, aux) 150 struct device *parent; 151 struct device *self; 152 void *aux; 153{ 154 static int first = 1; 155 struct mcbus_dev_attach_args *ma = aux; 156 struct mcpcia_softc *mcp = (struct mcpcia_softc *)self; 157 struct mcpcia_config *ccp; 158 struct pcibus_attach_args pba; 159 u_int32_t ctl; 160 161 /* 162 * Make sure this MCPCIA exists... 163 */ 164 if (MCPCIA_PROBE(ma->ma_mid, ma->ma_gid)) { 165 mcp->mcpcia_cc = NULL; 166 printf(" (not present)\n"); 167 return; 168 } 169 printf("\n"); 170 171 /* 172 * Determine if we're the console's MCPCIA. 173 */ 174 if (ma->ma_mid == mcpcia_console_configuration.cc_mid && 175 ma->ma_gid == mcpcia_console_configuration.cc_gid) 176 ccp = &mcpcia_console_configuration; 177 else { 178 ccp = malloc(sizeof(struct mcpcia_config), M_DEVBUF, M_WAITOK); 179 memset(ccp, 0, sizeof(struct mcpcia_config)); 180 181 ccp->cc_mid = ma->ma_mid; 182 ccp->cc_gid = ma->ma_gid; 183 } 184 185 mcp->mcpcia_cc = ccp; 186 ccp->cc_sc = mcp; 187 188 /* This initializes cc_sysbase so we can do register access. */ 189 mcpcia_init0(ccp, 1); 190 191 ctl = REGVAL(MCPCIA_PCI_REV(ccp)); 192 printf("%s: Horse Revision %d, %s Handed Saddle Revision %d," 193 " CAP Revision %d\n", mcp->mcpcia_dev.dv_xname, HORSE_REV(ctl), 194 (SADDLE_TYPE(ctl) & 1)? "Right": "Left", SADDLE_REV(ctl), 195 CAP_REV(ctl)); 196 197 mcpcia_dma_init(ccp); 198 199 /* 200 * Set up interrupts 201 */ 202 pci_kn300_pickintr(ccp, first); 203#ifdef EVCNT_COUNTERS 204 if (first == 1) { 205 evcnt_attach_dynamic(kn300_intr_evcnt, EVCNT_TYPE_INTR, NULL, 206 self->dv_xname, "intr"); 207 first = 0; 208 } 209#else 210 first = 0; 211#endif 212 213 /* 214 * Attach PCI bus 215 */ 216 pba.pba_busname = "pci"; 217 pba.pba_iot = &ccp->cc_iot; 218 pba.pba_memt = &ccp->cc_memt; 219 pba.pba_dmat = /* start with direct, may change... */ 220 alphabus_dma_get_tag(&ccp->cc_dmat_direct, ALPHA_BUS_PCI); 221 pba.pba_pc = &ccp->cc_pc; 222 pba.pba_bus = 0; 223 pba.pba_flags = PCI_FLAGS_IO_ENABLED | PCI_FLAGS_MEM_ENABLED | 224 PCI_FLAGS_MRL_OKAY | PCI_FLAGS_MRM_OKAY | PCI_FLAGS_MWI_OKAY; 225 (void) config_found(self, &pba, mcpciaprint); 226 227 /* 228 * Clear any errors that may have occurred during the probe 229 * sequence. 230 */ 231 REGVAL(MCPCIA_CAP_ERR(ccp)) = 0xFFFFFFFF; 232 alpha_mb(); 233} 234 235void 236mcpcia_init() 237{ 238 struct mcpcia_config *ccp = &mcpcia_console_configuration; 239 int i; 240 241 /* 242 * Look for all of the MCPCIAs on the system. One of them 243 * will have an EISA attached to it. This MCPCIA is the 244 * only one that can be used for the console. Once we find 245 * that one, initialize it. 246 */ 247 248 for (i = 0; i < MCPCIA_PER_MCBUS; i++) { 249 ccp->cc_mid = mcbus_mcpcia_probe_order[i]; 250 /* 251 * XXX If we ever support more than one MCBUS, we'll 252 * XXX have to probe for them, and map them to unit 253 * XXX numbers. 254 */ 255 ccp->cc_gid = MCBUS_GID_FROM_INSTANCE(0); 256 ccp->cc_sysbase = MCPCIA_SYSBASE(ccp); 257 258 if (badaddr((void *)ALPHA_PHYS_TO_K0SEG(MCPCIA_PCI_REV(ccp)), 259 sizeof(u_int32_t))) 260 continue; 261 262 if (EISA_PRESENT(REGVAL(MCPCIA_PCI_REV(ccp)))) { 263 mcpcia_init0(ccp, 0); 264 return; 265 } 266 } 267 268 panic("mcpcia_init: unable to find EISA bus"); 269} 270 271void 272mcpcia_init0(ccp, mallocsafe) 273 struct mcpcia_config *ccp; 274 int mallocsafe; 275{ 276 u_int32_t ctl; 277 278 if (ccp->cc_initted == 0) { 279 /* don't do these twice since they set up extents */ 280 mcpcia_bus_io_init(&ccp->cc_iot, ccp); 281 mcpcia_bus_mem_init(&ccp->cc_memt, ccp); 282 } 283 ccp->cc_mallocsafe = mallocsafe; 284 285 mcpcia_pci_init(&ccp->cc_pc, ccp); 286 287 /* 288 * Establish a precalculated base for convenience's sake. 289 */ 290 ccp->cc_sysbase = MCPCIA_SYSBASE(ccp); 291 292 /* 293 * Disable interrupts and clear errors prior to probing 294 */ 295 REGVAL(MCPCIA_INT_MASK0(ccp)) = 0; 296 REGVAL(MCPCIA_INT_MASK1(ccp)) = 0; 297 REGVAL(MCPCIA_CAP_ERR(ccp)) = 0xFFFFFFFF; 298 alpha_mb(); 299 300 /* 301 * Use this opportunity to also find out the MID and CPU 302 * type of the currently running CPU (that's us, billybob....) 303 */ 304 ctl = REGVAL(MCPCIA_WHOAMI(ccp)); 305 mcbus_primary.mcbus_cpu_mid = MCBUS_CPU_MID(ctl); 306 if ((MCBUS_CPU_INFO(ctl) & CPU_Fill_Err) == 0 && 307 mcbus_primary.mcbus_valid == 0) { 308 mcbus_primary.mcbus_bcache = 309 MCBUS_CPU_INFO(ctl) & CPU_BCacheMask; 310 mcbus_primary.mcbus_valid = 1; 311 } 312 alpha_mb(); 313 314 ccp->cc_initted = 1; 315} 316 317#ifdef TEST_PROBE_DEATH 318static void 319die_heathen_dog(arg) 320 void *arg; 321{ 322 struct mcpcia_config *ccp = arg; 323 324 /* this causes a fatal machine check (0x670) */ 325 REGVAL(MCPCIA_CAP_DIAG(ccp)) |= CAP_DIAG_MC_ADRPE; 326} 327#endif 328 329void 330mcpcia_config_cleanup() 331{ 332 volatile u_int32_t ctl; 333 struct mcpcia_softc *mcp; 334 struct mcpcia_config *ccp; 335 int i; 336 extern struct cfdriver mcpcia_cd; 337 338 /* 339 * Turn on Hard, Soft error interrupts. Maybe i2c too. 340 */ 341 for (i = 0; i < mcpcia_cd.cd_ndevs; i++) { 342 if ((mcp = mcpcia_cd.cd_devs[i]) == NULL) 343 continue; 344 345 ccp = mcp->mcpcia_cc; 346 if (ccp == NULL) 347 continue; 348 349 ctl = REGVAL(MCPCIA_INT_MASK0(ccp)); 350 ctl |= MCPCIA_GEN_IENABL; 351 REGVAL(MCPCIA_INT_MASK0(ccp)) = ctl; 352 alpha_mb(); 353 354 /* force stall while write completes */ 355 ctl = REGVAL(MCPCIA_INT_MASK0(ccp)); 356 } 357#ifdef TEST_PROBE_DEATH 358 (void) timeout (die_heathen_dog, &mcpcia_console_configuration, 359 30 * hz); 360#endif 361} 362