mcpcia.c revision 1.33
1/* $NetBSD: mcpcia.c,v 1.33 2021/06/19 16:13:40 thorpej Exp $ */ 2 3/*- 4 * Copyright (c) 1999 The NetBSD Foundation, Inc. 5 * All rights reserved. 6 * 7 * This code is derived from software contributed to The NetBSD Foundation 8 * by Jason R. Thorpe of the Numerical Aerospace Simulation Facility, 9 * NASA Ames Research Center. 10 * 11 * Redistribution and use in source and binary forms, with or without 12 * modification, are permitted provided that the following conditions 13 * are met: 14 * 1. Redistributions of source code must retain the above copyright 15 * notice, this list of conditions and the following disclaimer. 16 * 2. Redistributions in binary form must reproduce the above copyright 17 * notice, this list of conditions and the following disclaimer in the 18 * documentation and/or other materials provided with the distribution. 19 * 20 * THIS SOFTWARE IS PROVIDED BY THE NETBSD FOUNDATION, INC. AND CONTRIBUTORS 21 * ``AS IS'' AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED 22 * TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR 23 * PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE FOUNDATION OR CONTRIBUTORS 24 * BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR 25 * CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF 26 * SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS 27 * INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN 28 * CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) 29 * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE 30 * POSSIBILITY OF SUCH DAMAGE. 31 */ 32 33/* 34 * Copyright (c) 1998 by Matthew Jacob 35 * NASA AMES Research Center. 36 * All rights reserved. 37 * 38 * Redistribution and use in source and binary forms, with or without 39 * modification, are permitted provided that the following conditions 40 * are met: 41 * 1. Redistributions of source code must retain the above copyright 42 * notice immediately at the beginning of the file, without modification, 43 * this list of conditions, and the following disclaimer. 44 * 2. Redistributions in binary form must reproduce the above copyright 45 * notice, this list of conditions and the following disclaimer in the 46 * documentation and/or other materials provided with the distribution. 47 * 3. The name of the author may not be used to endorse or promote products 48 * derived from this software without specific prior written permission. 49 * 50 * THIS SOFTWARE IS PROVIDED BY THE AUTHOR AND CONTRIBUTORS ``AS IS'' AND 51 * ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE 52 * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE 53 * ARE DISCLAIMED. IN NO EVENT SHALL THE AUTHOR OR CONTRIBUTORS BE LIABLE FOR 54 * ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL 55 * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS 56 * OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) 57 * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT 58 * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY 59 * OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF 60 * SUCH DAMAGE. 61 */ 62 63/* 64 * MCPCIA mcbus to PCI bus adapter 65 * found on AlphaServer 4100 systems. 66 */ 67 68#include <sys/cdefs.h> /* RCS ID & Copyright macro defns */ 69 70__KERNEL_RCSID(0, "$NetBSD: mcpcia.c,v 1.33 2021/06/19 16:13:40 thorpej Exp $"); 71 72#include <sys/param.h> 73#include <sys/systm.h> 74#include <sys/device.h> 75#include <sys/kmem.h> 76 77#include <machine/autoconf.h> 78#include <machine/rpb.h> 79#include <machine/sysarch.h> 80 81#include <alpha/mcbus/mcbusreg.h> 82#include <alpha/mcbus/mcbusvar.h> 83#include <alpha/pci/mcpciareg.h> 84#include <alpha/pci/mcpciavar.h> 85#include <alpha/pci/pci_kn300.h> 86 87#define KV(_addr) ((void *)ALPHA_PHYS_TO_K0SEG((_addr))) 88#define MCPCIA_SYSBASE(mc) \ 89 ((((unsigned long) (mc)->cc_gid) << MCBUS_GID_SHIFT) | \ 90 (((unsigned long) (mc)->cc_mid) << MCBUS_MID_SHIFT) | \ 91 (MCBUS_IOSPACE)) 92 93#define MCPCIA_PROBE(mid, gid) \ 94 badaddr((void *)KV(((((unsigned long) gid) << MCBUS_GID_SHIFT) | \ 95 (((unsigned long) mid) << MCBUS_MID_SHIFT) | \ 96 (MCBUS_IOSPACE) | MCPCIA_PCI_BRIDGE | _MCPCIA_PCI_REV)), \ 97 sizeof(uint32_t)) 98 99static int mcpciamatch(device_t, cfdata_t, void *); 100static void mcpciaattach(device_t, device_t, void *); 101 102CFATTACH_DECL_NEW(mcpcia, sizeof(struct mcpcia_softc), 103 mcpciamatch, mcpciaattach, NULL, NULL); 104 105void mcpcia_init0(struct mcpcia_config *, int); 106 107/* 108 * We have one statically-allocated mcpcia_config structure; this is 109 * the one used for the console (which, coincidentally, is the only 110 * MCPCIA with an EISA adapter attached to it). 111 */ 112struct mcpcia_config mcpcia_console_configuration; 113 114static int mcpcia_bus_get_window(int, int, 115 struct alpha_bus_space_translation *abst); 116 117static int 118mcpciamatch(device_t parent, cfdata_t cf, void *aux) 119{ 120 struct mcbus_dev_attach_args *ma = aux; 121 if (ma->ma_type == MCBUS_TYPE_PCI) 122 return (1); 123 return (0); 124} 125 126static void 127mcpciaattach(device_t parent, device_t self, void *aux) 128{ 129 struct mcbus_dev_attach_args *ma = aux; 130 struct mcpcia_softc *mcp = device_private(self); 131 struct mcpcia_config *ccp; 132 struct pcibus_attach_args pba; 133 uint32_t ctl; 134 135 /* 136 * Make sure this MCPCIA exists... 137 */ 138 if (MCPCIA_PROBE(ma->ma_mid, ma->ma_gid)) { 139 mcp->mcpcia_cc = NULL; 140 printf(" (not present)\n"); 141 return; 142 } 143 printf("\n"); 144 145 /* 146 * Determine if we're the console's MCPCIA. 147 */ 148 if (ma->ma_mid == mcpcia_console_configuration.cc_mid && 149 ma->ma_gid == mcpcia_console_configuration.cc_gid) 150 ccp = &mcpcia_console_configuration; 151 else { 152 ccp = kmem_zalloc(sizeof(struct mcpcia_config), KM_SLEEP); 153 ccp->cc_mid = ma->ma_mid; 154 ccp->cc_gid = ma->ma_gid; 155 } 156 157 mcp->mcpcia_dev = self; 158 mcp->mcpcia_cc = ccp; 159 ccp->cc_sc = mcp; 160 161 /* This initializes cc_sysbase so we can do register access. */ 162 mcpcia_init0(ccp, 1); 163 164 ctl = REGVAL(MCPCIA_PCI_REV(ccp)); 165 aprint_normal_dev(self, 166 "Horse Revision %d, %s Handed Saddle Revision %d," 167 " CAP Revision %d\n", HORSE_REV(ctl), 168 (SADDLE_TYPE(ctl) & 1)? "Right": "Left", SADDLE_REV(ctl), 169 CAP_REV(ctl)); 170 171 mcpcia_dma_init(ccp); 172 173 /* 174 * Set up interrupts 175 */ 176 pci_kn300_pickintr(ccp); 177 178 /* 179 * Attach PCI bus 180 */ 181 pba.pba_iot = &ccp->cc_iot; 182 pba.pba_memt = &ccp->cc_memt; 183 pba.pba_dmat = /* start with direct, may change... */ 184 alphabus_dma_get_tag(&ccp->cc_dmat_direct, ALPHA_BUS_PCI); 185 pba.pba_dmat64 = NULL; 186 pba.pba_pc = &ccp->cc_pc; 187 pba.pba_bus = 0; 188 pba.pba_bridgetag = NULL; 189 pba.pba_flags = PCI_FLAGS_IO_OKAY | PCI_FLAGS_MEM_OKAY | 190 PCI_FLAGS_MRL_OKAY | PCI_FLAGS_MRM_OKAY | PCI_FLAGS_MWI_OKAY; 191 config_found(self, &pba, pcibusprint, CFARG_EOL); 192 193 /* 194 * Clear any errors that may have occurred during the probe 195 * sequence. 196 */ 197 REGVAL(MCPCIA_CAP_ERR(ccp)) = 0xFFFFFFFF; 198 alpha_mb(); 199} 200 201void 202mcpcia_init(void) 203{ 204 struct mcpcia_config *ccp = &mcpcia_console_configuration; 205 int i; 206 207 /* 208 * Look for all of the MCPCIAs on the system. One of them 209 * will have an EISA attached to it. This MCPCIA is the 210 * only one that can be used for the console. Once we find 211 * that one, initialize it. 212 */ 213 214 for (i = 0; i < MCPCIA_PER_MCBUS; i++) { 215 ccp->cc_mid = mcbus_mcpcia_probe_order[i]; 216 /* 217 * XXX If we ever support more than one MCBUS, we'll 218 * XXX have to probe for them, and map them to unit 219 * XXX numbers. 220 */ 221 ccp->cc_gid = MCBUS_GID_FROM_INSTANCE(0); 222 ccp->cc_sysbase = MCPCIA_SYSBASE(ccp); 223 224 if (badaddr((void *)ALPHA_PHYS_TO_K0SEG(MCPCIA_PCI_REV(ccp)), 225 sizeof(uint32_t))) 226 continue; 227 228 if (EISA_PRESENT(REGVAL(MCPCIA_PCI_REV(ccp)))) { 229 mcpcia_init0(ccp, 0); 230 231 alpha_bus_window_count[ALPHA_BUS_TYPE_PCI_IO] = 2; 232 alpha_bus_window_count[ALPHA_BUS_TYPE_PCI_MEM] = 3; 233 234 alpha_bus_get_window = mcpcia_bus_get_window; 235 return; 236 } 237 } 238 239 panic("mcpcia_init: unable to find EISA bus"); 240} 241 242void 243mcpcia_init0(struct mcpcia_config *ccp, int mallocsafe) 244{ 245 uint32_t ctl; 246 247 if (ccp->cc_initted == 0) { 248 /* don't do these twice since they set up extents */ 249 mcpcia_bus_io_init(&ccp->cc_iot, ccp); 250 mcpcia_bus_mem_init(&ccp->cc_memt, ccp); 251 } 252 ccp->cc_mallocsafe = mallocsafe; 253 254 mcpcia_pci_init(&ccp->cc_pc, ccp); 255 256 /* 257 * Establish a precalculated base for convenience's sake. 258 */ 259 ccp->cc_sysbase = MCPCIA_SYSBASE(ccp); 260 261 /* 262 * Disable interrupts and clear errors prior to probing 263 */ 264 REGVAL(MCPCIA_INT_MASK0(ccp)) = 0; 265 REGVAL(MCPCIA_INT_MASK1(ccp)) = 0; 266 REGVAL(MCPCIA_CAP_ERR(ccp)) = 0xFFFFFFFF; 267 alpha_mb(); 268 269 if (ccp == &mcpcia_console_configuration) { 270 /* 271 * Use this opportunity to also find out the MID and CPU 272 * type of the currently running CPU (that's us, billybob....) 273 */ 274 ctl = REGVAL(MCPCIA_WHOAMI(ccp)); 275 mcbus_primary.mcbus_cpu_mid = MCBUS_CPU_MID(ctl); 276 if ((MCBUS_CPU_INFO(ctl) & CPU_Fill_Err) == 0 && 277 mcbus_primary.mcbus_valid == 0) { 278 mcbus_primary.mcbus_bcache = 279 MCBUS_CPU_INFO(ctl) & CPU_BCacheMask; 280 mcbus_primary.mcbus_valid = 1; 281 } 282 alpha_mb(); 283 } 284 285 ccp->cc_initted = 1; 286} 287 288#ifdef TEST_PROBE_DEATH 289static void 290die_heathen_dog(void *arg) 291{ 292 struct mcpcia_config *ccp = arg; 293 294 /* this causes a fatal machine check (0x670) */ 295 REGVAL(MCPCIA_CAP_DIAG(ccp)) |= CAP_DIAG_MC_ADRPE; 296} 297#endif 298 299void 300mcpcia_config_cleanup(void) 301{ 302 volatile uint32_t ctl; 303 struct mcpcia_softc *mcp; 304 struct mcpcia_config *ccp; 305 int i; 306 extern struct cfdriver mcpcia_cd; 307 308 /* 309 * Turn on Hard, Soft error interrupts. Maybe i2c too. 310 */ 311 for (i = 0; i < mcpcia_cd.cd_ndevs; i++) { 312 if ((mcp = device_lookup_private(&mcpcia_cd, i)) == NULL) 313 continue; 314 315 ccp = mcp->mcpcia_cc; 316 if (ccp == NULL) 317 continue; 318 319 ctl = REGVAL(MCPCIA_INT_MASK0(ccp)); 320 ctl |= MCPCIA_GEN_IENABL; 321 REGVAL(MCPCIA_INT_MASK0(ccp)) = ctl; 322 alpha_mb(); 323 324 /* force stall while write completes */ 325 ctl = REGVAL(MCPCIA_INT_MASK0(ccp)); 326 } 327#ifdef TEST_PROBE_DEATH 328 (void) timeout (die_heathen_dog, &mcpcia_console_configuration, 329 30 * hz); 330#endif 331} 332 333static int 334mcpcia_bus_get_window(int type, int window, 335 struct alpha_bus_space_translation *abst) 336{ 337 struct mcpcia_config *ccp = &mcpcia_console_configuration; 338 bus_space_tag_t st; 339 340 switch (type) { 341 case ALPHA_BUS_TYPE_PCI_IO: 342 st = &ccp->cc_iot; 343 break; 344 345 case ALPHA_BUS_TYPE_PCI_MEM: 346 st = &ccp->cc_memt; 347 break; 348 349 default: 350 panic("mcpcia_bus_get_window"); 351 } 352 353 return (alpha_bus_space_get_window(st, window, abst)); 354} 355