irongate_pci.c revision 1.12 
1/* $NetBSD: irongate_pci.c,v 1.12 2021/06/25 03:45:59 thorpej Exp $ */
2
3/*-
4 * Copyright (c) 2000 The NetBSD Foundation, Inc.
5 * All rights reserved.
6 *
7 * This code is derived from software contributed to The NetBSD Foundation
8 * by Jason R. Thorpe.
9 *
10 * Redistribution and use in source and binary forms, with or without
11 * modification, are permitted provided that the following conditions
12 * are met:
13 * 1. Redistributions of source code must retain the above copyright
14 *    notice, this list of conditions and the following disclaimer.
15 * 2. Redistributions in binary form must reproduce the above copyright
16 *    notice, this list of conditions and the following disclaimer in the
17 *    documentation and/or other materials provided with the distribution.
18 *
19 * THIS SOFTWARE IS PROVIDED BY THE NETBSD FOUNDATION, INC. AND CONTRIBUTORS
20 * ``AS IS'' AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED
21 * TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR
22 * PURPOSE ARE DISCLAIMED.  IN NO EVENT SHALL THE FOUNDATION OR CONTRIBUTORS
23 * BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR
24 * CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF
25 * SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS
26 * INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN
27 * CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE)
28 * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE
29 * POSSIBILITY OF SUCH DAMAGE.
30 */
31
32/*
33 * PCI Configuration Space support for the AMD 751 (``Irongate'') core logic
34 * chipset.
35 */
36
37#include <sys/cdefs.h>			/* RCS ID & Copyright macro defns */
38
39__KERNEL_RCSID(0, "$NetBSD: irongate_pci.c,v 1.12 2021/06/25 03:45:59 thorpej Exp $");
40
41#include <sys/param.h>
42#include <sys/systm.h>
43#include <sys/kernel.h>
44#include <sys/device.h>
45
46#include <dev/pci/pcireg.h>
47#include <dev/pci/pcivar.h>
48#include <alpha/pci/irongatereg.h>
49#include <alpha/pci/irongatevar.h>
50
51static pcireg_t	irongate_conf_read(void *, pcitag_t, int);
52static void	irongate_conf_write(void *, pcitag_t, int, pcireg_t);
53
54/* AMD 751 systems are always single-processor, so this is easy. */
55#define	PCI_CONF_LOCK(s)	(s) = splhigh()
56#define	PCI_CONF_UNLOCK(s)	splx((s))
57
58#define	PCI_CONF_ADDR	(IRONGATE_IO_BASE|IRONGATE_CONFADDR)
59#define	PCI_CONF_DATA	(IRONGATE_IO_BASE|IRONGATE_CONFDATA)
60
61#define	REGVAL(r)	(*(volatile uint32_t *)ALPHA_PHYS_TO_K0SEG(r))
62
63void
64irongate_pci_init(pci_chipset_tag_t pc, void *v)
65{
66
67	pc->pc_conf_v = v;
68	pc->pc_conf_read = irongate_conf_read;
69	pc->pc_conf_write = irongate_conf_write;
70}
71
72static pcireg_t
73irongate_conf_read(void *ipv, pcitag_t tag, int offset)
74{
75	int b, d;
76
77	if ((unsigned int)offset >= PCI_CONF_SIZE)
78		return (pcireg_t) -1;
79
80	struct irongate_config * const icp = ipv;
81
82	/*
83	 * The AMD 751 appears in PCI configuration space, but
84	 * that is ... counter-intuitive to the way we normally
85	 * attach PCI-Host bridges on the Alpha.  So, filter out
86	 * the AMD 751 device here.  We provide a private entry
87	 * point for getting at it from machdep code.
88	 */
89	pci_decompose_tag(&icp->ic_pc, tag, &b, &d, NULL);
90	if (b == 0 && d == IRONGATE_PCIHOST_DEV && offset == PCI_ID_REG)
91		return ((pcireg_t) -1);
92
93	return (irongate_conf_read0(ipv, tag, offset));
94}
95
96pcireg_t
97irongate_conf_read0(void *ipv, pcitag_t tag, int offset)
98{
99	pcireg_t data;
100	int s;
101
102	if ((unsigned int)offset >= PCI_CONF_SIZE)
103		return (pcireg_t) -1;
104
105	PCI_CONF_LOCK(s);
106	REGVAL(PCI_CONF_ADDR) = (CONFADDR_ENABLE | tag | (offset & 0xff));
107	alpha_mb();
108	data = REGVAL(PCI_CONF_DATA);
109	REGVAL(PCI_CONF_ADDR) = 0;
110	alpha_mb();
111	PCI_CONF_UNLOCK(s);
112
113	return (data);
114}
115
116static void
117irongate_conf_write(void *ipv, pcitag_t tag, int offset, pcireg_t data)
118{
119	int s;
120
121	if ((unsigned int)offset >= PCI_CONF_SIZE)
122		return;
123
124	PCI_CONF_LOCK(s);
125	REGVAL(PCI_CONF_ADDR) = (CONFADDR_ENABLE | tag | (offset & 0xff));
126	alpha_mb();
127	REGVAL(PCI_CONF_DATA) = data;
128	alpha_mb();
129	REGVAL(PCI_CONF_ADDR) = 0;
130	alpha_mb();
131	PCI_CONF_UNLOCK(s);
132}
133