irongate_pci.c revision 1.1 
1/* $NetBSD: irongate_pci.c,v 1.1 2000/06/01 20:30:30 thorpej Exp $ */
2
3/*-
4 * Copyright (c) 2000 The NetBSD Foundation, Inc.
5 * All rights reserved.
6 *
7 * This code is derived from software contributed to The NetBSD Foundation
8 * by Jason R. Thorpe.
9 *
10 * Redistribution and use in source and binary forms, with or without
11 * modification, are permitted provided that the following conditions
12 * are met:
13 * 1. Redistributions of source code must retain the above copyright
14 *    notice, this list of conditions and the following disclaimer.
15 * 2. Redistributions in binary form must reproduce the above copyright
16 *    notice, this list of conditions and the following disclaimer in the
17 *    documentation and/or other materials provided with the distribution.
18 * 3. All advertising materials mentioning features or use of this software
19 *    must display the following acknowledgement:
20 *	This product includes software developed by the NetBSD
21 *	Foundation, Inc. and its contributors.
22 * 4. Neither the name of The NetBSD Foundation nor the names of its
23 *    contributors may be used to endorse or promote products derived
24 *    from this software without specific prior written permission.
25 *
26 * THIS SOFTWARE IS PROVIDED BY THE NETBSD FOUNDATION, INC. AND CONTRIBUTORS
27 * ``AS IS'' AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED
28 * TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR
29 * PURPOSE ARE DISCLAIMED.  IN NO EVENT SHALL THE FOUNDATION OR CONTRIBUTORS
30 * BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR
31 * CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF
32 * SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS
33 * INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN
34 * CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE)
35 * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE
36 * POSSIBILITY OF SUCH DAMAGE.
37 */
38
39/*
40 * PCI Configuration Space support for the AMD 751 (``Irongate'') core logic
41 * chipset.
42 */
43
44#include <sys/cdefs.h>			/* RCS ID & Copyright macro defns */
45
46__KERNEL_RCSID(0, "$NetBSD: irongate_pci.c,v 1.1 2000/06/01 20:30:30 thorpej Exp $");
47
48#include <sys/param.h>
49#include <sys/systm.h>
50#include <sys/kernel.h>
51#include <sys/device.h>
52#include <vm/vm.h>
53
54#include <dev/pci/pcireg.h>
55#include <dev/pci/pcivar.h>
56#include <alpha/pci/irongatereg.h>
57#include <alpha/pci/irongatevar.h>
58
59void		irongate_attach_hook __P((struct device *, struct device *,
60		    struct pcibus_attach_args *));
61int		irongate_bus_maxdevs __P((void *, int));
62pcitag_t	irongate_make_tag __P((void *, int, int, int));
63void		irongate_decompose_tag __P((void *, pcitag_t, int *, int *,
64		    int *));
65pcireg_t	irongate_conf_read __P((void *, pcitag_t, int));
66void		irongate_conf_write __P((void *, pcitag_t, int, pcireg_t));
67
68/* AMD 751 systems are always single-processor, so this is easy. */
69#define	PCI_CONF_LOCK(s)	(s) = splhigh()
70#define	PCI_CONF_UNLOCK(s)	splx((s))
71
72#define	PCI_CONF_ADDR	(IRONGATE_IO_BASE|IRONGATE_CONFADDR)
73#define	PCI_CONF_DATA	(IRONGATE_IO_BASE|IRONGATE_CONFDATA)
74
75#define	REGVAL(r)	(*(__volatile u_int32_t *)ALPHA_PHYS_TO_K0SEG(r))
76
77void
78irongate_pci_init(pci_chipset_tag_t pc, void *v)
79{
80
81	pc->pc_conf_v = v;
82	pc->pc_attach_hook = irongate_attach_hook;
83	pc->pc_bus_maxdevs = irongate_bus_maxdevs;
84	pc->pc_make_tag = irongate_make_tag;
85	pc->pc_decompose_tag = irongate_decompose_tag;
86	pc->pc_conf_read = irongate_conf_read;
87	pc->pc_conf_write = irongate_conf_write;
88}
89
90void
91irongate_attach_hook(struct device *parent, struct device *self,
92    struct pcibus_attach_args *pba)
93{
94}
95
96int
97irongate_bus_maxdevs(void *ipv, int busno)
98{
99
100	return 32;
101}
102
103pcitag_t
104irongate_make_tag(void *ipv, int b, int d, int f)
105{
106
107	return (b << 16) | (d << 11) | (f << 8);
108}
109
110void
111irongate_decompose_tag(void *ipv, pcitag_t tag, int *bp, int *dp, int *fp)
112{
113
114	if (bp != NULL)
115		*bp = (tag >> 16) & 0xff;
116	if (dp != NULL)
117		*dp = (tag >> 11) & 0x1f;
118	if (fp != NULL)
119		*fp = (tag >> 8) & 0x7;
120}
121
122pcireg_t
123irongate_conf_read(void *ipv, pcitag_t tag, int offset)
124{
125	int d;
126
127	/*
128	 * The AMD 751 appears in PCI configuration space, but
129	 * that is ... counter-intuitive to the way we normally
130	 * attach PCI-Host bridges on the Alpha.  So, filter out
131	 * the AMD 751 device here.  We provide a private entry
132	 * point for getting at it from machdep code.
133	 */
134	irongate_decompose_tag(ipv, tag, NULL, &d, NULL);
135	if (d == IRONGATE_PCIHOST_DEV)
136		return ((pcireg_t) -1);
137
138	return (irongate_conf_read0(ipv, tag, offset));
139}
140
141pcireg_t
142irongate_conf_read0(void *ipv, pcitag_t tag, int offset)
143{
144	pcireg_t data;
145	int s;
146
147	PCI_CONF_LOCK(s);
148	REGVAL(PCI_CONF_ADDR) = (CONFADDR_ENABLE | tag | (offset & 0xff));
149	alpha_mb();
150	data = REGVAL(PCI_CONF_DATA);
151	REGVAL(PCI_CONF_ADDR) = 0;
152	alpha_mb();
153	PCI_CONF_UNLOCK(s);
154
155	return (data);
156}
157
158void
159irongate_conf_write(void *ipv, pcitag_t tag, int offset, pcireg_t data)
160{
161	int s;
162
163	PCI_CONF_LOCK(s);
164	REGVAL(PCI_CONF_ADDR) = (CONFADDR_ENABLE | tag | (offset & 0xff));
165	alpha_mb();
166	REGVAL(PCI_CONF_DATA) = data;
167	alpha_mb();
168	REGVAL(PCI_CONF_ADDR) = 0;
169	alpha_mb();
170	PCI_CONF_UNLOCK(s);
171}
172