cia.c revision 1.34 
1/* $NetBSD: cia.c,v 1.34 1998/05/12 19:07:21 thorpej Exp $ */
2
3/*
4 * Copyright (c) 1995, 1996 Carnegie-Mellon University.
5 * All rights reserved.
6 *
7 * Author: Chris G. Demetriou
8 *
9 * Permission to use, copy, modify and distribute this software and
10 * its documentation is hereby granted, provided that both the copyright
11 * notice and this permission notice appear in all copies of the
12 * software, derivative works or modified versions, and any portions
13 * thereof, and that both notices appear in supporting documentation.
14 *
15 * CARNEGIE MELLON ALLOWS FREE USE OF THIS SOFTWARE IN ITS "AS IS"
16 * CONDITION.  CARNEGIE MELLON DISCLAIMS ANY LIABILITY OF ANY KIND
17 * FOR ANY DAMAGES WHATSOEVER RESULTING FROM THE USE OF THIS SOFTWARE.
18 *
19 * Carnegie Mellon requests users of this software to return to
20 *
21 *  Software Distribution Coordinator  or  Software.Distribution@CS.CMU.EDU
22 *  School of Computer Science
23 *  Carnegie Mellon University
24 *  Pittsburgh PA 15213-3890
25 *
26 * any improvements or extensions that they make and grant Carnegie the
27 * rights to redistribute these changes.
28 */
29
30#include "opt_dec_eb164.h"
31#include "opt_dec_kn20aa.h"
32
33#include <sys/cdefs.h>			/* RCS ID & Copyright macro defns */
34
35__KERNEL_RCSID(0, "$NetBSD: cia.c,v 1.34 1998/05/12 19:07:21 thorpej Exp $");
36
37#include <sys/param.h>
38#include <sys/systm.h>
39#include <sys/kernel.h>
40#include <sys/malloc.h>
41#include <sys/device.h>
42#include <vm/vm.h>
43
44#include <machine/autoconf.h>
45#include <machine/rpb.h>
46
47#include <dev/isa/isareg.h>
48#include <dev/isa/isavar.h>
49
50#include <dev/pci/pcireg.h>
51#include <dev/pci/pcivar.h>
52#include <alpha/pci/ciareg.h>
53#include <alpha/pci/ciavar.h>
54#ifdef DEC_KN20AA
55#include <alpha/pci/pci_kn20aa.h>
56#endif
57#ifdef DEC_EB164
58#include <alpha/pci/pci_eb164.h>
59#endif
60
61int	ciamatch __P((struct device *, struct cfdata *, void *));
62void	ciaattach __P((struct device *, struct device *, void *));
63
64struct cfattach cia_ca = {
65	sizeof(struct cia_softc), ciamatch, ciaattach,
66};
67
68extern struct cfdriver cia_cd;
69
70static int	ciaprint __P((void *, const char *pnp));
71
72/* There can be only one. */
73int ciafound;
74struct cia_config cia_configuration;
75
76int
77ciamatch(parent, match, aux)
78	struct device *parent;
79	struct cfdata *match;
80	void *aux;
81{
82	struct confargs *ca = aux;
83
84	/* Make sure that we're looking for a CIA. */
85	if (strcmp(ca->ca_name, cia_cd.cd_name) != 0)
86		return (0);
87
88	if (ciafound)
89		return (0);
90
91	return (1);
92}
93
94/*
95 * Set up the chipset's function pointers.
96 */
97void
98cia_init(ccp, mallocsafe)
99	struct cia_config *ccp;
100	int mallocsafe;
101{
102
103	ccp->cc_hae_mem = REGVAL(CIA_CSR_HAE_MEM);
104	ccp->cc_hae_io = REGVAL(CIA_CSR_HAE_IO);
105	ccp->cc_rev = REGVAL(CIA_CSR_REV);
106
107	/*
108	 * Revisions >= 2 have the CNFG register.
109	 */
110	if (ccp->cc_rev >= 2)
111		ccp->cc_cnfg = REGVAL(CIA_CSR_CNFG);
112	else
113		ccp->cc_cnfg = 0;
114
115	/*
116	 * If revision is > 2 non-masked, assume Pyxis.  (XXX iffy?)
117	 */
118	if (ccp->cc_rev > 2)
119		ccp->cc_flags |= CCF_ISPYXIS;
120
121	ccp->cc_rev &= REV_MASK;
122
123	if (!ccp->cc_initted) {
124		/* don't do these twice since they set up extents */
125		cia_swiz_bus_io_init(&ccp->cc_iot, ccp);
126		cia_swiz_bus_mem_init(&ccp->cc_memt, ccp);
127	}
128	ccp->cc_mallocsafe = mallocsafe;
129
130	cia_pci_init(&ccp->cc_pc, ccp);
131
132	cia_dma_init(ccp);
133
134	ccp->cc_initted = 1;
135}
136
137void
138ciaattach(parent, self, aux)
139	struct device *parent, *self;
140	void *aux;
141{
142	struct cia_softc *sc = (struct cia_softc *)self;
143	struct cia_config *ccp;
144	struct pcibus_attach_args pba;
145	char bits[64];
146
147	/* note that we've attached the chipset; can't have 2 CIAs. */
148	ciafound = 1;
149
150	/*
151	 * set up the chipset's info; done once at console init time
152	 * (maybe), but we must do it here as well to take care of things
153	 * that need to use memory allocation.
154	 */
155	ccp = sc->sc_ccp = &cia_configuration;
156	cia_init(ccp, 1);
157
158	/*
159	 * If we're a Pyxis, print the revision number, otherwise
160	 * the revision number indicates ALCOR or ALCOR2.
161	 */
162	if (ccp->cc_flags & CCF_ISPYXIS)
163		printf(": DECchip 21174 Core Logic chipset, revision %d\n",
164		    ccp->cc_rev);
165	else
166		printf(": DECchip 2117%d Core Logic chipset\n", ccp->cc_rev);
167	if (ccp->cc_cnfg)
168		printf("%s: extended capabilities: %s\n", self->dv_xname,
169		    bitmask_snprintf(ccp->cc_cnfg, CIA_CSR_CNFG_BITS,
170		    bits, sizeof(bits)));
171
172	switch (hwrpb->rpb_type) {
173#ifdef DEC_KN20AA
174	case ST_DEC_KN20AA:
175		pci_kn20aa_pickintr(ccp);
176#ifdef EVCNT_COUNTERS
177		evcnt_attach(self, "intr", &kn20aa_intr_evcnt);
178#endif
179		break;
180#endif
181
182#ifdef DEC_EB164
183	case ST_EB164:
184		pci_eb164_pickintr(ccp);
185#ifdef EVCNT_COUNTERS
186		evcnt_attach(self, "intr", &eb164_intr_evcnt);
187#endif
188		break;
189#endif
190
191	default:
192		panic("ciaattach: shouldn't be here, really...");
193	}
194
195	pba.pba_busname = "pci";
196	pba.pba_iot = &ccp->cc_iot;
197	pba.pba_memt = &ccp->cc_memt;
198	pba.pba_dmat =
199	    alphabus_dma_get_tag(&ccp->cc_dmat_direct, ALPHA_BUS_PCI);
200	pba.pba_pc = &ccp->cc_pc;
201	pba.pba_bus = 0;
202	pba.pba_flags = PCI_FLAGS_IO_ENABLED | PCI_FLAGS_MEM_ENABLED;
203	config_found(self, &pba, ciaprint);
204}
205
206static int
207ciaprint(aux, pnp)
208	void *aux;
209	const char *pnp;
210{
211	register struct pcibus_attach_args *pba = aux;
212
213	/* only PCIs can attach to CIAs; easy. */
214	if (pnp)
215		printf("%s at %s", pba->pba_busname, pnp);
216	printf(" bus %d", pba->pba_bus);
217	return (UNCONF);
218}
219