apecs.c revision 1.23 
1/* $NetBSD: apecs.c,v 1.23 1997/09/02 12:40:18 thorpej Exp $ */
2
3/*
4 * Copyright (c) 1995, 1996 Carnegie-Mellon University.
5 * All rights reserved.
6 *
7 * Author: Chris G. Demetriou
8 *
9 * Permission to use, copy, modify and distribute this software and
10 * its documentation is hereby granted, provided that both the copyright
11 * notice and this permission notice appear in all copies of the
12 * software, derivative works or modified versions, and any portions
13 * thereof, and that both notices appear in supporting documentation.
14 *
15 * CARNEGIE MELLON ALLOWS FREE USE OF THIS SOFTWARE IN ITS "AS IS"
16 * CONDITION.  CARNEGIE MELLON DISCLAIMS ANY LIABILITY OF ANY KIND
17 * FOR ANY DAMAGES WHATSOEVER RESULTING FROM THE USE OF THIS SOFTWARE.
18 *
19 * Carnegie Mellon requests users of this software to return to
20 *
21 *  Software Distribution Coordinator  or  Software.Distribution@CS.CMU.EDU
22 *  School of Computer Science
23 *  Carnegie Mellon University
24 *  Pittsburgh PA 15213-3890
25 *
26 * any improvements or extensions that they make and grant Carnegie the
27 * rights to redistribute these changes.
28 */
29
30#include <machine/options.h>		/* Config options headers */
31#include <sys/cdefs.h>			/* RCS ID & Copyright macro defns */
32
33__KERNEL_RCSID(0, "$NetBSD: apecs.c,v 1.23 1997/09/02 12:40:18 thorpej Exp $");
34
35#include <sys/param.h>
36#include <sys/systm.h>
37#include <sys/kernel.h>
38#include <sys/malloc.h>
39#include <sys/device.h>
40#include <vm/vm.h>
41
42#include <machine/autoconf.h>
43#include <machine/rpb.h>
44
45#include <dev/isa/isareg.h>
46#include <dev/isa/isavar.h>
47
48#include <dev/pci/pcireg.h>
49#include <dev/pci/pcivar.h>
50#include <alpha/pci/apecsreg.h>
51#include <alpha/pci/apecsvar.h>
52#ifdef DEC_2100_A50
53#include <alpha/pci/pci_2100_a50.h>
54#endif
55
56int	apecsmatch __P((struct device *, struct cfdata *, void *));
57void	apecsattach __P((struct device *, struct device *, void *));
58
59struct cfattach apecs_ca = {
60	sizeof(struct apecs_softc), apecsmatch, apecsattach,
61};
62
63struct cfdriver apecs_cd = {
64	NULL, "apecs", DV_DULL,
65};
66
67static int	apecsprint __P((void *, const char *pnp));
68
69/* There can be only one. */
70int apecsfound;
71struct apecs_config apecs_configuration;
72
73int
74apecsmatch(parent, match, aux)
75	struct device *parent;
76	struct cfdata *match;
77	void *aux;
78{
79	struct confargs *ca = aux;
80
81	/* Make sure that we're looking for an APECS. */
82	if (strcmp(ca->ca_name, apecs_cd.cd_name) != 0)
83		return (0);
84
85	if (apecsfound)
86		return (0);
87
88	return (1);
89}
90
91/*
92 * Set up the chipset's function pointers.
93 */
94void
95apecs_init(acp, mallocsafe)
96	struct apecs_config *acp;
97	int mallocsafe;
98{
99	acp->ac_comanche_pass2 =
100	    (REGVAL(COMANCHE_ED) & COMANCHE_ED_PASS2) != 0;
101	acp->ac_memwidth =
102	    (REGVAL(COMANCHE_GCR) & COMANCHE_GCR_WIDEMEM) != 0 ? 128 : 64;
103	acp->ac_epic_pass2 =
104	    (REGVAL(EPIC_DCSR) & EPIC_DCSR_PASS2) != 0;
105
106	acp->ac_haxr1 = REGVAL(EPIC_HAXR1);
107	acp->ac_haxr2 = REGVAL(EPIC_HAXR2);
108
109	/*
110	 * Can't set up SGMAP data here; can be called before malloc().
111	 * XXX THIS COMMENT NO LONGER MAKES SENSE.
112	 */
113
114	if (!acp->ac_initted) {
115		/* don't do these twice since they set up extents */
116		apecs_bus_io_init(&acp->ac_iot, acp);
117		apecs_bus_mem_init(&acp->ac_memt, acp);
118	}
119	acp->ac_mallocsafe = mallocsafe;
120
121	apecs_pci_init(&acp->ac_pc, acp);
122
123	/* Turn off DMA window enables in PCI Base Reg 1. */
124	REGVAL(EPIC_PCI_BASE_1) = 0;
125	alpha_mb();
126
127	/* XXX SGMAP? */
128
129	/* XXX XXX BEGIN XXX XXX */
130	{							/* XXX */
131		extern vm_offset_t alpha_XXX_dmamap_or;		/* XXX */
132		alpha_XXX_dmamap_or = 0x40000000;		/* XXX */
133	}							/* XXX */
134	/* XXX XXX END XXX XXX */
135
136	acp->ac_initted = 1;
137}
138
139void
140apecsattach(parent, self, aux)
141	struct device *parent, *self;
142	void *aux;
143{
144	struct apecs_softc *sc = (struct apecs_softc *)self;
145	struct apecs_config *acp;
146	struct pcibus_attach_args pba;
147
148	/* note that we've attached the chipset; can't have 2 APECSes. */
149	apecsfound = 1;
150
151	/*
152	 * set up the chipset's info; done once at console init time
153	 * (maybe), but doesn't hurt to do twice.
154	 */
155	acp = sc->sc_acp = &apecs_configuration;
156	apecs_init(acp, 1);
157
158	/* XXX SGMAP FOO */
159
160	printf(": DECchip %s Core Logic chipset\n",
161	    acp->ac_memwidth == 128 ? "21072" : "21071");
162	printf("%s: DC21071-CA pass %d, %d-bit memory bus\n",
163	    self->dv_xname, acp->ac_comanche_pass2 ? 2 : 1, acp->ac_memwidth);
164	printf("%s: DC21071-DA pass %d\n", self->dv_xname,
165	    acp->ac_epic_pass2 ? 2 : 1);
166	/* XXX print bcache size */
167
168	if (!acp->ac_epic_pass2)
169		printf("WARNING: 21071-DA NOT PASS2... NO BETS...\n");
170
171	switch (hwrpb->rpb_type) {
172#ifdef DEC_2100_A50
173	case ST_DEC_2100_A50:
174		pci_2100_a50_pickintr(acp);
175		break;
176#endif
177
178	default:
179		panic("apecsattach: shouldn't be here, really...");
180	}
181
182	pba.pba_busname = "pci";
183	pba.pba_iot = acp->ac_iot;
184	pba.pba_memt = acp->ac_memt;
185	pba.pba_pc = &acp->ac_pc;
186	pba.pba_bus = 0;
187	pba.pba_flags = PCI_FLAGS_IO_ENABLED | PCI_FLAGS_MEM_ENABLED;
188	config_found(self, &pba, apecsprint);
189}
190
191static int
192apecsprint(aux, pnp)
193	void *aux;
194	const char *pnp;
195{
196	register struct pcibus_attach_args *pba = aux;
197
198	/* only PCIs can attach to APECSes; easy. */
199	if (pnp)
200		printf("%s at %s", pba->pba_busname, pnp);
201	printf(" bus %d", pba->pba_bus);
202	return (UNCONF);
203}
204