pmap.h revision 1.31
1/* $NetBSD: pmap.h,v 1.31 1999/05/24 20:11:58 thorpej Exp $ */ 2 3/*- 4 * Copyright (c) 1998, 1999 The NetBSD Foundation, Inc. 5 * All rights reserved. 6 * 7 * This code is derived from software contributed to The NetBSD Foundation 8 * by Jason R. Thorpe of the Numerical Aerospace Simulation Facility, 9 * NASA Ames Research Center and by Chris G. Demetriou. 10 * 11 * Redistribution and use in source and binary forms, with or without 12 * modification, are permitted provided that the following conditions 13 * are met: 14 * 1. Redistributions of source code must retain the above copyright 15 * notice, this list of conditions and the following disclaimer. 16 * 2. Redistributions in binary form must reproduce the above copyright 17 * notice, this list of conditions and the following disclaimer in the 18 * documentation and/or other materials provided with the distribution. 19 * 3. All advertising materials mentioning features or use of this software 20 * must display the following acknowledgement: 21 * This product includes software developed by the NetBSD 22 * Foundation, Inc. and its contributors. 23 * 4. Neither the name of The NetBSD Foundation nor the names of its 24 * contributors may be used to endorse or promote products derived 25 * from this software without specific prior written permission. 26 * 27 * THIS SOFTWARE IS PROVIDED BY THE NETBSD FOUNDATION, INC. AND CONTRIBUTORS 28 * ``AS IS'' AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED 29 * TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR 30 * PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE FOUNDATION OR CONTRIBUTORS 31 * BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR 32 * CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF 33 * SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS 34 * INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN 35 * CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) 36 * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE 37 * POSSIBILITY OF SUCH DAMAGE. 38 */ 39 40/* 41 * Copyright (c) 1987 Carnegie-Mellon University 42 * Copyright (c) 1991, 1993 43 * The Regents of the University of California. All rights reserved. 44 * 45 * This code is derived from software contributed to Berkeley by 46 * the Systems Programming Group of the University of Utah Computer 47 * Science Department. 48 * 49 * Redistribution and use in source and binary forms, with or without 50 * modification, are permitted provided that the following conditions 51 * are met: 52 * 1. Redistributions of source code must retain the above copyright 53 * notice, this list of conditions and the following disclaimer. 54 * 2. Redistributions in binary form must reproduce the above copyright 55 * notice, this list of conditions and the following disclaimer in the 56 * documentation and/or other materials provided with the distribution. 57 * 3. All advertising materials mentioning features or use of this software 58 * must display the following acknowledgement: 59 * This product includes software developed by the University of 60 * California, Berkeley and its contributors. 61 * 4. Neither the name of the University nor the names of its contributors 62 * may be used to endorse or promote products derived from this software 63 * without specific prior written permission. 64 * 65 * THIS SOFTWARE IS PROVIDED BY THE REGENTS AND CONTRIBUTORS ``AS IS'' AND 66 * ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE 67 * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE 68 * ARE DISCLAIMED. IN NO EVENT SHALL THE REGENTS OR CONTRIBUTORS BE LIABLE 69 * FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL 70 * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS 71 * OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) 72 * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT 73 * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY 74 * OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF 75 * SUCH DAMAGE. 76 * 77 * @(#)pmap.h 8.1 (Berkeley) 6/10/93 78 */ 79 80#ifndef _PMAP_MACHINE_ 81#define _PMAP_MACHINE_ 82 83#if defined(_KERNEL) && !defined(_LKM) 84#include "opt_multiprocessor.h" 85#endif 86 87#include <sys/lock.h> 88#include <sys/queue.h> 89 90#include <machine/pte.h> 91 92/* 93 * Machine-dependent virtual memory state. 94 * 95 * If we ever support processor numbers higher than 63, we'll have to 96 * rethink the CPU mask. 97 * 98 * Note pm_asn and pm_asngen are arrays allocated in pmap_create(). 99 * Their size is based on the PCS count from the HWRPB, and indexed 100 * by processor ID (from `whami'). 101 * 102 * The kernel pmap is a special case; it gets statically-allocated 103 * arrays which hold enough for ALPHA_MAXPROCS. 104 */ 105struct pmap { 106 TAILQ_ENTRY(pmap) pm_list; /* list of all pmaps */ 107 pt_entry_t *pm_lev1map; /* level 1 map */ 108 int pm_count; /* pmap reference count */ 109 struct simplelock pm_slock; /* lock on pmap */ 110 struct pmap_statistics pm_stats; /* pmap statistics */ 111 long pm_nlev2; /* level 2 pt page count */ 112 long pm_nlev3; /* level 3 pt page count */ 113 unsigned int *pm_asn; /* address space number */ 114 unsigned long *pm_asngen; /* ASN generation number */ 115 unsigned long pm_cpus; /* mask of CPUs using pmap */ 116}; 117 118typedef struct pmap *pmap_t; 119 120#define PMAP_ASN_RESERVED 0 /* reserved for Lev1map users */ 121 122extern struct pmap kernel_pmap_store; 123 124#define pmap_kernel() (&kernel_pmap_store) 125 126/* 127 * For each vm_page_t, there is a list of all currently valid virtual 128 * mappings of that page. An entry is a pv_entry_t, the list is pv_table. 129 */ 130typedef struct pv_entry { 131 LIST_ENTRY(pv_entry) pv_list; /* pv_entry list */ 132 struct pmap *pv_pmap; /* pmap where mapping lies */ 133 vaddr_t pv_va; /* virtual address for mapping */ 134 pt_entry_t *pv_pte; /* PTE that maps the VA */ 135} *pv_entry_t; 136 137/* 138 * The head of the list of pv_entry_t's, also contains page attributes. 139 */ 140struct pv_head { 141 LIST_HEAD(, pv_entry) pvh_list; /* pv_entry list */ 142 struct simplelock pvh_slock; /* lock on this head */ 143 int pvh_attrs; /* page attributes */ 144 int pvh_usage; /* page usage */ 145 int pvh_refcnt; /* special use ref count */ 146}; 147 148/* pvh_attrs */ 149#define PGA_MODIFIED 0x01 /* modified */ 150#define PGA_REFERENCED 0x02 /* referenced */ 151 152/* pvh_usage */ 153#define PGU_NORMAL 0 /* free or normal use */ 154#define PGU_PVENT 1 /* PV entries */ 155#define PGU_L1PT 2 /* level 1 page table */ 156#define PGU_L2PT 3 /* level 2 page table */ 157#define PGU_L3PT 4 /* level 3 page table */ 158 159#define PGU_ISPTPAGE(pgu) ((pgu) >= PGU_L1PT) 160 161#define PGU_STRINGS \ 162{ \ 163 "normal", \ 164 "pvent", \ 165 "l1pt", \ 166 "l2pt", \ 167 "l3pt", \ 168} 169 170#ifdef _KERNEL 171 172#ifndef _LKM 173#include "opt_new_scc_driver.h" 174#include "opt_dec_3000_300.h" /* XXX */ 175#include "opt_dec_3000_500.h" /* XXX */ 176#include "opt_dec_kn8ae.h" /* XXX */ 177 178#if defined(NEW_SCC_DRIVER) 179#if defined(DEC_KN8AE) 180#define _PMAP_MAY_USE_PROM_CONSOLE 181#endif 182#else /* ! NEW_SCC_DRIVER */ 183#if defined(DEC_3000_300) \ 184 || defined(DEC_3000_500) \ 185 || defined(DEC_KN8AE) /* XXX */ 186#define _PMAP_MAY_USE_PROM_CONSOLE /* XXX */ 187#endif /* XXX */ 188#endif /* NEW_SCC_DRIVER */ 189 190#if defined(MULTIPROCESSOR) 191void pmap_tlb_shootdown __P((pmap_t, vaddr_t, pt_entry_t)); 192void pmap_do_tlb_shootdown __P((void)); 193#endif /* MULTIPROCESSOR */ 194#endif /* _LKM */ 195 196#define pmap_resident_count(pmap) ((pmap)->pm_stats.resident_count) 197#define pmap_wired_count(pmap) ((pmap)->pm_stats.wired_count) 198 199extern pt_entry_t *VPT; /* Virtual Page Table */ 200 201#define PMAP_STEAL_MEMORY /* enable pmap_steal_memory() */ 202 203/* 204 * Alternate mapping hooks for pool pages. Avoids thrashing the TLB. 205 */ 206#define PMAP_MAP_POOLPAGE(pa) ALPHA_PHYS_TO_K0SEG((pa)) 207#define PMAP_UNMAP_POOLPAGE(va) ALPHA_K0SEG_TO_PHYS((va)) 208 209paddr_t vtophys __P((vaddr_t)); 210 211/* Machine-specific functions. */ 212void pmap_bootstrap __P((paddr_t ptaddr, u_int maxasn, u_long ncpuids)); 213void pmap_emulate_reference __P((struct proc *p, vaddr_t v, 214 int user, int write)); 215#ifdef _PMAP_MAY_USE_PROM_CONSOLE 216int pmap_uses_prom_console __P((void)); 217#endif 218 219#define pmap_pte_pa(pte) (PG_PFNUM(*(pte)) << PGSHIFT) 220#define pmap_pte_prot(pte) (*(pte) & PG_PROT) 221#define pmap_pte_w(pte) (*(pte) & PG_WIRED) 222#define pmap_pte_v(pte) (*(pte) & PG_V) 223#define pmap_pte_pv(pte) (*(pte) & PG_PVLIST) 224#define pmap_pte_asm(pte) (*(pte) & PG_ASM) 225#define pmap_pte_exec(pte) (*(pte) & PG_EXEC) 226 227#define pmap_pte_set_w(pte, v) \ 228do { \ 229 if (v) \ 230 *(pte) |= PG_WIRED; \ 231 else \ 232 *(pte) &= ~PG_WIRED; \ 233} while (0) 234 235#define pmap_pte_w_chg(pte, nw) ((nw) ^ pmap_pte_w(pte)) 236 237#define pmap_pte_set_prot(pte, np) \ 238do { \ 239 *(pte) &= ~PG_PROT; \ 240 *(pte) |= (np); \ 241} while (0) 242 243#define pmap_pte_prot_chg(pte, np) ((np) ^ pmap_pte_prot(pte)) 244 245static __inline pt_entry_t *pmap_l2pte __P((pmap_t, vaddr_t, pt_entry_t *)); 246static __inline pt_entry_t *pmap_l3pte __P((pmap_t, vaddr_t, pt_entry_t *)); 247 248#define pmap_l1pte(pmap, v) \ 249 (&(pmap)->pm_lev1map[l1pte_index((vaddr_t)(v))]) 250 251static __inline pt_entry_t * 252pmap_l2pte(pmap, v, l1pte) 253 pmap_t pmap; 254 vaddr_t v; 255 pt_entry_t *l1pte; 256{ 257 pt_entry_t *lev2map; 258 259 if (l1pte == NULL) { 260 l1pte = pmap_l1pte(pmap, v); 261 if (pmap_pte_v(l1pte) == 0) 262 return (NULL); 263 } 264 265 lev2map = (pt_entry_t *)ALPHA_PHYS_TO_K0SEG(pmap_pte_pa(l1pte)); 266 return (&lev2map[l2pte_index(v)]); 267} 268 269static __inline pt_entry_t * 270pmap_l3pte(pmap, v, l2pte) 271 pmap_t pmap; 272 vaddr_t v; 273 pt_entry_t *l2pte; 274{ 275 pt_entry_t *l1pte, *lev2map, *lev3map; 276 277 if (l2pte == NULL) { 278 l1pte = pmap_l1pte(pmap, v); 279 if (pmap_pte_v(l1pte) == 0) 280 return (NULL); 281 282 lev2map = (pt_entry_t *)ALPHA_PHYS_TO_K0SEG(pmap_pte_pa(l1pte)); 283 l2pte = &lev2map[l2pte_index(v)]; 284 if (pmap_pte_v(l2pte) == 0) 285 return (NULL); 286 } 287 288 lev3map = (pt_entry_t *)ALPHA_PHYS_TO_K0SEG(pmap_pte_pa(l2pte)); 289 return (&lev3map[l3pte_index(v)]); 290} 291 292/* 293 * Macros for locking pmap structures. 294 * 295 * Note that the kernel pmap can be accessed from interrupt context, 296 * so when we have the kernel pmap lock asserted, we must block any 297 * interrupts that can cause memory allocation, otherwise we can deadlock 298 * if an interrupt occurs and causes us to recurse into the pmap and 299 * attempt to try to assert the lock while it is already held. 300 * 301 * No other pmap can be accessed from interrupt context, so we do not 302 * need to block interrupts in any other case. 303 */ 304#define PMAP_LOCK(pmap, s) \ 305do { \ 306 if ((pmap) == pmap_kernel()) \ 307 (s) = splimp(); \ 308 simple_lock(&(pmap)->pm_slock); \ 309} while (0) 310 311#define PMAP_UNLOCK(pmap, s) \ 312do { \ 313 simple_unlock(&(pmap)->pm_slock); \ 314 if ((pmap) == pmap_kernel()) \ 315 splx((s)); \ 316} while (0) 317 318#endif /* _KERNEL */ 319 320#endif /* _PMAP_MACHINE_ */ 321