1#mach: crisv32 2#output: Basic clock cycles, total @: 18\n 3#output: Memory source stall cycles: 0\n 4#output: Memory read-after-write stall cycles: 0\n 5#output: Movem source stall cycles: 0\n 6#output: Movem destination stall cycles: 6\n 7#output: Movem address stall cycles: 0\n 8#output: Multiplication source stall cycles: 0\n 9#output: Jump source stall cycles: 0\n 10#output: Branch misprediction stall cycles: 0\n 11#output: Jump target stall cycles: 0\n 12#sim: --cris-cycles=basic 13 14; Check that movem to register followed by register write dword 15; to one of the registers is logged as needing two stall cycles, 16; regardless of size. 17 18 .include "testutils.inc" 19 startnostack 20 move.d 0f,r5 21 moveq 0,r8 22 moveq 0,r9 23 24 movem [r5],r4 25 move.d r8,r1 26 addq 1,r1 ; 2 cycles. 27 28 movem [r5],r4 29 move.w r8,r1 30 addq 1,r1 ; 2 cycles. 31 32 movem [r5],r4 33 move.b r8,r1 34 addq 1,r1 ; 2 cycles. 35 36 movem [r5],r4 37 move.b r8,r1 38 addq 1,r9 39 40 movem [r5],r4 41 move.d r8,r1 42 addq 1,r8 43 44 break 15 45 46 .data 47 .p2align 5 480: 49 .dword 0b 50 .dword 0b 51 .dword 0b 52 .dword 0b 53 .dword 0b 54