150476Speter//Original:/proj/frio/dv/testcases/core/c_progctrl_raise_rt_i_n/c_progctrl_raise_rt_i_n.dsp 220206Spst// Spec Reference: progctrl raise rti rtn 320206Spst# mach: bfin 420206Spst# sim: --environment operating 520206Spst 620206Spst#include "test.h" 720206Spst.include "testutils.inc" 820206Spststart 920206Spst 1020206Spstinclude(std.inc) 1120206Spstinclude(selfcheck.inc) 1220206Spstinclude(gen_int.inc) 1320206SpstINIT_R_REGS(0); 1420206SpstINIT_P_REGS(0); 1520206SpstINIT_I_REGS(0); // initialize the dsp address regs 1620206SpstINIT_M_REGS(0); 1720206SpstINIT_L_REGS(0); 1820206SpstINIT_B_REGS(0); 1920206SpstCHECK_INIT(p5, 0xe0000000); 2020206Spst 2120206Spst#ifndef STACKSIZE 2220206Spst#define STACKSIZE 0x10 2320206Spst#endif 2420206Spst#ifndef EVT 2520206Spst#define EVT 0xFFE02000 2620206Spst#endif 2720206Spst#ifndef EVT15 2820206Spst#define EVT15 0xFFE0203C 2948782Sn_hibma#endif 3020206Spst#ifndef EVT_OVERRIDE 3120206Spst#define EVT_OVERRIDE 0xFFE02100 3220206Spst#endif 3320206Spst#ifndef ITABLE 3420206Spst#define ITABLE 0xF0000000 3520206Spst#endif 3620206Spst 3720206SpstGEN_INT_INIT(ITABLE) // set location for interrupt table 3820206Spst 3920206Spst// 4020206Spst// Reset/Bootstrap Code 4120206Spst// (Here we should set the processor operating modes, initialize registers, 4220206Spst// etc.) 4320206Spst// 4420206Spst 4520206SpstBOOT: 4620206Spst 4720206Spst 4820206SpstLD32_LABEL(sp, KSTACK); // setup the stack pointer 4920206SpstFP = SP; // and frame pointer 5020206Spst 5120206SpstLD32(p0, EVT); // Setup Event Vectors and Handlers 5220206SpstLD32_LABEL(r0, EHANDLE); // Emulation Handler (Int0) 5320206Spst [ P0 ++ ] = R0; 5420206Spst 5520206SpstLD32_LABEL(r0, RHANDLE); // Reset Handler (Int1) 5620206Spst [ P0 ++ ] = R0; 5720206Spst 5820206SpstLD32_LABEL(r0, NHANDLE); // NMI Handler (Int2) 5920206Spst [ P0 ++ ] = R0; 6020206Spst 6120206SpstLD32_LABEL(r0, XHANDLE); // Exception Handler (Int3) 6220206Spst [ P0 ++ ] = R0; 6320206Spst 6420206Spst [ P0 ++ ] = R0; // IVT4 not used 6520206Spst 6653961SacheLD32_LABEL(r0, HWHANDLE); // HW Error Handler (Int5) 6720206Spst [ P0 ++ ] = R0; 6820206Spst 6920206SpstLD32_LABEL(r0, THANDLE); // Timer Handler (Int6) 7020206Spst [ P0 ++ ] = R0; 7120206Spst 7220206SpstLD32_LABEL(r0, I7HANDLE); // IVG7 Handler 7320206Spst [ P0 ++ ] = R0; 7420206Spst 7520206SpstLD32_LABEL(r0, I8HANDLE); // IVG8 Handler 7620206Spst [ P0 ++ ] = R0; 7720206Spst 7853961SacheLD32_LABEL(r0, I9HANDLE); // IVG9 Handler 7953943Sache [ P0 ++ ] = R0; 8053943Sache 8153943SacheLD32_LABEL(r0, I10HANDLE);// IVG10 Handler 8253943Sache [ P0 ++ ] = R0; 8353943Sache 8453943SacheLD32_LABEL(r0, I11HANDLE);// IVG11 Handler 8553943Sache [ P0 ++ ] = R0; 8653943Sache 8753943SacheLD32_LABEL(r0, I12HANDLE);// IVG12 Handler 8853943Sache [ P0 ++ ] = R0; 8953943Sache 9053943SacheLD32_LABEL(r0, I13HANDLE);// IVG13 Handler 9153943Sache [ P0 ++ ] = R0; 9253943Sache 9353943SacheLD32_LABEL(r0, I14HANDLE);// IVG14 Handler 9453943Sache [ P0 ++ ] = R0; 9553961Sache 9653943SacheLD32_LABEL(r0, I15HANDLE);// IVG15 Handler 9753943Sache [ P0 ++ ] = R0; 9853961Sache 9953961SacheLD32(p0, EVT_OVERRIDE); 10053961Sache R0 = 0; 10153961Sache [ P0 ++ ] = R0; 102 R0 = -1; // Change this to mask interrupts (*) 103 [ P0 ] = R0; // IMASK 104 105DUMMY: 106 107 R0 = 0 (Z); 108 109LT0 = r0; // set loop counters to something deterministic 110LB0 = r0; 111LC0 = r0; 112LT1 = r0; 113LB1 = r0; 114LC1 = r0; 115 116ASTAT = r0; // reset other internal regs 117 118// The following code sets up the test for running in USER mode 119 120LD32_LABEL(r0, STARTUSER);// One gets to user mode by doing a 121 // ReturnFromInterrupt (RTI) 122RETI = r0; // We need to load the return address 123 124// Comment the following line for a USER Mode test 125 126JUMP STARTSUP; // jump to code start for SUPERVISOR mode 127 128RTI; 129 130STARTSUP: 131LD32_LABEL(p1, BEGIN); 132 133LD32(p0, EVT15); 134 [ P0 ] = P1; // IVG15 (General) handler (Int 15) load with start 135 136RAISE 15; // after we RTI, INT 15 should be taken 137 138NOP; // Workaround for Bug 217 139RTI; 140 141// 142// The Main Program 143// 144STARTUSER: 145LD32_LABEL(sp, USTACK); // setup the stack pointer 146FP = SP; // set frame pointer 147JUMP BEGIN; 148 149//********************************************************************* 150 151BEGIN: 152 153 // COMMENT the following line for USER MODE tests 154 [ -- SP ] = RETI; // enable interrupts in supervisor mode 155 156 // **** YOUR CODE GOES HERE **** 157 158 159 160 // PUT YOUR TEST HERE! 161 // Can't Raise 0, 3, or 4 162 // Raise 1 requires some intelligence so the test 163 // doesn't loop forever - use SFTRESET bit in SEQSTAT (TBD) 164RAISE 2; // RTN 165RAISE 5; // RTI 166RAISE 6; // RTI 167RAISE 7; // RTI 168RAISE 8; // RTI 169RAISE 9; // RTI 170RAISE 10; // RTI 171RAISE 11; // RTI 172RAISE 12; // RTI 173RAISE 13; // RTI 174RAISE 14; // RTI 175RAISE 15; // RTI 176 177CHECKREG(r0, 0x0000000B); 178CHECKREG(r1, 0x0000000C); 179CHECKREG(r2, 0x0000000D); 180CHECKREG(r3, 0x0000000E); 181CHECKREG(r4, 0x00000007); 182CHECKREG(r5, 0x00000008); 183CHECKREG(r6, 0x00000009); 184CHECKREG(r7, 0x0000000A); 185R0 = I0; 186R1 = I1; 187R2 = I2; 188R3 = I3; 189R4 = M0; 190CHECKREG(r0, 0x00000002); 191CHECKREG(r1, 0x00000000); 192CHECKREG(r2, 0x00000005); 193CHECKREG(r3, 0x00000006); 194CHECKREG(r4, 0x00000007); 195 196 197END: 198dbg_pass; // End the test 199 200//********************************************************************* 201 202// 203// Handlers for Events 204// 205 206EHANDLE: // Emulation Handler 0 207RTE; 208 209RHANDLE: // Reset Handler 1 210RTI; 211 212NHANDLE: // NMI Handler 2 213 R0 = 2; 214RTN; 215 216XHANDLE: // Exception Handler 3 217 R1 = 3; 218RTX; 219 220HWHANDLE: // HW Error Handler 5 221 R2 = 5; 222RTI; 223 224THANDLE: // Timer Handler 6 225 R3 = 6; 226RTI; 227 228I7HANDLE: // IVG 7 Handler 229 R4 = 7; 230RTI; 231 232I8HANDLE: // IVG 8 Handler 233 R5 = 8; 234RTI; 235 236I9HANDLE: // IVG 9 Handler 237 R6 = 9; 238RTI; 239 240I10HANDLE: // IVG 10 Handler 241 R7 = 10; 242RTI; 243 244I11HANDLE: // IVG 11 Handler 245 I0 = R0; 246 I1 = R1; 247 I2 = R2; 248 I3 = R3; 249 M0 = R4; 250 R0 = 11; 251RTI; 252 253I12HANDLE: // IVG 12 Handler 254 R1 = 12; 255RTI; 256 257I13HANDLE: // IVG 13 Handler 258 R2 = 13; 259RTI; 260 261I14HANDLE: // IVG 14 Handler 262 R3 = 14; 263RTI; 264 265I15HANDLE: // IVG 15 Handler 266 R4 = 15; 267RTI; 268 269NOP;NOP;NOP;NOP;NOP;NOP;NOP; // needed for icache bug 270 271// 272// Data Segment 273// 274 275.data 276DATA: 277 .space (0x10); 278 279// Stack Segments (Both Kernel and User) 280 281 .space (STACKSIZE); 282KSTACK: 283 284 .space (STACKSIZE); 285USTACK: 286