1//Original:/testcases/core/c_loopsetup_prelc/c_loopsetup_prelc.dsp 2// Spec Reference: loopsetup preload lc0 lc1 3# mach: bfin 4 5.include "testutils.inc" 6 start 7 8 9INIT_R_REGS 0; 10 11ASTAT = r0; 12 13//p0 = 2; 14P1 = 3; 15P2 = 4; 16P3 = 5; 17P4 = 6; 18P5 = 7; 19SP = 8; 20FP = 9; 21 22R0 = 0x05; 23R1 = 0x10; 24R2 = 0x20; 25R3 = 0x30; 26R4 = 0x40 (X); 27R5 = 0x50 (X); 28R6 = 0x60 (X); 29R7 = 0x70 (X); 30 31LC0 = R0; 32LC1 = R1; 33 34LSETUP ( start1 , end1 ) LC0; 35start1: R0 += 1; 36 R1 += -2; 37end1: R2 += 3; 38 R3 += 4; 39LSETUP ( start2 , end2 ) LC1; 40start2: R4 += 4; 41end2: R5 += -5; 42 R3 += 1; 43LSETUP ( start3 , end3 ) LC0 = P3; 44start3: R6 += 6; 45end3: R7 += -7; 46 R3 += 1; 47CHECKREG r0, 0x0000000a; 48CHECKREG r1, 0x00000006; 49CHECKREG r2, 0x0000002f; 50CHECKREG r3, 0x00000036; 51CHECKREG r4, 0x00000080; 52CHECKREG r5, 0x00000000; 53CHECKREG r6, 0x0000007E; 54CHECKREG r7, 0x0000004D; 55 56R0 = 0x05; 57R1 = 0x10; 58R2 = 0x20; 59R3 = 0x30; 60R4 = 0x40 (X); 61R5 = 0x50 (X); 62R6 = 0x60 (X); 63R7 = 0x70 (X); 64 65LC0 = R2; 66LC1 = R3; 67 68LSETUP ( start4 , end4 ) LC0; 69start4: R0 += 1; 70 R1 += -2; 71end4: R2 += 3; 72 R3 += 4; 73LSETUP ( start5 , end5 ) LC1; 74start5: R4 += 1; 75end5: R5 += -2; 76 R3 += 3; 77 78LSETUP ( start6 , end6 ) LC0 = P2; 79start6: R6 += 4; 80end6: R7 += -5; 81 R3 += 6; 82CHECKREG r0, 0x00000025; 83CHECKREG r1, 0xFFFFFFD0; 84CHECKREG r2, 0x00000080; 85CHECKREG r3, 0x0000003D; 86CHECKREG r4, 0x00000070; 87CHECKREG r5, 0xFFFFFFF0; 88CHECKREG r6, 0x00000070; 89CHECKREG r7, 0x0000005C; 90LSETUP ( start7 , end7 ) LC1; 91start7: R4 += 4; 92end7: R5 += -5; 93 R3 += 6; 94CHECKREG r0, 0x00000025; 95CHECKREG r1, 0xFFFFFFD0; 96CHECKREG r2, 0x00000080; 97CHECKREG r3, 0x00000043; 98CHECKREG r4, 0x00000074; 99CHECKREG r5, 0xFFFFFFEB; 100CHECKREG r6, 0x00000070; 101CHECKREG r7, 0x0000005C; 102 103P1 = 12; 104P2 = 14; 105P3 = 16; 106P4 = 18; 107P5 = 20; 108SP = 22; 109FP = 24; 110 111R0 = 0x05; 112R1 = 0x10; 113R2 = 0x20; 114R3 = 0x30; 115R4 = 0x40 (X); 116R5 = 0x50 (X); 117R6 = 0x25; 118R7 = 0x32; 119 120LC0 = R6; 121LC1 = R7; 122LSETUP ( start11 , end11 ) LC0; 123start11: R0 += 1; 124 R1 += -1; 125end11: R2 += 1; 126 R3 += 1; 127LSETUP ( start12 , end12 ) LC1; 128start12: R4 += 1; 129end12: R5 += -1; 130 R3 += 1; 131LSETUP ( start13 , end13 ) LC1 = P4; 132start13: R6 += 1; 133end13: R7 += -1; 134 R3 += 1; 135CHECKREG r0, 0x0000002A; 136CHECKREG r1, 0xFFFFFFEB; 137CHECKREG r2, 0x00000045; 138CHECKREG r3, 0x00000033; 139CHECKREG r4, 0x00000072; 140CHECKREG r5, 0x0000001E; 141CHECKREG r6, 0x00000037; 142CHECKREG r7, 0x00000020; 143 144 145pass 146