1//Original:/testcases/core/c_ldimmhalf_h_dr/c_ldimmhalf_h_dr.dsp
2// Spec Reference: ldimmhalf h dreg
3# mach: bfin
4
5.include "testutils.inc"
6	start
7
8
9
10INIT_R_REGS -1;
11
12
13// test Dreg
14R0.H = 0x0000;
15R1.H = 0x0002;
16R2.H = 0x0004;
17R3.H = 0x0006;
18R4.H = 0x0008;
19R5.H = 0x000a;
20R6.H = 0x000c;
21R7.H = 0x000e;
22CHECKREG r0, 0x0000ffff;
23CHECKREG r1, 0x0002ffff;
24CHECKREG r2, 0x0004ffff;
25CHECKREG r3, 0x0006ffff;
26CHECKREG r4, 0x0008ffff;
27CHECKREG r5, 0x000affff;
28CHECKREG r6, 0x000cffff;
29CHECKREG r7, 0x000effff;
30
31R0.H = 0x0000;
32R1.H = 0x0020;
33R2.H = 0x0040;
34R3.H = 0x0060;
35R4.H = 0x0080;
36R5.H = 0x00a0;
37R6.H = 0x00c0;
38R7.H = 0x00e0;
39CHECKREG r0, 0x0000ffff;
40CHECKREG r1, 0x0020ffff;
41CHECKREG r2, 0x0040ffff;
42CHECKREG r3, 0x0060ffff;
43CHECKREG r4, 0x0080ffff;
44CHECKREG r5, 0x00a0ffff;
45CHECKREG r6, 0x00c0ffff;
46CHECKREG r7, 0x00e0ffff;
47
48R0.H = 0x0000;
49R1.H = 0x0200;
50R2.H = 0x0400;
51R3.H = 0x0600;
52R4.H = 0x0800;
53R5.H = 0x0a00;
54R6.H = 0x0c00;
55R7.H = 0x0e00;
56CHECKREG r0, 0x0000ffff;
57CHECKREG r1, 0x0200ffff;
58CHECKREG r2, 0x0400ffff;
59CHECKREG r3, 0x0600ffff;
60CHECKREG r4, 0x0800ffff;
61CHECKREG r5, 0x0a00ffff;
62CHECKREG r6, 0x0c00ffff;
63CHECKREG r7, 0x0e00ffff;
64
65R0.H = 0x0000;
66R1.H = 0x2000;
67R2.H = 0x4000;
68R3.H = 0x6000;
69R4.H = 0x8000;
70R5.H = 0xa000;
71R6.H = 0xc000;
72R7.H = 0xe000;
73CHECKREG r0, 0x0000ffff;
74CHECKREG r1, 0x2000ffff;
75CHECKREG r2, 0x4000ffff;
76CHECKREG r3, 0x6000ffff;
77CHECKREG r4, 0x8000ffff;
78CHECKREG r5, 0xa000ffff;
79CHECKREG r6, 0xc000ffff;
80CHECKREG r7, 0xe000ffff;
81
82pass
83