1//Original:/testcases/core/c_dsp32shiftim_lmix/c_dsp32shiftim_lmix.dsp 2# mach: bfin 3 4.include "testutils.inc" 5 start 6 7 8// Spec Reference: dsp32shiftimm lshift: mix 9 10 11 12 13imm32 r4, 0x00000000; 14imm32 r5, 0x00000000; 15imm32 r6, 0x00000000; 16imm32 r7, 0x00000000; 17 18 19// Lshift (Logical ) 20// Lshift : positive data, count (+)=left (half reg) 21imm32 r0, 0x00010001; 22imm32 r1, 1; 23imm32 r2, 0x00020002; 24imm32 r3, 2; 25R4.H = R0.H << 1; 26R4.L = R0.L << 1; /* r4 = 0x00020002 */ 27R5.H = R2.H << 2; 28R5.L = R2.L << 2; /* r5 = 0x00080008 */ 29R6 = R0 << 1 (V); /* r6 = 0x00020002 */ 30R7 = R2 << 2 (V); /* r7 = 0x00080008 */ 31CHECKREG r4, 0x00020002; 32CHECKREG r5, 0x00080008; 33CHECKREG r6, 0x00020002; 34CHECKREG r7, 0x00080008; 35 36// Lshift : (full reg) 37imm32 r1, 3; 38imm32 r3, 4; 39R6 = R0 << 3; /* r6 = 0x00080010 */ 40R7 = R2 << 4; 41CHECKREG r6, 0x00080008; /* r7 = 0x00100010 */ 42CHECKREG r7, 0x00200020; 43 44A0 = 0; 45A0.L = R0.L; 46A0.H = R0.H; 47A0 = A0 << 3; /* a0 = 0x00080008 */ 48R5 = A0.w; /* r5 = 0x00080008 */ 49CHECKREG r5, 0x00080008; 50 51imm32 r4, 0x30000003; 52imm32 r1, 1; 53R5 = R4 << 1; /* r5 = 0x60000006 */ 54imm32 r1, 2; 55R6 = R4 << 2; /* r6 = 0xc000000c like LSHIFT */ 56CHECKREG r5, 0x60000006; 57CHECKREG r6, 0xc000000c; 58 59 60// lshift : count (-)=right (half reg) 61imm32 r0, 0x10001000; 62imm32 r1, -1; 63imm32 r2, 0x10001000; 64imm32 r3, -2; 65R4.H = R0.H >> 1; 66R4.L = R0.L >> 1; /* r4 = 0x08000800 */ 67R5.H = R2.H >> 2; 68R5.L = R2.L >> 2; /* r4 = 0x04000400 */ 69R6 = R0 >> 1 (V); /* r4 = 0x08000800 */ 70R7 = R2 >> 2 (V); /* r4 = 0x04000400 */ 71CHECKREG r4, 0x08000800; 72CHECKREG r5, 0x04000400; 73CHECKREG r6, 0x08000800; 74CHECKREG r7, 0x04000400; 75 76// lshift : (full reg) 77imm32 r1, -3; 78imm32 r3, -4; 79R6 = R0 >> 3; /* r6 = 0x02000200 */ 80R7 = R2 >> 4; /* r7 = 0x01000100 */ 81CHECKREG r6, 0x02000200; 82CHECKREG r7, 0x01000100; 83 84// NEGATIVE 85// lshift : NEGATIVE data, count (+)=left (half reg) 86imm32 r0, 0xc00f800f; 87imm32 r1, 1; 88imm32 r2, 0xe00fe00f; 89imm32 r3, 2; 90R4.H = R0.H << 1; 91R4.L = R0.L << 1; /* r4 = 0x801e001e */ 92R5.H = R2.H << 2; 93R5.L = R2.L << 2; /* r4 = 0x803c803c */ 94CHECKREG r4, 0x801e001e; 95CHECKREG r5, 0x803c803c; 96 97imm32 r0, 0xc80fe00f; 98imm32 r2, 0xe40fe00f; 99imm32 r1, 4; 100imm32 r3, 5; 101R6 = R0 << 4; /* r6 = 0x80fe00f0 */ 102R7 = R2 << 5; /* r7 = 0x81fc01e0 */ 103CHECKREG r6, 0x80fe00f0; 104CHECKREG r7, 0x81fc01e0; 105 106imm32 r0, 0xf80fe00f; 107imm32 r2, 0xfc0fe00f; 108R6 = R0 << 4; /* r6 = 0x80fe00f0 */ 109R7 = R2 << 5; /* r7 = 0x81fc01e0 */ 110CHECKREG r6, 0x80fe00f0; 111CHECKREG r7, 0x81fc01e0; 112 113 114 115// lshift : NEGATIVE data, count (-)=right (half reg) Working ok 116imm32 r0, 0x80f080f0; 117imm32 r1, -1; 118imm32 r2, 0x80f080f0; 119imm32 r3, -2; 120R4.H = R0.H >> 1; 121R4.L = R0.L >> 1; /* r4 = 0x40784078 */ 122R5.H = R2.H >> 2; 123R5.L = R2.L >> 2; /* r4 = 0x203c203c */ 124CHECKREG r4, 0x40784078; 125CHECKREG r5, 0x203c203c; 126R6 = R0 >> 1 (V); /* r6 = 0x40784078 */ 127R7 = R2 >> 2 (V); /* r7 = 0x203c203c */ 128CHECKREG r6, 0x40784078; 129CHECKREG r7, 0x203c203c; 130 131imm32 r1, -3; 132imm32 r3, -4; 133R6 = R0 >> 3; /* r6 = 0x101e101e */ 134R7 = R2 >> 4; /* r7 = 0x080f080f */ 135CHECKREG r6, 0x101e101e; 136CHECKREG r7, 0x080f080f; 137 138pass 139