1//Original:/testcases/core/c_dsp32mac_dr_a1_s/c_dsp32mac_dr_a1_s.dsp 2// Spec Reference: dsp32mac dr_a1 s (scale by 2 signed fraction with round) 3# mach: bfin 4 5.include "testutils.inc" 6 start 7 8 9 10 11A1 = A0 = 0; 12 13// The result accumulated in A1 , and stored to a reg half 14imm32 r0, 0xa3545abd; 15imm32 r1, 0xbabcfec7; 16imm32 r2, 0xc1a48679; 17imm32 r3, 0xd00a9007; 18imm32 r4, 0xefbca569; 19imm32 r5, 0xcd355a0b; 20imm32 r6, 0xe00c80ad; 21imm32 r7, 0xf78e900a; 22R0.H = ( A1 -= R1.L * R0.L ), A0 += R1.L * R0.L (S2RND); 23R1 = A1.w; 24R2.H = ( A1 += R2.L * R3.H ), A0 -= R2.H * R3.L (S2RND); 25R3 = A1.w; 26R4.H = ( A1 = R4.H * R5.L ), A0 = R4.H * R5.H (S2RND); 27R5 = A1.w; 28R6.H = ( A1 += R6.H * R7.H ), A0 -= R6.L * R7.H (S2RND); 29R7 = A1.w; 30CHECKREG r0, 0x01BC5ABD; 31CHECKREG r1, 0x00DDE22A; 32CHECKREG r2, 0x5CCE8679; 33CHECKREG r3, 0x2E67039E; 34CHECKREG r4, 0xE91EA569; 35CHECKREG r5, 0xF48ECA28; 36CHECKREG r6, 0xED5580AD; 37CHECKREG r7, 0xF6AA7F78; 38 39// The result accumulated in A1, and stored to a reg half (MNOP) 40imm32 r0, 0x63bb8abd; 41imm32 r1, 0xbdbcfec7; 42imm32 r2, 0xab245679; 43imm32 r3, 0xb0b69007; 44imm32 r4, 0xcfbb4569; 45imm32 r5, 0xd235b00b; 46imm32 r6, 0xe00cab0d; 47imm32 r7, 0x678e70bf; 48R0.H = ( A1 += R1.L * R0.L ) (S2RND); 49R1 = A1.w; 50R2.H = ( A1 -= R2.L * R3.H ) (S2RND); 51R3 = A1.w; 52R4.H = ( A1 += R4.H * R5.L ) (S2RND); 53R5 = A1.w; 54R6.H = ( A1 = R6.H * R7.H ) (S2RND); 55R7 = A1.w; 56CHECKREG r0, 0xEF928ABD; 57CHECKREG r1, 0xF7C93D4E; 58CHECKREG r2, 0x5AB45679; 59CHECKREG r3, 0x2D59E942; 60CHECKREG r4, 0x7FFF4569; 61CHECKREG r5, 0x4B80E354; 62CHECKREG r6, 0xCC4CAB0D; 63CHECKREG r7, 0xE6263550; 64 65// The result accumulated in A1 , and stored to a reg half (MNOP) 66imm32 r0, 0x5c54babd; 67imm32 r1, 0x6dccdec7; 68imm32 r2, 0xc12ce679; 69imm32 r3, 0x8c06c007; 70imm32 r4, 0x9fcc4c69; 71imm32 r5, 0xa23c90cb; 72imm32 r6, 0xb00cc00c; 73imm32 r7, 0xc78eac0f; 74 R0.H = A1 , A0 -= R1.L * R0.L (S2RND); 75R1 = A1.w; 76 R2.H = A1 , A0 += R2.H * R3.L (S2RND); 77R3 = A1.w; 78 R4.H = A1 , A0 = R4.H * R5.H (S2RND); 79R5 = A1.w; 80 R6.H = A1 , A0 += R6.L * R7.H (S2RND); 81R7 = A1.w; 82CHECKREG r0, 0xCC4CBABD; 83CHECKREG r1, 0xE6263550; 84CHECKREG r2, 0xCC4CE679; 85CHECKREG r3, 0xE6263550; 86CHECKREG r4, 0xCC4C4C69; 87CHECKREG r5, 0xE6263550; 88CHECKREG r6, 0xCC4CC00C; 89CHECKREG r7, 0xE6263550; 90 91// The result accumulated in A1 , and stored to a reg half 92imm32 r0, 0x3d545abd; 93imm32 r1, 0x5ddcfec7; 94imm32 r2, 0x712d5679; 95imm32 r3, 0x9006d007; 96imm32 r4, 0xafbc4d69; 97imm32 r5, 0xd23590db; 98imm32 r6, 0xd00ca00d; 99imm32 r7, 0x6d8ed00f; 100R0.H = ( A1 = R1.L * R0.L ) (M), A0 += R1.L * R0.L (S2RND); 101R1 = A1.w; 102R2.H = ( A1 = R2.L * R3.H ) (M), A0 -= R2.H * R3.L (S2RND); 103R3 = A1.w; 104R4.H = ( A1 += R4.H * R5.L ) (M), A0 = R4.H * R5.H (S2RND); 105R5 = A1.w; 106R6.H = ( A1 += R6.H * R7.H ) (M), A0 += R6.L * R7.H (S2RND); 107R7 = A1.w; 108CHECKREG r0, 0xFF225ABD; 109CHECKREG r1, 0xFF910EEB; 110CHECKREG r2, 0x614C5679; 111CHECKREG r3, 0x30A616D6; 112CHECKREG r4, 0x06764D69; 113CHECKREG r5, 0x033B2CAA; 114CHECKREG r6, 0xDD6BA00D; 115CHECKREG r7, 0xEEB5AF52; 116 117// The result accumulated in A1 MM=0, and stored to a reg half (MNOP) 118imm32 r0, 0x83e45abd; 119imm32 r1, 0xe8befec7; 120imm32 r2, 0xce84e679; 121imm32 r3, 0x1ce80e07; 122imm32 r4, 0xe1ce85e9; 123imm32 r5, 0x921ce80e; 124imm32 r6, 0x79019e8d; 125imm32 r7, 0x679e90e8; 126R0.H = ( A1 += R1.L * R0.L ) (M,S2RND); 127R1 = A1.w; 128R2.H = ( A1 = R2.L * R3.H ) (M,S2RND); 129R3 = A1.w; 130R4.H = ( A1 += R4.H * R5.L ) (M,S2RND); 131R5 = A1.w; 132R6.H = ( A1 -= R6.H * R7.H ) (M,S2RND); 133R7 = A1.w; 134CHECKREG r0, 0xDC8D5ABD; 135CHECKREG r1, 0xEE46BE3D; 136CHECKREG r2, 0xFA3CE679; 137CHECKREG r3, 0xFD1E19A8; 138CHECKREG r4, 0xC37E85E9; 139CHECKREG r5, 0xE1BF22EC; 140CHECKREG r6, 0x80009E8D; 141CHECKREG r7, 0xB0C50D4E; 142 143 144 145pass 146