1# mach: bfin
2
3// GENERIC PN SEQUENCE GENERATOR
4// Linear Feedback Shift Register
5// -------------------------------
6// This solution implements an LFSR by applying an XOR reduction
7// function to the 40 bit accumulator, XORing the contents of the
8// CC bit, shifting by one the accumulator, and inserting the
9// resulting bit on the open bit slot.
10//  CC --> ----- XOR--------------------------
11// 	   |          |     |     |  |	     |
12// 	   |          |     |     |  |	     |
13//        +------------------------------+   v
14//        | b0 b1 b2 b3          b38 b39 |  in <-- by one
15//        +------------------------------+
16// after:
17//        +------------------------------+
18//        | b1 b2 b3          b38 b39 in |
19//        +------------------------------+
20// The program shown here is a PN sequence generator, and hence
21// does not take any input other than the initial state. However,
22// in order to accept an input, one simply needs to rotate the
23// input sequence via CC prior to applying the XOR reduction.
24
25.include "testutils.inc"
26	start
27
28	loadsym P1, output;
29	init_r_regs 0;
30	ASTAT = R0;
31
32// load Polynomial into  A1
33	A1 = A0 = 0;
34	R0.L = 0x1cd4;
35	R0.H = 0xab18;
36	A1.w = R0;
37	R0.L = 0x008d;
38	A1.x = R0.L;
39
40// load InitState into  A0
41	R0.L = 0x0001;
42	R0.H = 0x0000;
43	A0.w = R0;
44	R0.L = 0x0000;
45	A0.x = R0.L;
46
47	P4 = 4;
48	LSETUP ( l$0 , l$0end ) LC0 = P4;
49	l$0:                          	// **** START l-LOOP *****
50
51	P4 = 32;
52	LSETUP ( m$1 , m$1 ) LC1 = P4;	// **** START m-LOOP *****
53	m$1:
54	A0 = BXORSHIFT( A0 , A1, CC );
55
56// store 16 bits of outdata RL1
57	R1 = A0.w;
58	l$0end:
59	[ P1 ++ ] = R1;
60
61// Check results
62	loadsym I2, output;
63	R0.L = W [ I2 ++ ];	DBGA ( R0.L , 0x5adf );
64	R0.L = W [ I2 ++ ];	DBGA ( R0.L , 0x2fc9 );
65	R0.L = W [ I2 ++ ];	DBGA ( R0.L , 0xbd91 );
66	R0.L = W [ I2 ++ ];	DBGA ( R0.L , 0x5520 );
67	R0.L = W [ I2 ++ ];	DBGA ( R0.L , 0x80d5 );
68	R0.L = W [ I2 ++ ];	DBGA ( R0.L , 0x7fef );
69	R0.L = W [ I2 ++ ];	DBGA ( R0.L , 0x34d1 );
70	R0.L = W [ I2 ++ ];	DBGA ( R0.L , 0x915c );
71	pass
72
73	.data;
74output:
75	.dw 0x0000
76	.dw 0x0000
77	.dw 0x0000
78	.dw 0x0000
79