1// Simulator definition for the micromips DSP ASE. 2// Copyright (C) 2005-2024 Free Software Foundation, Inc. 3// Contributed by Imagination Technologies, Ltd. 4// Written by Andrew Bennett <andrew.bennett@imgtec.com> 5// 6// This file is part of the MIPS sim. 7// 8// This program is free software; you can redistribute it and/or modify 9// it under the terms of the GNU General Public License as published by 10// the Free Software Foundation; either version 3 of the License, or 11// (at your option) any later version. 12// 13// This program is distributed in the hope that it will be useful, 14// but WITHOUT ANY WARRANTY; without even the implied warranty of 15// MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the 16// GNU General Public License for more details. 17// 18// You should have received a copy of the GNU General Public License 19// along with this program. If not, see <http://www.gnu.org/licenses/>. 20 21000000,5.RT,5.RS,0001000100,111100:POOL32A:32::ABSQ_S.PH 22"absq_s.ph r<RT>, r<RS>" 23*micromipsdsp: 24{ 25 do_ph_s_absq (SD_, RT, RS); 26} 27 28000000,5.RT,5.RS,0000000100,111100:POOL32A:32::ABSQ_S.QB 29"absq_s.qb r<RT>, r<RS>" 30*micromipsdsp: 31{ 32 do_qb_s_absq (SD_, RT, RS); 33} 34 35000000,5.RT,5.RS,0010000100,111100:POOL32A:32::ABSQ_S.W 36"absq_s.w r<RT>, r<RS>" 37*micromipsdsp: 38{ 39 do_w_s_absq (SD_, RT, RS); 40} 41 42000000,5.RT,5.RS,5.RD,00000,001101:POOL32A:32::ADDQ.PH 43"addq.ph r<RD>, r<RS>, r<RT>" 44*micromipsdsp: 45{ 46 do_ph_op (SD_, RD, RS, RT, 0, 0); 47} 48 49000000,5.RT,5.RS,5.RD,10000,001101:POOL32A:32::ADDQ_S.PH 50"addq_s.ph r<RD>, r<RS>, r<RT>" 51*micromipsdsp: 52{ 53 do_ph_op (SD_, RD, RS, RT, 0, 1); 54} 55 56000000,5.RT,5.RS,5.RD,01100,000101:POOL32A:32::ADDQ_S.W 57"addq_s.w r<RD>, r<RS>, r<RT>" 58*micromipsdsp: 59{ 60 do_w_op (SD_, RD, RS, RT, 0); 61} 62 63000000,5.RT,5.RS,5.RD,00001,001101:POOL32A:32::ADDQH.PH 64"addqh.ph r<RD>, r<RS>, r<RT>" 65*micromipsdsp: 66{ 67 do_qh_ph_op (SD_, RD, RS, RT, 0, 0); 68} 69 70000000,5.RT,5.RS,5.RD,10001,001101:POOL32A:32::ADDQH_R.PH 71"addqh_r.ph r<RD>, r<RS>, r<RT>" 72*micromipsdsp: 73{ 74 do_qh_ph_op (SD_, RD, RS, RT, 0, 1); 75} 76 77000000,5.RT,5.RS,5.RD,00010,001101:POOL32A:32::ADDQH.W 78"addqh.w r<RD>, r<RS>, r<RT>" 79*micromipsdsp: 80{ 81 do_qh_w_op (SD_, RD, RS, RT, 0, 0); 82} 83 84000000,5.RT,5.RS,5.RD,10010,001101:POOL32A:32::ADDQH_R.W 85"addqh_r.w r<RD>, r<RS>, r<RT>" 86*micromipsdsp: 87{ 88 do_qh_w_op (SD_, RD, RS, RT, 0, 1); 89} 90 91000000,5.RT,5.RS,5.RD,01110,000101:POOL32A:32::ADDSC 92"addsc r<RD>, r<RS>, r<RT>" 93*micromipsdsp: 94{ 95 do_addsc (SD_, RD, RS, RT); 96} 97 98000000,5.RT,5.RS,5.RD,00100,001101:POOL32A:32::ADDU.PH 99"addu.ph r<RD>, r<RS>, r<RT>" 100*micromipsdsp: 101{ 102 do_u_ph_op (SD_, RD, RS, RT, 0, 0); 103} 104 105000000,5.RT,5.RS,5.RD,10100,001101:POOL32A:32::ADDU_S.PH 106"addu_s.ph r<RD>, r<RS>, r<RT>" 107*micromipsdsp: 108{ 109 do_u_ph_op (SD_, RD, RS, RT, 0, 1); 110} 111 112000000,5.RT,5.RS,5.RD,00011,001101:POOL32A:32::ADDU.QB 113"addu.qb r<RD>, r<RS>, r<RT>" 114*micromipsdsp: 115{ 116 do_qb_op (SD_, RD, RS, RT, 0, 0); 117} 118 119000000,5.RT,5.RS,5.RD,10011,001101:POOL32A:32::ADDU_S.QB 120"addu_s.qb r<RD>, r<RS>, r<RT>" 121*micromipsdsp: 122{ 123 do_qb_op (SD_, RD, RS, RT, 0, 1); 124} 125 126000000,5.RT,5.RS,5.RD,01111,000101:POOL32A:32::ADDWC 127"addwc r<RD>, r<RS>, r<RT>" 128*micromipsdsp: 129{ 130 do_addwc (SD_, RD, RS, RT); 131} 132 133000000,5.RT,5.RS,5.RD,00101,001101:POOL32A:32::ADDUH.QB 134"adduh.qb r<RD>, r<RS>, r<RT>" 135*micromipsdsp: 136{ 137 do_uh_qb_op (SD_, RD, RS, RT, 0, 0); 138} 139 140000000,5.RT,5.RS,5.RD,10101,001101:POOL32A:32::ADDUH_R.QB 141"adduh_r.qb r<RD>, r<RS>, r<RT>" 142*micromipsdsp: 143{ 144 do_uh_qb_op (SD_, RD, RS, RT, 0, 1); 145} 146 147000000,5.RT,5.RS,5.SA,01000,010101:POOL32A:32::APPEND 148"append r<RT>, r<RS>, <SA>" 149*micromipsdsp: 150{ 151 do_append (SD_, RT, RS, SA); 152} 153 154000000,5.RT,5.RS,2.BP,00100010,111100:POOL32A:32::BALIGN 155"balign r<RT>, r<RS>, <BP>" 156*micromipsdsp: 157{ 158 do_balign (SD_, RT, RS, BP); 159} 160 161000000,5.RT,5.RS,0011000100,111100:POOL32A:32::BITREV 162"bitrev r<RT>, r<RS>" 163*micromipsdsp: 164{ 165 do_bitrev (SD_, RT, RS); 166} 167 168010000,1101100000,16.IMMEDIATE:POOL32I:32::BPOSGE32 169"bposge32 <IMMEDIATE>" 170*micromipsdsp: 171{ 172 uint32_t pos = (DSPCR >> DSPCR_POS_SHIFT) & DSPCR_POS_MASK; 173 if (pos >= 32) 174 NIA = delayslot_micromips (SD_, NIA + (EXTEND12 (IMMEDIATE) << 1), NIA, 175 MICROMIPS_DELAYSLOT_SIZE_ANY); 176} 177 178000000,5.RT,5.RS,0000000000,000101:POOL32A:32::CMP.EQ.PH 179"cmp.eq.ph r<RS>, r<RT>" 180*micromipsdsp: 181{ 182 do_ph_cmpu (SD_, RS, RT, 0); 183} 184 185000000,5.RT,5.RS,0000000001,000101:POOL32A:32::CMP.LT.PH 186"cmp.lt.ph r<RS>, r<RT>" 187*micromipsdsp: 188{ 189 do_ph_cmpu (SD_, RS, RT, 1); 190} 191 192000000,5.RT,5.RS,0000000010,000101:POOL32A:32::CMP.LE.PH 193"cmp.le.ph r<RS>, r<RT>" 194*micromipsdsp: 195{ 196 do_ph_cmpu (SD_, RS, RT, 2); 197} 198 199000000,5.RT,5.RS,5.RD,00110,000101:POOL32A:32::CMPGDU.EQ.QB 200"cmpgdu.eq.qb r<RD>, r<RS>, r<RT>" 201*micromipsdsp: 202{ 203 do_qb_cmpgdu (SD_, RD, RS, RT, 0); 204} 205 206000000,5.RT,5.RS,5.RD,00111,000101:POOL32A:32::CMPGDU.LT.QB 207"cmpgdu.lt.qb r<RD>, r<RS>, r<RT>" 208*micromipsdsp: 209{ 210 do_qb_cmpgdu (SD_, RD, RS, RT, 1); 211} 212 213000000,5.RT,5.RS,5.RD,01000,000101:POOL32A:32::CMPGDU.LE.QB 214"cmpgdu.le.qb r<RD>, r<RS>, r<RT>" 215*micromipsdsp: 216{ 217 do_qb_cmpgdu (SD_, RD, RS, RT, 2); 218} 219 220000000,5.RT,5.RS,5.RD,00011,000101:POOL32A:32::CMPGU.EQ.QB 221"cmpgu.eq.qb r<RD>, r<RS>, r<RT>" 222*micromipsdsp: 223{ 224 do_qb_cmpgu (SD_, RD, RS, RT, 0); 225} 226 227000000,5.RT,5.RS,5.RD,00100,000101:POOL32A:32::CMPGU.LT.QB 228"cmpgu.lt.qb r<RD>, r<RS>, r<RT>" 229*micromipsdsp: 230{ 231 do_qb_cmpgu (SD_, RD, RS, RT, 1); 232} 233 234000000,5.RT,5.RS,5.RD,00101,000101:POOL32A:32::CMPGU.LE.QB 235"cmpgu.le.qb r<RD>, r<RS>, r<RT>" 236*micromipsdsp: 237{ 238 do_qb_cmpgu (SD_, RD, RS, RT, 2); 239} 240 241000000,5.RT,5.RS,0000001001,000101:POOL32A:32::CMPU.EQ.QB 242"cmpu.eq.qb r<RS>, r<RT>" 243*micromipsdsp: 244{ 245 do_qb_cmpu (SD_, RS, RT, 0); 246} 247 248000000,5.RT,5.RS,0000001010,000101:POOL32A:32::CMPU.LT.QB 249"cmpu.lt.qb r<RS>, r<RT>" 250*micromipsdsp: 251{ 252 do_qb_cmpu (SD_, RS, RT, 1); 253} 254 255000000,5.RT,5.RS,0000001011,000101:POOL32A:32::CMPU.LE.QB 256"cmpu.le.qb r<RS>, r<RT>" 257*micromipsdsp: 258{ 259 do_qb_cmpu (SD_, RS, RT, 2); 260} 261 262000000,5.RT,5.RS,2.AC,00000010,111100:POOL32A:32::DPA.W.PH 263"dpa.w.ph ac<AC>, r<RS>, r<RT>" 264*micromipsdsp: 265{ 266 do_w_ph_dot_product (SD_, AC, RS, RT, 0); 267} 268 269000000,5.RT,5.RS,2.AC,00001010,111100:POOL32A:32::DPAQ_S.W.PH 270"dpaq_s.w.ph ac<AC>, r<RS>, r<RT>" 271*micromipsdsp: 272{ 273 do_ph_dot_product (SD_, AC, RS, RT, 0); 274} 275 276000000,5.RT,5.RS,2.AC,01001010,111100:POOL32A:32::DPAQ_SA.L.W 277"dpaq_sa.l.w ac<AC>, r<RS>, r<RT>" 278*micromipsdsp: 279{ 280 do_w_dot_product (SD_, AC, RS, RT, 0); 281} 282 283000000,5.RT,5.RS,2.AC,10001010,111100:POOL32A:32::DPAQX_S.W.PH 284"dpaqx_s.w.ph ac<AC>, r<RS>, r<RT>" 285*micromipsdsp: 286{ 287 do_qx_w_ph_dot_product (SD_, AC, RS, RT, 0, 0); 288} 289 290000000,5.RT,5.RS,2.AC,11001010,111100:POOL32A:32::DPAQX_SA.W.PH 291"dpaqx_sa.w.ph ac<AC>, r<RS>, r<RT>" 292*micromipsdsp: 293{ 294 do_qx_w_ph_dot_product (SD_, AC, RS, RT, 0, 1); 295} 296 297000000,5.RT,5.RS,2.AC,10000010,111100:POOL32A:32::DPAU.H.QBL 298"dpau.h.qbl ac<AC>, r<RS>, r<RT>" 299*micromipsdsp: 300{ 301 do_qb_dot_product (SD_, AC, RS, RT, 0, 0); 302} 303 304000000,5.RT,5.RS,2.AC,11000010,111100:POOL32A:32::DPAU.H.QBR 305"dpau.h.qbr ac<AC>, r<RS>, r<RT>" 306*micromipsdsp: 307{ 308 do_qb_dot_product (SD_, AC, RS, RT, 0, 1); 309} 310 311000000,5.RT,5.RS,2.AC,01000010,111100:POOL32A:32::DPAX.W.PH 312"dpax.w.ph ac<AC>, r<RS>, r<RT>" 313*micromipsdsp: 314{ 315 do_x_w_ph_dot_product (SD_, AC, RS, RT, 0); 316} 317 318000000,5.RT,5.RS,2.AC,00010010,111100:POOL32A:32::DPS.W.PH 319"dps.w.ph ac<AC>, r<RS>, r<RT>" 320*micromipsdsp: 321{ 322 do_w_ph_dot_product (SD_, AC, RS, RT, 1); 323} 324 325000000,5.RT,5.RS,2.AC,00011010,111100:POOL32A:32::DPSQ_S.W.PH 326"dpsq_s.w.ph ac<AC>, r<RS>, r<RT>" 327*micromipsdsp: 328{ 329 do_ph_dot_product (SD_, AC, RS, RT, 1); 330} 331 332000000,5.RT,5.RS,2.AC,01011010,111100:POOL32A:32::DPSQ_SA.L.W 333"dpsq_sa.l.w ac<AC>, r<RS>, r<RT>" 334*micromipsdsp: 335{ 336 do_w_dot_product (SD_, AC, RS, RT, 1); 337} 338 339000000,5.RT,5.RS,2.AC,10011010,111100:POOL32A:32::DPSQX_S.W.PH 340"dpsqx_s.w.ph ac<AC>, r<RS>, r<RT>" 341*micromipsdsp: 342{ 343 do_qx_w_ph_dot_product (SD_, AC, RS, RT, 1, 0); 344} 345 346000000,5.RT,5.RS,2.AC,11011010,111100:POOL32A:32::DPSQX_SA.W.PH 347"dpsqx_sa.w.ph ac<AC>, r<RS>, r<RT>" 348*micromipsdsp: 349{ 350 do_qx_w_ph_dot_product (SD_, AC, RS, RT, 1, 1); 351} 352 353000000,5.RT,5.RS,2.AC,10010010,111100:POOL32A:32::DPSU.H.QBL 354"dpsu.h.qbl ac<AC>, r<RS>, r<RT>" 355*micromipsdsp: 356{ 357 do_qb_dot_product (SD_, AC, RS, RT, 1, 0); 358} 359 360000000,5.RT,5.RS,2.AC,11010010,111100:POOL32A:32::DPSU.H.QBR 361"dpsu.h.qbr ac<AC>, r<RS>, r<RT>" 362*micromipsdsp: 363{ 364 do_qb_dot_product (SD_, AC, RS, RT, 1, 1); 365} 366 367000000,5.RT,5.RS,2.AC,01010010,111100:POOL32A:32::DPSX.W.PH 368"dpsx.w.ph ac<AC>, r<RS>, r<RT>" 369*micromipsdsp: 370{ 371 do_x_w_ph_dot_product (SD_, AC, RS, RT, 1); 372} 373 374000000,5.RT,5.SIZE,2.AC,10011001,111100:POOL32A:32::EXTP 375"extp r<RT>, ac<AC>, <SIZE>" 376*micromipsdsp: 377{ 378 do_extp (SD_, RT, AC, SIZE, 0); 379} 380 381000000,5.RT,5.SIZE,2.AC,11011001,111100:POOL32A:32::EXTPDP 382"extpdp r<RT>, ac<AC>, <SIZE>" 383*micromipsdsp: 384{ 385 do_extp (SD_, RT, AC, SIZE, 1); 386} 387 388000000,5.RT,5.RS,2.AC,11100010,111100:POOL32A:32::EXTPDPV 389"extpdpv r<RT>, ac<AC>, r<RS>" 390*micromipsdsp: 391{ 392 do_extpv (SD_, RT, AC, RS, 1); 393} 394 395000000,5.RT,5.RS,2.AC,10100010,111100:POOL32A:32::EXTPV 396"extpv r<RT>, ac<AC>, r<RS>" 397*micromipsdsp: 398{ 399 do_extpv (SD_, RT, AC, RS, 0); 400} 401 402000000,5.RT,5.SHIFT,2.AC,00111001,111100:POOL32A:32::EXTR.W 403"extr.w r<RT>, ac<AC>, <SHIFT>" 404*micromipsdsp: 405{ 406 do_w_extr (SD_, RT, AC, SHIFT, 0); 407} 408 409000000,5.RT,5.SHIFT,2.AC,01111001,111100:POOL32A:32::EXTR_R.W 410"extr_r.w r<RT>, ac<AC>, <SHIFT>" 411*micromipsdsp: 412{ 413 do_w_extr (SD_, RT, AC, SHIFT, 1); 414} 415 416000000,5.RT,5.SHIFT,2.AC,10111001,111100:POOL32A:32::EXTR_RS.W 417"extr_rs.w r<RT>, ac<AC>, <SHIFT>" 418*micromipsdsp: 419{ 420 do_w_extr (SD_, RT, AC, SHIFT, 2); 421} 422 423000000,5.RT,5.SHIFT,2.AC,11111001,111100:POOL32A:32::EXTR_S.H 424"extr_s.h r<RT>, ac<AC>, <SHIFT>" 425*micromipsdsp: 426{ 427 do_h_extr (SD_, RT, AC, SHIFT); 428} 429 430000000,5.RT,5.RS,2.AC,00111010,111100:POOL32A:32::EXTRV.W 431"extrv.w r<RT>, ac<AC>, r<RS>" 432*micromipsdsp: 433{ 434 do_extrv (SD_, RT, AC, RS, 0); 435} 436 437000000,5.RT,5.RS,2.AC,01111010,111100:POOL32A:32::EXTRV_R.W 438"extrv_r.w r<RT>, ac<AC>, r<RS>" 439*micromipsdsp: 440{ 441 do_extrv (SD_, RT, AC, RS, 1); 442} 443 444000000,5.RT,5.RS,2.AC,10111010,111100:POOL32A:32::EXTRV_RS.W 445"extrv_rs.w r<RT>, ac<AC>, r<RS>" 446*micromipsdsp: 447{ 448 do_extrv (SD_, RT, AC, RS, 2); 449} 450 451000000,5.RT,5.RS,2.AC,11111010,111100:POOL32A:32::EXTRV_S.H 452"extrv_s.h r<RT>, ac<AC>, r<RS>" 453*micromipsdsp: 454{ 455 do_extrv_s_h (SD_, RT, AC, RS); 456} 457 458000000,5.RT,5.RS,0100000100,111100:POOL32A:32::INSV 459"insv r<RT>, r<RS>" 460*micromipsdsp: 461{ 462 do_insv (SD_, RT, RS); 463} 464 465000000,5.INDEX,5.BASE,5.RD,01000,100101:POOL32A:32::LBUX 466"lbux r<RD>, r<INDEX>(r<BASE>)" 467*micromipsdsp: 468{ 469 do_lxx (SD_, RD, BASE, INDEX, 0); 470} 471 472000000,5.INDEX,5.BASE,5.RD,00101,100101:POOL32A:32::LHX 473"lhx r<RD>, r<INDEX>(r<BASE>)" 474*micromipsdsp: 475{ 476 do_lxx (SD_, RD, BASE, INDEX, 1); 477} 478 479000000,5.INDEX,5.BASE,5.RD,00110,100101:POOL32A:32::LWX 480"lwx r<RD>, r<INDEX>(r<BASE>)" 481*micromipsdsp: 482{ 483 do_lxx (SD_, RD, BASE, INDEX, 2); 484} 485 486000000,5.RT,5.RS,2.AC,00101010,111100:POOL32A:32::MADD_DSP 487"madd ac<AC>, r<RS>, r<RT>" 488*micromipsdsp: 489{ 490 do_dsp_madd (SD_, AC, RS, RT); 491} 492 493000000,5.RT,5.RS,2.AC,01101010,111100:POOL32A:32::MADDU_DSP 494"maddu ac<AC>, r<RS>, r<RT>" 495*micromipsdsp: 496{ 497 do_dsp_maddu (SD_, AC, RS, RT); 498} 499 500000000,5.RT,5.RS,2.AC,01101001,111100:POOL32A:32::MAQ_S.W.PHL 501"maq_s.w.phl ac<AC>, r<RS>, r<RT>" 502*micromipsdsp: 503{ 504 do_ph_maq (SD_, AC, RS, RT, 0, 0); 505} 506 507000000,5.RT,5.RS,2.AC,11101001,111100:POOL32A:32::MAQ_SA.W.PHL 508"maq_sa.w.phl ac<AC>, r<RS>, r<RT>" 509*micromipsdsp: 510{ 511 do_ph_maq (SD_, AC, RS, RT, 1, 0); 512} 513 514000000,5.RT,5.RS,2.AC,00101001,111100:POOL32A:32::MAQ_S.W.PHR 515"maq_s.w.phr ac<AC>, r<RS>, r<RT>" 516*micromipsdsp: 517{ 518 do_ph_maq (SD_, AC, RS, RT, 0, 1); 519} 520 521000000,5.RT,5.RS,2.AC,10101001,111100:POOL32A:32::MAQ_SA.W.PHR 522"maq_sa.w.phr ac<AC>, r<RS>, r<RT>" 523*micromipsdsp: 524{ 525 do_ph_maq (SD_, AC, RS, RT, 1, 1); 526} 527 528000000,00000,5.RS,2.AC,00000001,111100:POOL32A:32::MFHI_DSP 529"mfhi r<RS>, ac<AC>" 530*micromipsdsp: 531{ 532 do_dsp_mfhi (SD_, AC, RS); 533} 534 535000000,00000,5.RS,2.AC,01000001,111100:POOL32A:32::MFLO_DSP 536"mflo r<RS>, ac<AC>" 537*micromipsdsp: 538{ 539 do_dsp_mflo (SD_, AC, RS); 540} 541 542000000,5.RT,5.RS,5.RD,01010,010101:POOL32A:32::MODSUB 543"modsub r<RD>, r<RS>, r<RT>" 544*micromipsdsp: 545{ 546 do_modsub (SD_, RD, RS, RT); 547} 548 549000000,5.RT,5.RS,2.AC,10101010,111100:POOL32A:32::MSUB_DSP 550"msub ac<AC>, r<RS>, r<RT>" 551*micromipsdsp: 552{ 553 do_dsp_msub (SD_, AC, RS, RT); 554} 555 556000000,5.RT,5.RS,2.AC,11101010,111100:POOL32A:32::MSUBU_DSP 557"msubu ac<AC>, r<RS>, r<RT>" 558*micromipsdsp: 559{ 560 do_dsp_msubu (SD_, AC, RS, RT); 561} 562 563000000,00000,5.RS,2.AC,10000001,111100:POOL32A:32::MTHI_DSP 564"mthi r<RS>, ac<AC>" 565*micromipsdsp: 566{ 567 do_dsp_mthi (SD_, AC, RS); 568} 569 570000000,00000,5.RS,2.AC,00001001,111100:POOL32A:32::MTHLIP 571"mthlip r<RS>, ac<AC>" 572*micromipsdsp: 573{ 574 do_mthlip (SD_, RS, AC); 575} 576 577000000,00000,5.RS,2.AC,11000001,111100:POOL32A:32::MTLO_DSP 578"mtlo r<RS>, ac<AC>" 579*micromipsdsp: 580{ 581 do_dsp_mtlo (SD_, AC, RS); 582} 583 584000000,5.RT,5.RS,5.RD,00000,101101:POOL32A:32::MUL.PH 585"mul.ph r<RD>, r<RS>, r<RT>" 586*micromipsdsp: 587{ 588 do_ph_op (SD_, RD, RS, RT, 2, 0); 589} 590 591000000,5.RT,5.RS,5.RD,10000,101101:POOL32A:32::MUL_S.PH 592"mul_s.ph r<RD>, r<RS>, r<RT>" 593*micromipsdsp: 594{ 595 do_ph_op (SD_, RD, RS, RT, 2, 1); 596} 597 598000000,5.RT,5.RS,5.RD,00000,100101:POOL32A:32::MULEQ_S.W.PHL 599"muleq_s.w.phl r<RD>, r<RS>, r<RT>" 600*micromipsdsp: 601{ 602 do_ph_muleq (SD_, RD, RS, RT, 0); 603} 604 605000000,5.RT,5.RS,5.RD,00001,100101:POOL32A:32::MULEQ_S.W.PHR 606"muleq_s.w.phr r<RD>, r<RS>, r<RT>" 607*micromipsdsp: 608{ 609 do_ph_muleq (SD_, RD, RS, RT, 1); 610} 611 612000000,5.RT,5.RS,5.RD,00010,010101:POOL32A:32::MULEU_S.PH.QBL 613"muleu_s.ph.qbl r<RD>, r<RS>, r<RT>" 614*micromipsdsp: 615{ 616 do_qb_muleu (SD_, RD, RS, RT, 0); 617} 618 619000000,5.RT,5.RS,5.RD,00011,010101:POOL32A:32::MULEU_S.PH.QBR 620"muleu_s.ph.qbr r<RD>, r<RS>, r<RT>" 621*micromipsdsp: 622{ 623 do_qb_muleu (SD_, RD, RS, RT, 1); 624} 625 626000000,5.RT,5.RS,5.RD,00100,010101:POOL32A:32::MULQ_RS.PH 627"mulq_rs.ph r<RD>, r<RS>, r<RT>" 628*micromipsdsp: 629{ 630 do_ph_mulq (SD_, RD, RS, RT, 1); 631} 632 633000000,5.RT,5.RS,5.RD,00110,010101:POOL32A:32::MULQ_RS.W 634"mulq_rs.w r<RD>, r<RS>, r<RT>" 635*micromipsdsp: 636{ 637 do_w_mulq (SD_, RD, RS, RT, 1); 638} 639 640000000,5.RT,5.RS,5.RD,00101,010101:POOL32A:32::MULQ_S.PH 641"mulq_s.ph r<RD>, r<RS>, r<RT>" 642*micromipsdsp: 643{ 644 do_ph_mulq (SD_, RD, RS, RT, 0); 645} 646 647000000,5.RT,5.RS,5.RD,00111,010101:POOL32A:32::MULQ_S.W 648"mulq_s.w r<RD>, r<RS>, r<RT>" 649*micromipsdsp: 650{ 651 do_w_mulq (SD_, RD, RS, RT, 0); 652} 653 654000000,5.RT,5.RS,2.AC,10110010,111100:POOL32A:32::MULSA.W.PH 655"mulsa.w.ph ac<AC>, r<RS>, r<RT>" 656*micromipsdsp: 657{ 658 do_ph_w_mulsa (SD_, AC, RS, RT); 659} 660 661000000,5.RT,5.RS,2.AC,11110010,111100:POOL32A:32::MULSAQ_S.W.PH 662"mulsaq_s.w.ph ac<AC>, r<RS>, r<RT>" 663*micromipsdsp: 664{ 665 do_mulsaq_s_w_ph (SD_, AC, RS, RT); 666} 667 668000000,5.RT,5.RS,2.AC,00110010,111100:POOL32A:32::MULT_DSP 669"mult ac<AC>, r<RS>, r<RT>" 670*micromipsdsp: 671{ 672 do_dsp_mult (SD_, AC, RS, RT); 673} 674 675000000,5.RT,5.RS,2.AC,01110010,111100:POOL32A:32::MULTU_DSP 676"multu ac<AC>, r<RS>, r<RT>" 677*micromipsdsp: 678{ 679 do_dsp_multu (SD_, AC, RS, RT); 680} 681 682000000,5.RT,5.RS,5.RD,00110,101101:POOL32A:32::PACKRL.PH 683"packrl.ph r<RD>, r<RS>, r<RT>" 684*micromipsdsp: 685{ 686 do_ph_packrl (SD_, RD, RS, RT); 687} 688 689000000,5.RT,5.RS,5.RD,01000,101101:POOL32A:32::PICK.PH 690"pick.ph r<RD>, r<RS>, r<RT>" 691*micromipsdsp: 692{ 693 do_ph_pick (SD_, RD, RS, RT); 694} 695 696000000,5.RT,5.RS,5.RD,00111,101101:POOL32A:32::PICK.QB 697"pick.qb r<RD>, r<RS>, r<RT>" 698*micromipsdsp: 699{ 700 do_qb_pick (SD_, RD, RS, RT); 701} 702 703000000,5.RT,5.RS,0101000100,111100:POOL32A:32::PRECEQ.W.PHL 704"preceq.w.phl r<RT>, r<RS>" 705*micromipsdsp: 706{ 707 do_w_preceq (SD_, RT, RS, 0); 708} 709 710000000,5.RT,5.RS,0110000100,111100:POOL32A:32::PRECEQ.W.PHR 711"preceq.w.phr r<RT>, r<RS>" 712*micromipsdsp: 713{ 714 do_w_preceq (SD_, RT, RS, 1); 715} 716 717000000,5.RT,5.RS,0111000100,111100:POOL32A:32::PRECEQU.PH.QBL 718"precequ.ph.qbl r<RT>, r<RS>" 719*micromipsdsp: 720{ 721 do_qb_ph_precequ (SD_, RT, RS, 2); 722} 723 724000000,5.RT,5.RS,0111001100,111100:POOL32A:32::PRECEQU.PH.QBLA 725"precequ.ph.qbla r<RT>, r<RS>" 726*micromipsdsp: 727{ 728 do_qb_ph_precequ (SD_, RT, RS, 3); 729} 730 731000000,5.RT,5.RS,1001000100,111100:POOL32A:32::PRECEQU.PH.QBR 732"precequ.ph.qbr r<RT>, r<RS>" 733*micromipsdsp: 734{ 735 do_qb_ph_precequ (SD_, RT, RS, 0); 736} 737 738000000,5.RT,5.RS,1001001100,111100:POOL32A:32::PRECEQU.PH.QBRA 739"precequ.ph.qbra r<RT>, r<RS>" 740*micromipsdsp: 741{ 742 do_qb_ph_precequ (SD_, RT, RS, 1); 743} 744 745000000,5.RT,5.RS,1011000100,111100:POOL32A:32::PRECEU.PH.QBL 746"preceu.ph.qbl r<RT>, r<RS>" 747*micromipsdsp: 748{ 749 do_qb_ph_preceu (SD_, RT, RS, 2); 750} 751 752000000,5.RT,5.RS,1011001100,111100:POOL32A:32::PRECEU.PH.QBLA 753"preceu.ph.qbla r<RT>, r<RS>" 754*micromipsdsp: 755{ 756 do_qb_ph_preceu (SD_, RT, RS, 3); 757} 758 759000000,5.RT,5.RS,1101000100,111100:POOL32A:32::PRECEU.PH.QBR 760"preceu.ph.qbr r<RT>, r<RS>" 761*micromipsdsp: 762{ 763 do_qb_ph_preceu (SD_, RT, RS, 0); 764} 765 766000000,5.RT,5.RS,1101001100,111100:POOL32A:32::PRECEU.PH.QBRA 767"preceu.ph.qbra r<RT>, r<RS>" 768*micromipsdsp: 769{ 770 do_qb_ph_preceu (SD_, RT, RS, 1); 771} 772 773000000,5.RT,5.RS,5.RD,00001,101101:POOL32A:32::PRECR.QB.PH 774"precr.qb.ph r<RD>, r<RS>, r<RT>" 775*micromipsdsp: 776{ 777 do_ph_qb_precr (SD_, RD, RS, RT); 778} 779 780000000,5.RT,5.RS,5.SA,01111,001101:POOL32A:32::PRECR_SRA.PH.W 781"precr_sra.ph.w r<RT>, r<RS>, <SA>" 782*micromipsdsp: 783{ 784 do_precr_sra (SD_, RT, RS, SA, 0); 785} 786 787000000,5.RT,5.RS,5.SA,11111,001101:POOL32A:32::PRECR_SRA_R.PH.W 788"precr_sra_r.ph.w r<RT>, r<RS>, <SA>" 789*micromipsdsp: 790{ 791 do_precr_sra (SD_, RT, RS, SA, 1); 792} 793 794000000,5.RT,5.RS,5.RD,00011,101101:POOL32A:32::PRECRQ.PH.W 795"precrq.ph.w r<RD>, r<RS>, r<RT>" 796*micromipsdsp: 797{ 798 do_w_ph_precrq (SD_, RD, RS, RT); 799} 800 801000000,5.RT,5.RS,5.RD,00010,101101:POOL32A:32::PRECRQ.QB.PH 802"precrq.qb.ph r<RD>, r<RS>, r<RT>" 803*micromipsdsp: 804{ 805 do_ph_qb_precrq (SD_, RD, RS, RT, 0); 806} 807 808000000,5.RT,5.RS,5.RD,00101,101101:POOL32A:32::PRECRQU_S.QB.PH 809"precrqu_s.qb.ph r<RD>, r<RS>, r<RT>" 810*micromipsdsp: 811{ 812 do_ph_qb_precrq (SD_, RD, RS, RT, 1); 813} 814 815000000,5.RT,5.RS,5.RD,00100,101101:POOL32A:32::PRECRQ_RS.PH.W 816"precrq_rs.ph.w r<RD>, r<RS>, r<RT>" 817*micromipsdsp: 818{ 819 do_w_ph_rs_precrq (SD_, RD, RS, RT); 820} 821 822000000,5.RT,5.RS,5.SA,01001,010101:POOL32A:32::PREPEND 823"prepend r<RT>, r<RS>, <SA>" 824*micromipsdsp: 825{ 826 do_prepend (SD_, RT, RS, SA); 827} 828 829000000,5.RT,5.RS,1111000100,111100:POOL32A:32::RADDU.W.QB 830"raddu.w.qb r<RT>, r<RS>" 831*micromipsdsp: 832{ 833 do_qb_w_raddu (SD_, RT, RS); 834} 835 836000000,5.RT,7.CONTROL_MASK,00011001,111100:POOL32A:32::RDDSP 837"rddsp r<RT>":CONTROL_MASK == 1111111111 838"rddsp r<RT>, <CONTROL_MASK>" 839*micromipsdsp: 840{ 841 do_rddsp (SD_, RT, CONTROL_MASK); 842} 843 844000000,10.IMMEDIATE,5.RD,00000,111101:POOL32A:32::REPL.PH 845"repl.ph r<RD>, <IMMEDIATE>" 846*micromipsdsp: 847{ 848 do_repl (SD_, RD, IMMEDIATE, 2); 849} 850 851000000,5.RT,8.IMMEDIATE,0010111,111100:POOL32A:32::REPL.QB 852"repl.qb r<RT>, <IMMEDIATE>" 853*micromipsdsp: 854{ 855 do_repl (SD_, RT, IMMEDIATE, 0); 856} 857 858000000,5.RT,5.RS,0000001100,111100:POOL32A:32::REPLV.PH 859"replv.ph r<RT>, r<RS>" 860*micromipsdsp: 861{ 862 do_repl (SD_, RT, RS, 3); 863} 864 865000000,5.RT,5.RS,0001001100,111100:POOL32A:32::REPLV.QB 866"replv.qb r<RT>, r<RS>" 867*micromipsdsp: 868{ 869 do_repl (SD_, RT, RS, 1); 870} 871 872000000,0000,6.IMMEDIATE,2.AC,00000000,011101:POOL32A:32::SHILO 873"shilo ac<AC>, <IMMEDIATE>" 874*micromipsdsp: 875{ 876 do_shilo (SD_, AC, IMMEDIATE); 877} 878 879000000,00000,5.RS,2.AC,01001001,111100:POOL32A:32::SHILOV 880"shilov ac<AC>, r<RS>" 881*micromipsdsp: 882{ 883 do_shilov (SD_, AC, RS); 884} 885 886000000,5.RT,5.RS,4.SHIFT,001110,110101:POOL32A:32::SHLL.PH 887"shll.ph r<RT>, r<RS>, <SHIFT>" 888*micromipsdsp: 889{ 890 do_ph_shift (SD_, RT, RS, SHIFT, 0, 0); 891} 892 893000000,5.RT,5.RS,4.SHIFT,101110,110101:POOL32A:32::SHLL_S.PH 894"shll_s.ph r<RT>, r<RS>, <SHIFT>" 895*micromipsdsp: 896{ 897 do_ph_shift (SD_, RT, RS, SHIFT, 0, 1); 898} 899 900000000,5.RT,5.RS,3.SHIFT,0100001,111100:POOL32A:32::SHLL.QB 901"shll.qb r<RT>, r<RS>, <SHIFT>" 902*micromipsdsp: 903{ 904 do_qb_shift (SD_, RT, RS, SHIFT, 0); 905} 906 907000000,5.RT,5.RS,5.RD,01110,001101:POOL32A:32::SHLLV.PH 908"shllv.ph r<RD>, r<RT>, r<RS>" 909*micromipsdsp: 910{ 911 do_ph_shl (SD_, RD, RT, RS, 0, 0); 912} 913 914000000,5.RT,5.RS,5.RD,11110,001101:POOL32A:32::SHLLV_S.PH 915"shllv_s.ph r<RD>, r<RD>, r<RS>" 916*micromipsdsp: 917{ 918 do_ph_shl (SD_, RD, RT, RS, 0, 1); 919} 920 921000000,5.RT,5.RS,5.RD,01110,010101:POOL32A:32::SHLLV.QB 922"shllv.qb r<RD>, r<RT>, r<RS>" 923*micromipsdsp: 924{ 925 do_qb_shl (SD_, RD, RT, RS, 0); 926} 927 928000000,5.RT,5.RS,5.RD,01111,010101:POOL32A:32::SHLLV_S.W 929"shllv_s.w r<RD>, r<RT>, r<RS>" 930*micromipsdsp: 931{ 932 do_w_s_shllv (SD_, RD, RT, RS); 933} 934 935000000,5.RT,5.RS,5.SHIFT,01111,110101:POOL32A:32::SHLL_S.W 936"shll_s.w r<RT>, r<RS>, <SHIFT>" 937*micromipsdsp: 938{ 939 do_w_shll (SD_, RT, RS, SHIFT); 940} 941 942000000,5.RT,5.RS,3.SHIFT,0000111,111100:POOL32A:32::SHRA.QB 943"shra.qb r<RT>, r<RS>, <SHIFT>" 944*micromipsdsp: 945{ 946 do_qb_shra (SD_, RT, RS, SHIFT, 0); 947} 948 949000000,5.RT,5.RS,3.SHIFT,1000111,111100:POOL32A:32::SHRA_R.QB 950"shra_r.qb r<RT>, r<RS>, <SHIFT>" 951*micromipsdsp: 952{ 953 do_qb_shra (SD_, RT, RS, SHIFT, 1); 954} 955 956000000,5.RT,5.RS,4.SHIFT,001100,110101:POOL32A:32::SHRA.PH 957"shra.ph r<RT>, r<RS>, <SHIFT>" 958*micromipsdsp: 959{ 960 do_ph_shift (SD_, RT, RS, SHIFT, 1, 0); 961} 962 963000000,5.RT,5.RS,4.SHIFT,011100,110101:POOL32A:32::SHRA_R.PH 964"shra_r.ph r<RT>, r<RS>, <SHIFT>" 965*micromipsdsp: 966{ 967 do_ph_shift (SD_, RT, RS, SHIFT, 1, 1); 968} 969 970000000,5.RT,5.RS,5.RD,00110,001101:POOL32A:32::SHRAV.PH 971"shrav.ph r<RD>, r<RT>, r<RS>" 972*micromipsdsp: 973{ 974 do_ph_shl (SD_, RD, RT, RS, 1, 0); 975} 976 977000000,5.RT,5.RS,5.RD,10110,001101:POOL32A:32::SHRAV_R.PH 978"shrav_r.ph r<RD>, r<RT>, r<RS>" 979*micromipsdsp: 980{ 981 do_ph_shl (SD_, RD, RT, RS, 1, 1); 982} 983 984000000,5.RT,5.RS,5.RD,00111,001101:POOL32A:32::SHRAV.QB 985"shrav.qb r<RD>, r<RT>, r<RS>" 986*micromipsdsp: 987{ 988 do_qb_shrav (SD_, RD, RT, RS, 0); 989} 990 991000000,5.RT,5.RS,5.RD,10111,001101:POOL32A:32::SHRAV_R.QB 992"shrav_r.qb r<RD>, r<RT>, r<RS>" 993*micromipsdsp: 994{ 995 do_qb_shrav (SD_, RD, RT, RS, 1); 996} 997 998000000,5.RT,5.RS,5.RD,01011,010101:POOL32A:32::SHRAV_R.W 999"shrav_r.w r<RD>, r<RT>, r<RS>" 1000*micromipsdsp: 1001{ 1002 do_w_r_shrav (SD_, RD, RT, RS); 1003} 1004 1005000000,5.RT,5.RS,5.SHIFT,01011,110101:POOL32A:32::SHRA_R.W 1006"shra_r.w r<RT>, r<RS>, <SHIFT>" 1007*micromipsdsp: 1008{ 1009 do_w_shra (SD_, RT, RS, SHIFT); 1010} 1011 1012000000,5.RT,5.RS,4.SHIFT,001111,111100:POOL32A:32::SHRL.PH 1013"shrl.ph r<RT>, r<RS>, <SHIFT>" 1014*micromipsdsp: 1015{ 1016 do_ph_shrl (SD_, RT, RS, SHIFT); 1017} 1018 1019000000,5.RT,5.RS,3.SHIFT,1100001,111100:POOL32A:32::SHRL.QB 1020"shrl.qb r<RT>, r<RS>, <SHIFT>" 1021*micromipsdsp: 1022{ 1023 do_qb_shift (SD_, RT, RS, SHIFT, 1); 1024} 1025 1026000000,5.RT,5.RS,5.RD,01100,010101:POOL32A:32::SHRLV.PH 1027"shrlv.ph r<RD>, r<RT>, r<RS>" 1028*micromipsdsp: 1029{ 1030 do_ph_shrlv (SD_, RD, RT, RS); 1031} 1032 1033000000,5.RT,5.RS,5.RD,01101,010101:POOL32A:32::SHRLV.QB 1034"shrlv.qb r<RD>, r<RT>, r<RS>" 1035*micromipsdsp: 1036{ 1037 do_qb_shl (SD_, RD, RT, RS, 1); 1038} 1039 1040000000,5.RT,5.RS,5.RD,01000,001101:POOL32A:32::SUBQ.PH 1041"subq.ph r<RD>, r<RS>, r<RT>" 1042*micromipsdsp: 1043{ 1044 do_ph_op (SD_, RD, RS, RT, 1, 0); 1045} 1046 1047000000,5.RT,5.RS,5.RD,11000,001101:POOL32A:32::SUBQ_S.PH 1048"subq_s.ph r<RD>, r<RS>, r<RT>" 1049*micromipsdsp: 1050{ 1051 do_ph_op (SD_, RD, RS, RT, 1, 1); 1052} 1053 1054000000,5.RT,5.RS,5.RD,01101,000101:POOL32A:32::SUBQ_S.W 1055"subq_s.w r<RD>, r<RS>, r<RT>" 1056*micromipsdsp: 1057{ 1058 do_w_op (SD_, RD, RS, RT, 1); 1059} 1060 1061000000,5.RT,5.RS,5.RD,01001,001101:POOL32A:32::SUBQH.PH 1062"subqh.ph r<RD>, r<RS>, r<RT>" 1063*micromipsdsp: 1064{ 1065 do_qh_ph_op (SD_, RD, RS, RT, 1, 0); 1066} 1067 1068000000,5.RT,5.RS,5.RD,11001,001101:POOL32A:32::SUBQH_R.PH 1069"subqh_r.ph r<RD>, r<RS>, r<RT>" 1070*micromipsdsp: 1071{ 1072 do_qh_ph_op (SD_, RD, RS, RT, 1, 1); 1073} 1074 1075000000,5.RT,5.RS,5.RD,01010,001101:POOL32A:32::SUBQH.W 1076"subqh.w r<RD>, r<RS>, r<RT>" 1077*micromipsdsp: 1078{ 1079 do_qh_w_op (SD_, RD, RS, RT, 1, 0); 1080} 1081 1082000000,5.RT,5.RS,5.RD,11010,001101:POOL32A:32::SUBQH_R.W 1083"subqh_r.w r<RD>, r<RS>, r<RT>" 1084*micromipsdsp: 1085{ 1086 do_qh_w_op (SD_, RD, RS, RT, 1, 1); 1087} 1088 1089000000,5.RT,5.RS,5.RD,01100,001101:POOL32A:32::SUBU.PH 1090"subu.ph r<RD>, r<RS>, r<RT>" 1091*micromipsdsp: 1092{ 1093 do_u_ph_op (SD_, RD, RS, RT, 1, 0); 1094} 1095 1096000000,5.RT,5.RS,5.RD,11100,001101:POOL32A:32::SUBU_S.PH 1097"subu_s.ph r<RD>, r<RS>, r<RT>" 1098*micromipsdsp: 1099{ 1100 do_u_ph_op (SD_, RD, RS, RT, 1, 1); 1101} 1102 1103000000,5.RT,5.RS,5.RD,01011,001101:POOL32A:32::SUBU.QB 1104"subu.qb r<RD>, r<RS>, r<RT>" 1105*micromipsdsp: 1106{ 1107 do_qb_op (SD_, RD, RS, RT, 1, 0); 1108} 1109 1110000000,5.RT,5.RS,5.RD,11011,001101:POOL32A:32::SUBU_S.QB 1111"subu_s.qb r<RD>, r<RS>, r<RT>" 1112*micromipsdsp: 1113{ 1114 do_qb_op (SD_, RD, RS, RT, 1, 1); 1115} 1116 1117000000,5.RT,5.RS,5.RD,01101,001101:POOL32A:32::SUBUH.QB 1118"subuh.qb r<RD>, r<RS>, r<RT>" 1119*micromipsdsp: 1120{ 1121 do_uh_qb_op (SD_, RD, RS, RT, 1, 0); 1122} 1123 1124000000,5.RT,5.RS,5.RD,11101,001101:POOL32A:32::SUBUH_R.QB 1125"subuh_r.qb r<RD>, r<RS>, r<RT>" 1126*micromipsdsp: 1127{ 1128 do_uh_qb_op (SD_, RD, RS, RT, 1, 1); 1129} 1130 1131000000,5.RT,7.CONTROL_MASK,01011001,111100:POOL32A:32::WRDSP 1132"wrdsp r<RT>":CONTROL_MASK == 1111111111 1133"wrdsp r<RT>, <CONTROL_MASK>" 1134*micromipsdsp: 1135{ 1136 do_wrdsp (SD_, RT, CONTROL_MASK); 1137} 1138