rl78-decode.c revision 1.1.1.8
117683Spst/* DO NOT EDIT!  -*- buffer-read-only: t -*- vi:set ro:  */
217683Spst#line 1 "rl78-decode.opc"
317683Spst/* -*- c -*- */
417683Spst/* Copyright (C) 2012-2022 Free Software Foundation, Inc.
517683Spst   Contributed by Red Hat.
617683Spst   Written by DJ Delorie.
717683Spst
817683Spst   This file is part of the GNU opcodes library.
917683Spst
1017683Spst   This library is free software; you can redistribute it and/or modify
1117683Spst   it under the terms of the GNU General Public License as published by
1217683Spst   the Free Software Foundation; either version 3, or (at your option)
1317683Spst   any later version.
1417683Spst
1517683Spst   It is distributed in the hope that it will be useful, but WITHOUT
1617683Spst   ANY WARRANTY; without even the implied warranty of MERCHANTABILITY
1717683Spst   or FITNESS FOR A PARTICULAR PURPOSE.  See the GNU General Public
1817683Spst   License for more details.
1917683Spst
2017683Spst   You should have received a copy of the GNU General Public License
2117683Spst   along with this program; if not, write to the Free Software
2217683Spst   Foundation, Inc., 51 Franklin Street - Fifth Floor, Boston,
2317683Spst   MA 02110-1301, USA.  */
2417683Spst
2517683Spst#include "sysdep.h"
2617683Spst#include <stdio.h>
2717683Spst#include <stdlib.h>
2817683Spst#include <string.h>
2917683Spst#include "bfd.h"
3017683Spst#include "opintl.h"
3117683Spst#include "opcode/rl78.h"
3217683Spst
3356891Sfennerstatic int trace = 0;
34127667Sbms
3517683Spsttypedef struct
3617683Spst{
3717683Spst  RL78_Opcode_Decoded * rl78;
3817683Spst  int (* getbyte)(void *);
3917683Spst  void * ptr;
4038151Sphk  unsigned char * op;
4138151Sphk} LocalData;
4238151Sphk
4338151Sphk#define ID(x) rl78->id = RLO_##x, rl78->lineno = __LINE__
4417683Spst#define OP(n,t,r,a) (rl78->op[n].type = t, \
4517683Spst		     rl78->op[n].reg = r,	     \
46127667Sbms		     rl78->op[n].addend = a )
47127667Sbms#define OPX(n,t,r1,r2,a) \
48127667Sbms	(rl78->op[n].type = t, \
49127667Sbms	rl78->op[n].reg = r1, \
5017683Spst	rl78->op[n].reg2 = r2, \
5117683Spst	rl78->op[n].addend = a )
5217683Spst
53127667Sbms#define W() rl78->size = RL78_Word
54127667Sbms
55127667Sbms#define AU ATTRIBUTE_UNUSED
56127667Sbms
57127667Sbms#define OP_BUF_LEN 20
58127667Sbms#define GETBYTE() (ld->rl78->n_bytes < (OP_BUF_LEN - 1) ? ld->op [ld->rl78->n_bytes++] = ld->getbyte (ld->ptr): 0)
5917683Spst#define B ((unsigned long) GETBYTE())
6017683Spst
6117683Spst#define SYNTAX(x) rl78->syntax = x
6275110Sfenner
63127667Sbms#define UNSUPPORTED() \
6417683Spst  rl78->syntax = "*unknown*"
6517683Spst
6617683Spst#define RB(x) ((x)+RL78_Reg_X)
6717683Spst#define RW(x) ((x)+RL78_Reg_AX)
6817683Spst
6917683Spst#define Fz	rl78->flags = RL78_PSW_Z
7017683Spst#define Fza	rl78->flags = RL78_PSW_Z | RL78_PSW_AC
7117683Spst#define Fzc	rl78->flags = RL78_PSW_Z | RL78_PSW_CY
7275110Sfenner#define Fzac	rl78->flags = RL78_PSW_Z | RL78_PSW_AC | RL78_PSW_CY
7317683Spst#define Fa	rl78->flags = RL78_PSW_AC
7417683Spst#define Fc	rl78->flags = RL78_PSW_CY
7517683Spst#define Fac	rl78->flags = RL78_PSW_AC | RL78_PSW_CY
7617683Spst
7717683Spst#define IMMU(bytes)   immediate (bytes, 0, ld)
7826175Sfenner#define IMMS(bytes)   immediate (bytes, 1, ld)
7975110Sfenner
8075110Sfennerstatic int
8175110Sfennerimmediate (int bytes, int sign_extend, LocalData * ld)
8275110Sfenner{
8375110Sfenner  unsigned long i = 0;
84127667Sbms
8575110Sfenner  switch (bytes)
8626175Sfenner    {
87127667Sbms    case 1:
88127667Sbms      i |= B;
89127667Sbms      if (sign_extend && (i & 0x80))
90127667Sbms	i -= 0x100;
91127667Sbms      break;
92127667Sbms    case 2:
93127667Sbms      i |= B;
94127667Sbms      i |= B << 8;
9517683Spst      if (sign_extend && (i & 0x8000))
9617683Spst	i -= 0x10000;
9717683Spst      break;
98127667Sbms    case 3:
99127667Sbms      i |= B;
100127667Sbms      i |= B << 8;
101127667Sbms      i |= B << 16;
102127667Sbms      if (sign_extend && (i & 0x800000))
103127667Sbms	i -= 0x1000000;
10417683Spst      break;
105127667Sbms    default:
106127667Sbms      opcodes_error_handler
10717683Spst	/* xgettext:c-format */
10817683Spst	(_("internal error: immediate() called with invalid byte count %d"),
10917683Spst	   bytes);
11017683Spst      abort();
11117683Spst    }
112127667Sbms  return i;
113127667Sbms}
11417683Spst
11517683Spst#define DC(c)		OP (0, RL78_Operand_Immediate, 0, c)
11617683Spst#define DR(r)		OP (0, RL78_Operand_Register, RL78_Reg_##r, 0)
11717683Spst#define DRB(r)		OP (0, RL78_Operand_Register, RB(r), 0)
11817683Spst#define DRW(r)		OP (0, RL78_Operand_Register, RW(r), 0)
11917683Spst#define DM(r,a)		OP (0, RL78_Operand_Indirect, RL78_Reg_##r, a)
12017683Spst#define DM2(r1,r2,a)	OPX (0, RL78_Operand_Indirect, RL78_Reg_##r1, RL78_Reg_##r2, a)
12117683Spst#define DE()		rl78->op[0].use_es = 1
12217683Spst#define DB(b)		set_bit (rl78->op, b)
12317683Spst#define DCY()		DR(PSW); DB(0)
12417683Spst#define DPUSH()		OP (0, RL78_Operand_PreDec, RL78_Reg_SP, 0);
12517683Spst
12617683Spst#define SC(c)		OP (1, RL78_Operand_Immediate, 0, c)
12717683Spst#define SR(r)		OP (1, RL78_Operand_Register, RL78_Reg_##r, 0)
12817683Spst#define SRB(r)		OP (1, RL78_Operand_Register, RB(r), 0)
12917683Spst#define SRW(r)		OP (1, RL78_Operand_Register, RW(r), 0)
13017683Spst#define SM(r,a)		OP (1, RL78_Operand_Indirect, RL78_Reg_##r, a)
131127667Sbms#define SM2(r1,r2,a)	OPX (1, RL78_Operand_Indirect, RL78_Reg_##r1, RL78_Reg_##r2, a)
132127667Sbms#define SE()		rl78->op[1].use_es = 1
133127667Sbms#define SB(b)		set_bit (rl78->op+1, b)
134127667Sbms#define SCY()		SR(PSW); SB(0)
135127667Sbms#define COND(c)		rl78->op[1].condition = RL78_Condition_##c
136127667Sbms#define SPOP()		OP (1, RL78_Operand_PostInc, RL78_Reg_SP, 0);
137127667Sbms
138127667Sbmsstatic void
139127667Sbmsset_bit (RL78_Opcode_Operand *op, int bit)
140127667Sbms{
141127667Sbms  op->bit_number = bit;
14217683Spst  switch (op->type) {
14317683Spst  case RL78_Operand_Register:
14417683Spst    op->type = RL78_Operand_Bit;
14517683Spst    break;
146127667Sbms  case RL78_Operand_Indirect:
147109841Sfenner    op->type = RL78_Operand_BitIndirect;
148109841Sfenner    break;
149127667Sbms  default:
150127667Sbms    break;
15117683Spst  }
15217683Spst}
15356891Sfenner
15456891Sfennerstatic int
15556891Sfennersaddr (int x)
15656891Sfenner{
15756891Sfenner  if (x < 0x20)
15856891Sfenner    return 0xfff00 + x;
15956891Sfenner  return 0xffe00 + x;
16056891Sfenner}
16156891Sfenner
16256891Sfennerstatic int
16356891Sfennersfr (int x)
16456891Sfenner{
16556891Sfenner  return 0xfff00 + x;
16675110Sfenner}
16775110Sfenner
16875110Sfenner#define SADDR saddr (IMMU (1))
16975110Sfenner#define SFR sfr (IMMU (1))
17075110Sfenner
17175110Sfennerint
17275110Sfennerrl78_decode_opcode (unsigned long pc AU,
17375110Sfenner		  RL78_Opcode_Decoded * rl78,
17475110Sfenner		  int (* getbyte)(void *),
17575110Sfenner		  void * ptr,
17675110Sfenner		  RL78_Dis_Isa isa)
17775110Sfenner{
17875110Sfenner  LocalData lds, * ld = &lds;
17975110Sfenner  unsigned char op_buf[OP_BUF_LEN] = {0};
18075110Sfenner  unsigned char *op = op_buf;
18175110Sfenner  int op0, op1;
18275110Sfenner
18375110Sfenner  lds.rl78 = rl78;
18475110Sfenner  lds.getbyte = getbyte;
18575110Sfenner  lds.ptr = ptr;
18675110Sfenner  lds.op = op;
18775110Sfenner
18856891Sfenner  memset (rl78, 0, sizeof (*rl78));
18956891Sfenner
19056891Sfenner start_again:
19156891Sfenner
19256891Sfenner/* Byte registers, not including A.  */
19356891Sfenner/* Word registers, not including AX.  */
19456891Sfenner
19556891Sfenner/*----------------------------------------------------------------------*/
19675110Sfenner/* ES: prefix								*/
19775110Sfenner
19875110Sfenner  GETBYTE ();
19975110Sfenner  switch (op[0] & 0xff)
20075110Sfenner  {
20175110Sfenner    case 0x00:
20275110Sfenner        {
20375110Sfenner          /** 0000 0000			nop					*/
20475110Sfenner          if (trace)
20575110Sfenner            {
20675110Sfenner              printf ("\033[33m%s\033[0m  %02x\n",
20775110Sfenner                     "/** 0000 0000			nop					*/",
20875110Sfenner                     op[0]);
20975110Sfenner            }
21075110Sfenner          SYNTAX("nop");
21175110Sfenner#line 917 "rl78-decode.opc"
21275110Sfenner          ID(nop);
21375110Sfenner
21475110Sfenner        /*----------------------------------------------------------------------*/
21517683Spst
21617683Spst        }
21717683Spst      break;
21817683Spst    case 0x01:
21917683Spst    case 0x03:
22017683Spst    case 0x05:
22117683Spst    case 0x07:
22217683Spst        {
22317683Spst          /** 0000 0rw1			addw	%0, %1				*/
22417683Spst#line 280 "rl78-decode.opc"
225127667Sbms          int rw AU = (op[0] >> 1) & 0x03;
22675110Sfenner          if (trace)
22775110Sfenner            {
22875110Sfenner              printf ("\033[33m%s\033[0m  %02x\n",
22975110Sfenner                     "/** 0000 0rw1			addw	%0, %1				*/",
23075110Sfenner                     op[0]);
23117683Spst              printf ("  rw = 0x%x\n", rw);
23217683Spst            }
23317683Spst          SYNTAX("addw	%0, %1");
23475110Sfenner#line 280 "rl78-decode.opc"
23575110Sfenner          ID(add); W(); DR(AX); SRW(rw); Fzac;
23675110Sfenner
23775110Sfenner        }
23875110Sfenner      break;
23975110Sfenner    case 0x02:
24075110Sfenner        {
241127667Sbms          /** 0000 0010			addw	%0, %e!1			*/
242127667Sbms          if (trace)
243127667Sbms            {
244127667Sbms              printf ("\033[33m%s\033[0m  %02x\n",
245127667Sbms                     "/** 0000 0010			addw	%0, %e!1			*/",
24675110Sfenner                     op[0]);
24775110Sfenner            }
248127667Sbms          SYNTAX("addw	%0, %e!1");
249127667Sbms#line 271 "rl78-decode.opc"
250127667Sbms          ID(add); W(); DR(AX); SM(None, IMMU(2)); Fzac;
251127667Sbms
252127667Sbms        }
253127667Sbms      break;
254127667Sbms    case 0x04:
255127667Sbms        {
256127667Sbms          /** 0000 0100			addw	%0, #%1				*/
257127667Sbms          if (trace)
258127667Sbms            {
259127667Sbms              printf ("\033[33m%s\033[0m  %02x\n",
260127667Sbms                     "/** 0000 0100			addw	%0, #%1				*/",
261127667Sbms                     op[0]);
262127667Sbms            }
263127667Sbms          SYNTAX("addw	%0, #%1");
264127667Sbms#line 277 "rl78-decode.opc"
265127667Sbms          ID(add); W(); DR(AX); SC(IMMU(2)); Fzac;
266127667Sbms
267127667Sbms        }
268127667Sbms      break;
269127667Sbms    case 0x06:
270127667Sbms        {
271127667Sbms          /** 0000 0110			addw	%0, %1				*/
272127667Sbms          if (trace)
273127667Sbms            {
274127667Sbms              printf ("\033[33m%s\033[0m  %02x\n",
275127667Sbms                     "/** 0000 0110			addw	%0, %1				*/",
276127667Sbms                     op[0]);
277127667Sbms            }
278127667Sbms          SYNTAX("addw	%0, %1");
279127667Sbms#line 283 "rl78-decode.opc"
280127667Sbms          ID(add); W(); DR(AX); SM(None, SADDR); Fzac;
281127667Sbms
282127667Sbms        }
28317683Spst      break;
28417683Spst    case 0x08:
28538151Sphk        {
28675110Sfenner          /** 0000 1000			xch	a, x				*/
28775110Sfenner          if (trace)
288127667Sbms            {
289127667Sbms              printf ("\033[33m%s\033[0m  %02x\n",
29038151Sphk                     "/** 0000 1000			xch	a, x				*/",
29138151Sphk                     op[0]);
29217683Spst            }
29338151Sphk          SYNTAX("xch	a, x");
29438151Sphk#line 1240 "rl78-decode.opc"
295          ID(xch); DR(A); SR(X);
296
297        /*----------------------------------------------------------------------*/
298
299        }
300      break;
301    case 0x09:
302        {
303          /** 0000 1001			mov	%0, %e1				*/
304          if (trace)
305            {
306              printf ("\033[33m%s\033[0m  %02x\n",
307                     "/** 0000 1001			mov	%0, %e1				*/",
308                     op[0]);
309            }
310          SYNTAX("mov	%0, %e1");
311#line 684 "rl78-decode.opc"
312          ID(mov); DR(A); SM(B, IMMU(2));
313
314        }
315      break;
316    case 0x0a:
317        {
318          /** 0000 1010			add	%0, #%1				*/
319          if (trace)
320            {
321              printf ("\033[33m%s\033[0m  %02x\n",
322                     "/** 0000 1010			add	%0, #%1				*/",
323                     op[0]);
324            }
325          SYNTAX("add	%0, #%1");
326#line 234 "rl78-decode.opc"
327          ID(add); DM(None, SADDR); SC(IMMU(1)); Fzac;
328
329        /*----------------------------------------------------------------------*/
330
331        }
332      break;
333    case 0x0b:
334        {
335          /** 0000 1011			add	%0, %1				*/
336          if (trace)
337            {
338              printf ("\033[33m%s\033[0m  %02x\n",
339                     "/** 0000 1011			add	%0, %1				*/",
340                     op[0]);
341            }
342          SYNTAX("add	%0, %1");
343#line 228 "rl78-decode.opc"
344          ID(add); DR(A); SM(None, SADDR); Fzac;
345
346        }
347      break;
348    case 0x0c:
349        {
350          /** 0000 1100			add	%0, #%1				*/
351          if (trace)
352            {
353              printf ("\033[33m%s\033[0m  %02x\n",
354                     "/** 0000 1100			add	%0, #%1				*/",
355                     op[0]);
356            }
357          SYNTAX("add	%0, #%1");
358#line 222 "rl78-decode.opc"
359          ID(add); DR(A); SC(IMMU(1)); Fzac;
360
361        }
362      break;
363    case 0x0d:
364        {
365          /** 0000 1101			add	%0, %e1				*/
366          if (trace)
367            {
368              printf ("\033[33m%s\033[0m  %02x\n",
369                     "/** 0000 1101			add	%0, %e1				*/",
370                     op[0]);
371            }
372          SYNTAX("add	%0, %e1");
373#line 210 "rl78-decode.opc"
374          ID(add); DR(A); SM(HL, 0); Fzac;
375
376        }
377      break;
378    case 0x0e:
379        {
380          /** 0000 1110			add	%0, %ea1			*/
381          if (trace)
382            {
383              printf ("\033[33m%s\033[0m  %02x\n",
384                     "/** 0000 1110			add	%0, %ea1			*/",
385                     op[0]);
386            }
387          SYNTAX("add	%0, %ea1");
388#line 216 "rl78-decode.opc"
389          ID(add); DR(A); SM(HL, IMMU(1)); Fzac;
390
391        }
392      break;
393    case 0x0f:
394        {
395          /** 0000 1111			add	%0, %e!1			*/
396          if (trace)
397            {
398              printf ("\033[33m%s\033[0m  %02x\n",
399                     "/** 0000 1111			add	%0, %e!1			*/",
400                     op[0]);
401            }
402          SYNTAX("add	%0, %e!1");
403#line 207 "rl78-decode.opc"
404          ID(add); DR(A); SM(None, IMMU(2)); Fzac;
405
406        }
407      break;
408    case 0x10:
409        {
410          /** 0001 0000			addw	%0, #%1				*/
411          if (trace)
412            {
413              printf ("\033[33m%s\033[0m  %02x\n",
414                     "/** 0001 0000			addw	%0, #%1				*/",
415                     op[0]);
416            }
417          SYNTAX("addw	%0, #%1");
418#line 286 "rl78-decode.opc"
419          ID(add); W(); DR(SP); SC(IMMU(1)); Fzac;
420
421        /*----------------------------------------------------------------------*/
422
423        }
424      break;
425    case 0x11:
426        {
427          /** 0001 0001			es:					*/
428          if (trace)
429            {
430              printf ("\033[33m%s\033[0m  %02x\n",
431                     "/** 0001 0001			es:					*/",
432                     op[0]);
433            }
434          SYNTAX("es:");
435#line 199 "rl78-decode.opc"
436          DE(); SE();
437          op ++;
438          pc ++;
439          goto start_again;
440
441        /*----------------------------------------------------------------------*/
442
443        }
444      break;
445    case 0x12:
446    case 0x14:
447    case 0x16:
448        {
449          /** 0001 0ra0			movw	%0, %1				*/
450#line 865 "rl78-decode.opc"
451          int ra AU = (op[0] >> 1) & 0x03;
452          if (trace)
453            {
454              printf ("\033[33m%s\033[0m  %02x\n",
455                     "/** 0001 0ra0			movw	%0, %1				*/",
456                     op[0]);
457              printf ("  ra = 0x%x\n", ra);
458            }
459          SYNTAX("movw	%0, %1");
460#line 865 "rl78-decode.opc"
461          ID(mov); W(); DRW(ra); SR(AX);
462
463        }
464      break;
465    case 0x13:
466    case 0x15:
467    case 0x17:
468        {
469          /** 0001 0ra1			movw	%0, %1				*/
470#line 862 "rl78-decode.opc"
471          int ra AU = (op[0] >> 1) & 0x03;
472          if (trace)
473            {
474              printf ("\033[33m%s\033[0m  %02x\n",
475                     "/** 0001 0ra1			movw	%0, %1				*/",
476                     op[0]);
477              printf ("  ra = 0x%x\n", ra);
478            }
479          SYNTAX("movw	%0, %1");
480#line 862 "rl78-decode.opc"
481          ID(mov); W(); DR(AX); SRW(ra);
482
483        }
484      break;
485    case 0x18:
486        {
487          /** 0001 1000			mov	%e0, %1				*/
488          if (trace)
489            {
490              printf ("\033[33m%s\033[0m  %02x\n",
491                     "/** 0001 1000			mov	%e0, %1				*/",
492                     op[0]);
493            }
494          SYNTAX("mov	%e0, %1");
495#line 735 "rl78-decode.opc"
496          ID(mov); DM(B, IMMU(2)); SR(A);
497
498        }
499      break;
500    case 0x19:
501        {
502          /** 0001 1001			mov	%e0, #%1			*/
503          if (trace)
504            {
505              printf ("\033[33m%s\033[0m  %02x\n",
506                     "/** 0001 1001			mov	%e0, #%1			*/",
507                     op[0]);
508            }
509          SYNTAX("mov	%e0, #%1");
510#line 732 "rl78-decode.opc"
511          ID(mov); DM(B, IMMU(2)); SC(IMMU(1));
512
513        }
514      break;
515    case 0x1a:
516        {
517          /** 0001 1010			addc	%0, #%1				*/
518          if (trace)
519            {
520              printf ("\033[33m%s\033[0m  %02x\n",
521                     "/** 0001 1010			addc	%0, #%1				*/",
522                     op[0]);
523            }
524          SYNTAX("addc	%0, #%1");
525#line 266 "rl78-decode.opc"
526          ID(addc); DM(None, SADDR); SC(IMMU(1)); Fzac;
527
528        /*----------------------------------------------------------------------*/
529
530        }
531      break;
532    case 0x1b:
533        {
534          /** 0001 1011			addc	%0, %1				*/
535          if (trace)
536            {
537              printf ("\033[33m%s\033[0m  %02x\n",
538                     "/** 0001 1011			addc	%0, %1				*/",
539                     op[0]);
540            }
541          SYNTAX("addc	%0, %1");
542#line 263 "rl78-decode.opc"
543          ID(addc); DR(A); SM(None, SADDR); Fzac;
544
545        }
546      break;
547    case 0x1c:
548        {
549          /** 0001 1100			addc	%0, #%1				*/
550          if (trace)
551            {
552              printf ("\033[33m%s\033[0m  %02x\n",
553                     "/** 0001 1100			addc	%0, #%1				*/",
554                     op[0]);
555            }
556          SYNTAX("addc	%0, #%1");
557#line 254 "rl78-decode.opc"
558          ID(addc); DR(A); SC(IMMU(1)); Fzac;
559
560        }
561      break;
562    case 0x1d:
563        {
564          /** 0001 1101			addc	%0, %e1				*/
565          if (trace)
566            {
567              printf ("\033[33m%s\033[0m  %02x\n",
568                     "/** 0001 1101			addc	%0, %e1				*/",
569                     op[0]);
570            }
571          SYNTAX("addc	%0, %e1");
572#line 242 "rl78-decode.opc"
573          ID(addc); DR(A); SM(HL, 0); Fzac;
574
575        }
576      break;
577    case 0x1e:
578        {
579          /** 0001 1110			addc	%0, %ea1			*/
580          if (trace)
581            {
582              printf ("\033[33m%s\033[0m  %02x\n",
583                     "/** 0001 1110			addc	%0, %ea1			*/",
584                     op[0]);
585            }
586          SYNTAX("addc	%0, %ea1");
587#line 251 "rl78-decode.opc"
588          ID(addc); DR(A); SM(HL, IMMU(1)); Fzac;
589
590        }
591      break;
592    case 0x1f:
593        {
594          /** 0001 1111			addc	%0, %e!1			*/
595          if (trace)
596            {
597              printf ("\033[33m%s\033[0m  %02x\n",
598                     "/** 0001 1111			addc	%0, %e!1			*/",
599                     op[0]);
600            }
601          SYNTAX("addc	%0, %e!1");
602#line 239 "rl78-decode.opc"
603          ID(addc); DR(A); SM(None, IMMU(2)); Fzac;
604
605        }
606      break;
607    case 0x20:
608        {
609          /** 0010 0000			subw	%0, #%1				*/
610          if (trace)
611            {
612              printf ("\033[33m%s\033[0m  %02x\n",
613                     "/** 0010 0000			subw	%0, #%1				*/",
614                     op[0]);
615            }
616          SYNTAX("subw	%0, #%1");
617#line 1204 "rl78-decode.opc"
618          ID(sub); W(); DR(SP); SC(IMMU(1)); Fzac;
619
620        /*----------------------------------------------------------------------*/
621
622        }
623      break;
624    case 0x21:
625    case 0x23:
626    case 0x25:
627    case 0x27:
628        {
629          /** 0010 0rw1			subw	%0, %1				*/
630#line 1198 "rl78-decode.opc"
631          int rw AU = (op[0] >> 1) & 0x03;
632          if (trace)
633            {
634              printf ("\033[33m%s\033[0m  %02x\n",
635                     "/** 0010 0rw1			subw	%0, %1				*/",
636                     op[0]);
637              printf ("  rw = 0x%x\n", rw);
638            }
639          SYNTAX("subw	%0, %1");
640#line 1198 "rl78-decode.opc"
641          ID(sub); W(); DR(AX); SRW(rw); Fzac;
642
643        }
644      break;
645    case 0x22:
646        {
647          /** 0010 0010			subw	%0, %e!1			*/
648          if (trace)
649            {
650              printf ("\033[33m%s\033[0m  %02x\n",
651                     "/** 0010 0010			subw	%0, %e!1			*/",
652                     op[0]);
653            }
654          SYNTAX("subw	%0, %e!1");
655#line 1189 "rl78-decode.opc"
656          ID(sub); W(); DR(AX); SM(None, IMMU(2)); Fzac;
657
658        }
659      break;
660    case 0x24:
661        {
662          /** 0010 0100			subw	%0, #%1				*/
663          if (trace)
664            {
665              printf ("\033[33m%s\033[0m  %02x\n",
666                     "/** 0010 0100			subw	%0, #%1				*/",
667                     op[0]);
668            }
669          SYNTAX("subw	%0, #%1");
670#line 1195 "rl78-decode.opc"
671          ID(sub); W(); DR(AX); SC(IMMU(2)); Fzac;
672
673        }
674      break;
675    case 0x26:
676        {
677          /** 0010 0110			subw	%0, %1				*/
678          if (trace)
679            {
680              printf ("\033[33m%s\033[0m  %02x\n",
681                     "/** 0010 0110			subw	%0, %1				*/",
682                     op[0]);
683            }
684          SYNTAX("subw	%0, %1");
685#line 1201 "rl78-decode.opc"
686          ID(sub); W(); DR(AX); SM(None, SADDR); Fzac;
687
688        }
689      break;
690    case 0x28:
691        {
692          /** 0010 1000			mov	%e0, %1				*/
693          if (trace)
694            {
695              printf ("\033[33m%s\033[0m  %02x\n",
696                     "/** 0010 1000			mov	%e0, %1				*/",
697                     op[0]);
698            }
699          SYNTAX("mov	%e0, %1");
700#line 747 "rl78-decode.opc"
701          ID(mov); DM(C, IMMU(2)); SR(A);
702
703        }
704      break;
705    case 0x29:
706        {
707          /** 0010 1001			mov	%0, %e1				*/
708          if (trace)
709            {
710              printf ("\033[33m%s\033[0m  %02x\n",
711                     "/** 0010 1001			mov	%0, %e1				*/",
712                     op[0]);
713            }
714          SYNTAX("mov	%0, %e1");
715#line 690 "rl78-decode.opc"
716          ID(mov); DR(A); SM(C, IMMU(2));
717
718        }
719      break;
720    case 0x2a:
721        {
722          /** 0010 1010			sub	%0, #%1				*/
723          if (trace)
724            {
725              printf ("\033[33m%s\033[0m  %02x\n",
726                     "/** 0010 1010			sub	%0, #%1				*/",
727                     op[0]);
728            }
729          SYNTAX("sub	%0, #%1");
730#line 1152 "rl78-decode.opc"
731          ID(sub); DM(None, SADDR); SC(IMMU(1)); Fzac;
732
733        /*----------------------------------------------------------------------*/
734
735        }
736      break;
737    case 0x2b:
738        {
739          /** 0010 1011			sub	%0, %1				*/
740          if (trace)
741            {
742              printf ("\033[33m%s\033[0m  %02x\n",
743                     "/** 0010 1011			sub	%0, %1				*/",
744                     op[0]);
745            }
746          SYNTAX("sub	%0, %1");
747#line 1146 "rl78-decode.opc"
748          ID(sub); DR(A); SM(None, SADDR); Fzac;
749
750        }
751      break;
752    case 0x2c:
753        {
754          /** 0010 1100			sub	%0, #%1				*/
755          if (trace)
756            {
757              printf ("\033[33m%s\033[0m  %02x\n",
758                     "/** 0010 1100			sub	%0, #%1				*/",
759                     op[0]);
760            }
761          SYNTAX("sub	%0, #%1");
762#line 1140 "rl78-decode.opc"
763          ID(sub); DR(A); SC(IMMU(1)); Fzac;
764
765        }
766      break;
767    case 0x2d:
768        {
769          /** 0010 1101			sub	%0, %e1				*/
770          if (trace)
771            {
772              printf ("\033[33m%s\033[0m  %02x\n",
773                     "/** 0010 1101			sub	%0, %e1				*/",
774                     op[0]);
775            }
776          SYNTAX("sub	%0, %e1");
777#line 1128 "rl78-decode.opc"
778          ID(sub); DR(A); SM(HL, 0); Fzac;
779
780        }
781      break;
782    case 0x2e:
783        {
784          /** 0010 1110			sub	%0, %ea1			*/
785          if (trace)
786            {
787              printf ("\033[33m%s\033[0m  %02x\n",
788                     "/** 0010 1110			sub	%0, %ea1			*/",
789                     op[0]);
790            }
791          SYNTAX("sub	%0, %ea1");
792#line 1134 "rl78-decode.opc"
793          ID(sub); DR(A); SM(HL, IMMU(1)); Fzac;
794
795        }
796      break;
797    case 0x2f:
798        {
799          /** 0010 1111			sub	%0, %e!1			*/
800          if (trace)
801            {
802              printf ("\033[33m%s\033[0m  %02x\n",
803                     "/** 0010 1111			sub	%0, %e!1			*/",
804                     op[0]);
805            }
806          SYNTAX("sub	%0, %e!1");
807#line 1125 "rl78-decode.opc"
808          ID(sub); DR(A); SM(None, IMMU(2)); Fzac;
809
810        }
811      break;
812    case 0x30:
813    case 0x32:
814    case 0x34:
815    case 0x36:
816        {
817          /** 0011 0rg0			movw	%0, #%1				*/
818#line 859 "rl78-decode.opc"
819          int rg AU = (op[0] >> 1) & 0x03;
820          if (trace)
821            {
822              printf ("\033[33m%s\033[0m  %02x\n",
823                     "/** 0011 0rg0			movw	%0, #%1				*/",
824                     op[0]);
825              printf ("  rg = 0x%x\n", rg);
826            }
827          SYNTAX("movw	%0, #%1");
828#line 859 "rl78-decode.opc"
829          ID(mov); W(); DRW(rg); SC(IMMU(2));
830
831        }
832      break;
833    case 0x31:
834        GETBYTE ();
835        switch (op[1] & 0x8f)
836        {
837          case 0x00:
838              {
839                /** 0011 0001 0bit 0000		btclr	%s1, $%a0			*/
840#line 422 "rl78-decode.opc"
841                int bit AU = (op[1] >> 4) & 0x07;
842                if (trace)
843                  {
844                    printf ("\033[33m%s\033[0m  %02x %02x\n",
845                           "/** 0011 0001 0bit 0000		btclr	%s1, $%a0			*/",
846                           op[0], op[1]);
847                    printf ("  bit = 0x%x\n", bit);
848                  }
849                SYNTAX("btclr	%s1, $%a0");
850#line 422 "rl78-decode.opc"
851                ID(branch_cond_clear); SM(None, SADDR); SB(bit); DC(pc+IMMS(1)+4); COND(T);
852
853              /*----------------------------------------------------------------------*/
854
855              }
856            break;
857          case 0x01:
858              {
859                /** 0011 0001 0bit 0001		btclr	%1, $%a0			*/
860#line 416 "rl78-decode.opc"
861                int bit AU = (op[1] >> 4) & 0x07;
862                if (trace)
863                  {
864                    printf ("\033[33m%s\033[0m  %02x %02x\n",
865                           "/** 0011 0001 0bit 0001		btclr	%1, $%a0			*/",
866                           op[0], op[1]);
867                    printf ("  bit = 0x%x\n", bit);
868                  }
869                SYNTAX("btclr	%1, $%a0");
870#line 416 "rl78-decode.opc"
871                ID(branch_cond_clear); DC(pc+IMMS(1)+3); SR(A); SB(bit); COND(T);
872
873              }
874            break;
875          case 0x02:
876              {
877                /** 0011 0001 0bit 0010		bt	%s1, $%a0			*/
878#line 408 "rl78-decode.opc"
879                int bit AU = (op[1] >> 4) & 0x07;
880                if (trace)
881                  {
882                    printf ("\033[33m%s\033[0m  %02x %02x\n",
883                           "/** 0011 0001 0bit 0010		bt	%s1, $%a0			*/",
884                           op[0], op[1]);
885                    printf ("  bit = 0x%x\n", bit);
886                  }
887                SYNTAX("bt	%s1, $%a0");
888#line 408 "rl78-decode.opc"
889                ID(branch_cond); SM(None, SADDR); SB(bit); DC(pc+IMMS(1)+4); COND(T);
890
891              /*----------------------------------------------------------------------*/
892
893              }
894            break;
895          case 0x03:
896              {
897                /** 0011 0001 0bit 0011		bt	%1, $%a0			*/
898#line 402 "rl78-decode.opc"
899                int bit AU = (op[1] >> 4) & 0x07;
900                if (trace)
901                  {
902                    printf ("\033[33m%s\033[0m  %02x %02x\n",
903                           "/** 0011 0001 0bit 0011		bt	%1, $%a0			*/",
904                           op[0], op[1]);
905                    printf ("  bit = 0x%x\n", bit);
906                  }
907                SYNTAX("bt	%1, $%a0");
908#line 402 "rl78-decode.opc"
909                ID(branch_cond); DC(pc+IMMS(1)+3); SR(A); SB(bit); COND(T);
910
911              }
912            break;
913          case 0x04:
914              {
915                /** 0011 0001 0bit 0100		bf	%s1, $%a0			*/
916#line 369 "rl78-decode.opc"
917                int bit AU = (op[1] >> 4) & 0x07;
918                if (trace)
919                  {
920                    printf ("\033[33m%s\033[0m  %02x %02x\n",
921                           "/** 0011 0001 0bit 0100		bf	%s1, $%a0			*/",
922                           op[0], op[1]);
923                    printf ("  bit = 0x%x\n", bit);
924                  }
925                SYNTAX("bf	%s1, $%a0");
926#line 369 "rl78-decode.opc"
927                ID(branch_cond); SM(None, SADDR); SB(bit); DC(pc+IMMS(1)+4); COND(F);
928
929              /*----------------------------------------------------------------------*/
930
931              }
932            break;
933          case 0x05:
934              {
935                /** 0011 0001 0bit 0101		bf	%1, $%a0			*/
936#line 363 "rl78-decode.opc"
937                int bit AU = (op[1] >> 4) & 0x07;
938                if (trace)
939                  {
940                    printf ("\033[33m%s\033[0m  %02x %02x\n",
941                           "/** 0011 0001 0bit 0101		bf	%1, $%a0			*/",
942                           op[0], op[1]);
943                    printf ("  bit = 0x%x\n", bit);
944                  }
945                SYNTAX("bf	%1, $%a0");
946#line 363 "rl78-decode.opc"
947                ID(branch_cond); DC(pc+IMMS(1)+3); SR(A); SB(bit); COND(F);
948
949              }
950            break;
951          case 0x07:
952              {
953                /** 0011 0001 0cnt 0111		shl	%0, %1				*/
954#line 1081 "rl78-decode.opc"
955                int cnt AU = (op[1] >> 4) & 0x07;
956                if (trace)
957                  {
958                    printf ("\033[33m%s\033[0m  %02x %02x\n",
959                           "/** 0011 0001 0cnt 0111		shl	%0, %1				*/",
960                           op[0], op[1]);
961                    printf ("  cnt = 0x%x\n", cnt);
962                  }
963                SYNTAX("shl	%0, %1");
964#line 1081 "rl78-decode.opc"
965                ID(shl); DR(C); SC(cnt);
966
967              }
968            break;
969          case 0x08:
970              {
971                /** 0011 0001 0cnt 1000		shl	%0, %1				*/
972#line 1078 "rl78-decode.opc"
973                int cnt AU = (op[1] >> 4) & 0x07;
974                if (trace)
975                  {
976                    printf ("\033[33m%s\033[0m  %02x %02x\n",
977                           "/** 0011 0001 0cnt 1000		shl	%0, %1				*/",
978                           op[0], op[1]);
979                    printf ("  cnt = 0x%x\n", cnt);
980                  }
981                SYNTAX("shl	%0, %1");
982#line 1078 "rl78-decode.opc"
983                ID(shl); DR(B); SC(cnt);
984
985              }
986            break;
987          case 0x09:
988              {
989                /** 0011 0001 0cnt 1001		shl	%0, %1				*/
990#line 1075 "rl78-decode.opc"
991                int cnt AU = (op[1] >> 4) & 0x07;
992                if (trace)
993                  {
994                    printf ("\033[33m%s\033[0m  %02x %02x\n",
995                           "/** 0011 0001 0cnt 1001		shl	%0, %1				*/",
996                           op[0], op[1]);
997                    printf ("  cnt = 0x%x\n", cnt);
998                  }
999                SYNTAX("shl	%0, %1");
1000#line 1075 "rl78-decode.opc"
1001                ID(shl); DR(A); SC(cnt);
1002
1003              }
1004            break;
1005          case 0x0a:
1006              {
1007                /** 0011 0001 0cnt 1010		shr	%0, %1				*/
1008#line 1092 "rl78-decode.opc"
1009                int cnt AU = (op[1] >> 4) & 0x07;
1010                if (trace)
1011                  {
1012                    printf ("\033[33m%s\033[0m  %02x %02x\n",
1013                           "/** 0011 0001 0cnt 1010		shr	%0, %1				*/",
1014                           op[0], op[1]);
1015                    printf ("  cnt = 0x%x\n", cnt);
1016                  }
1017                SYNTAX("shr	%0, %1");
1018#line 1092 "rl78-decode.opc"
1019                ID(shr); DR(A); SC(cnt);
1020
1021              }
1022            break;
1023          case 0x0b:
1024              {
1025                /** 0011 0001 0cnt 1011		sar	%0, %1				*/
1026#line 1039 "rl78-decode.opc"
1027                int cnt AU = (op[1] >> 4) & 0x07;
1028                if (trace)
1029                  {
1030                    printf ("\033[33m%s\033[0m  %02x %02x\n",
1031                           "/** 0011 0001 0cnt 1011		sar	%0, %1				*/",
1032                           op[0], op[1]);
1033                    printf ("  cnt = 0x%x\n", cnt);
1034                  }
1035                SYNTAX("sar	%0, %1");
1036#line 1039 "rl78-decode.opc"
1037                ID(sar); DR(A); SC(cnt);
1038
1039              }
1040            break;
1041          case 0x0c:
1042          case 0x8c:
1043              {
1044                /** 0011 0001 wcnt 1100		shlw	%0, %1				*/
1045#line 1087 "rl78-decode.opc"
1046                int wcnt AU = (op[1] >> 4) & 0x0f;
1047                if (trace)
1048                  {
1049                    printf ("\033[33m%s\033[0m  %02x %02x\n",
1050                           "/** 0011 0001 wcnt 1100		shlw	%0, %1				*/",
1051                           op[0], op[1]);
1052                    printf ("  wcnt = 0x%x\n", wcnt);
1053                  }
1054                SYNTAX("shlw	%0, %1");
1055#line 1087 "rl78-decode.opc"
1056                ID(shl); W(); DR(BC); SC(wcnt);
1057
1058              /*----------------------------------------------------------------------*/
1059
1060              }
1061            break;
1062          case 0x0d:
1063          case 0x8d:
1064              {
1065                /** 0011 0001 wcnt 1101		shlw	%0, %1				*/
1066#line 1084 "rl78-decode.opc"
1067                int wcnt AU = (op[1] >> 4) & 0x0f;
1068                if (trace)
1069                  {
1070                    printf ("\033[33m%s\033[0m  %02x %02x\n",
1071                           "/** 0011 0001 wcnt 1101		shlw	%0, %1				*/",
1072                           op[0], op[1]);
1073                    printf ("  wcnt = 0x%x\n", wcnt);
1074                  }
1075                SYNTAX("shlw	%0, %1");
1076#line 1084 "rl78-decode.opc"
1077                ID(shl); W(); DR(AX); SC(wcnt);
1078
1079              }
1080            break;
1081          case 0x0e:
1082          case 0x8e:
1083              {
1084                /** 0011 0001 wcnt 1110		shrw	%0, %1				*/
1085#line 1095 "rl78-decode.opc"
1086                int wcnt AU = (op[1] >> 4) & 0x0f;
1087                if (trace)
1088                  {
1089                    printf ("\033[33m%s\033[0m  %02x %02x\n",
1090                           "/** 0011 0001 wcnt 1110		shrw	%0, %1				*/",
1091                           op[0], op[1]);
1092                    printf ("  wcnt = 0x%x\n", wcnt);
1093                  }
1094                SYNTAX("shrw	%0, %1");
1095#line 1095 "rl78-decode.opc"
1096                ID(shr); W(); DR(AX); SC(wcnt);
1097
1098              /*----------------------------------------------------------------------*/
1099
1100              }
1101            break;
1102          case 0x0f:
1103          case 0x8f:
1104              {
1105                /** 0011 0001 wcnt 1111		sarw	%0, %1				*/
1106#line 1042 "rl78-decode.opc"
1107                int wcnt AU = (op[1] >> 4) & 0x0f;
1108                if (trace)
1109                  {
1110                    printf ("\033[33m%s\033[0m  %02x %02x\n",
1111                           "/** 0011 0001 wcnt 1111		sarw	%0, %1				*/",
1112                           op[0], op[1]);
1113                    printf ("  wcnt = 0x%x\n", wcnt);
1114                  }
1115                SYNTAX("sarw	%0, %1");
1116#line 1042 "rl78-decode.opc"
1117                ID(sar); W(); DR(AX); SC(wcnt);
1118
1119              /*----------------------------------------------------------------------*/
1120
1121              }
1122            break;
1123          case 0x80:
1124              {
1125                /** 0011 0001 1bit 0000		btclr	%s1, $%a0			*/
1126#line 419 "rl78-decode.opc"
1127                int bit AU = (op[1] >> 4) & 0x07;
1128                if (trace)
1129                  {
1130                    printf ("\033[33m%s\033[0m  %02x %02x\n",
1131                           "/** 0011 0001 1bit 0000		btclr	%s1, $%a0			*/",
1132                           op[0], op[1]);
1133                    printf ("  bit = 0x%x\n", bit);
1134                  }
1135                SYNTAX("btclr	%s1, $%a0");
1136#line 419 "rl78-decode.opc"
1137                ID(branch_cond_clear); SM(None, SFR); SB(bit); DC(pc+IMMS(1)+4); COND(T);
1138
1139              }
1140            break;
1141          case 0x81:
1142              {
1143                /** 0011 0001 1bit 0001		btclr	%e1, $%a0			*/
1144#line 413 "rl78-decode.opc"
1145                int bit AU = (op[1] >> 4) & 0x07;
1146                if (trace)
1147                  {
1148                    printf ("\033[33m%s\033[0m  %02x %02x\n",
1149                           "/** 0011 0001 1bit 0001		btclr	%e1, $%a0			*/",
1150                           op[0], op[1]);
1151                    printf ("  bit = 0x%x\n", bit);
1152                  }
1153                SYNTAX("btclr	%e1, $%a0");
1154#line 413 "rl78-decode.opc"
1155                ID(branch_cond_clear); DC(pc+IMMS(1)+3); SM(HL,0); SB(bit); COND(T);
1156
1157              }
1158            break;
1159          case 0x82:
1160              {
1161                /** 0011 0001 1bit 0010		bt	%s1, $%a0			*/
1162#line 405 "rl78-decode.opc"
1163                int bit AU = (op[1] >> 4) & 0x07;
1164                if (trace)
1165                  {
1166                    printf ("\033[33m%s\033[0m  %02x %02x\n",
1167                           "/** 0011 0001 1bit 0010		bt	%s1, $%a0			*/",
1168                           op[0], op[1]);
1169                    printf ("  bit = 0x%x\n", bit);
1170                  }
1171                SYNTAX("bt	%s1, $%a0");
1172#line 405 "rl78-decode.opc"
1173                ID(branch_cond); SM(None, SFR); SB(bit); DC(pc+IMMS(1)+4); COND(T);
1174
1175              }
1176            break;
1177          case 0x83:
1178              {
1179                /** 0011 0001 1bit 0011		bt	%e1, $%a0			*/
1180#line 399 "rl78-decode.opc"
1181                int bit AU = (op[1] >> 4) & 0x07;
1182                if (trace)
1183                  {
1184                    printf ("\033[33m%s\033[0m  %02x %02x\n",
1185                           "/** 0011 0001 1bit 0011		bt	%e1, $%a0			*/",
1186                           op[0], op[1]);
1187                    printf ("  bit = 0x%x\n", bit);
1188                  }
1189                SYNTAX("bt	%e1, $%a0");
1190#line 399 "rl78-decode.opc"
1191                ID(branch_cond); DC(pc+IMMS(1)+3); SM(HL,0); SB(bit); COND(T);
1192
1193              }
1194            break;
1195          case 0x84:
1196              {
1197                /** 0011 0001 1bit 0100		bf	%s1, $%a0			*/
1198#line 366 "rl78-decode.opc"
1199                int bit AU = (op[1] >> 4) & 0x07;
1200                if (trace)
1201                  {
1202                    printf ("\033[33m%s\033[0m  %02x %02x\n",
1203                           "/** 0011 0001 1bit 0100		bf	%s1, $%a0			*/",
1204                           op[0], op[1]);
1205                    printf ("  bit = 0x%x\n", bit);
1206                  }
1207                SYNTAX("bf	%s1, $%a0");
1208#line 366 "rl78-decode.opc"
1209                ID(branch_cond); SM(None, SFR); SB(bit); DC(pc+IMMS(1)+4); COND(F);
1210
1211              }
1212            break;
1213          case 0x85:
1214              {
1215                /** 0011 0001 1bit 0101		bf	%e1, $%a0			*/
1216#line 360 "rl78-decode.opc"
1217                int bit AU = (op[1] >> 4) & 0x07;
1218                if (trace)
1219                  {
1220                    printf ("\033[33m%s\033[0m  %02x %02x\n",
1221                           "/** 0011 0001 1bit 0101		bf	%e1, $%a0			*/",
1222                           op[0], op[1]);
1223                    printf ("  bit = 0x%x\n", bit);
1224                  }
1225                SYNTAX("bf	%e1, $%a0");
1226#line 360 "rl78-decode.opc"
1227                ID(branch_cond); DC(pc+IMMS(1)+3); SM(HL,0); SB(bit); COND(F);
1228
1229              }
1230            break;
1231          default: UNSUPPORTED(); break;
1232        }
1233      break;
1234    case 0x33:
1235    case 0x35:
1236    case 0x37:
1237        {
1238          /** 0011 0ra1			xchw	%0, %1				*/
1239#line 1245 "rl78-decode.opc"
1240          int ra AU = (op[0] >> 1) & 0x03;
1241          if (trace)
1242            {
1243              printf ("\033[33m%s\033[0m  %02x\n",
1244                     "/** 0011 0ra1			xchw	%0, %1				*/",
1245                     op[0]);
1246              printf ("  ra = 0x%x\n", ra);
1247            }
1248          SYNTAX("xchw	%0, %1");
1249#line 1245 "rl78-decode.opc"
1250          ID(xch); W(); DR(AX); SRW(ra);
1251
1252        /*----------------------------------------------------------------------*/
1253
1254        }
1255      break;
1256    case 0x38:
1257        {
1258          /** 0011 1000			mov	%e0, #%1			*/
1259          if (trace)
1260            {
1261              printf ("\033[33m%s\033[0m  %02x\n",
1262                     "/** 0011 1000			mov	%e0, #%1			*/",
1263                     op[0]);
1264            }
1265          SYNTAX("mov	%e0, #%1");
1266#line 744 "rl78-decode.opc"
1267          ID(mov); DM(C, IMMU(2)); SC(IMMU(1));
1268
1269        }
1270      break;
1271    case 0x39:
1272        {
1273          /** 0011 1001			mov	%e0, #%1			*/
1274          if (trace)
1275            {
1276              printf ("\033[33m%s\033[0m  %02x\n",
1277                     "/** 0011 1001			mov	%e0, #%1			*/",
1278                     op[0]);
1279            }
1280          SYNTAX("mov	%e0, #%1");
1281#line 738 "rl78-decode.opc"
1282          ID(mov); DM(BC, IMMU(2)); SC(IMMU(1));
1283
1284        }
1285      break;
1286    case 0x3a:
1287        {
1288          /** 0011 1010			subc	%0, #%1				*/
1289          if (trace)
1290            {
1291              printf ("\033[33m%s\033[0m  %02x\n",
1292                     "/** 0011 1010			subc	%0, #%1				*/",
1293                     op[0]);
1294            }
1295          SYNTAX("subc	%0, #%1");
1296#line 1184 "rl78-decode.opc"
1297          ID(subc); DM(None, SADDR); SC(IMMU(1)); Fzac;
1298
1299        /*----------------------------------------------------------------------*/
1300
1301        }
1302      break;
1303    case 0x3b:
1304        {
1305          /** 0011 1011			subc	%0, %1				*/
1306          if (trace)
1307            {
1308              printf ("\033[33m%s\033[0m  %02x\n",
1309                     "/** 0011 1011			subc	%0, %1				*/",
1310                     op[0]);
1311            }
1312          SYNTAX("subc	%0, %1");
1313#line 1181 "rl78-decode.opc"
1314          ID(subc); DR(A); SM(None, SADDR); Fzac;
1315
1316        }
1317      break;
1318    case 0x3c:
1319        {
1320          /** 0011 1100			subc	%0, #%1				*/
1321          if (trace)
1322            {
1323              printf ("\033[33m%s\033[0m  %02x\n",
1324                     "/** 0011 1100			subc	%0, #%1				*/",
1325                     op[0]);
1326            }
1327          SYNTAX("subc	%0, #%1");
1328#line 1172 "rl78-decode.opc"
1329          ID(subc); DR(A); SC(IMMU(1)); Fzac;
1330
1331        }
1332      break;
1333    case 0x3d:
1334        {
1335          /** 0011 1101			subc	%0, %e1				*/
1336          if (trace)
1337            {
1338              printf ("\033[33m%s\033[0m  %02x\n",
1339                     "/** 0011 1101			subc	%0, %e1				*/",
1340                     op[0]);
1341            }
1342          SYNTAX("subc	%0, %e1");
1343#line 1160 "rl78-decode.opc"
1344          ID(subc); DR(A); SM(HL, 0); Fzac;
1345
1346        }
1347      break;
1348    case 0x3e:
1349        {
1350          /** 0011 1110			subc	%0, %ea1			*/
1351          if (trace)
1352            {
1353              printf ("\033[33m%s\033[0m  %02x\n",
1354                     "/** 0011 1110			subc	%0, %ea1			*/",
1355                     op[0]);
1356            }
1357          SYNTAX("subc	%0, %ea1");
1358#line 1169 "rl78-decode.opc"
1359          ID(subc); DR(A); SM(HL, IMMU(1)); Fzac;
1360
1361        }
1362      break;
1363    case 0x3f:
1364        {
1365          /** 0011 1111			subc	%0, %e!1			*/
1366          if (trace)
1367            {
1368              printf ("\033[33m%s\033[0m  %02x\n",
1369                     "/** 0011 1111			subc	%0, %e!1			*/",
1370                     op[0]);
1371            }
1372          SYNTAX("subc	%0, %e!1");
1373#line 1157 "rl78-decode.opc"
1374          ID(subc); DR(A); SM(None, IMMU(2)); Fzac;
1375
1376        }
1377      break;
1378    case 0x40:
1379        {
1380          /** 0100 0000			cmp	%e!0, #%1			*/
1381          if (trace)
1382            {
1383              printf ("\033[33m%s\033[0m  %02x\n",
1384                     "/** 0100 0000			cmp	%e!0, #%1			*/",
1385                     op[0]);
1386            }
1387          SYNTAX("cmp	%e!0, #%1");
1388#line 486 "rl78-decode.opc"
1389          ID(cmp); DM(None, IMMU(2)); SC(IMMU(1)); Fzac;
1390
1391        }
1392      break;
1393    case 0x41:
1394        {
1395          /** 0100 0001			mov	%0, #%1				*/
1396          if (trace)
1397            {
1398              printf ("\033[33m%s\033[0m  %02x\n",
1399                     "/** 0100 0001			mov	%0, #%1				*/",
1400                     op[0]);
1401            }
1402          SYNTAX("mov	%0, #%1");
1403#line 723 "rl78-decode.opc"
1404          ID(mov); DR(ES); SC(IMMU(1));
1405
1406        }
1407      break;
1408    case 0x42:
1409        {
1410          /** 0100 0010			cmpw	%0, %e!1			*/
1411          if (trace)
1412            {
1413              printf ("\033[33m%s\033[0m  %02x\n",
1414                     "/** 0100 0010			cmpw	%0, %e!1			*/",
1415                     op[0]);
1416            }
1417          SYNTAX("cmpw	%0, %e!1");
1418#line 537 "rl78-decode.opc"
1419          ID(cmp); W(); DR(AX); SM(None, IMMU(2)); Fzac;
1420
1421        }
1422      break;
1423    case 0x43:
1424    case 0x45:
1425    case 0x47:
1426        {
1427          /** 0100 0ra1			cmpw	%0, %1				*/
1428#line 546 "rl78-decode.opc"
1429          int ra AU = (op[0] >> 1) & 0x03;
1430          if (trace)
1431            {
1432              printf ("\033[33m%s\033[0m  %02x\n",
1433                     "/** 0100 0ra1			cmpw	%0, %1				*/",
1434                     op[0]);
1435              printf ("  ra = 0x%x\n", ra);
1436            }
1437          SYNTAX("cmpw	%0, %1");
1438#line 546 "rl78-decode.opc"
1439          ID(cmp); W(); DR(AX); SRW(ra); Fzac;
1440
1441        }
1442      break;
1443    case 0x44:
1444        {
1445          /** 0100 0100			cmpw	%0, #%1				*/
1446          if (trace)
1447            {
1448              printf ("\033[33m%s\033[0m  %02x\n",
1449                     "/** 0100 0100			cmpw	%0, #%1				*/",
1450                     op[0]);
1451            }
1452          SYNTAX("cmpw	%0, #%1");
1453#line 543 "rl78-decode.opc"
1454          ID(cmp); W(); DR(AX); SC(IMMU(2)); Fzac;
1455
1456        }
1457      break;
1458    case 0x46:
1459        {
1460          /** 0100 0110			cmpw	%0, %1				*/
1461          if (trace)
1462            {
1463              printf ("\033[33m%s\033[0m  %02x\n",
1464                     "/** 0100 0110			cmpw	%0, %1				*/",
1465                     op[0]);
1466            }
1467          SYNTAX("cmpw	%0, %1");
1468#line 549 "rl78-decode.opc"
1469          ID(cmp); W(); DR(AX); SM(None, SADDR); Fzac;
1470
1471        /*----------------------------------------------------------------------*/
1472
1473        }
1474      break;
1475    case 0x48:
1476        {
1477          /** 0100 1000			mov	%e0, %1				*/
1478          if (trace)
1479            {
1480              printf ("\033[33m%s\033[0m  %02x\n",
1481                     "/** 0100 1000			mov	%e0, %1				*/",
1482                     op[0]);
1483            }
1484          SYNTAX("mov	%e0, %1");
1485#line 741 "rl78-decode.opc"
1486          ID(mov); DM(BC, IMMU(2)); SR(A);
1487
1488        }
1489      break;
1490    case 0x49:
1491        {
1492          /** 0100 1001			mov	%0, %e1				*/
1493          if (trace)
1494            {
1495              printf ("\033[33m%s\033[0m  %02x\n",
1496                     "/** 0100 1001			mov	%0, %e1				*/",
1497                     op[0]);
1498            }
1499          SYNTAX("mov	%0, %e1");
1500#line 687 "rl78-decode.opc"
1501          ID(mov); DR(A); SM(BC, IMMU(2));
1502
1503        }
1504      break;
1505    case 0x4a:
1506        {
1507          /** 0100 1010			cmp	%0, #%1				*/
1508          if (trace)
1509            {
1510              printf ("\033[33m%s\033[0m  %02x\n",
1511                     "/** 0100 1010			cmp	%0, #%1				*/",
1512                     op[0]);
1513            }
1514          SYNTAX("cmp	%0, #%1");
1515#line 489 "rl78-decode.opc"
1516          ID(cmp); DM(None, SADDR); SC(IMMU(1)); Fzac;
1517
1518        }
1519      break;
1520    case 0x4b:
1521        {
1522          /** 0100 1011			cmp	%0, %1				*/
1523          if (trace)
1524            {
1525              printf ("\033[33m%s\033[0m  %02x\n",
1526                     "/** 0100 1011			cmp	%0, %1				*/",
1527                     op[0]);
1528            }
1529          SYNTAX("cmp	%0, %1");
1530#line 516 "rl78-decode.opc"
1531          ID(cmp); DR(A); SM(None, SADDR); Fzac;
1532
1533        /*----------------------------------------------------------------------*/
1534
1535        }
1536      break;
1537    case 0x4c:
1538        {
1539          /** 0100 1100			cmp	%0, #%1				*/
1540          if (trace)
1541            {
1542              printf ("\033[33m%s\033[0m  %02x\n",
1543                     "/** 0100 1100			cmp	%0, #%1				*/",
1544                     op[0]);
1545            }
1546          SYNTAX("cmp	%0, #%1");
1547#line 507 "rl78-decode.opc"
1548          ID(cmp); DR(A); SC(IMMU(1)); Fzac;
1549
1550        }
1551      break;
1552    case 0x4d:
1553        {
1554          /** 0100 1101			cmp	%0, %e1				*/
1555          if (trace)
1556            {
1557              printf ("\033[33m%s\033[0m  %02x\n",
1558                     "/** 0100 1101			cmp	%0, %e1				*/",
1559                     op[0]);
1560            }
1561          SYNTAX("cmp	%0, %e1");
1562#line 495 "rl78-decode.opc"
1563          ID(cmp); DR(A); SM(HL, 0); Fzac;
1564
1565        }
1566      break;
1567    case 0x4e:
1568        {
1569          /** 0100 1110			cmp	%0, %ea1			*/
1570          if (trace)
1571            {
1572              printf ("\033[33m%s\033[0m  %02x\n",
1573                     "/** 0100 1110			cmp	%0, %ea1			*/",
1574                     op[0]);
1575            }
1576          SYNTAX("cmp	%0, %ea1");
1577#line 504 "rl78-decode.opc"
1578          ID(cmp); DR(A); SM(HL, IMMU(1)); Fzac;
1579
1580        }
1581      break;
1582    case 0x4f:
1583        {
1584          /** 0100 1111			cmp	%0, %e!1			*/
1585          if (trace)
1586            {
1587              printf ("\033[33m%s\033[0m  %02x\n",
1588                     "/** 0100 1111			cmp	%0, %e!1			*/",
1589                     op[0]);
1590            }
1591          SYNTAX("cmp	%0, %e!1");
1592#line 492 "rl78-decode.opc"
1593          ID(cmp); DR(A); SM(None, IMMU(2)); Fzac;
1594
1595        }
1596      break;
1597    case 0x50:
1598    case 0x51:
1599    case 0x52:
1600    case 0x53:
1601    case 0x54:
1602    case 0x55:
1603    case 0x56:
1604    case 0x57:
1605        {
1606          /** 0101 0reg			mov	%0, #%1				*/
1607#line 675 "rl78-decode.opc"
1608          int reg AU = op[0] & 0x07;
1609          if (trace)
1610            {
1611              printf ("\033[33m%s\033[0m  %02x\n",
1612                     "/** 0101 0reg			mov	%0, #%1				*/",
1613                     op[0]);
1614              printf ("  reg = 0x%x\n", reg);
1615            }
1616          SYNTAX("mov	%0, #%1");
1617#line 675 "rl78-decode.opc"
1618          ID(mov); DRB(reg); SC(IMMU(1));
1619
1620        }
1621      break;
1622    case 0x58:
1623        {
1624          /** 0101 1000			movw	%e0, %1				*/
1625          if (trace)
1626            {
1627              printf ("\033[33m%s\033[0m  %02x\n",
1628                     "/** 0101 1000			movw	%e0, %1				*/",
1629                     op[0]);
1630            }
1631          SYNTAX("movw	%e0, %1");
1632#line 877 "rl78-decode.opc"
1633          ID(mov); W(); DM(B, IMMU(2)); SR(AX);
1634
1635        }
1636      break;
1637    case 0x59:
1638        {
1639          /** 0101 1001			movw	%0, %e1				*/
1640          if (trace)
1641            {
1642              printf ("\033[33m%s\033[0m  %02x\n",
1643                     "/** 0101 1001			movw	%0, %e1				*/",
1644                     op[0]);
1645            }
1646          SYNTAX("movw	%0, %e1");
1647#line 868 "rl78-decode.opc"
1648          ID(mov); W(); DR(AX); SM(B, IMMU(2));
1649
1650        }
1651      break;
1652    case 0x5a:
1653        {
1654          /** 0101 1010	       		and	%0, #%1				*/
1655          if (trace)
1656            {
1657              printf ("\033[33m%s\033[0m  %02x\n",
1658                     "/** 0101 1010	       		and	%0, #%1				*/",
1659                     op[0]);
1660            }
1661          SYNTAX("and	%0, #%1");
1662#line 318 "rl78-decode.opc"
1663          ID(and); DM(None, SADDR); SC(IMMU(1)); Fz;
1664
1665        /*----------------------------------------------------------------------*/
1666
1667        }
1668      break;
1669    case 0x5b:
1670        {
1671          /** 0101 1011	       		and	%0, %1				*/
1672          if (trace)
1673            {
1674              printf ("\033[33m%s\033[0m  %02x\n",
1675                     "/** 0101 1011	       		and	%0, %1				*/",
1676                     op[0]);
1677            }
1678          SYNTAX("and	%0, %1");
1679#line 315 "rl78-decode.opc"
1680          ID(and); DR(A); SM(None, SADDR); Fz;
1681
1682        }
1683      break;
1684    case 0x5c:
1685        {
1686          /** 0101 1100	       		and	%0, #%1				*/
1687          if (trace)
1688            {
1689              printf ("\033[33m%s\033[0m  %02x\n",
1690                     "/** 0101 1100	       		and	%0, #%1				*/",
1691                     op[0]);
1692            }
1693          SYNTAX("and	%0, #%1");
1694#line 306 "rl78-decode.opc"
1695          ID(and); DR(A); SC(IMMU(1)); Fz;
1696
1697        }
1698      break;
1699    case 0x5d:
1700        {
1701          /** 0101 1101			and	%0, %e1			*/
1702          if (trace)
1703            {
1704              printf ("\033[33m%s\033[0m  %02x\n",
1705                     "/** 0101 1101			and	%0, %e1			*/",
1706                     op[0]);
1707            }
1708          SYNTAX("and	%0, %e1");
1709#line 294 "rl78-decode.opc"
1710          ID(and); DR(A); SM(HL, 0); Fz;
1711
1712        }
1713      break;
1714    case 0x5e:
1715        {
1716          /** 0101 1110			and	%0, %ea1			*/
1717          if (trace)
1718            {
1719              printf ("\033[33m%s\033[0m  %02x\n",
1720                     "/** 0101 1110			and	%0, %ea1			*/",
1721                     op[0]);
1722            }
1723          SYNTAX("and	%0, %ea1");
1724#line 300 "rl78-decode.opc"
1725          ID(and); DR(A); SM(HL, IMMU(1)); Fz;
1726
1727        }
1728      break;
1729    case 0x5f:
1730        {
1731          /** 0101 1111			and	%0, %e!1			*/
1732          if (trace)
1733            {
1734              printf ("\033[33m%s\033[0m  %02x\n",
1735                     "/** 0101 1111			and	%0, %e!1			*/",
1736                     op[0]);
1737            }
1738          SYNTAX("and	%0, %e!1");
1739#line 291 "rl78-decode.opc"
1740          ID(and); DR(A); SM(None, IMMU(2)); Fz;
1741
1742        }
1743      break;
1744    case 0x60:
1745    case 0x62:
1746    case 0x63:
1747    case 0x64:
1748    case 0x65:
1749    case 0x66:
1750    case 0x67:
1751        {
1752          /** 0110 0rba			mov	%0, %1				*/
1753#line 678 "rl78-decode.opc"
1754          int rba AU = op[0] & 0x07;
1755          if (trace)
1756            {
1757              printf ("\033[33m%s\033[0m  %02x\n",
1758                     "/** 0110 0rba			mov	%0, %1				*/",
1759                     op[0]);
1760              printf ("  rba = 0x%x\n", rba);
1761            }
1762          SYNTAX("mov	%0, %1");
1763#line 678 "rl78-decode.opc"
1764          ID(mov); DR(A); SRB(rba);
1765
1766        }
1767      break;
1768    case 0x61:
1769        GETBYTE ();
1770        switch (op[1] & 0xff)
1771        {
1772          case 0x00:
1773          case 0x01:
1774          case 0x02:
1775          case 0x03:
1776          case 0x04:
1777          case 0x05:
1778          case 0x06:
1779          case 0x07:
1780              {
1781                /** 0110 0001 0000 0reg		add	%0, %1				*/
1782#line 231 "rl78-decode.opc"
1783                int reg AU = op[1] & 0x07;
1784                if (trace)
1785                  {
1786                    printf ("\033[33m%s\033[0m  %02x %02x\n",
1787                           "/** 0110 0001 0000 0reg		add	%0, %1				*/",
1788                           op[0], op[1]);
1789                    printf ("  reg = 0x%x\n", reg);
1790                  }
1791                SYNTAX("add	%0, %1");
1792#line 231 "rl78-decode.opc"
1793                ID(add); DRB(reg); SR(A); Fzac;
1794
1795              }
1796            break;
1797          case 0x08:
1798          case 0x0a:
1799          case 0x0b:
1800          case 0x0c:
1801          case 0x0d:
1802          case 0x0e:
1803          case 0x0f:
1804              {
1805                /** 0110 0001 0000 1rba		add	%0, %1				*/
1806#line 225 "rl78-decode.opc"
1807                int rba AU = op[1] & 0x07;
1808                if (trace)
1809                  {
1810                    printf ("\033[33m%s\033[0m  %02x %02x\n",
1811                           "/** 0110 0001 0000 1rba		add	%0, %1				*/",
1812                           op[0], op[1]);
1813                    printf ("  rba = 0x%x\n", rba);
1814                  }
1815                SYNTAX("add	%0, %1");
1816#line 225 "rl78-decode.opc"
1817                ID(add); DR(A); SRB(rba); Fzac;
1818
1819              }
1820            break;
1821          case 0x09:
1822              {
1823                /** 0110 0001 0000 1001		addw	%0, %ea1			*/
1824                if (trace)
1825                  {
1826                    printf ("\033[33m%s\033[0m  %02x %02x\n",
1827                           "/** 0110 0001 0000 1001		addw	%0, %ea1			*/",
1828                           op[0], op[1]);
1829                  }
1830                SYNTAX("addw	%0, %ea1");
1831#line 274 "rl78-decode.opc"
1832                ID(add); W(); DR(AX); SM(HL, IMMU(1)); Fzac;
1833
1834              }
1835            break;
1836          case 0x10:
1837          case 0x11:
1838          case 0x12:
1839          case 0x13:
1840          case 0x14:
1841          case 0x15:
1842          case 0x16:
1843          case 0x17:
1844              {
1845                /** 0110 0001 0001 0reg		addc	%0, %1				*/
1846#line 260 "rl78-decode.opc"
1847                int reg AU = op[1] & 0x07;
1848                if (trace)
1849                  {
1850                    printf ("\033[33m%s\033[0m  %02x %02x\n",
1851                           "/** 0110 0001 0001 0reg		addc	%0, %1				*/",
1852                           op[0], op[1]);
1853                    printf ("  reg = 0x%x\n", reg);
1854                  }
1855                SYNTAX("addc	%0, %1");
1856#line 260 "rl78-decode.opc"
1857                ID(addc); DRB(reg); SR(A); Fzac;
1858
1859              }
1860            break;
1861          case 0x18:
1862          case 0x1a:
1863          case 0x1b:
1864          case 0x1c:
1865          case 0x1d:
1866          case 0x1e:
1867          case 0x1f:
1868              {
1869                /** 0110 0001 0001 1rba		addc	%0, %1				*/
1870#line 257 "rl78-decode.opc"
1871                int rba AU = op[1] & 0x07;
1872                if (trace)
1873                  {
1874                    printf ("\033[33m%s\033[0m  %02x %02x\n",
1875                           "/** 0110 0001 0001 1rba		addc	%0, %1				*/",
1876                           op[0], op[1]);
1877                    printf ("  rba = 0x%x\n", rba);
1878                  }
1879                SYNTAX("addc	%0, %1");
1880#line 257 "rl78-decode.opc"
1881                ID(addc); DR(A); SRB(rba); Fzac;
1882
1883              }
1884            break;
1885          case 0x20:
1886          case 0x21:
1887          case 0x22:
1888          case 0x23:
1889          case 0x24:
1890          case 0x25:
1891          case 0x26:
1892          case 0x27:
1893              {
1894                /** 0110 0001 0010 0reg		sub	%0, %1				*/
1895#line 1149 "rl78-decode.opc"
1896                int reg AU = op[1] & 0x07;
1897                if (trace)
1898                  {
1899                    printf ("\033[33m%s\033[0m  %02x %02x\n",
1900                           "/** 0110 0001 0010 0reg		sub	%0, %1				*/",
1901                           op[0], op[1]);
1902                    printf ("  reg = 0x%x\n", reg);
1903                  }
1904                SYNTAX("sub	%0, %1");
1905#line 1149 "rl78-decode.opc"
1906                ID(sub); DRB(reg); SR(A); Fzac;
1907
1908              }
1909            break;
1910          case 0x28:
1911          case 0x2a:
1912          case 0x2b:
1913          case 0x2c:
1914          case 0x2d:
1915          case 0x2e:
1916          case 0x2f:
1917              {
1918                /** 0110 0001 0010 1rba		sub	%0, %1				*/
1919#line 1143 "rl78-decode.opc"
1920                int rba AU = op[1] & 0x07;
1921                if (trace)
1922                  {
1923                    printf ("\033[33m%s\033[0m  %02x %02x\n",
1924                           "/** 0110 0001 0010 1rba		sub	%0, %1				*/",
1925                           op[0], op[1]);
1926                    printf ("  rba = 0x%x\n", rba);
1927                  }
1928                SYNTAX("sub	%0, %1");
1929#line 1143 "rl78-decode.opc"
1930                ID(sub); DR(A); SRB(rba); Fzac;
1931
1932              }
1933            break;
1934          case 0x29:
1935              {
1936                /** 0110 0001 0010 1001		subw	%0, %ea1			*/
1937                if (trace)
1938                  {
1939                    printf ("\033[33m%s\033[0m  %02x %02x\n",
1940                           "/** 0110 0001 0010 1001		subw	%0, %ea1			*/",
1941                           op[0], op[1]);
1942                  }
1943                SYNTAX("subw	%0, %ea1");
1944#line 1192 "rl78-decode.opc"
1945                ID(sub); W(); DR(AX); SM(HL, IMMU(1)); Fzac;
1946
1947              }
1948            break;
1949          case 0x30:
1950          case 0x31:
1951          case 0x32:
1952          case 0x33:
1953          case 0x34:
1954          case 0x35:
1955          case 0x36:
1956          case 0x37:
1957              {
1958                /** 0110 0001 0011 0reg		subc	%0, %1				*/
1959#line 1178 "rl78-decode.opc"
1960                int reg AU = op[1] & 0x07;
1961                if (trace)
1962                  {
1963                    printf ("\033[33m%s\033[0m  %02x %02x\n",
1964                           "/** 0110 0001 0011 0reg		subc	%0, %1				*/",
1965                           op[0], op[1]);
1966                    printf ("  reg = 0x%x\n", reg);
1967                  }
1968                SYNTAX("subc	%0, %1");
1969#line 1178 "rl78-decode.opc"
1970                ID(subc); DRB(reg); SR(A); Fzac;
1971
1972              }
1973            break;
1974          case 0x38:
1975          case 0x3a:
1976          case 0x3b:
1977          case 0x3c:
1978          case 0x3d:
1979          case 0x3e:
1980          case 0x3f:
1981              {
1982                /** 0110 0001 0011 1rba		subc	%0, %1				*/
1983#line 1175 "rl78-decode.opc"
1984                int rba AU = op[1] & 0x07;
1985                if (trace)
1986                  {
1987                    printf ("\033[33m%s\033[0m  %02x %02x\n",
1988                           "/** 0110 0001 0011 1rba		subc	%0, %1				*/",
1989                           op[0], op[1]);
1990                    printf ("  rba = 0x%x\n", rba);
1991                  }
1992                SYNTAX("subc	%0, %1");
1993#line 1175 "rl78-decode.opc"
1994                ID(subc); DR(A); SRB(rba); Fzac;
1995
1996              }
1997            break;
1998          case 0x40:
1999          case 0x41:
2000          case 0x42:
2001          case 0x43:
2002          case 0x44:
2003          case 0x45:
2004          case 0x46:
2005          case 0x47:
2006              {
2007                /** 0110 0001 0100 0reg		cmp	%0, %1				*/
2008#line 513 "rl78-decode.opc"
2009                int reg AU = op[1] & 0x07;
2010                if (trace)
2011                  {
2012                    printf ("\033[33m%s\033[0m  %02x %02x\n",
2013                           "/** 0110 0001 0100 0reg		cmp	%0, %1				*/",
2014                           op[0], op[1]);
2015                    printf ("  reg = 0x%x\n", reg);
2016                  }
2017                SYNTAX("cmp	%0, %1");
2018#line 513 "rl78-decode.opc"
2019                ID(cmp); DRB(reg); SR(A); Fzac;
2020
2021              }
2022            break;
2023          case 0x48:
2024          case 0x4a:
2025          case 0x4b:
2026          case 0x4c:
2027          case 0x4d:
2028          case 0x4e:
2029          case 0x4f:
2030              {
2031                /** 0110 0001 0100 1rba		cmp	%0, %1				*/
2032#line 510 "rl78-decode.opc"
2033                int rba AU = op[1] & 0x07;
2034                if (trace)
2035                  {
2036                    printf ("\033[33m%s\033[0m  %02x %02x\n",
2037                           "/** 0110 0001 0100 1rba		cmp	%0, %1				*/",
2038                           op[0], op[1]);
2039                    printf ("  rba = 0x%x\n", rba);
2040                  }
2041                SYNTAX("cmp	%0, %1");
2042#line 510 "rl78-decode.opc"
2043                ID(cmp); DR(A); SRB(rba); Fzac;
2044
2045              }
2046            break;
2047          case 0x49:
2048              {
2049                /** 0110 0001 0100 1001		cmpw	%0, %ea1			*/
2050                if (trace)
2051                  {
2052                    printf ("\033[33m%s\033[0m  %02x %02x\n",
2053                           "/** 0110 0001 0100 1001		cmpw	%0, %ea1			*/",
2054                           op[0], op[1]);
2055                  }
2056                SYNTAX("cmpw	%0, %ea1");
2057#line 540 "rl78-decode.opc"
2058                ID(cmp); W(); DR(AX); SM(HL, IMMU(1)); Fzac;
2059
2060              }
2061            break;
2062          case 0x50:
2063          case 0x51:
2064          case 0x52:
2065          case 0x53:
2066          case 0x54:
2067          case 0x55:
2068          case 0x56:
2069          case 0x57:
2070              {
2071                /** 0110 0001 0101 0reg		and	%0, %1				*/
2072#line 312 "rl78-decode.opc"
2073                int reg AU = op[1] & 0x07;
2074                if (trace)
2075                  {
2076                    printf ("\033[33m%s\033[0m  %02x %02x\n",
2077                           "/** 0110 0001 0101 0reg		and	%0, %1				*/",
2078                           op[0], op[1]);
2079                    printf ("  reg = 0x%x\n", reg);
2080                  }
2081                SYNTAX("and	%0, %1");
2082#line 312 "rl78-decode.opc"
2083                ID(and); DRB(reg); SR(A); Fz;
2084
2085              }
2086            break;
2087          case 0x58:
2088          case 0x5a:
2089          case 0x5b:
2090          case 0x5c:
2091          case 0x5d:
2092          case 0x5e:
2093          case 0x5f:
2094              {
2095                /** 0110 0001 0101 1rba		and	%0, %1				*/
2096#line 309 "rl78-decode.opc"
2097                int rba AU = op[1] & 0x07;
2098                if (trace)
2099                  {
2100                    printf ("\033[33m%s\033[0m  %02x %02x\n",
2101                           "/** 0110 0001 0101 1rba		and	%0, %1				*/",
2102                           op[0], op[1]);
2103                    printf ("  rba = 0x%x\n", rba);
2104                  }
2105                SYNTAX("and	%0, %1");
2106#line 309 "rl78-decode.opc"
2107                ID(and); DR(A); SRB(rba); Fz;
2108
2109              }
2110            break;
2111          case 0x59:
2112              {
2113                /** 0110 0001 0101 1001		inc	%ea0				*/
2114                if (trace)
2115                  {
2116                    printf ("\033[33m%s\033[0m  %02x %02x\n",
2117                           "/** 0110 0001 0101 1001		inc	%ea0				*/",
2118                           op[0], op[1]);
2119                  }
2120                SYNTAX("inc	%ea0");
2121#line 590 "rl78-decode.opc"
2122                ID(add); DM(HL, IMMU(1)); SC(1); Fza;
2123
2124              }
2125            break;
2126          case 0x60:
2127          case 0x61:
2128          case 0x62:
2129          case 0x63:
2130          case 0x64:
2131          case 0x65:
2132          case 0x66:
2133          case 0x67:
2134              {
2135                /** 0110 0001 0110 0reg		or	%0, %1				*/
2136#line 967 "rl78-decode.opc"
2137                int reg AU = op[1] & 0x07;
2138                if (trace)
2139                  {
2140                    printf ("\033[33m%s\033[0m  %02x %02x\n",
2141                           "/** 0110 0001 0110 0reg		or	%0, %1				*/",
2142                           op[0], op[1]);
2143                    printf ("  reg = 0x%x\n", reg);
2144                  }
2145                SYNTAX("or	%0, %1");
2146#line 967 "rl78-decode.opc"
2147                ID(or); DRB(reg); SR(A); Fz;
2148
2149              }
2150            break;
2151          case 0x68:
2152          case 0x6a:
2153          case 0x6b:
2154          case 0x6c:
2155          case 0x6d:
2156          case 0x6e:
2157          case 0x6f:
2158              {
2159                /** 0110 0001 0110 1rba		or	%0, %1				*/
2160#line 964 "rl78-decode.opc"
2161                int rba AU = op[1] & 0x07;
2162                if (trace)
2163                  {
2164                    printf ("\033[33m%s\033[0m  %02x %02x\n",
2165                           "/** 0110 0001 0110 1rba		or	%0, %1				*/",
2166                           op[0], op[1]);
2167                    printf ("  rba = 0x%x\n", rba);
2168                  }
2169                SYNTAX("or	%0, %1");
2170#line 964 "rl78-decode.opc"
2171                ID(or); DR(A); SRB(rba); Fz;
2172
2173              }
2174            break;
2175          case 0x69:
2176              {
2177                /** 0110 0001 0110 1001		dec	%ea0				*/
2178                if (trace)
2179                  {
2180                    printf ("\033[33m%s\033[0m  %02x %02x\n",
2181                           "/** 0110 0001 0110 1001		dec	%ea0				*/",
2182                           op[0], op[1]);
2183                  }
2184                SYNTAX("dec	%ea0");
2185#line 557 "rl78-decode.opc"
2186                ID(sub); DM(HL, IMMU(1)); SC(1); Fza;
2187
2188              }
2189            break;
2190          case 0x70:
2191          case 0x71:
2192          case 0x72:
2193          case 0x73:
2194          case 0x74:
2195          case 0x75:
2196          case 0x76:
2197          case 0x77:
2198              {
2199                /** 0110 0001 0111 0reg		xor	%0, %1				*/
2200#line 1271 "rl78-decode.opc"
2201                int reg AU = op[1] & 0x07;
2202                if (trace)
2203                  {
2204                    printf ("\033[33m%s\033[0m  %02x %02x\n",
2205                           "/** 0110 0001 0111 0reg		xor	%0, %1				*/",
2206                           op[0], op[1]);
2207                    printf ("  reg = 0x%x\n", reg);
2208                  }
2209                SYNTAX("xor	%0, %1");
2210#line 1271 "rl78-decode.opc"
2211                ID(xor); DRB(reg); SR(A); Fz;
2212
2213              }
2214            break;
2215          case 0x78:
2216          case 0x7a:
2217          case 0x7b:
2218          case 0x7c:
2219          case 0x7d:
2220          case 0x7e:
2221          case 0x7f:
2222              {
2223                /** 0110 0001 0111 1rba		xor	%0, %1				*/
2224#line 1268 "rl78-decode.opc"
2225                int rba AU = op[1] & 0x07;
2226                if (trace)
2227                  {
2228                    printf ("\033[33m%s\033[0m  %02x %02x\n",
2229                           "/** 0110 0001 0111 1rba		xor	%0, %1				*/",
2230                           op[0], op[1]);
2231                    printf ("  rba = 0x%x\n", rba);
2232                  }
2233                SYNTAX("xor	%0, %1");
2234#line 1268 "rl78-decode.opc"
2235                ID(xor); DR(A); SRB(rba); Fz;
2236
2237              }
2238            break;
2239          case 0x79:
2240              {
2241                /** 0110 0001 0111 1001		incw	%ea0				*/
2242                if (trace)
2243                  {
2244                    printf ("\033[33m%s\033[0m  %02x %02x\n",
2245                           "/** 0110 0001 0111 1001		incw	%ea0				*/",
2246                           op[0], op[1]);
2247                  }
2248                SYNTAX("incw	%ea0");
2249#line 604 "rl78-decode.opc"
2250                ID(add); W(); DM(HL, IMMU(1)); SC(1);
2251
2252              }
2253            break;
2254          case 0x80:
2255          case 0x81:
2256              {
2257                /** 0110 0001 1000 000		add	%0, %e1				*/
2258                if (trace)
2259                  {
2260                    printf ("\033[33m%s\033[0m  %02x %02x\n",
2261                           "/** 0110 0001 1000 000		add	%0, %e1				*/",
2262                           op[0], op[1]);
2263                  }
2264                SYNTAX("add	%0, %e1");
2265#line 213 "rl78-decode.opc"
2266                ID(add); DR(A); SM2(HL, B, 0); Fzac;
2267
2268              }
2269            break;
2270          case 0x82:
2271              {
2272                /** 0110 0001 1000 0010		add	%0, %e1				*/
2273                if (trace)
2274                  {
2275                    printf ("\033[33m%s\033[0m  %02x %02x\n",
2276                           "/** 0110 0001 1000 0010		add	%0, %e1				*/",
2277                           op[0], op[1]);
2278                  }
2279                SYNTAX("add	%0, %e1");
2280#line 219 "rl78-decode.opc"
2281                ID(add); DR(A); SM2(HL, C, 0); Fzac;
2282
2283              }
2284            break;
2285          case 0x84:
2286          case 0x85:
2287          case 0x86:
2288          case 0x87:
2289          case 0x94:
2290          case 0x95:
2291          case 0x96:
2292          case 0x97:
2293          case 0xa4:
2294          case 0xa5:
2295          case 0xa6:
2296          case 0xa7:
2297          case 0xb4:
2298          case 0xb5:
2299          case 0xb6:
2300          case 0xb7:
2301          case 0xc4:
2302          case 0xc5:
2303          case 0xc6:
2304          case 0xc7:
2305          case 0xd4:
2306          case 0xd5:
2307          case 0xd6:
2308          case 0xd7:
2309          case 0xe4:
2310          case 0xe5:
2311          case 0xe6:
2312          case 0xe7:
2313          case 0xf4:
2314          case 0xf5:
2315          case 0xf6:
2316          case 0xf7:
2317              {
2318                /** 0110 0001 1nnn 01mm		callt	[%x0]				*/
2319#line 439 "rl78-decode.opc"
2320                int nnn AU = (op[1] >> 4) & 0x07;
2321#line 439 "rl78-decode.opc"
2322                int mm AU = op[1] & 0x03;
2323                if (trace)
2324                  {
2325                    printf ("\033[33m%s\033[0m  %02x %02x\n",
2326                           "/** 0110 0001 1nnn 01mm		callt	[%x0]				*/",
2327                           op[0], op[1]);
2328                    printf ("  nnn = 0x%x,", nnn);
2329                    printf ("  mm = 0x%x\n", mm);
2330                  }
2331                SYNTAX("callt	[%x0]");
2332#line 439 "rl78-decode.opc"
2333                ID(call); DM(None, 0x80 + mm*16 + nnn*2);
2334
2335              /*----------------------------------------------------------------------*/
2336
2337              }
2338            break;
2339          case 0x88:
2340          case 0x8a:
2341          case 0x8b:
2342          case 0x8c:
2343          case 0x8d:
2344          case 0x8e:
2345          case 0x8f:
2346              {
2347                /** 0110 0001 1000 1reg		xch	%0, %1				*/
2348#line 1230 "rl78-decode.opc"
2349                int reg AU = op[1] & 0x07;
2350                if (trace)
2351                  {
2352                    printf ("\033[33m%s\033[0m  %02x %02x\n",
2353                           "/** 0110 0001 1000 1reg		xch	%0, %1				*/",
2354                           op[0], op[1]);
2355                    printf ("  reg = 0x%x\n", reg);
2356                  }
2357                SYNTAX("xch	%0, %1");
2358#line 1230 "rl78-decode.opc"
2359                /* Note: DECW uses reg == X, so this must follow DECW */
2360                ID(xch); DR(A); SRB(reg);
2361
2362              }
2363            break;
2364          case 0x89:
2365              {
2366                /** 0110 0001 1000 1001		decw	%ea0				*/
2367                if (trace)
2368                  {
2369                    printf ("\033[33m%s\033[0m  %02x %02x\n",
2370                           "/** 0110 0001 1000 1001		decw	%ea0				*/",
2371                           op[0], op[1]);
2372                  }
2373                SYNTAX("decw	%ea0");
2374#line 571 "rl78-decode.opc"
2375                ID(sub); W(); DM(HL, IMMU(1)); SC(1);
2376
2377              }
2378            break;
2379          case 0x90:
2380              {
2381                /** 0110 0001 1001 0000		addc	%0, %e1				*/
2382                if (trace)
2383                  {
2384                    printf ("\033[33m%s\033[0m  %02x %02x\n",
2385                           "/** 0110 0001 1001 0000		addc	%0, %e1				*/",
2386                           op[0], op[1]);
2387                  }
2388                SYNTAX("addc	%0, %e1");
2389#line 245 "rl78-decode.opc"
2390                ID(addc); DR(A); SM2(HL, B, 0); Fzac;
2391
2392              }
2393            break;
2394          case 0x92:
2395              {
2396                /** 0110 0001 1001 0010		addc	%0, %e1				*/
2397                if (trace)
2398                  {
2399                    printf ("\033[33m%s\033[0m  %02x %02x\n",
2400                           "/** 0110 0001 1001 0010		addc	%0, %e1				*/",
2401                           op[0], op[1]);
2402                  }
2403                SYNTAX("addc	%0, %e1");
2404#line 248 "rl78-decode.opc"
2405                ID(addc); DR(A); SM2(HL, C, 0); Fzac;
2406
2407              }
2408            break;
2409          case 0xa0:
2410          case 0xa1:
2411              {
2412                /** 0110 0001 1010 000		sub	%0, %e1				*/
2413                if (trace)
2414                  {
2415                    printf ("\033[33m%s\033[0m  %02x %02x\n",
2416                           "/** 0110 0001 1010 000		sub	%0, %e1				*/",
2417                           op[0], op[1]);
2418                  }
2419                SYNTAX("sub	%0, %e1");
2420#line 1131 "rl78-decode.opc"
2421                ID(sub); DR(A); SM2(HL, B, 0); Fzac;
2422
2423              }
2424            break;
2425          case 0xa2:
2426              {
2427                /** 0110 0001 1010 0010		sub	%0, %e1				*/
2428                if (trace)
2429                  {
2430                    printf ("\033[33m%s\033[0m  %02x %02x\n",
2431                           "/** 0110 0001 1010 0010		sub	%0, %e1				*/",
2432                           op[0], op[1]);
2433                  }
2434                SYNTAX("sub	%0, %e1");
2435#line 1137 "rl78-decode.opc"
2436                ID(sub); DR(A); SM2(HL, C, 0); Fzac;
2437
2438              }
2439            break;
2440          case 0xa8:
2441              {
2442                /** 0110 0001 1010 1000	       	xch	%0, %1				*/
2443                if (trace)
2444                  {
2445                    printf ("\033[33m%s\033[0m  %02x %02x\n",
2446                           "/** 0110 0001 1010 1000	       	xch	%0, %1				*/",
2447                           op[0], op[1]);
2448                  }
2449                SYNTAX("xch	%0, %1");
2450#line 1234 "rl78-decode.opc"
2451                ID(xch); DR(A); SM(None, SADDR);
2452
2453              }
2454            break;
2455          case 0xa9:
2456              {
2457                /** 0110 0001 1010 1001		xch	%0, %e1				*/
2458                if (trace)
2459                  {
2460                    printf ("\033[33m%s\033[0m  %02x %02x\n",
2461                           "/** 0110 0001 1010 1001		xch	%0, %e1				*/",
2462                           op[0], op[1]);
2463                  }
2464                SYNTAX("xch	%0, %e1");
2465#line 1227 "rl78-decode.opc"
2466                ID(xch); DR(A); SM2(HL, C, 0);
2467
2468              }
2469            break;
2470          case 0xaa:
2471              {
2472                /** 0110 0001 1010 1010		xch	%0, %e!1			*/
2473                if (trace)
2474                  {
2475                    printf ("\033[33m%s\033[0m  %02x %02x\n",
2476                           "/** 0110 0001 1010 1010		xch	%0, %e!1			*/",
2477                           op[0], op[1]);
2478                  }
2479                SYNTAX("xch	%0, %e!1");
2480#line 1209 "rl78-decode.opc"
2481                ID(xch); DR(A); SM(None, IMMU(2));
2482
2483              }
2484            break;
2485          case 0xab:
2486              {
2487                /** 0110 0001 1010 1011	       	xch	%0, %s1				*/
2488                if (trace)
2489                  {
2490                    printf ("\033[33m%s\033[0m  %02x %02x\n",
2491                           "/** 0110 0001 1010 1011	       	xch	%0, %s1				*/",
2492                           op[0], op[1]);
2493                  }
2494                SYNTAX("xch	%0, %s1");
2495#line 1237 "rl78-decode.opc"
2496                ID(xch); DR(A); SM(None, SFR);
2497
2498              }
2499            break;
2500          case 0xac:
2501              {
2502                /** 0110 0001 1010 1100		xch	%0, %e1				*/
2503                if (trace)
2504                  {
2505                    printf ("\033[33m%s\033[0m  %02x %02x\n",
2506                           "/** 0110 0001 1010 1100		xch	%0, %e1				*/",
2507                           op[0], op[1]);
2508                  }
2509                SYNTAX("xch	%0, %e1");
2510#line 1218 "rl78-decode.opc"
2511                ID(xch); DR(A); SM(HL, 0);
2512
2513              }
2514            break;
2515          case 0xad:
2516              {
2517                /** 0110 0001 1010 1101		xch	%0, %ea1			*/
2518                if (trace)
2519                  {
2520                    printf ("\033[33m%s\033[0m  %02x %02x\n",
2521                           "/** 0110 0001 1010 1101		xch	%0, %ea1			*/",
2522                           op[0], op[1]);
2523                  }
2524                SYNTAX("xch	%0, %ea1");
2525#line 1224 "rl78-decode.opc"
2526                ID(xch); DR(A); SM(HL, IMMU(1));
2527
2528              }
2529            break;
2530          case 0xae:
2531              {
2532                /** 0110 0001 1010 1110		xch	%0, %e1				*/
2533                if (trace)
2534                  {
2535                    printf ("\033[33m%s\033[0m  %02x %02x\n",
2536                           "/** 0110 0001 1010 1110		xch	%0, %e1				*/",
2537                           op[0], op[1]);
2538                  }
2539                SYNTAX("xch	%0, %e1");
2540#line 1212 "rl78-decode.opc"
2541                ID(xch); DR(A); SM(DE, 0);
2542
2543              }
2544            break;
2545          case 0xaf:
2546              {
2547                /** 0110 0001 1010 1111		xch	%0, %ea1				*/
2548                if (trace)
2549                  {
2550                    printf ("\033[33m%s\033[0m  %02x %02x\n",
2551                           "/** 0110 0001 1010 1111		xch	%0, %ea1				*/",
2552                           op[0], op[1]);
2553                  }
2554                SYNTAX("xch	%0, %ea1");
2555#line 1215 "rl78-decode.opc"
2556                ID(xch); DR(A); SM(DE, IMMU(1));
2557
2558              }
2559            break;
2560          case 0xb0:
2561              {
2562                /** 0110 0001 1011 0000		subc	%0, %e1				*/
2563                if (trace)
2564                  {
2565                    printf ("\033[33m%s\033[0m  %02x %02x\n",
2566                           "/** 0110 0001 1011 0000		subc	%0, %e1				*/",
2567                           op[0], op[1]);
2568                  }
2569                SYNTAX("subc	%0, %e1");
2570#line 1163 "rl78-decode.opc"
2571                ID(subc); DR(A); SM2(HL, B, 0); Fzac;
2572
2573              }
2574            break;
2575          case 0xb2:
2576              {
2577                /** 0110 0001 1011 0010		subc	%0, %e1				*/
2578                if (trace)
2579                  {
2580                    printf ("\033[33m%s\033[0m  %02x %02x\n",
2581                           "/** 0110 0001 1011 0010		subc	%0, %e1				*/",
2582                           op[0], op[1]);
2583                  }
2584                SYNTAX("subc	%0, %e1");
2585#line 1166 "rl78-decode.opc"
2586                ID(subc); DR(A); SM2(HL, C, 0); Fzac;
2587
2588              }
2589            break;
2590          case 0xb8:
2591              {
2592                /** 0110 0001 1011 1000		mov	%0, %1				*/
2593                if (trace)
2594                  {
2595                    printf ("\033[33m%s\033[0m  %02x %02x\n",
2596                           "/** 0110 0001 1011 1000		mov	%0, %1				*/",
2597                           op[0], op[1]);
2598                  }
2599                SYNTAX("mov	%0, %1");
2600#line 729 "rl78-decode.opc"
2601                ID(mov); DR(ES); SM(None, SADDR);
2602
2603              }
2604            break;
2605          case 0xb9:
2606              {
2607                /** 0110 0001 1011 1001		xch	%0, %e1				*/
2608                if (trace)
2609                  {
2610                    printf ("\033[33m%s\033[0m  %02x %02x\n",
2611                           "/** 0110 0001 1011 1001		xch	%0, %e1				*/",
2612                           op[0], op[1]);
2613                  }
2614                SYNTAX("xch	%0, %e1");
2615#line 1221 "rl78-decode.opc"
2616                ID(xch); DR(A); SM2(HL, B, 0);
2617
2618              }
2619            break;
2620          case 0xc0:
2621              {
2622                /** 0110 0001 1100 0000		cmp	%0, %e1				*/
2623                if (trace)
2624                  {
2625                    printf ("\033[33m%s\033[0m  %02x %02x\n",
2626                           "/** 0110 0001 1100 0000		cmp	%0, %e1				*/",
2627                           op[0], op[1]);
2628                  }
2629                SYNTAX("cmp	%0, %e1");
2630#line 498 "rl78-decode.opc"
2631                ID(cmp); DR(A); SM2(HL, B, 0); Fzac;
2632
2633              }
2634            break;
2635          case 0xc2:
2636              {
2637                /** 0110 0001 1100 0010		cmp	%0, %e1				*/
2638                if (trace)
2639                  {
2640                    printf ("\033[33m%s\033[0m  %02x %02x\n",
2641                           "/** 0110 0001 1100 0010		cmp	%0, %e1				*/",
2642                           op[0], op[1]);
2643                  }
2644                SYNTAX("cmp	%0, %e1");
2645#line 501 "rl78-decode.opc"
2646                ID(cmp); DR(A); SM2(HL, C, 0); Fzac;
2647
2648              }
2649            break;
2650          case 0xc3:
2651              {
2652                /** 0110 0001 1100 0011		bh	$%a0				*/
2653                if (trace)
2654                  {
2655                    printf ("\033[33m%s\033[0m  %02x %02x\n",
2656                           "/** 0110 0001 1100 0011		bh	$%a0				*/",
2657                           op[0], op[1]);
2658                  }
2659                SYNTAX("bh	$%a0");
2660#line 346 "rl78-decode.opc"
2661                ID(branch_cond); DC(pc+IMMS(1)+3); SR(None); COND(H);
2662
2663              }
2664            break;
2665          case 0xc8:
2666              {
2667                /** 0110 0001 1100 1000		sk%c1					*/
2668                if (trace)
2669                  {
2670                    printf ("\033[33m%s\033[0m  %02x %02x\n",
2671                           "/** 0110 0001 1100 1000		sk%c1					*/",
2672                           op[0], op[1]);
2673                  }
2674                SYNTAX("sk%c1");
2675#line 1100 "rl78-decode.opc"
2676                ID(skip); COND(C);
2677
2678              }
2679            break;
2680          case 0xc9:
2681              {
2682                /** 0110 0001 1100 1001		mov	%0, %e1				*/
2683                if (trace)
2684                  {
2685                    printf ("\033[33m%s\033[0m  %02x %02x\n",
2686                           "/** 0110 0001 1100 1001		mov	%0, %e1				*/",
2687                           op[0], op[1]);
2688                  }
2689                SYNTAX("mov	%0, %e1");
2690#line 666 "rl78-decode.opc"
2691                ID(mov); DR(A); SM2(HL, B, 0);
2692
2693              }
2694            break;
2695          case 0xca:
2696          case 0xda:
2697          case 0xea:
2698          case 0xfa:
2699              {
2700                /** 0110 0001 11rg 1010		call	%0				*/
2701#line 436 "rl78-decode.opc"
2702                int rg AU = (op[1] >> 4) & 0x03;
2703                if (trace)
2704                  {
2705                    printf ("\033[33m%s\033[0m  %02x %02x\n",
2706                           "/** 0110 0001 11rg 1010		call	%0				*/",
2707                           op[0], op[1]);
2708                    printf ("  rg = 0x%x\n", rg);
2709                  }
2710                SYNTAX("call	%0");
2711#line 436 "rl78-decode.opc"
2712                ID(call); DRW(rg);
2713
2714              }
2715            break;
2716          case 0xcb:
2717              {
2718                /** 0110 0001 1100 1011		br	ax				*/
2719                if (trace)
2720                  {
2721                    printf ("\033[33m%s\033[0m  %02x %02x\n",
2722                           "/** 0110 0001 1100 1011		br	ax				*/",
2723                           op[0], op[1]);
2724                  }
2725                SYNTAX("br	ax");
2726#line 386 "rl78-decode.opc"
2727                ID(branch); DR(AX);
2728
2729              /*----------------------------------------------------------------------*/
2730
2731              }
2732            break;
2733          case 0xcc:
2734              {
2735                /** 0110 0001 1100 1100		brk					*/
2736                if (trace)
2737                  {
2738                    printf ("\033[33m%s\033[0m  %02x %02x\n",
2739                           "/** 0110 0001 1100 1100		brk					*/",
2740                           op[0], op[1]);
2741                  }
2742                SYNTAX("brk");
2743#line 394 "rl78-decode.opc"
2744                ID(break);
2745
2746              /*----------------------------------------------------------------------*/
2747
2748              }
2749            break;
2750          case 0xcd:
2751              {
2752                /** 0110 0001 1100 1101		pop	%s0				*/
2753                if (trace)
2754                  {
2755                    printf ("\033[33m%s\033[0m  %02x %02x\n",
2756                           "/** 0110 0001 1100 1101		pop	%s0				*/",
2757                           op[0], op[1]);
2758                  }
2759                SYNTAX("pop	%s0");
2760#line 995 "rl78-decode.opc"
2761                ID(mov); W(); DR(PSW); SPOP();
2762
2763              /*----------------------------------------------------------------------*/
2764
2765              }
2766            break;
2767          case 0xce:
2768              {
2769                /** 0110 0001 1100 1110		movs	%ea0, %1			*/
2770                if (trace)
2771                  {
2772                    printf ("\033[33m%s\033[0m  %02x %02x\n",
2773                           "/** 0110 0001 1100 1110		movs	%ea0, %1			*/",
2774                           op[0], op[1]);
2775                  }
2776                SYNTAX("movs	%ea0, %1");
2777#line 817 "rl78-decode.opc"
2778                ID(mov); DM(HL, IMMU(1)); SR(X); Fzc;
2779
2780              /*----------------------------------------------------------------------*/
2781
2782              }
2783            break;
2784          case 0xcf:
2785          case 0xdf:
2786          case 0xef:
2787          case 0xff:
2788              {
2789                /** 0110 0001 11rb 1111		sel	rb%1				*/
2790#line 1047 "rl78-decode.opc"
2791                int rb AU = (op[1] >> 4) & 0x03;
2792                if (trace)
2793                  {
2794                    printf ("\033[33m%s\033[0m  %02x %02x\n",
2795                           "/** 0110 0001 11rb 1111		sel	rb%1				*/",
2796                           op[0], op[1]);
2797                    printf ("  rb = 0x%x\n", rb);
2798                  }
2799                SYNTAX("sel	rb%1");
2800#line 1047 "rl78-decode.opc"
2801                ID(sel); SC(rb);
2802
2803              /*----------------------------------------------------------------------*/
2804
2805              }
2806            break;
2807          case 0xd0:
2808              {
2809                /** 0110 0001 1101 0000		and	%0, %e1			*/
2810                if (trace)
2811                  {
2812                    printf ("\033[33m%s\033[0m  %02x %02x\n",
2813                           "/** 0110 0001 1101 0000		and	%0, %e1			*/",
2814                           op[0], op[1]);
2815                  }
2816                SYNTAX("and	%0, %e1");
2817#line 297 "rl78-decode.opc"
2818                ID(and); DR(A); SM2(HL, B, 0); Fz;
2819
2820              }
2821            break;
2822          case 0xd2:
2823              {
2824                /** 0110 0001 1101 0010		and	%0, %e1			*/
2825                if (trace)
2826                  {
2827                    printf ("\033[33m%s\033[0m  %02x %02x\n",
2828                           "/** 0110 0001 1101 0010		and	%0, %e1			*/",
2829                           op[0], op[1]);
2830                  }
2831                SYNTAX("and	%0, %e1");
2832#line 303 "rl78-decode.opc"
2833                ID(and); DR(A); SM2(HL, C, 0); Fz;
2834
2835              }
2836            break;
2837          case 0xd3:
2838              {
2839                /** 0110 0001 1101 0011		bnh	$%a0				*/
2840                if (trace)
2841                  {
2842                    printf ("\033[33m%s\033[0m  %02x %02x\n",
2843                           "/** 0110 0001 1101 0011		bnh	$%a0				*/",
2844                           op[0], op[1]);
2845                  }
2846                SYNTAX("bnh	$%a0");
2847#line 349 "rl78-decode.opc"
2848                ID(branch_cond); DC(pc+IMMS(1)+3); SR(None); COND(NH);
2849
2850              }
2851            break;
2852          case 0xd8:
2853              {
2854                /** 0110 0001 1101 1000		sk%c1					*/
2855                if (trace)
2856                  {
2857                    printf ("\033[33m%s\033[0m  %02x %02x\n",
2858                           "/** 0110 0001 1101 1000		sk%c1					*/",
2859                           op[0], op[1]);
2860                  }
2861                SYNTAX("sk%c1");
2862#line 1106 "rl78-decode.opc"
2863                ID(skip); COND(NC);
2864
2865              }
2866            break;
2867          case 0xd9:
2868              {
2869                /** 0110 0001 1101 1001		mov	%e0, %1				*/
2870                if (trace)
2871                  {
2872                    printf ("\033[33m%s\033[0m  %02x %02x\n",
2873                           "/** 0110 0001 1101 1001		mov	%e0, %1				*/",
2874                           op[0], op[1]);
2875                  }
2876                SYNTAX("mov	%e0, %1");
2877#line 633 "rl78-decode.opc"
2878                ID(mov); DM2(HL, B, 0); SR(A);
2879
2880              }
2881            break;
2882          case 0xdb:
2883              {
2884                /** 0110 0001 1101 1011		ror	%0, %1				*/
2885                if (trace)
2886                  {
2887                    printf ("\033[33m%s\033[0m  %02x %02x\n",
2888                           "/** 0110 0001 1101 1011		ror	%0, %1				*/",
2889                           op[0], op[1]);
2890                  }
2891                SYNTAX("ror	%0, %1");
2892#line 1028 "rl78-decode.opc"
2893                ID(ror); DR(A); SC(1);
2894
2895              }
2896            break;
2897          case 0xdc:
2898              {
2899                /** 0110 0001 1101 1100		rolc	%0, %1				*/
2900                if (trace)
2901                  {
2902                    printf ("\033[33m%s\033[0m  %02x %02x\n",
2903                           "/** 0110 0001 1101 1100		rolc	%0, %1				*/",
2904                           op[0], op[1]);
2905                  }
2906                SYNTAX("rolc	%0, %1");
2907#line 1022 "rl78-decode.opc"
2908                ID(rolc); DR(A); SC(1);
2909
2910              }
2911            break;
2912          case 0xdd:
2913              {
2914                /** 0110 0001 1101 1101		push	%s1				*/
2915                if (trace)
2916                  {
2917                    printf ("\033[33m%s\033[0m  %02x %02x\n",
2918                           "/** 0110 0001 1101 1101		push	%s1				*/",
2919                           op[0], op[1]);
2920                  }
2921                SYNTAX("push	%s1");
2922#line 1003 "rl78-decode.opc"
2923                ID(mov); W(); DPUSH(); SR(PSW);
2924
2925              /*----------------------------------------------------------------------*/
2926
2927              }
2928            break;
2929          case 0xde:
2930              {
2931                /** 0110 0001 1101 1110		cmps	%0, %ea1			*/
2932                if (trace)
2933                  {
2934                    printf ("\033[33m%s\033[0m  %02x %02x\n",
2935                           "/** 0110 0001 1101 1110		cmps	%0, %ea1			*/",
2936                           op[0], op[1]);
2937                  }
2938                SYNTAX("cmps	%0, %ea1");
2939#line 532 "rl78-decode.opc"
2940                ID(cmp); DR(X); SM(HL, IMMU(1)); Fzac;
2941
2942              /*----------------------------------------------------------------------*/
2943
2944              }
2945            break;
2946          case 0xe0:
2947              {
2948                /** 0110 0001 1110 0000		or	%0, %e1				*/
2949                if (trace)
2950                  {
2951                    printf ("\033[33m%s\033[0m  %02x %02x\n",
2952                           "/** 0110 0001 1110 0000		or	%0, %e1				*/",
2953                           op[0], op[1]);
2954                  }
2955                SYNTAX("or	%0, %e1");
2956#line 952 "rl78-decode.opc"
2957                ID(or); DR(A); SM2(HL, B, 0); Fz;
2958
2959              }
2960            break;
2961          case 0xe2:
2962              {
2963                /** 0110 0001 1110 0010		or	%0, %e1				*/
2964                if (trace)
2965                  {
2966                    printf ("\033[33m%s\033[0m  %02x %02x\n",
2967                           "/** 0110 0001 1110 0010		or	%0, %e1				*/",
2968                           op[0], op[1]);
2969                  }
2970                SYNTAX("or	%0, %e1");
2971#line 958 "rl78-decode.opc"
2972                ID(or); DR(A); SM2(HL, C, 0); Fz;
2973
2974              }
2975            break;
2976          case 0xe3:
2977              {
2978                /** 0110 0001 1110 0011		sk%c1					*/
2979                if (trace)
2980                  {
2981                    printf ("\033[33m%s\033[0m  %02x %02x\n",
2982                           "/** 0110 0001 1110 0011		sk%c1					*/",
2983                           op[0], op[1]);
2984                  }
2985                SYNTAX("sk%c1");
2986#line 1103 "rl78-decode.opc"
2987                ID(skip); COND(H);
2988
2989              }
2990            break;
2991          case 0xe8:
2992              {
2993                /** 0110 0001 1110 1000		sk%c1					*/
2994                if (trace)
2995                  {
2996                    printf ("\033[33m%s\033[0m  %02x %02x\n",
2997                           "/** 0110 0001 1110 1000		sk%c1					*/",
2998                           op[0], op[1]);
2999                  }
3000                SYNTAX("sk%c1");
3001#line 1115 "rl78-decode.opc"
3002                ID(skip); COND(Z);
3003
3004              /*----------------------------------------------------------------------*/
3005
3006              }
3007            break;
3008          case 0xe9:
3009              {
3010                /** 0110 0001 1110 1001		mov	%0, %e1				*/
3011                if (trace)
3012                  {
3013                    printf ("\033[33m%s\033[0m  %02x %02x\n",
3014                           "/** 0110 0001 1110 1001		mov	%0, %e1				*/",
3015                           op[0], op[1]);
3016                  }
3017                SYNTAX("mov	%0, %e1");
3018#line 669 "rl78-decode.opc"
3019                ID(mov); DR(A); SM2(HL, C, 0);
3020
3021              }
3022            break;
3023          case 0xeb:
3024              {
3025                /** 0110 0001 1110 1011		rol	%0, %1				*/
3026                if (trace)
3027                  {
3028                    printf ("\033[33m%s\033[0m  %02x %02x\n",
3029                           "/** 0110 0001 1110 1011		rol	%0, %1				*/",
3030                           op[0], op[1]);
3031                  }
3032                SYNTAX("rol	%0, %1");
3033#line 1019 "rl78-decode.opc"
3034                ID(rol); DR(A); SC(1);
3035
3036              }
3037            break;
3038          case 0xec:
3039              {
3040                /** 0110 0001 1110 1100		retb					*/
3041                if (trace)
3042                  {
3043                    printf ("\033[33m%s\033[0m  %02x %02x\n",
3044                           "/** 0110 0001 1110 1100		retb					*/",
3045                           op[0], op[1]);
3046                  }
3047                SYNTAX("retb");
3048#line 1014 "rl78-decode.opc"
3049                ID(reti);
3050
3051              /*----------------------------------------------------------------------*/
3052
3053              }
3054            break;
3055          case 0xed:
3056              {
3057                /** 0110 0001 1110 1101		halt					*/
3058                if (trace)
3059                  {
3060                    printf ("\033[33m%s\033[0m  %02x %02x\n",
3061                           "/** 0110 0001 1110 1101		halt					*/",
3062                           op[0], op[1]);
3063                  }
3064                SYNTAX("halt");
3065#line 582 "rl78-decode.opc"
3066                ID(halt);
3067
3068              /*----------------------------------------------------------------------*/
3069
3070              }
3071            break;
3072          case 0xee:
3073          case 0xfe:
3074              {
3075                /** 0110 0001 111r 1110		rolwc	%0, %1				*/
3076#line 1025 "rl78-decode.opc"
3077                int r AU = (op[1] >> 4) & 0x01;
3078                if (trace)
3079                  {
3080                    printf ("\033[33m%s\033[0m  %02x %02x\n",
3081                           "/** 0110 0001 111r 1110		rolwc	%0, %1				*/",
3082                           op[0], op[1]);
3083                    printf ("  r = 0x%x\n", r);
3084                  }
3085                SYNTAX("rolwc	%0, %1");
3086#line 1025 "rl78-decode.opc"
3087                ID(rolc); W(); DRW(r); SC(1);
3088
3089              }
3090            break;
3091          case 0xf0:
3092              {
3093                /** 0110 0001 1111 0000		xor	%0, %e1				*/
3094                if (trace)
3095                  {
3096                    printf ("\033[33m%s\033[0m  %02x %02x\n",
3097                           "/** 0110 0001 1111 0000		xor	%0, %e1				*/",
3098                           op[0], op[1]);
3099                  }
3100                SYNTAX("xor	%0, %e1");
3101#line 1256 "rl78-decode.opc"
3102                ID(xor); DR(A); SM2(HL, B, 0); Fz;
3103
3104              }
3105            break;
3106          case 0xf2:
3107              {
3108                /** 0110 0001 1111 0010		xor	%0, %e1				*/
3109                if (trace)
3110                  {
3111                    printf ("\033[33m%s\033[0m  %02x %02x\n",
3112                           "/** 0110 0001 1111 0010		xor	%0, %e1				*/",
3113                           op[0], op[1]);
3114                  }
3115                SYNTAX("xor	%0, %e1");
3116#line 1262 "rl78-decode.opc"
3117                ID(xor); DR(A); SM2(HL, C, 0); Fz;
3118
3119              }
3120            break;
3121          case 0xf3:
3122              {
3123                /** 0110 0001 1111 0011		sk%c1					*/
3124                if (trace)
3125                  {
3126                    printf ("\033[33m%s\033[0m  %02x %02x\n",
3127                           "/** 0110 0001 1111 0011		sk%c1					*/",
3128                           op[0], op[1]);
3129                  }
3130                SYNTAX("sk%c1");
3131#line 1109 "rl78-decode.opc"
3132                ID(skip); COND(NH);
3133
3134              }
3135            break;
3136          case 0xf8:
3137              {
3138                /** 0110 0001 1111 1000		sk%c1					*/
3139                if (trace)
3140                  {
3141                    printf ("\033[33m%s\033[0m  %02x %02x\n",
3142                           "/** 0110 0001 1111 1000		sk%c1					*/",
3143                           op[0], op[1]);
3144                  }
3145                SYNTAX("sk%c1");
3146#line 1112 "rl78-decode.opc"
3147                ID(skip); COND(NZ);
3148
3149              }
3150            break;
3151          case 0xf9:
3152              {
3153                /** 0110 0001 1111 1001		mov	%e0, %1				*/
3154                if (trace)
3155                  {
3156                    printf ("\033[33m%s\033[0m  %02x %02x\n",
3157                           "/** 0110 0001 1111 1001		mov	%e0, %1				*/",
3158                           op[0], op[1]);
3159                  }
3160                SYNTAX("mov	%e0, %1");
3161#line 642 "rl78-decode.opc"
3162                ID(mov); DM2(HL, C, 0); SR(A);
3163
3164              }
3165            break;
3166          case 0xfb:
3167              {
3168                /** 0110 0001 1111 1011		rorc	%0, %1				*/
3169                if (trace)
3170                  {
3171                    printf ("\033[33m%s\033[0m  %02x %02x\n",
3172                           "/** 0110 0001 1111 1011		rorc	%0, %1				*/",
3173                           op[0], op[1]);
3174                  }
3175                SYNTAX("rorc	%0, %1");
3176#line 1031 "rl78-decode.opc"
3177                ID(rorc); DR(A); SC(1);
3178
3179              /*----------------------------------------------------------------------*/
3180
3181              /* Note that the branch insns need to be listed before the shift
3182                 ones, as "shift count of zero" means "branch insn" */
3183
3184              }
3185            break;
3186          case 0xfc:
3187              {
3188                /** 0110 0001 1111 1100		reti					*/
3189                if (trace)
3190                  {
3191                    printf ("\033[33m%s\033[0m  %02x %02x\n",
3192                           "/** 0110 0001 1111 1100		reti					*/",
3193                           op[0], op[1]);
3194                  }
3195                SYNTAX("reti");
3196#line 1011 "rl78-decode.opc"
3197                ID(reti);
3198
3199              }
3200            break;
3201          case 0xfd:
3202              {
3203                /** 0110 0001 1111 1101	stop						*/
3204                if (trace)
3205                  {
3206                    printf ("\033[33m%s\033[0m  %02x %02x\n",
3207                           "/** 0110 0001 1111 1101	stop						*/",
3208                           op[0], op[1]);
3209                  }
3210                SYNTAX("stop");
3211#line 1120 "rl78-decode.opc"
3212                ID(stop);
3213
3214              /*----------------------------------------------------------------------*/
3215
3216              }
3217            break;
3218          default: UNSUPPORTED(); break;
3219        }
3220      break;
3221    case 0x68:
3222        {
3223          /** 0110 1000			movw	%e0, %1				*/
3224          if (trace)
3225            {
3226              printf ("\033[33m%s\033[0m  %02x\n",
3227                     "/** 0110 1000			movw	%e0, %1				*/",
3228                     op[0]);
3229            }
3230          SYNTAX("movw	%e0, %1");
3231#line 880 "rl78-decode.opc"
3232          ID(mov); W(); DM(C, IMMU(2)); SR(AX);
3233
3234        }
3235      break;
3236    case 0x69:
3237        {
3238          /** 0110 1001			movw	%0, %e1				*/
3239          if (trace)
3240            {
3241              printf ("\033[33m%s\033[0m  %02x\n",
3242                     "/** 0110 1001			movw	%0, %e1				*/",
3243                     op[0]);
3244            }
3245          SYNTAX("movw	%0, %e1");
3246#line 871 "rl78-decode.opc"
3247          ID(mov); W(); DR(AX); SM(C, IMMU(2));
3248
3249        }
3250      break;
3251    case 0x6a:
3252        {
3253          /** 0110 1010	       		or	%0, #%1				*/
3254          if (trace)
3255            {
3256              printf ("\033[33m%s\033[0m  %02x\n",
3257                     "/** 0110 1010	       		or	%0, #%1				*/",
3258                     op[0]);
3259            }
3260          SYNTAX("or	%0, #%1");
3261#line 973 "rl78-decode.opc"
3262          ID(or); DM(None, SADDR); SC(IMMU(1)); Fz;
3263
3264        /*----------------------------------------------------------------------*/
3265
3266        }
3267      break;
3268    case 0x6b:
3269        {
3270          /** 0110 1011	       		or	%0, %1				*/
3271          if (trace)
3272            {
3273              printf ("\033[33m%s\033[0m  %02x\n",
3274                     "/** 0110 1011	       		or	%0, %1				*/",
3275                     op[0]);
3276            }
3277          SYNTAX("or	%0, %1");
3278#line 970 "rl78-decode.opc"
3279          ID(or); DR(A); SM(None, SADDR); Fz;
3280
3281        }
3282      break;
3283    case 0x6c:
3284        {
3285          /** 0110 1100	       		or	%0, #%1				*/
3286          if (trace)
3287            {
3288              printf ("\033[33m%s\033[0m  %02x\n",
3289                     "/** 0110 1100	       		or	%0, #%1				*/",
3290                     op[0]);
3291            }
3292          SYNTAX("or	%0, #%1");
3293#line 961 "rl78-decode.opc"
3294          ID(or); DR(A); SC(IMMU(1)); Fz;
3295
3296        }
3297      break;
3298    case 0x6d:
3299        {
3300          /** 0110 1101			or	%0, %e1				*/
3301          if (trace)
3302            {
3303              printf ("\033[33m%s\033[0m  %02x\n",
3304                     "/** 0110 1101			or	%0, %e1				*/",
3305                     op[0]);
3306            }
3307          SYNTAX("or	%0, %e1");
3308#line 949 "rl78-decode.opc"
3309          ID(or); DR(A); SM(HL, 0); Fz;
3310
3311        }
3312      break;
3313    case 0x6e:
3314        {
3315          /** 0110 1110			or	%0, %ea1			*/
3316          if (trace)
3317            {
3318              printf ("\033[33m%s\033[0m  %02x\n",
3319                     "/** 0110 1110			or	%0, %ea1			*/",
3320                     op[0]);
3321            }
3322          SYNTAX("or	%0, %ea1");
3323#line 955 "rl78-decode.opc"
3324          ID(or); DR(A); SM(HL, IMMU(1)); Fz;
3325
3326        }
3327      break;
3328    case 0x6f:
3329        {
3330          /** 0110 1111			or	%0, %e!1			*/
3331          if (trace)
3332            {
3333              printf ("\033[33m%s\033[0m  %02x\n",
3334                     "/** 0110 1111			or	%0, %e!1			*/",
3335                     op[0]);
3336            }
3337          SYNTAX("or	%0, %e!1");
3338#line 946 "rl78-decode.opc"
3339          ID(or); DR(A); SM(None, IMMU(2)); Fz;
3340
3341        }
3342      break;
3343    case 0x70:
3344    case 0x72:
3345    case 0x73:
3346    case 0x74:
3347    case 0x75:
3348    case 0x76:
3349    case 0x77:
3350        {
3351          /** 0111 0rba			mov	%0, %1				*/
3352#line 702 "rl78-decode.opc"
3353          int rba AU = op[0] & 0x07;
3354          if (trace)
3355            {
3356              printf ("\033[33m%s\033[0m  %02x\n",
3357                     "/** 0111 0rba			mov	%0, %1				*/",
3358                     op[0]);
3359              printf ("  rba = 0x%x\n", rba);
3360            }
3361          SYNTAX("mov	%0, %1");
3362#line 702 "rl78-decode.opc"
3363          ID(mov); DRB(rba); SR(A);
3364
3365        }
3366      break;
3367    case 0x71:
3368        GETBYTE ();
3369        switch (op[1] & 0xff)
3370        {
3371          case 0x00:
3372          case 0x10:
3373          case 0x20:
3374          case 0x30:
3375          case 0x40:
3376          case 0x50:
3377          case 0x60:
3378          case 0x70:
3379              {
3380                /** 0111 0001 0bit 0000		set1	%e!0				*/
3381#line 1052 "rl78-decode.opc"
3382                int bit AU = (op[1] >> 4) & 0x07;
3383                if (trace)
3384                  {
3385                    printf ("\033[33m%s\033[0m  %02x %02x\n",
3386                           "/** 0111 0001 0bit 0000		set1	%e!0				*/",
3387                           op[0], op[1]);
3388                    printf ("  bit = 0x%x\n", bit);
3389                  }
3390                SYNTAX("set1	%e!0");
3391#line 1052 "rl78-decode.opc"
3392                ID(mov); DM(None, IMMU(2)); DB(bit); SC(1);
3393
3394              }
3395            break;
3396          case 0x01:
3397          case 0x11:
3398          case 0x21:
3399          case 0x31:
3400          case 0x41:
3401          case 0x51:
3402          case 0x61:
3403          case 0x71:
3404              {
3405                /** 0111 0001 0bit 0001		mov1	%0, cy				*/
3406#line 809 "rl78-decode.opc"
3407                int bit AU = (op[1] >> 4) & 0x07;
3408                if (trace)
3409                  {
3410                    printf ("\033[33m%s\033[0m  %02x %02x\n",
3411                           "/** 0111 0001 0bit 0001		mov1	%0, cy				*/",
3412                           op[0], op[1]);
3413                    printf ("  bit = 0x%x\n", bit);
3414                  }
3415                SYNTAX("mov1	%0, cy");
3416#line 809 "rl78-decode.opc"
3417                ID(mov); DM(None, SADDR); DB(bit); SCY();
3418
3419              }
3420            break;
3421          case 0x02:
3422          case 0x12:
3423          case 0x22:
3424          case 0x32:
3425          case 0x42:
3426          case 0x52:
3427          case 0x62:
3428          case 0x72:
3429              {
3430                /** 0111 0001 0bit 0010		set1	%0				*/
3431#line 1070 "rl78-decode.opc"
3432                int bit AU = (op[1] >> 4) & 0x07;
3433                if (trace)
3434                  {
3435                    printf ("\033[33m%s\033[0m  %02x %02x\n",
3436                           "/** 0111 0001 0bit 0010		set1	%0				*/",
3437                           op[0], op[1]);
3438                    printf ("  bit = 0x%x\n", bit);
3439                  }
3440                SYNTAX("set1	%0");
3441#line 1070 "rl78-decode.opc"
3442                ID(mov); DM(None, SADDR); DB(bit); SC(1);
3443
3444              /*----------------------------------------------------------------------*/
3445
3446              }
3447            break;
3448          case 0x03:
3449          case 0x13:
3450          case 0x23:
3451          case 0x33:
3452          case 0x43:
3453          case 0x53:
3454          case 0x63:
3455          case 0x73:
3456              {
3457                /** 0111 0001 0bit 0011		clr1	%0				*/
3458#line 462 "rl78-decode.opc"
3459                int bit AU = (op[1] >> 4) & 0x07;
3460                if (trace)
3461                  {
3462                    printf ("\033[33m%s\033[0m  %02x %02x\n",
3463                           "/** 0111 0001 0bit 0011		clr1	%0				*/",
3464                           op[0], op[1]);
3465                    printf ("  bit = 0x%x\n", bit);
3466                  }
3467                SYNTAX("clr1	%0");
3468#line 462 "rl78-decode.opc"
3469                ID(mov); DM(None, SADDR); DB(bit); SC(0);
3470
3471              /*----------------------------------------------------------------------*/
3472
3473              }
3474            break;
3475          case 0x04:
3476          case 0x14:
3477          case 0x24:
3478          case 0x34:
3479          case 0x44:
3480          case 0x54:
3481          case 0x64:
3482          case 0x74:
3483              {
3484                /** 0111 0001 0bit 0100		mov1	cy, %1				*/
3485#line 803 "rl78-decode.opc"
3486                int bit AU = (op[1] >> 4) & 0x07;
3487                if (trace)
3488                  {
3489                    printf ("\033[33m%s\033[0m  %02x %02x\n",
3490                           "/** 0111 0001 0bit 0100		mov1	cy, %1				*/",
3491                           op[0], op[1]);
3492                    printf ("  bit = 0x%x\n", bit);
3493                  }
3494                SYNTAX("mov1	cy, %1");
3495#line 803 "rl78-decode.opc"
3496                ID(mov); DCY(); SM(None, SADDR); SB(bit);
3497
3498              }
3499            break;
3500          case 0x05:
3501          case 0x15:
3502          case 0x25:
3503          case 0x35:
3504          case 0x45:
3505          case 0x55:
3506          case 0x65:
3507          case 0x75:
3508              {
3509                /** 0111 0001 0bit 0101		and1	cy, %s1				*/
3510#line 332 "rl78-decode.opc"
3511                int bit AU = (op[1] >> 4) & 0x07;
3512                if (trace)
3513                  {
3514                    printf ("\033[33m%s\033[0m  %02x %02x\n",
3515                           "/** 0111 0001 0bit 0101		and1	cy, %s1				*/",
3516                           op[0], op[1]);
3517                    printf ("  bit = 0x%x\n", bit);
3518                  }
3519                SYNTAX("and1	cy, %s1");
3520#line 332 "rl78-decode.opc"
3521                ID(and); DCY(); SM(None, SADDR); SB(bit);
3522
3523              /*----------------------------------------------------------------------*/
3524
3525              /* Note that the branch insns need to be listed before the shift
3526                 ones, as "shift count of zero" means "branch insn" */
3527
3528              }
3529            break;
3530          case 0x06:
3531          case 0x16:
3532          case 0x26:
3533          case 0x36:
3534          case 0x46:
3535          case 0x56:
3536          case 0x66:
3537          case 0x76:
3538              {
3539                /** 0111 0001 0bit 0110		or1	cy, %s1				*/
3540#line 987 "rl78-decode.opc"
3541                int bit AU = (op[1] >> 4) & 0x07;
3542                if (trace)
3543                  {
3544                    printf ("\033[33m%s\033[0m  %02x %02x\n",
3545                           "/** 0111 0001 0bit 0110		or1	cy, %s1				*/",
3546                           op[0], op[1]);
3547                    printf ("  bit = 0x%x\n", bit);
3548                  }
3549                SYNTAX("or1	cy, %s1");
3550#line 987 "rl78-decode.opc"
3551                ID(or); DCY(); SM(None, SADDR); SB(bit);
3552
3553              /*----------------------------------------------------------------------*/
3554
3555              }
3556            break;
3557          case 0x07:
3558          case 0x17:
3559          case 0x27:
3560          case 0x37:
3561          case 0x47:
3562          case 0x57:
3563          case 0x67:
3564          case 0x77:
3565              {
3566                /** 0111 0001 0bit 0111		xor1	cy, %s1				*/
3567#line 1291 "rl78-decode.opc"
3568                int bit AU = (op[1] >> 4) & 0x07;
3569                if (trace)
3570                  {
3571                    printf ("\033[33m%s\033[0m  %02x %02x\n",
3572                           "/** 0111 0001 0bit 0111		xor1	cy, %s1				*/",
3573                           op[0], op[1]);
3574                    printf ("  bit = 0x%x\n", bit);
3575                  }
3576                SYNTAX("xor1	cy, %s1");
3577#line 1291 "rl78-decode.opc"
3578                ID(xor); DCY(); SM(None, SADDR); SB(bit);
3579
3580              /*----------------------------------------------------------------------*/
3581
3582              }
3583            break;
3584          case 0x08:
3585          case 0x18:
3586          case 0x28:
3587          case 0x38:
3588          case 0x48:
3589          case 0x58:
3590          case 0x68:
3591          case 0x78:
3592              {
3593                /** 0111 0001 0bit 1000		clr1	%e!0				*/
3594#line 444 "rl78-decode.opc"
3595                int bit AU = (op[1] >> 4) & 0x07;
3596                if (trace)
3597                  {
3598                    printf ("\033[33m%s\033[0m  %02x %02x\n",
3599                           "/** 0111 0001 0bit 1000		clr1	%e!0				*/",
3600                           op[0], op[1]);
3601                    printf ("  bit = 0x%x\n", bit);
3602                  }
3603                SYNTAX("clr1	%e!0");
3604#line 444 "rl78-decode.opc"
3605                ID(mov); DM(None, IMMU(2)); DB(bit); SC(0);
3606
3607              }
3608            break;
3609          case 0x09:
3610          case 0x19:
3611          case 0x29:
3612          case 0x39:
3613          case 0x49:
3614          case 0x59:
3615          case 0x69:
3616          case 0x79:
3617              {
3618                /** 0111 0001 0bit 1001		mov1	%s0, cy				*/
3619#line 812 "rl78-decode.opc"
3620                int bit AU = (op[1] >> 4) & 0x07;
3621                if (trace)
3622                  {
3623                    printf ("\033[33m%s\033[0m  %02x %02x\n",
3624                           "/** 0111 0001 0bit 1001		mov1	%s0, cy				*/",
3625                           op[0], op[1]);
3626                    printf ("  bit = 0x%x\n", bit);
3627                  }
3628                SYNTAX("mov1	%s0, cy");
3629#line 812 "rl78-decode.opc"
3630                ID(mov); DM(None, SFR); DB(bit); SCY();
3631
3632              /*----------------------------------------------------------------------*/
3633
3634              }
3635            break;
3636          case 0x0a:
3637          case 0x1a:
3638          case 0x2a:
3639          case 0x3a:
3640          case 0x4a:
3641          case 0x5a:
3642          case 0x6a:
3643          case 0x7a:
3644              {
3645                /** 0111 0001 0bit 1010		set1	%s0				*/
3646#line 1064 "rl78-decode.opc"
3647                int bit AU = (op[1] >> 4) & 0x07;
3648                if (trace)
3649                  {
3650                    printf ("\033[33m%s\033[0m  %02x %02x\n",
3651                           "/** 0111 0001 0bit 1010		set1	%s0				*/",
3652                           op[0], op[1]);
3653                    printf ("  bit = 0x%x\n", bit);
3654                  }
3655                SYNTAX("set1	%s0");
3656#line 1064 "rl78-decode.opc"
3657                op0 = SFR;
3658                ID(mov); DM(None, op0); DB(bit); SC(1);
3659                if (op0 == RL78_SFR_PSW && bit == 7)
3660                  rl78->syntax = "ei";
3661
3662              }
3663            break;
3664          case 0x0b:
3665          case 0x1b:
3666          case 0x2b:
3667          case 0x3b:
3668          case 0x4b:
3669          case 0x5b:
3670          case 0x6b:
3671          case 0x7b:
3672              {
3673                /** 0111 0001 0bit 1011		clr1	%s0				*/
3674#line 456 "rl78-decode.opc"
3675                int bit AU = (op[1] >> 4) & 0x07;
3676                if (trace)
3677                  {
3678                    printf ("\033[33m%s\033[0m  %02x %02x\n",
3679                           "/** 0111 0001 0bit 1011		clr1	%s0				*/",
3680                           op[0], op[1]);
3681                    printf ("  bit = 0x%x\n", bit);
3682                  }
3683                SYNTAX("clr1	%s0");
3684#line 456 "rl78-decode.opc"
3685                op0 = SFR;
3686                ID(mov); DM(None, op0); DB(bit); SC(0);
3687                if (op0 == RL78_SFR_PSW && bit == 7)
3688                  rl78->syntax = "di";
3689
3690              }
3691            break;
3692          case 0x0c:
3693          case 0x1c:
3694          case 0x2c:
3695          case 0x3c:
3696          case 0x4c:
3697          case 0x5c:
3698          case 0x6c:
3699          case 0x7c:
3700              {
3701                /** 0111 0001 0bit 1100		mov1	cy, %s1				*/
3702#line 806 "rl78-decode.opc"
3703                int bit AU = (op[1] >> 4) & 0x07;
3704                if (trace)
3705                  {
3706                    printf ("\033[33m%s\033[0m  %02x %02x\n",
3707                           "/** 0111 0001 0bit 1100		mov1	cy, %s1				*/",
3708                           op[0], op[1]);
3709                    printf ("  bit = 0x%x\n", bit);
3710                  }
3711                SYNTAX("mov1	cy, %s1");
3712#line 806 "rl78-decode.opc"
3713                ID(mov); DCY(); SM(None, SFR); SB(bit);
3714
3715              }
3716            break;
3717          case 0x0d:
3718          case 0x1d:
3719          case 0x2d:
3720          case 0x3d:
3721          case 0x4d:
3722          case 0x5d:
3723          case 0x6d:
3724          case 0x7d:
3725              {
3726                /** 0111 0001 0bit 1101		and1	cy, %s1				*/
3727#line 329 "rl78-decode.opc"
3728                int bit AU = (op[1] >> 4) & 0x07;
3729                if (trace)
3730                  {
3731                    printf ("\033[33m%s\033[0m  %02x %02x\n",
3732                           "/** 0111 0001 0bit 1101		and1	cy, %s1				*/",
3733                           op[0], op[1]);
3734                    printf ("  bit = 0x%x\n", bit);
3735                  }
3736                SYNTAX("and1	cy, %s1");
3737#line 329 "rl78-decode.opc"
3738                ID(and); DCY(); SM(None, SFR); SB(bit);
3739
3740              }
3741            break;
3742          case 0x0e:
3743          case 0x1e:
3744          case 0x2e:
3745          case 0x3e:
3746          case 0x4e:
3747          case 0x5e:
3748          case 0x6e:
3749          case 0x7e:
3750              {
3751                /** 0111 0001 0bit 1110		or1	cy, %s1				*/
3752#line 984 "rl78-decode.opc"
3753                int bit AU = (op[1] >> 4) & 0x07;
3754                if (trace)
3755                  {
3756                    printf ("\033[33m%s\033[0m  %02x %02x\n",
3757                           "/** 0111 0001 0bit 1110		or1	cy, %s1				*/",
3758                           op[0], op[1]);
3759                    printf ("  bit = 0x%x\n", bit);
3760                  }
3761                SYNTAX("or1	cy, %s1");
3762#line 984 "rl78-decode.opc"
3763                ID(or); DCY(); SM(None, SFR); SB(bit);
3764
3765              }
3766            break;
3767          case 0x0f:
3768          case 0x1f:
3769          case 0x2f:
3770          case 0x3f:
3771          case 0x4f:
3772          case 0x5f:
3773          case 0x6f:
3774          case 0x7f:
3775              {
3776                /** 0111 0001 0bit 1111		xor1	cy, %s1				*/
3777#line 1288 "rl78-decode.opc"
3778                int bit AU = (op[1] >> 4) & 0x07;
3779                if (trace)
3780                  {
3781                    printf ("\033[33m%s\033[0m  %02x %02x\n",
3782                           "/** 0111 0001 0bit 1111		xor1	cy, %s1				*/",
3783                           op[0], op[1]);
3784                    printf ("  bit = 0x%x\n", bit);
3785                  }
3786                SYNTAX("xor1	cy, %s1");
3787#line 1288 "rl78-decode.opc"
3788                ID(xor); DCY(); SM(None, SFR); SB(bit);
3789
3790              }
3791            break;
3792          case 0x80:
3793              {
3794                /** 0111 0001 1000 0000		set1	cy				*/
3795                if (trace)
3796                  {
3797                    printf ("\033[33m%s\033[0m  %02x %02x\n",
3798                           "/** 0111 0001 1000 0000		set1	cy				*/",
3799                           op[0], op[1]);
3800                  }
3801                SYNTAX("set1	cy");
3802#line 1061 "rl78-decode.opc"
3803                ID(mov); DCY(); SC(1);
3804
3805              }
3806            break;
3807          case 0x81:
3808          case 0x91:
3809          case 0xa1:
3810          case 0xb1:
3811          case 0xc1:
3812          case 0xd1:
3813          case 0xe1:
3814          case 0xf1:
3815              {
3816                /** 0111 0001 1bit 0001		mov1	%e0, cy				*/
3817#line 791 "rl78-decode.opc"
3818                int bit AU = (op[1] >> 4) & 0x07;
3819                if (trace)
3820                  {
3821                    printf ("\033[33m%s\033[0m  %02x %02x\n",
3822                           "/** 0111 0001 1bit 0001		mov1	%e0, cy				*/",
3823                           op[0], op[1]);
3824                    printf ("  bit = 0x%x\n", bit);
3825                  }
3826                SYNTAX("mov1	%e0, cy");
3827#line 791 "rl78-decode.opc"
3828                ID(mov); DM(HL, 0); DB(bit); SCY();
3829
3830              }
3831            break;
3832          case 0x82:
3833          case 0x92:
3834          case 0xa2:
3835          case 0xb2:
3836          case 0xc2:
3837          case 0xd2:
3838          case 0xe2:
3839          case 0xf2:
3840              {
3841                /** 0111 0001 1bit 0010		set1	%e0				*/
3842#line 1055 "rl78-decode.opc"
3843                int bit AU = (op[1] >> 4) & 0x07;
3844                if (trace)
3845                  {
3846                    printf ("\033[33m%s\033[0m  %02x %02x\n",
3847                           "/** 0111 0001 1bit 0010		set1	%e0				*/",
3848                           op[0], op[1]);
3849                    printf ("  bit = 0x%x\n", bit);
3850                  }
3851                SYNTAX("set1	%e0");
3852#line 1055 "rl78-decode.opc"
3853                ID(mov); DM(HL, 0); DB(bit); SC(1);
3854
3855              }
3856            break;
3857          case 0x83:
3858          case 0x93:
3859          case 0xa3:
3860          case 0xb3:
3861          case 0xc3:
3862          case 0xd3:
3863          case 0xe3:
3864          case 0xf3:
3865              {
3866                /** 0111 0001 1bit 0011		clr1	%e0				*/
3867#line 447 "rl78-decode.opc"
3868                int bit AU = (op[1] >> 4) & 0x07;
3869                if (trace)
3870                  {
3871                    printf ("\033[33m%s\033[0m  %02x %02x\n",
3872                           "/** 0111 0001 1bit 0011		clr1	%e0				*/",
3873                           op[0], op[1]);
3874                    printf ("  bit = 0x%x\n", bit);
3875                  }
3876                SYNTAX("clr1	%e0");
3877#line 447 "rl78-decode.opc"
3878                ID(mov); DM(HL, 0); DB(bit); SC(0);
3879
3880              }
3881            break;
3882          case 0x84:
3883          case 0x94:
3884          case 0xa4:
3885          case 0xb4:
3886          case 0xc4:
3887          case 0xd4:
3888          case 0xe4:
3889          case 0xf4:
3890              {
3891                /** 0111 0001 1bit 0100		mov1	cy, %e1				*/
3892#line 797 "rl78-decode.opc"
3893                int bit AU = (op[1] >> 4) & 0x07;
3894                if (trace)
3895                  {
3896                    printf ("\033[33m%s\033[0m  %02x %02x\n",
3897                           "/** 0111 0001 1bit 0100		mov1	cy, %e1				*/",
3898                           op[0], op[1]);
3899                    printf ("  bit = 0x%x\n", bit);
3900                  }
3901                SYNTAX("mov1	cy, %e1");
3902#line 797 "rl78-decode.opc"
3903                ID(mov); DCY(); SM(HL, 0); SB(bit);
3904
3905              }
3906            break;
3907          case 0x85:
3908          case 0x95:
3909          case 0xa5:
3910          case 0xb5:
3911          case 0xc5:
3912          case 0xd5:
3913          case 0xe5:
3914          case 0xf5:
3915              {
3916                /** 0111 0001 1bit 0101		and1	cy, %e1			*/
3917#line 323 "rl78-decode.opc"
3918                int bit AU = (op[1] >> 4) & 0x07;
3919                if (trace)
3920                  {
3921                    printf ("\033[33m%s\033[0m  %02x %02x\n",
3922                           "/** 0111 0001 1bit 0101		and1	cy, %e1			*/",
3923                           op[0], op[1]);
3924                    printf ("  bit = 0x%x\n", bit);
3925                  }
3926                SYNTAX("and1	cy, %e1");
3927#line 323 "rl78-decode.opc"
3928                ID(and); DCY(); SM(HL, 0); SB(bit);
3929
3930              }
3931            break;
3932          case 0x86:
3933          case 0x96:
3934          case 0xa6:
3935          case 0xb6:
3936          case 0xc6:
3937          case 0xd6:
3938          case 0xe6:
3939          case 0xf6:
3940              {
3941                /** 0111 0001 1bit 0110		or1	cy, %e1				*/
3942#line 978 "rl78-decode.opc"
3943                int bit AU = (op[1] >> 4) & 0x07;
3944                if (trace)
3945                  {
3946                    printf ("\033[33m%s\033[0m  %02x %02x\n",
3947                           "/** 0111 0001 1bit 0110		or1	cy, %e1				*/",
3948                           op[0], op[1]);
3949                    printf ("  bit = 0x%x\n", bit);
3950                  }
3951                SYNTAX("or1	cy, %e1");
3952#line 978 "rl78-decode.opc"
3953                ID(or); DCY(); SM(HL, 0); SB(bit);
3954
3955              }
3956            break;
3957          case 0x87:
3958          case 0x97:
3959          case 0xa7:
3960          case 0xb7:
3961          case 0xc7:
3962          case 0xd7:
3963          case 0xe7:
3964          case 0xf7:
3965              {
3966                /** 0111 0001 1bit 0111		xor1	cy, %e1				*/
3967#line 1282 "rl78-decode.opc"
3968                int bit AU = (op[1] >> 4) & 0x07;
3969                if (trace)
3970                  {
3971                    printf ("\033[33m%s\033[0m  %02x %02x\n",
3972                           "/** 0111 0001 1bit 0111		xor1	cy, %e1				*/",
3973                           op[0], op[1]);
3974                    printf ("  bit = 0x%x\n", bit);
3975                  }
3976                SYNTAX("xor1	cy, %e1");
3977#line 1282 "rl78-decode.opc"
3978                ID(xor); DCY(); SM(HL, 0); SB(bit);
3979
3980              }
3981            break;
3982          case 0x88:
3983              {
3984                /** 0111 0001 1000 1000		clr1	cy				*/
3985                if (trace)
3986                  {
3987                    printf ("\033[33m%s\033[0m  %02x %02x\n",
3988                           "/** 0111 0001 1000 1000		clr1	cy				*/",
3989                           op[0], op[1]);
3990                  }
3991                SYNTAX("clr1	cy");
3992#line 453 "rl78-decode.opc"
3993                ID(mov); DCY(); SC(0);
3994
3995              }
3996            break;
3997          case 0x89:
3998          case 0x99:
3999          case 0xa9:
4000          case 0xb9:
4001          case 0xc9:
4002          case 0xd9:
4003          case 0xe9:
4004          case 0xf9:
4005              {
4006                /** 0111 0001 1bit 1001		mov1	%e0, cy				*/
4007#line 794 "rl78-decode.opc"
4008                int bit AU = (op[1] >> 4) & 0x07;
4009                if (trace)
4010                  {
4011                    printf ("\033[33m%s\033[0m  %02x %02x\n",
4012                           "/** 0111 0001 1bit 1001		mov1	%e0, cy				*/",
4013                           op[0], op[1]);
4014                    printf ("  bit = 0x%x\n", bit);
4015                  }
4016                SYNTAX("mov1	%e0, cy");
4017#line 794 "rl78-decode.opc"
4018                ID(mov); DR(A); DB(bit); SCY();
4019
4020              }
4021            break;
4022          case 0x8a:
4023          case 0x9a:
4024          case 0xaa:
4025          case 0xba:
4026          case 0xca:
4027          case 0xda:
4028          case 0xea:
4029          case 0xfa:
4030              {
4031                /** 0111 0001 1bit 1010		set1	%0				*/
4032#line 1058 "rl78-decode.opc"
4033                int bit AU = (op[1] >> 4) & 0x07;
4034                if (trace)
4035                  {
4036                    printf ("\033[33m%s\033[0m  %02x %02x\n",
4037                           "/** 0111 0001 1bit 1010		set1	%0				*/",
4038                           op[0], op[1]);
4039                    printf ("  bit = 0x%x\n", bit);
4040                  }
4041                SYNTAX("set1	%0");
4042#line 1058 "rl78-decode.opc"
4043                ID(mov); DR(A); DB(bit); SC(1);
4044
4045              }
4046            break;
4047          case 0x8b:
4048          case 0x9b:
4049          case 0xab:
4050          case 0xbb:
4051          case 0xcb:
4052          case 0xdb:
4053          case 0xeb:
4054          case 0xfb:
4055              {
4056                /** 0111 0001 1bit 1011		clr1	%0				*/
4057#line 450 "rl78-decode.opc"
4058                int bit AU = (op[1] >> 4) & 0x07;
4059                if (trace)
4060                  {
4061                    printf ("\033[33m%s\033[0m  %02x %02x\n",
4062                           "/** 0111 0001 1bit 1011		clr1	%0				*/",
4063                           op[0], op[1]);
4064                    printf ("  bit = 0x%x\n", bit);
4065                  }
4066                SYNTAX("clr1	%0");
4067#line 450 "rl78-decode.opc"
4068                ID(mov); DR(A); DB(bit); SC(0);
4069
4070              }
4071            break;
4072          case 0x8c:
4073          case 0x9c:
4074          case 0xac:
4075          case 0xbc:
4076          case 0xcc:
4077          case 0xdc:
4078          case 0xec:
4079          case 0xfc:
4080              {
4081                /** 0111 0001 1bit 1100		mov1	cy, %e1				*/
4082#line 800 "rl78-decode.opc"
4083                int bit AU = (op[1] >> 4) & 0x07;
4084                if (trace)
4085                  {
4086                    printf ("\033[33m%s\033[0m  %02x %02x\n",
4087                           "/** 0111 0001 1bit 1100		mov1	cy, %e1				*/",
4088                           op[0], op[1]);
4089                    printf ("  bit = 0x%x\n", bit);
4090                  }
4091                SYNTAX("mov1	cy, %e1");
4092#line 800 "rl78-decode.opc"
4093                ID(mov); DCY(); SR(A); SB(bit);
4094
4095              }
4096            break;
4097          case 0x8d:
4098          case 0x9d:
4099          case 0xad:
4100          case 0xbd:
4101          case 0xcd:
4102          case 0xdd:
4103          case 0xed:
4104          case 0xfd:
4105              {
4106                /** 0111 0001 1bit 1101		and1	cy, %1				*/
4107#line 326 "rl78-decode.opc"
4108                int bit AU = (op[1] >> 4) & 0x07;
4109                if (trace)
4110                  {
4111                    printf ("\033[33m%s\033[0m  %02x %02x\n",
4112                           "/** 0111 0001 1bit 1101		and1	cy, %1				*/",
4113                           op[0], op[1]);
4114                    printf ("  bit = 0x%x\n", bit);
4115                  }
4116                SYNTAX("and1	cy, %1");
4117#line 326 "rl78-decode.opc"
4118                ID(and); DCY(); SR(A); SB(bit);
4119
4120              }
4121            break;
4122          case 0x8e:
4123          case 0x9e:
4124          case 0xae:
4125          case 0xbe:
4126          case 0xce:
4127          case 0xde:
4128          case 0xee:
4129          case 0xfe:
4130              {
4131                /** 0111 0001 1bit 1110		or1	cy, %1				*/
4132#line 981 "rl78-decode.opc"
4133                int bit AU = (op[1] >> 4) & 0x07;
4134                if (trace)
4135                  {
4136                    printf ("\033[33m%s\033[0m  %02x %02x\n",
4137                           "/** 0111 0001 1bit 1110		or1	cy, %1				*/",
4138                           op[0], op[1]);
4139                    printf ("  bit = 0x%x\n", bit);
4140                  }
4141                SYNTAX("or1	cy, %1");
4142#line 981 "rl78-decode.opc"
4143                ID(or); DCY(); SR(A); SB(bit);
4144
4145              }
4146            break;
4147          case 0x8f:
4148          case 0x9f:
4149          case 0xaf:
4150          case 0xbf:
4151          case 0xcf:
4152          case 0xdf:
4153          case 0xef:
4154          case 0xff:
4155              {
4156                /** 0111 0001 1bit 1111		xor1	cy, %1				*/
4157#line 1285 "rl78-decode.opc"
4158                int bit AU = (op[1] >> 4) & 0x07;
4159                if (trace)
4160                  {
4161                    printf ("\033[33m%s\033[0m  %02x %02x\n",
4162                           "/** 0111 0001 1bit 1111		xor1	cy, %1				*/",
4163                           op[0], op[1]);
4164                    printf ("  bit = 0x%x\n", bit);
4165                  }
4166                SYNTAX("xor1	cy, %1");
4167#line 1285 "rl78-decode.opc"
4168                ID(xor); DCY(); SR(A); SB(bit);
4169
4170              }
4171            break;
4172          case 0xc0:
4173              {
4174                /** 0111 0001 1100 0000		not1	cy				*/
4175                if (trace)
4176                  {
4177                    printf ("\033[33m%s\033[0m  %02x %02x\n",
4178                           "/** 0111 0001 1100 0000		not1	cy				*/",
4179                           op[0], op[1]);
4180                  }
4181                SYNTAX("not1	cy");
4182#line 922 "rl78-decode.opc"
4183                ID(xor); DCY(); SC(1);
4184
4185              /*----------------------------------------------------------------------*/
4186
4187              }
4188            break;
4189          default: UNSUPPORTED(); break;
4190        }
4191      break;
4192    case 0x78:
4193        {
4194          /** 0111 1000			movw	%e0, %1				*/
4195          if (trace)
4196            {
4197              printf ("\033[33m%s\033[0m  %02x\n",
4198                     "/** 0111 1000			movw	%e0, %1				*/",
4199                     op[0]);
4200            }
4201          SYNTAX("movw	%e0, %1");
4202#line 883 "rl78-decode.opc"
4203          ID(mov); W(); DM(BC, IMMU(2)); SR(AX);
4204
4205        }
4206      break;
4207    case 0x79:
4208        {
4209          /** 0111 1001			movw	%0, %e1				*/
4210          if (trace)
4211            {
4212              printf ("\033[33m%s\033[0m  %02x\n",
4213                     "/** 0111 1001			movw	%0, %e1				*/",
4214                     op[0]);
4215            }
4216          SYNTAX("movw	%0, %e1");
4217#line 874 "rl78-decode.opc"
4218          ID(mov); W(); DR(AX); SM(BC, IMMU(2));
4219
4220        }
4221      break;
4222    case 0x7a:
4223        {
4224          /** 0111 1010	       		xor	%0, #%1				*/
4225          if (trace)
4226            {
4227              printf ("\033[33m%s\033[0m  %02x\n",
4228                     "/** 0111 1010	       		xor	%0, #%1				*/",
4229                     op[0]);
4230            }
4231          SYNTAX("xor	%0, #%1");
4232#line 1277 "rl78-decode.opc"
4233          ID(xor); DM(None, SADDR); SC(IMMU(1)); Fz;
4234
4235        /*----------------------------------------------------------------------*/
4236
4237        }
4238      break;
4239    case 0x7b:
4240        {
4241          /** 0111 1011	       		xor	%0, %1				*/
4242          if (trace)
4243            {
4244              printf ("\033[33m%s\033[0m  %02x\n",
4245                     "/** 0111 1011	       		xor	%0, %1				*/",
4246                     op[0]);
4247            }
4248          SYNTAX("xor	%0, %1");
4249#line 1274 "rl78-decode.opc"
4250          ID(xor); DR(A); SM(None, SADDR); Fz;
4251
4252        }
4253      break;
4254    case 0x7c:
4255        {
4256          /** 0111 1100	       		xor	%0, #%1				*/
4257          if (trace)
4258            {
4259              printf ("\033[33m%s\033[0m  %02x\n",
4260                     "/** 0111 1100	       		xor	%0, #%1				*/",
4261                     op[0]);
4262            }
4263          SYNTAX("xor	%0, #%1");
4264#line 1265 "rl78-decode.opc"
4265          ID(xor); DR(A); SC(IMMU(1)); Fz;
4266
4267        }
4268      break;
4269    case 0x7d:
4270        {
4271          /** 0111 1101			xor	%0, %e1				*/
4272          if (trace)
4273            {
4274              printf ("\033[33m%s\033[0m  %02x\n",
4275                     "/** 0111 1101			xor	%0, %e1				*/",
4276                     op[0]);
4277            }
4278          SYNTAX("xor	%0, %e1");
4279#line 1253 "rl78-decode.opc"
4280          ID(xor); DR(A); SM(HL, 0); Fz;
4281
4282        }
4283      break;
4284    case 0x7e:
4285        {
4286          /** 0111 1110			xor	%0, %ea1			*/
4287          if (trace)
4288            {
4289              printf ("\033[33m%s\033[0m  %02x\n",
4290                     "/** 0111 1110			xor	%0, %ea1			*/",
4291                     op[0]);
4292            }
4293          SYNTAX("xor	%0, %ea1");
4294#line 1259 "rl78-decode.opc"
4295          ID(xor); DR(A); SM(HL, IMMU(1)); Fz;
4296
4297        }
4298      break;
4299    case 0x7f:
4300        {
4301          /** 0111 1111			xor	%0, %e!1			*/
4302          if (trace)
4303            {
4304              printf ("\033[33m%s\033[0m  %02x\n",
4305                     "/** 0111 1111			xor	%0, %e!1			*/",
4306                     op[0]);
4307            }
4308          SYNTAX("xor	%0, %e!1");
4309#line 1250 "rl78-decode.opc"
4310          ID(xor); DR(A); SM(None, IMMU(2)); Fz;
4311
4312        }
4313      break;
4314    case 0x80:
4315    case 0x81:
4316    case 0x82:
4317    case 0x83:
4318    case 0x84:
4319    case 0x85:
4320    case 0x86:
4321    case 0x87:
4322        {
4323          /** 1000 0reg			inc	%0				*/
4324#line 593 "rl78-decode.opc"
4325          int reg AU = op[0] & 0x07;
4326          if (trace)
4327            {
4328              printf ("\033[33m%s\033[0m  %02x\n",
4329                     "/** 1000 0reg			inc	%0				*/",
4330                     op[0]);
4331              printf ("  reg = 0x%x\n", reg);
4332            }
4333          SYNTAX("inc	%0");
4334#line 593 "rl78-decode.opc"
4335          ID(add); DRB(reg); SC(1); Fza;
4336
4337        }
4338      break;
4339    case 0x88:
4340        {
4341          /** 1000 1000			mov	%0, %ea1			*/
4342          if (trace)
4343            {
4344              printf ("\033[33m%s\033[0m  %02x\n",
4345                     "/** 1000 1000			mov	%0, %ea1			*/",
4346                     op[0]);
4347            }
4348          SYNTAX("mov	%0, %ea1");
4349#line 672 "rl78-decode.opc"
4350          ID(mov); DR(A); SM(SP, IMMU(1));
4351
4352        }
4353      break;
4354    case 0x89:
4355        {
4356          /** 1000 1001			mov	%0, %e1				*/
4357          if (trace)
4358            {
4359              printf ("\033[33m%s\033[0m  %02x\n",
4360                     "/** 1000 1001			mov	%0, %e1				*/",
4361                     op[0]);
4362            }
4363          SYNTAX("mov	%0, %e1");
4364#line 654 "rl78-decode.opc"
4365          ID(mov); DR(A); SM(DE, 0);
4366
4367        }
4368      break;
4369    case 0x8a:
4370        {
4371          /** 1000 1010			mov	%0, %ea1			*/
4372          if (trace)
4373            {
4374              printf ("\033[33m%s\033[0m  %02x\n",
4375                     "/** 1000 1010			mov	%0, %ea1			*/",
4376                     op[0]);
4377            }
4378          SYNTAX("mov	%0, %ea1");
4379#line 657 "rl78-decode.opc"
4380          ID(mov); DR(A); SM(DE, IMMU(1));
4381
4382        }
4383      break;
4384    case 0x8b:
4385        {
4386          /** 1000 1011			mov	%0, %e1				*/
4387          if (trace)
4388            {
4389              printf ("\033[33m%s\033[0m  %02x\n",
4390                     "/** 1000 1011			mov	%0, %e1				*/",
4391                     op[0]);
4392            }
4393          SYNTAX("mov	%0, %e1");
4394#line 660 "rl78-decode.opc"
4395          ID(mov); DR(A); SM(HL, 0);
4396
4397        }
4398      break;
4399    case 0x8c:
4400        {
4401          /** 1000 1100			mov	%0, %ea1			*/
4402          if (trace)
4403            {
4404              printf ("\033[33m%s\033[0m  %02x\n",
4405                     "/** 1000 1100			mov	%0, %ea1			*/",
4406                     op[0]);
4407            }
4408          SYNTAX("mov	%0, %ea1");
4409#line 663 "rl78-decode.opc"
4410          ID(mov); DR(A); SM(HL, IMMU(1));
4411
4412        }
4413      break;
4414    case 0x8d:
4415        {
4416          /** 1000 1101			mov	%0, %1				*/
4417          if (trace)
4418            {
4419              printf ("\033[33m%s\033[0m  %02x\n",
4420                     "/** 1000 1101			mov	%0, %1				*/",
4421                     op[0]);
4422            }
4423          SYNTAX("mov	%0, %1");
4424#line 696 "rl78-decode.opc"
4425          ID(mov); DR(A); SM(None, SADDR);
4426
4427        }
4428      break;
4429    case 0x8e:
4430        {
4431          /** 1000 1110			mov	%0, %s1				*/
4432          if (trace)
4433            {
4434              printf ("\033[33m%s\033[0m  %02x\n",
4435                     "/** 1000 1110			mov	%0, %s1				*/",
4436                     op[0]);
4437            }
4438          SYNTAX("mov	%0, %s1");
4439#line 693 "rl78-decode.opc"
4440          ID(mov); DR(A); SM(None, SFR);
4441
4442        }
4443      break;
4444    case 0x8f:
4445        {
4446          /** 1000 1111			mov	%0, %e!1			*/
4447          if (trace)
4448            {
4449              printf ("\033[33m%s\033[0m  %02x\n",
4450                     "/** 1000 1111			mov	%0, %e!1			*/",
4451                     op[0]);
4452            }
4453          SYNTAX("mov	%0, %e!1");
4454#line 651 "rl78-decode.opc"
4455          ID(mov); DR(A); SM(None, IMMU(2));
4456
4457        }
4458      break;
4459    case 0x90:
4460    case 0x91:
4461    case 0x92:
4462    case 0x93:
4463    case 0x94:
4464    case 0x95:
4465    case 0x96:
4466    case 0x97:
4467        {
4468          /** 1001 0reg			dec	%0				*/
4469#line 560 "rl78-decode.opc"
4470          int reg AU = op[0] & 0x07;
4471          if (trace)
4472            {
4473              printf ("\033[33m%s\033[0m  %02x\n",
4474                     "/** 1001 0reg			dec	%0				*/",
4475                     op[0]);
4476              printf ("  reg = 0x%x\n", reg);
4477            }
4478          SYNTAX("dec	%0");
4479#line 560 "rl78-decode.opc"
4480          ID(sub); DRB(reg); SC(1); Fza;
4481
4482        }
4483      break;
4484    case 0x98:
4485        {
4486          /** 1001 1000			mov	%a0, %1				*/
4487          if (trace)
4488            {
4489              printf ("\033[33m%s\033[0m  %02x\n",
4490                     "/** 1001 1000			mov	%a0, %1				*/",
4491                     op[0]);
4492            }
4493          SYNTAX("mov	%a0, %1");
4494#line 648 "rl78-decode.opc"
4495          ID(mov); DM(SP, IMMU(1)); SR(A);
4496
4497        }
4498      break;
4499    case 0x99:
4500        {
4501          /** 1001 1001			mov	%e0, %1				*/
4502          if (trace)
4503            {
4504              printf ("\033[33m%s\033[0m  %02x\n",
4505                     "/** 1001 1001			mov	%e0, %1				*/",
4506                     op[0]);
4507            }
4508          SYNTAX("mov	%e0, %1");
4509#line 621 "rl78-decode.opc"
4510          ID(mov); DM(DE, 0); SR(A);
4511
4512        }
4513      break;
4514    case 0x9a:
4515        {
4516          /** 1001 1010			mov	%ea0, %1				*/
4517          if (trace)
4518            {
4519              printf ("\033[33m%s\033[0m  %02x\n",
4520                     "/** 1001 1010			mov	%ea0, %1				*/",
4521                     op[0]);
4522            }
4523          SYNTAX("mov	%ea0, %1");
4524#line 627 "rl78-decode.opc"
4525          ID(mov); DM(DE, IMMU(1)); SR(A);
4526
4527        }
4528      break;
4529    case 0x9b:
4530        {
4531          /** 1001 1011			mov	%e0, %1				*/
4532          if (trace)
4533            {
4534              printf ("\033[33m%s\033[0m  %02x\n",
4535                     "/** 1001 1011			mov	%e0, %1				*/",
4536                     op[0]);
4537            }
4538          SYNTAX("mov	%e0, %1");
4539#line 630 "rl78-decode.opc"
4540          ID(mov); DM(HL, 0); SR(A);
4541
4542        }
4543      break;
4544    case 0x9c:
4545        {
4546          /** 1001 1100			mov	%ea0, %1			*/
4547          if (trace)
4548            {
4549              printf ("\033[33m%s\033[0m  %02x\n",
4550                     "/** 1001 1100			mov	%ea0, %1			*/",
4551                     op[0]);
4552            }
4553          SYNTAX("mov	%ea0, %1");
4554#line 639 "rl78-decode.opc"
4555          ID(mov); DM(HL, IMMU(1)); SR(A);
4556
4557        }
4558      break;
4559    case 0x9d:
4560        {
4561          /** 1001 1101			mov	%0, %1				*/
4562          if (trace)
4563            {
4564              printf ("\033[33m%s\033[0m  %02x\n",
4565                     "/** 1001 1101			mov	%0, %1				*/",
4566                     op[0]);
4567            }
4568          SYNTAX("mov	%0, %1");
4569#line 753 "rl78-decode.opc"
4570          ID(mov); DM(None, SADDR); SR(A);
4571
4572        }
4573      break;
4574    case 0x9e:
4575        {
4576          /** 1001 1110			mov	%s0, %1				*/
4577          if (trace)
4578            {
4579              printf ("\033[33m%s\033[0m  %02x\n",
4580                     "/** 1001 1110			mov	%s0, %1				*/",
4581                     op[0]);
4582            }
4583          SYNTAX("mov	%s0, %1");
4584#line 786 "rl78-decode.opc"
4585          ID(mov); DM(None, SFR); SR(A);
4586
4587        /*----------------------------------------------------------------------*/
4588
4589        }
4590      break;
4591    case 0x9f:
4592        {
4593          /** 1001 1111			mov	%e!0, %1			*/
4594          if (trace)
4595            {
4596              printf ("\033[33m%s\033[0m  %02x\n",
4597                     "/** 1001 1111			mov	%e!0, %1			*/",
4598                     op[0]);
4599            }
4600          SYNTAX("mov	%e!0, %1");
4601#line 618 "rl78-decode.opc"
4602          ID(mov); DM(None, IMMU(2)); SR(A);
4603
4604        }
4605      break;
4606    case 0xa0:
4607        {
4608          /** 1010 0000			inc	%e!0				*/
4609          if (trace)
4610            {
4611              printf ("\033[33m%s\033[0m  %02x\n",
4612                     "/** 1010 0000			inc	%e!0				*/",
4613                     op[0]);
4614            }
4615          SYNTAX("inc	%e!0");
4616#line 587 "rl78-decode.opc"
4617          ID(add); DM(None, IMMU(2)); SC(1); Fza;
4618
4619        }
4620      break;
4621    case 0xa1:
4622    case 0xa3:
4623    case 0xa5:
4624    case 0xa7:
4625        {
4626          /** 1010 0rg1			incw	%0				*/
4627#line 607 "rl78-decode.opc"
4628          int rg AU = (op[0] >> 1) & 0x03;
4629          if (trace)
4630            {
4631              printf ("\033[33m%s\033[0m  %02x\n",
4632                     "/** 1010 0rg1			incw	%0				*/",
4633                     op[0]);
4634              printf ("  rg = 0x%x\n", rg);
4635            }
4636          SYNTAX("incw	%0");
4637#line 607 "rl78-decode.opc"
4638          ID(add); W(); DRW(rg); SC(1);
4639
4640        }
4641      break;
4642    case 0xa2:
4643        {
4644          /** 1010 0010			incw	%e!0				*/
4645          if (trace)
4646            {
4647              printf ("\033[33m%s\033[0m  %02x\n",
4648                     "/** 1010 0010			incw	%e!0				*/",
4649                     op[0]);
4650            }
4651          SYNTAX("incw	%e!0");
4652#line 601 "rl78-decode.opc"
4653          ID(add); W(); DM(None, IMMU(2)); SC(1);
4654
4655        }
4656      break;
4657    case 0xa4:
4658        {
4659          /** 1010 0100			inc	%0				*/
4660          if (trace)
4661            {
4662              printf ("\033[33m%s\033[0m  %02x\n",
4663                     "/** 1010 0100			inc	%0				*/",
4664                     op[0]);
4665            }
4666          SYNTAX("inc	%0");
4667#line 596 "rl78-decode.opc"
4668          ID(add); DM(None, SADDR); SC(1); Fza;
4669
4670        /*----------------------------------------------------------------------*/
4671
4672        }
4673      break;
4674    case 0xa6:
4675        {
4676          /** 1010 0110			incw	%0				*/
4677          if (trace)
4678            {
4679              printf ("\033[33m%s\033[0m  %02x\n",
4680                     "/** 1010 0110			incw	%0				*/",
4681                     op[0]);
4682            }
4683          SYNTAX("incw	%0");
4684#line 610 "rl78-decode.opc"
4685          ID(add); W(); DM(None, SADDR); SC(1);
4686
4687        /*----------------------------------------------------------------------*/
4688
4689        }
4690      break;
4691    case 0xa8:
4692        {
4693          /** 1010 1000			movw	%0, %a1				*/
4694          if (trace)
4695            {
4696              printf ("\033[33m%s\033[0m  %02x\n",
4697                     "/** 1010 1000			movw	%0, %a1				*/",
4698                     op[0]);
4699            }
4700          SYNTAX("movw	%0, %a1");
4701#line 856 "rl78-decode.opc"
4702          ID(mov); W(); DR(AX); SM(SP, IMMU(1));
4703
4704        }
4705      break;
4706    case 0xa9:
4707        {
4708          /** 1010 1001			movw	%0, %e1				*/
4709          if (trace)
4710            {
4711              printf ("\033[33m%s\033[0m  %02x\n",
4712                     "/** 1010 1001			movw	%0, %e1				*/",
4713                     op[0]);
4714            }
4715          SYNTAX("movw	%0, %e1");
4716#line 844 "rl78-decode.opc"
4717          ID(mov); W(); DR(AX); SM(DE, 0);
4718
4719        }
4720      break;
4721    case 0xaa:
4722        {
4723          /** 1010 1010			movw	%0, %ea1				*/
4724          if (trace)
4725            {
4726              printf ("\033[33m%s\033[0m  %02x\n",
4727                     "/** 1010 1010			movw	%0, %ea1				*/",
4728                     op[0]);
4729            }
4730          SYNTAX("movw	%0, %ea1");
4731#line 847 "rl78-decode.opc"
4732          ID(mov); W(); DR(AX); SM(DE, IMMU(1));
4733
4734        }
4735      break;
4736    case 0xab:
4737        {
4738          /** 1010 1011			movw	%0, %e1				*/
4739          if (trace)
4740            {
4741              printf ("\033[33m%s\033[0m  %02x\n",
4742                     "/** 1010 1011			movw	%0, %e1				*/",
4743                     op[0]);
4744            }
4745          SYNTAX("movw	%0, %e1");
4746#line 850 "rl78-decode.opc"
4747          ID(mov); W(); DR(AX); SM(HL, 0);
4748
4749        }
4750      break;
4751    case 0xac:
4752        {
4753          /** 1010 1100			movw	%0, %ea1			*/
4754          if (trace)
4755            {
4756              printf ("\033[33m%s\033[0m  %02x\n",
4757                     "/** 1010 1100			movw	%0, %ea1			*/",
4758                     op[0]);
4759            }
4760          SYNTAX("movw	%0, %ea1");
4761#line 853 "rl78-decode.opc"
4762          ID(mov); W(); DR(AX); SM(HL, IMMU(1));
4763
4764        }
4765      break;
4766    case 0xad:
4767        {
4768          /** 1010 1101			movw	%0, %1				*/
4769          if (trace)
4770            {
4771              printf ("\033[33m%s\033[0m  %02x\n",
4772                     "/** 1010 1101			movw	%0, %1				*/",
4773                     op[0]);
4774            }
4775          SYNTAX("movw	%0, %1");
4776#line 886 "rl78-decode.opc"
4777          ID(mov); W(); DR(AX); SM(None, SADDR);
4778
4779        }
4780      break;
4781    case 0xae:
4782        {
4783          /** 1010 1110			movw	%0, %s1				*/
4784          if (trace)
4785            {
4786              printf ("\033[33m%s\033[0m  %02x\n",
4787                     "/** 1010 1110			movw	%0, %s1				*/",
4788                     op[0]);
4789            }
4790          SYNTAX("movw	%0, %s1");
4791#line 889 "rl78-decode.opc"
4792          ID(mov); W(); DR(AX); SM(None, SFR);
4793
4794        }
4795      break;
4796    case 0xaf:
4797        {
4798          /** 1010 1111			movw	%0, %e!1			*/
4799          if (trace)
4800            {
4801              printf ("\033[33m%s\033[0m  %02x\n",
4802                     "/** 1010 1111			movw	%0, %e!1			*/",
4803                     op[0]);
4804            }
4805          SYNTAX("movw	%0, %e!1");
4806#line 840 "rl78-decode.opc"
4807          ID(mov); W(); DR(AX); SM(None, IMMU(2));
4808
4809
4810        }
4811      break;
4812    case 0xb0:
4813        {
4814          /** 1011 0000			dec	%e!0				*/
4815          if (trace)
4816            {
4817              printf ("\033[33m%s\033[0m  %02x\n",
4818                     "/** 1011 0000			dec	%e!0				*/",
4819                     op[0]);
4820            }
4821          SYNTAX("dec	%e!0");
4822#line 554 "rl78-decode.opc"
4823          ID(sub); DM(None, IMMU(2)); SC(1); Fza;
4824
4825        }
4826      break;
4827    case 0xb1:
4828    case 0xb3:
4829    case 0xb5:
4830    case 0xb7:
4831        {
4832          /** 1011 0rg1 			decw	%0				*/
4833#line 574 "rl78-decode.opc"
4834          int rg AU = (op[0] >> 1) & 0x03;
4835          if (trace)
4836            {
4837              printf ("\033[33m%s\033[0m  %02x\n",
4838                     "/** 1011 0rg1 			decw	%0				*/",
4839                     op[0]);
4840              printf ("  rg = 0x%x\n", rg);
4841            }
4842          SYNTAX("decw	%0");
4843#line 574 "rl78-decode.opc"
4844          ID(sub); W(); DRW(rg); SC(1);
4845
4846        }
4847      break;
4848    case 0xb2:
4849        {
4850          /** 1011 0010			decw	%e!0				*/
4851          if (trace)
4852            {
4853              printf ("\033[33m%s\033[0m  %02x\n",
4854                     "/** 1011 0010			decw	%e!0				*/",
4855                     op[0]);
4856            }
4857          SYNTAX("decw	%e!0");
4858#line 568 "rl78-decode.opc"
4859          ID(sub); W(); DM(None, IMMU(2)); SC(1);
4860
4861        }
4862      break;
4863    case 0xb4:
4864        {
4865          /** 1011 0100			dec	%0				*/
4866          if (trace)
4867            {
4868              printf ("\033[33m%s\033[0m  %02x\n",
4869                     "/** 1011 0100			dec	%0				*/",
4870                     op[0]);
4871            }
4872          SYNTAX("dec	%0");
4873#line 563 "rl78-decode.opc"
4874          ID(sub); DM(None, SADDR); SC(1); Fza;
4875
4876        /*----------------------------------------------------------------------*/
4877
4878        }
4879      break;
4880    case 0xb6:
4881        {
4882          /** 1011 0110			decw	%0				*/
4883          if (trace)
4884            {
4885              printf ("\033[33m%s\033[0m  %02x\n",
4886                     "/** 1011 0110			decw	%0				*/",
4887                     op[0]);
4888            }
4889          SYNTAX("decw	%0");
4890#line 577 "rl78-decode.opc"
4891          ID(sub); W(); DM(None, SADDR); SC(1);
4892
4893        /*----------------------------------------------------------------------*/
4894
4895        }
4896      break;
4897    case 0xb8:
4898        {
4899          /** 1011 1000			movw	%a0, %1				*/
4900          if (trace)
4901            {
4902              printf ("\033[33m%s\033[0m  %02x\n",
4903                     "/** 1011 1000			movw	%a0, %1				*/",
4904                     op[0]);
4905            }
4906          SYNTAX("movw	%a0, %1");
4907#line 837 "rl78-decode.opc"
4908          ID(mov); W(); DM(SP, IMMU(1)); SR(AX);
4909
4910        }
4911      break;
4912    case 0xb9:
4913        {
4914          /** 1011 1001			movw	%e0, %1				*/
4915          if (trace)
4916            {
4917              printf ("\033[33m%s\033[0m  %02x\n",
4918                     "/** 1011 1001			movw	%e0, %1				*/",
4919                     op[0]);
4920            }
4921          SYNTAX("movw	%e0, %1");
4922#line 825 "rl78-decode.opc"
4923          ID(mov); W(); DM(DE, 0); SR(AX);
4924
4925        }
4926      break;
4927    case 0xba:
4928        {
4929          /** 1011 1010			movw	%ea0, %1				*/
4930          if (trace)
4931            {
4932              printf ("\033[33m%s\033[0m  %02x\n",
4933                     "/** 1011 1010			movw	%ea0, %1				*/",
4934                     op[0]);
4935            }
4936          SYNTAX("movw	%ea0, %1");
4937#line 828 "rl78-decode.opc"
4938          ID(mov); W(); DM(DE, IMMU(1)); SR(AX);
4939
4940        }
4941      break;
4942    case 0xbb:
4943        {
4944          /** 1011 1011			movw	%e0, %1				*/
4945          if (trace)
4946            {
4947              printf ("\033[33m%s\033[0m  %02x\n",
4948                     "/** 1011 1011			movw	%e0, %1				*/",
4949                     op[0]);
4950            }
4951          SYNTAX("movw	%e0, %1");
4952#line 831 "rl78-decode.opc"
4953          ID(mov); W(); DM(HL, 0); SR(AX);
4954
4955        }
4956      break;
4957    case 0xbc:
4958        {
4959          /** 1011 1100			movw	%ea0, %1			*/
4960          if (trace)
4961            {
4962              printf ("\033[33m%s\033[0m  %02x\n",
4963                     "/** 1011 1100			movw	%ea0, %1			*/",
4964                     op[0]);
4965            }
4966          SYNTAX("movw	%ea0, %1");
4967#line 834 "rl78-decode.opc"
4968          ID(mov); W(); DM(HL, IMMU(1)); SR(AX);
4969
4970        }
4971      break;
4972    case 0xbd:
4973        {
4974          /** 1011 1101			movw	%0, %1				*/
4975          if (trace)
4976            {
4977              printf ("\033[33m%s\033[0m  %02x\n",
4978                     "/** 1011 1101			movw	%0, %1				*/",
4979                     op[0]);
4980            }
4981          SYNTAX("movw	%0, %1");
4982#line 901 "rl78-decode.opc"
4983          ID(mov); W(); DM(None, SADDR); SR(AX);
4984
4985        }
4986      break;
4987    case 0xbe:
4988        {
4989          /** 1011 1110			movw	%s0, %1				*/
4990          if (trace)
4991            {
4992              printf ("\033[33m%s\033[0m  %02x\n",
4993                     "/** 1011 1110			movw	%s0, %1				*/",
4994                     op[0]);
4995            }
4996          SYNTAX("movw	%s0, %1");
4997#line 907 "rl78-decode.opc"
4998          ID(mov); W(); DM(None, SFR); SR(AX);
4999
5000        /*----------------------------------------------------------------------*/
5001
5002        }
5003      break;
5004    case 0xbf:
5005        {
5006          /** 1011 1111			movw	%e!0, %1			*/
5007          if (trace)
5008            {
5009              printf ("\033[33m%s\033[0m  %02x\n",
5010                     "/** 1011 1111			movw	%e!0, %1			*/",
5011                     op[0]);
5012            }
5013          SYNTAX("movw	%e!0, %1");
5014#line 822 "rl78-decode.opc"
5015          ID(mov); W(); DM(None, IMMU(2)); SR(AX);
5016
5017        }
5018      break;
5019    case 0xc0:
5020    case 0xc2:
5021    case 0xc4:
5022    case 0xc6:
5023        {
5024          /** 1100 0rg0			pop	%0				*/
5025#line 992 "rl78-decode.opc"
5026          int rg AU = (op[0] >> 1) & 0x03;
5027          if (trace)
5028            {
5029              printf ("\033[33m%s\033[0m  %02x\n",
5030                     "/** 1100 0rg0			pop	%0				*/",
5031                     op[0]);
5032              printf ("  rg = 0x%x\n", rg);
5033            }
5034          SYNTAX("pop	%0");
5035#line 992 "rl78-decode.opc"
5036          ID(mov); W(); DRW(rg); SPOP();
5037
5038        }
5039      break;
5040    case 0xc1:
5041    case 0xc3:
5042    case 0xc5:
5043    case 0xc7:
5044        {
5045          /** 1100 0rg1			push	%1				*/
5046#line 1000 "rl78-decode.opc"
5047          int rg AU = (op[0] >> 1) & 0x03;
5048          if (trace)
5049            {
5050              printf ("\033[33m%s\033[0m  %02x\n",
5051                     "/** 1100 0rg1			push	%1				*/",
5052                     op[0]);
5053              printf ("  rg = 0x%x\n", rg);
5054            }
5055          SYNTAX("push	%1");
5056#line 1000 "rl78-decode.opc"
5057          ID(mov); W(); DPUSH(); SRW(rg);
5058
5059        }
5060      break;
5061    case 0xc8:
5062        {
5063          /** 1100 1000			mov	%a0, #%1			*/
5064          if (trace)
5065            {
5066              printf ("\033[33m%s\033[0m  %02x\n",
5067                     "/** 1100 1000			mov	%a0, #%1			*/",
5068                     op[0]);
5069            }
5070          SYNTAX("mov	%a0, #%1");
5071#line 645 "rl78-decode.opc"
5072          ID(mov); DM(SP, IMMU(1)); SC(IMMU(1));
5073
5074        }
5075      break;
5076    case 0xc9:
5077        {
5078          /** 1100 1001			movw	%0, #%1				*/
5079          if (trace)
5080            {
5081              printf ("\033[33m%s\033[0m  %02x\n",
5082                     "/** 1100 1001			movw	%0, #%1				*/",
5083                     op[0]);
5084            }
5085          SYNTAX("movw	%0, #%1");
5086#line 898 "rl78-decode.opc"
5087          ID(mov); W(); DM(None, SADDR); SC(IMMU(2));
5088
5089        }
5090      break;
5091    case 0xca:
5092        {
5093          /** 1100 1010			mov	%ea0, #%1			*/
5094          if (trace)
5095            {
5096              printf ("\033[33m%s\033[0m  %02x\n",
5097                     "/** 1100 1010			mov	%ea0, #%1			*/",
5098                     op[0]);
5099            }
5100          SYNTAX("mov	%ea0, #%1");
5101#line 624 "rl78-decode.opc"
5102          ID(mov); DM(DE, IMMU(1)); SC(IMMU(1));
5103
5104        }
5105      break;
5106    case 0xcb:
5107        {
5108          /** 1100 1011			movw	%s0, #%1			*/
5109          if (trace)
5110            {
5111              printf ("\033[33m%s\033[0m  %02x\n",
5112                     "/** 1100 1011			movw	%s0, #%1			*/",
5113                     op[0]);
5114            }
5115          SYNTAX("movw	%s0, #%1");
5116#line 904 "rl78-decode.opc"
5117          ID(mov); W(); DM(None, SFR); SC(IMMU(2));
5118
5119        }
5120      break;
5121    case 0xcc:
5122        {
5123          /** 1100 1100			mov	%ea0, #%1			*/
5124          if (trace)
5125            {
5126              printf ("\033[33m%s\033[0m  %02x\n",
5127                     "/** 1100 1100			mov	%ea0, #%1			*/",
5128                     op[0]);
5129            }
5130          SYNTAX("mov	%ea0, #%1");
5131#line 636 "rl78-decode.opc"
5132          ID(mov); DM(HL, IMMU(1)); SC(IMMU(1));
5133
5134        }
5135      break;
5136    case 0xcd:
5137        {
5138          /** 1100 1101			mov	%0, #%1				*/
5139          if (trace)
5140            {
5141              printf ("\033[33m%s\033[0m  %02x\n",
5142                     "/** 1100 1101			mov	%0, #%1				*/",
5143                     op[0]);
5144            }
5145          SYNTAX("mov	%0, #%1");
5146#line 750 "rl78-decode.opc"
5147          ID(mov); DM(None, SADDR); SC(IMMU(1));
5148
5149        }
5150      break;
5151    case 0xce:
5152        {
5153          /** 1100 1110			mov	%s0, #%1			*/
5154          if (trace)
5155            {
5156              printf ("\033[33m%s\033[0m  %02x\n",
5157                     "/** 1100 1110			mov	%s0, #%1			*/",
5158                     op[0]);
5159            }
5160          SYNTAX("mov	%s0, #%1");
5161#line 756 "rl78-decode.opc"
5162          op0 = SFR;
5163          op1 = IMMU(1);
5164          ID(mov); DM(None, op0); SC(op1);
5165          if (op0 == 0xffffb && isa == RL78_ISA_G14)
5166            switch (op1)
5167              {
5168              case 0x01:
5169        	rl78->syntax = "mulhu"; ID(mulhu);
5170        	break;
5171              case 0x02:
5172        	rl78->syntax = "mulh"; ID(mulh);
5173        	break;
5174              case 0x03:
5175        	rl78->syntax = "divhu"; ID(divhu);
5176        	break;
5177              case 0x04:
5178        	rl78->syntax = "divwu <old-encoding>"; ID(divwu);
5179        	break;
5180              case 0x05:
5181        	rl78->syntax = "machu"; ID(machu);
5182        	break;
5183              case 0x06:
5184        	rl78->syntax = "mach"; ID(mach);
5185        	break;
5186              case 0x0b:
5187        	rl78->syntax = "divwu"; ID(divwu);
5188        	break;
5189              }
5190
5191        }
5192      break;
5193    case 0xcf:
5194        {
5195          /** 1100 1111			mov	%e!0, #%1			*/
5196          if (trace)
5197            {
5198              printf ("\033[33m%s\033[0m  %02x\n",
5199                     "/** 1100 1111			mov	%e!0, #%1			*/",
5200                     op[0]);
5201            }
5202          SYNTAX("mov	%e!0, #%1");
5203#line 615 "rl78-decode.opc"
5204          ID(mov); DM(None, IMMU(2)); SC(IMMU(1));
5205
5206        }
5207      break;
5208    case 0xd0:
5209    case 0xd1:
5210    case 0xd2:
5211    case 0xd3:
5212        {
5213          /** 1101 00rg			cmp0	%0				*/
5214#line 524 "rl78-decode.opc"
5215          int rg AU = op[0] & 0x03;
5216          if (trace)
5217            {
5218              printf ("\033[33m%s\033[0m  %02x\n",
5219                     "/** 1101 00rg			cmp0	%0				*/",
5220                     op[0]);
5221              printf ("  rg = 0x%x\n", rg);
5222            }
5223          SYNTAX("cmp0	%0");
5224#line 524 "rl78-decode.opc"
5225          ID(cmp); DRB(rg); SC(0); Fzac;
5226
5227        }
5228      break;
5229    case 0xd4:
5230        {
5231          /** 1101 0100			cmp0	%0				*/
5232          if (trace)
5233            {
5234              printf ("\033[33m%s\033[0m  %02x\n",
5235                     "/** 1101 0100			cmp0	%0				*/",
5236                     op[0]);
5237            }
5238          SYNTAX("cmp0	%0");
5239#line 527 "rl78-decode.opc"
5240          ID(cmp); DM(None, SADDR); SC(0); Fzac;
5241
5242        /*----------------------------------------------------------------------*/
5243
5244        }
5245      break;
5246    case 0xd5:
5247        {
5248          /** 1101 0101			cmp0	%e!0				*/
5249          if (trace)
5250            {
5251              printf ("\033[33m%s\033[0m  %02x\n",
5252                     "/** 1101 0101			cmp0	%e!0				*/",
5253                     op[0]);
5254            }
5255          SYNTAX("cmp0	%e!0");
5256#line 521 "rl78-decode.opc"
5257          ID(cmp); DM(None, IMMU(2)); SC(0); Fzac;
5258
5259        }
5260      break;
5261    case 0xd6:
5262        {
5263          /** 1101 0110			mulu	x				*/
5264          if (trace)
5265            {
5266              printf ("\033[33m%s\033[0m  %02x\n",
5267                     "/** 1101 0110			mulu	x				*/",
5268                     op[0]);
5269            }
5270          SYNTAX("mulu	x");
5271#line 912 "rl78-decode.opc"
5272          ID(mulu);
5273
5274        /*----------------------------------------------------------------------*/
5275
5276        }
5277      break;
5278    case 0xd7:
5279        {
5280          /** 1101 0111			ret					*/
5281          if (trace)
5282            {
5283              printf ("\033[33m%s\033[0m  %02x\n",
5284                     "/** 1101 0111			ret					*/",
5285                     op[0]);
5286            }
5287          SYNTAX("ret");
5288#line 1008 "rl78-decode.opc"
5289          ID(ret);
5290
5291        }
5292      break;
5293    case 0xd8:
5294        {
5295          /** 1101 1000			mov	%0, %1				*/
5296          if (trace)
5297            {
5298              printf ("\033[33m%s\033[0m  %02x\n",
5299                     "/** 1101 1000			mov	%0, %1				*/",
5300                     op[0]);
5301            }
5302          SYNTAX("mov	%0, %1");
5303#line 717 "rl78-decode.opc"
5304          ID(mov); DR(X); SM(None, SADDR);
5305
5306        }
5307      break;
5308    case 0xd9:
5309        {
5310          /** 1101 1001			mov	%0, %e!1			*/
5311          if (trace)
5312            {
5313              printf ("\033[33m%s\033[0m  %02x\n",
5314                     "/** 1101 1001			mov	%0, %e!1			*/",
5315                     op[0]);
5316            }
5317          SYNTAX("mov	%0, %e!1");
5318#line 714 "rl78-decode.opc"
5319          ID(mov); DR(X); SM(None, IMMU(2));
5320
5321        }
5322      break;
5323    case 0xda:
5324    case 0xea:
5325    case 0xfa:
5326        {
5327          /** 11ra 1010			movw	%0, %1				*/
5328#line 895 "rl78-decode.opc"
5329          int ra AU = (op[0] >> 4) & 0x03;
5330          if (trace)
5331            {
5332              printf ("\033[33m%s\033[0m  %02x\n",
5333                     "/** 11ra 1010			movw	%0, %1				*/",
5334                     op[0]);
5335              printf ("  ra = 0x%x\n", ra);
5336            }
5337          SYNTAX("movw	%0, %1");
5338#line 895 "rl78-decode.opc"
5339          ID(mov); W(); DRW(ra); SM(None, SADDR);
5340
5341        }
5342      break;
5343    case 0xdb:
5344    case 0xeb:
5345    case 0xfb:
5346        {
5347          /** 11ra 1011			movw	%0, %es!1			*/
5348#line 892 "rl78-decode.opc"
5349          int ra AU = (op[0] >> 4) & 0x03;
5350          if (trace)
5351            {
5352              printf ("\033[33m%s\033[0m  %02x\n",
5353                     "/** 11ra 1011			movw	%0, %es!1			*/",
5354                     op[0]);
5355              printf ("  ra = 0x%x\n", ra);
5356            }
5357          SYNTAX("movw	%0, %es!1");
5358#line 892 "rl78-decode.opc"
5359          ID(mov); W(); DRW(ra); SM(None, IMMU(2));
5360
5361        }
5362      break;
5363    case 0xdc:
5364        {
5365          /** 1101 1100			bc	$%a0				*/
5366          if (trace)
5367            {
5368              printf ("\033[33m%s\033[0m  %02x\n",
5369                     "/** 1101 1100			bc	$%a0				*/",
5370                     op[0]);
5371            }
5372          SYNTAX("bc	$%a0");
5373#line 340 "rl78-decode.opc"
5374          ID(branch_cond); DC(pc+IMMS(1)+2); SR(None); COND(C);
5375
5376        }
5377      break;
5378    case 0xdd:
5379        {
5380          /** 1101 1101			bz	$%a0				*/
5381          if (trace)
5382            {
5383              printf ("\033[33m%s\033[0m  %02x\n",
5384                     "/** 1101 1101			bz	$%a0				*/",
5385                     op[0]);
5386            }
5387          SYNTAX("bz	$%a0");
5388#line 352 "rl78-decode.opc"
5389          ID(branch_cond); DC(pc+IMMS(1)+2); SR(None); COND(Z);
5390
5391        }
5392      break;
5393    case 0xde:
5394        {
5395          /** 1101 1110			bnc	$%a0				*/
5396          if (trace)
5397            {
5398              printf ("\033[33m%s\033[0m  %02x\n",
5399                     "/** 1101 1110			bnc	$%a0				*/",
5400                     op[0]);
5401            }
5402          SYNTAX("bnc	$%a0");
5403#line 343 "rl78-decode.opc"
5404          ID(branch_cond); DC(pc+IMMS(1)+2); SR(None); COND(NC);
5405
5406        }
5407      break;
5408    case 0xdf:
5409        {
5410          /** 1101 1111			bnz	$%a0				*/
5411          if (trace)
5412            {
5413              printf ("\033[33m%s\033[0m  %02x\n",
5414                     "/** 1101 1111			bnz	$%a0				*/",
5415                     op[0]);
5416            }
5417          SYNTAX("bnz	$%a0");
5418#line 355 "rl78-decode.opc"
5419          ID(branch_cond); DC(pc+IMMS(1)+2); SR(None); COND(NZ);
5420
5421        /*----------------------------------------------------------------------*/
5422
5423        }
5424      break;
5425    case 0xe0:
5426    case 0xe1:
5427    case 0xe2:
5428    case 0xe3:
5429        {
5430          /** 1110 00rg			oneb	%0				*/
5431#line 930 "rl78-decode.opc"
5432          int rg AU = op[0] & 0x03;
5433          if (trace)
5434            {
5435              printf ("\033[33m%s\033[0m  %02x\n",
5436                     "/** 1110 00rg			oneb	%0				*/",
5437                     op[0]);
5438              printf ("  rg = 0x%x\n", rg);
5439            }
5440          SYNTAX("oneb	%0");
5441#line 930 "rl78-decode.opc"
5442          ID(mov); DRB(rg); SC(1);
5443
5444        }
5445      break;
5446    case 0xe4:
5447        {
5448          /** 1110 0100			oneb	%0				*/
5449          if (trace)
5450            {
5451              printf ("\033[33m%s\033[0m  %02x\n",
5452                     "/** 1110 0100			oneb	%0				*/",
5453                     op[0]);
5454            }
5455          SYNTAX("oneb	%0");
5456#line 933 "rl78-decode.opc"
5457          ID(mov); DM(None, SADDR); SC(1);
5458
5459        /*----------------------------------------------------------------------*/
5460
5461        }
5462      break;
5463    case 0xe5:
5464        {
5465          /** 1110 0101			oneb	%e!0				*/
5466          if (trace)
5467            {
5468              printf ("\033[33m%s\033[0m  %02x\n",
5469                     "/** 1110 0101			oneb	%e!0				*/",
5470                     op[0]);
5471            }
5472          SYNTAX("oneb	%e!0");
5473#line 927 "rl78-decode.opc"
5474          ID(mov); DM(None, IMMU(2)); SC(1);
5475
5476        }
5477      break;
5478    case 0xe6:
5479        {
5480          /** 1110 0110			onew	%0				*/
5481          if (trace)
5482            {
5483              printf ("\033[33m%s\033[0m  %02x\n",
5484                     "/** 1110 0110			onew	%0				*/",
5485                     op[0]);
5486            }
5487          SYNTAX("onew	%0");
5488#line 938 "rl78-decode.opc"
5489          ID(mov); DR(AX); SC(1);
5490
5491        }
5492      break;
5493    case 0xe7:
5494        {
5495          /** 1110 0111			onew	%0				*/
5496          if (trace)
5497            {
5498              printf ("\033[33m%s\033[0m  %02x\n",
5499                     "/** 1110 0111			onew	%0				*/",
5500                     op[0]);
5501            }
5502          SYNTAX("onew	%0");
5503#line 941 "rl78-decode.opc"
5504          ID(mov); DR(BC); SC(1);
5505
5506        /*----------------------------------------------------------------------*/
5507
5508        }
5509      break;
5510    case 0xe8:
5511        {
5512          /** 1110 1000			mov	%0, %1				*/
5513          if (trace)
5514            {
5515              printf ("\033[33m%s\033[0m  %02x\n",
5516                     "/** 1110 1000			mov	%0, %1				*/",
5517                     op[0]);
5518            }
5519          SYNTAX("mov	%0, %1");
5520#line 705 "rl78-decode.opc"
5521          ID(mov); DR(B); SM(None, SADDR);
5522
5523        }
5524      break;
5525    case 0xe9:
5526        {
5527          /** 1110 1001			mov	%0, %e!1			*/
5528          if (trace)
5529            {
5530              printf ("\033[33m%s\033[0m  %02x\n",
5531                     "/** 1110 1001			mov	%0, %e!1			*/",
5532                     op[0]);
5533            }
5534          SYNTAX("mov	%0, %e!1");
5535#line 699 "rl78-decode.opc"
5536          ID(mov); DR(B); SM(None, IMMU(2));
5537
5538        }
5539      break;
5540    case 0xec:
5541        {
5542          /** 1110 1100			br	!%!a0				*/
5543          if (trace)
5544            {
5545              printf ("\033[33m%s\033[0m  %02x\n",
5546                     "/** 1110 1100			br	!%!a0				*/",
5547                     op[0]);
5548            }
5549          SYNTAX("br	!%!a0");
5550#line 374 "rl78-decode.opc"
5551          ID(branch); DC(IMMU(3));
5552
5553        }
5554      break;
5555    case 0xed:
5556        {
5557          /** 1110 1101			br	%!a0				*/
5558          if (trace)
5559            {
5560              printf ("\033[33m%s\033[0m  %02x\n",
5561                     "/** 1110 1101			br	%!a0				*/",
5562                     op[0]);
5563            }
5564          SYNTAX("br	%!a0");
5565#line 377 "rl78-decode.opc"
5566          ID(branch); DC(IMMU(2));
5567
5568        }
5569      break;
5570    case 0xee:
5571        {
5572          /** 1110 1110			br	$%!a0				*/
5573          if (trace)
5574            {
5575              printf ("\033[33m%s\033[0m  %02x\n",
5576                     "/** 1110 1110			br	$%!a0				*/",
5577                     op[0]);
5578            }
5579          SYNTAX("br	$%!a0");
5580#line 380 "rl78-decode.opc"
5581          ID(branch); DC(pc+IMMS(2)+3);
5582
5583        }
5584      break;
5585    case 0xef:
5586        {
5587          /** 1110 1111			br	$%a0				*/
5588          if (trace)
5589            {
5590              printf ("\033[33m%s\033[0m  %02x\n",
5591                     "/** 1110 1111			br	$%a0				*/",
5592                     op[0]);
5593            }
5594          SYNTAX("br	$%a0");
5595#line 383 "rl78-decode.opc"
5596          ID(branch); DC(pc+IMMS(1)+2);
5597
5598        }
5599      break;
5600    case 0xf0:
5601    case 0xf1:
5602    case 0xf2:
5603    case 0xf3:
5604        {
5605          /** 1111 00rg			clrb	%0				*/
5606#line 470 "rl78-decode.opc"
5607          int rg AU = op[0] & 0x03;
5608          if (trace)
5609            {
5610              printf ("\033[33m%s\033[0m  %02x\n",
5611                     "/** 1111 00rg			clrb	%0				*/",
5612                     op[0]);
5613              printf ("  rg = 0x%x\n", rg);
5614            }
5615          SYNTAX("clrb	%0");
5616#line 470 "rl78-decode.opc"
5617          ID(mov); DRB(rg); SC(0);
5618
5619        }
5620      break;
5621    case 0xf4:
5622        {
5623          /** 1111 0100			clrb	%0				*/
5624          if (trace)
5625            {
5626              printf ("\033[33m%s\033[0m  %02x\n",
5627                     "/** 1111 0100			clrb	%0				*/",
5628                     op[0]);
5629            }
5630          SYNTAX("clrb	%0");
5631#line 473 "rl78-decode.opc"
5632          ID(mov); DM(None, SADDR); SC(0);
5633
5634        /*----------------------------------------------------------------------*/
5635
5636        }
5637      break;
5638    case 0xf5:
5639        {
5640          /** 1111 0101			clrb	%e!0				*/
5641          if (trace)
5642            {
5643              printf ("\033[33m%s\033[0m  %02x\n",
5644                     "/** 1111 0101			clrb	%e!0				*/",
5645                     op[0]);
5646            }
5647          SYNTAX("clrb	%e!0");
5648#line 467 "rl78-decode.opc"
5649          ID(mov); DM(None, IMMU(2)); SC(0);
5650
5651        }
5652      break;
5653    case 0xf6:
5654        {
5655          /** 1111 0110			clrw	%0				*/
5656          if (trace)
5657            {
5658              printf ("\033[33m%s\033[0m  %02x\n",
5659                     "/** 1111 0110			clrw	%0				*/",
5660                     op[0]);
5661            }
5662          SYNTAX("clrw	%0");
5663#line 478 "rl78-decode.opc"
5664          ID(mov); DR(AX); SC(0);
5665
5666        }
5667      break;
5668    case 0xf7:
5669        {
5670          /** 1111 0111			clrw	%0				*/
5671          if (trace)
5672            {
5673              printf ("\033[33m%s\033[0m  %02x\n",
5674                     "/** 1111 0111			clrw	%0				*/",
5675                     op[0]);
5676            }
5677          SYNTAX("clrw	%0");
5678#line 481 "rl78-decode.opc"
5679          ID(mov); DR(BC); SC(0);
5680
5681        /*----------------------------------------------------------------------*/
5682
5683        }
5684      break;
5685    case 0xf8:
5686        {
5687          /** 1111 1000			mov	%0, %1				*/
5688          if (trace)
5689            {
5690              printf ("\033[33m%s\033[0m  %02x\n",
5691                     "/** 1111 1000			mov	%0, %1				*/",
5692                     op[0]);
5693            }
5694          SYNTAX("mov	%0, %1");
5695#line 711 "rl78-decode.opc"
5696          ID(mov); DR(C); SM(None, SADDR);
5697
5698        }
5699      break;
5700    case 0xf9:
5701        {
5702          /** 1111 1001			mov	%0, %e!1			*/
5703          if (trace)
5704            {
5705              printf ("\033[33m%s\033[0m  %02x\n",
5706                     "/** 1111 1001			mov	%0, %e!1			*/",
5707                     op[0]);
5708            }
5709          SYNTAX("mov	%0, %e!1");
5710#line 708 "rl78-decode.opc"
5711          ID(mov); DR(C); SM(None, IMMU(2));
5712
5713        }
5714      break;
5715    case 0xfc:
5716        {
5717          /** 1111 1100			call	!%!a0				*/
5718          if (trace)
5719            {
5720              printf ("\033[33m%s\033[0m  %02x\n",
5721                     "/** 1111 1100			call	!%!a0				*/",
5722                     op[0]);
5723            }
5724          SYNTAX("call	!%!a0");
5725#line 427 "rl78-decode.opc"
5726          ID(call); DC(IMMU(3));
5727
5728        }
5729      break;
5730    case 0xfd:
5731        {
5732          /** 1111 1101			call	%!a0				*/
5733          if (trace)
5734            {
5735              printf ("\033[33m%s\033[0m  %02x\n",
5736                     "/** 1111 1101			call	%!a0				*/",
5737                     op[0]);
5738            }
5739          SYNTAX("call	%!a0");
5740#line 430 "rl78-decode.opc"
5741          ID(call); DC(IMMU(2));
5742
5743        }
5744      break;
5745    case 0xfe:
5746        {
5747          /** 1111 1110			call	$%!a0				*/
5748          if (trace)
5749            {
5750              printf ("\033[33m%s\033[0m  %02x\n",
5751                     "/** 1111 1110			call	$%!a0				*/",
5752                     op[0]);
5753            }
5754          SYNTAX("call	$%!a0");
5755#line 433 "rl78-decode.opc"
5756          ID(call); DC(pc+IMMS(2)+3);
5757
5758        }
5759      break;
5760    case 0xff:
5761        {
5762          /** 1111 1111			brk1					*/
5763          if (trace)
5764            {
5765              printf ("\033[33m%s\033[0m  %02x\n",
5766                     "/** 1111 1111			brk1					*/",
5767                     op[0]);
5768            }
5769          SYNTAX("brk1");
5770#line 391 "rl78-decode.opc"
5771          ID(break);
5772
5773        }
5774      break;
5775  }
5776#line 1296 "rl78-decode.opc"
5777
5778  return rl78->n_bytes;
5779}
5780