rl78-decode.c revision 1.1.1.2
1#line 1 "rl78-decode.opc"
2/* -*- c -*- */
3/* Copyright (C) 2012-2015 Free Software Foundation, Inc.
4   Contributed by Red Hat.
5   Written by DJ Delorie.
6
7   This file is part of the GNU opcodes library.
8
9   This library is free software; you can redistribute it and/or modify
10   it under the terms of the GNU General Public License as published by
11   the Free Software Foundation; either version 3, or (at your option)
12   any later version.
13
14   It is distributed in the hope that it will be useful, but WITHOUT
15   ANY WARRANTY; without even the implied warranty of MERCHANTABILITY
16   or FITNESS FOR A PARTICULAR PURPOSE.  See the GNU General Public
17   License for more details.
18
19   You should have received a copy of the GNU General Public License
20   along with this program; if not, write to the Free Software
21   Foundation, Inc., 51 Franklin Street - Fifth Floor, Boston,
22   MA 02110-1301, USA.  */
23
24#include "sysdep.h"
25#include <stdio.h>
26#include <stdlib.h>
27#include <string.h>
28#include "ansidecl.h"
29#include "opcode/rl78.h"
30
31static int trace = 0;
32
33typedef struct
34{
35  RL78_Opcode_Decoded * rl78;
36  int (* getbyte)(void *);
37  void * ptr;
38  unsigned char * op;
39} LocalData;
40
41#define ID(x) rl78->id = RLO_##x, rl78->lineno = __LINE__
42#define OP(n,t,r,a) (rl78->op[n].type = t, \
43		     rl78->op[n].reg = r,	     \
44		     rl78->op[n].addend = a )
45#define OPX(n,t,r1,r2,a) \
46	(rl78->op[n].type = t, \
47	rl78->op[n].reg = r1, \
48	rl78->op[n].reg2 = r2, \
49	rl78->op[n].addend = a )
50
51#define W() rl78->size = RL78_Word
52
53#define AU ATTRIBUTE_UNUSED
54#define GETBYTE() (ld->op [ld->rl78->n_bytes++] = ld->getbyte (ld->ptr))
55#define B ((unsigned long) GETBYTE())
56
57#define SYNTAX(x) rl78->syntax = x
58
59#define UNSUPPORTED() \
60  rl78->syntax = "*unknown*"
61
62#define RB(x) ((x)+RL78_Reg_X)
63#define RW(x) ((x)+RL78_Reg_AX)
64
65#define Fz	rl78->flags = RL78_PSW_Z
66#define Fza	rl78->flags = RL78_PSW_Z | RL78_PSW_AC
67#define Fzc	rl78->flags = RL78_PSW_Z | RL78_PSW_CY
68#define Fzac	rl78->flags = RL78_PSW_Z | RL78_PSW_AC | RL78_PSW_CY
69#define Fa	rl78->flags = RL78_PSW_AC
70#define Fc	rl78->flags = RL78_PSW_CY
71#define Fac	rl78->flags = RL78_PSW_AC | RL78_PSW_CY
72
73#define IMMU(bytes)   immediate (bytes, 0, ld)
74#define IMMS(bytes)   immediate (bytes, 1, ld)
75
76static int
77immediate (int bytes, int sign_extend, LocalData * ld)
78{
79  unsigned long i = 0;
80
81  switch (bytes)
82    {
83    case 1:
84      i |= B;
85      if (sign_extend && (i & 0x80))
86	i -= 0x100;
87      break;
88    case 2:
89      i |= B;
90      i |= B << 8;
91      if (sign_extend && (i & 0x8000))
92	i -= 0x10000;
93      break;
94    case 3:
95      i |= B;
96      i |= B << 8;
97      i |= B << 16;
98      if (sign_extend && (i & 0x800000))
99	i -= 0x1000000;
100      break;
101    default:
102      fprintf (stderr, "Programmer error: immediate() called with invalid byte count %d\n", bytes);
103      abort();
104    }
105  return i;
106}
107
108#define DC(c)		OP (0, RL78_Operand_Immediate, 0, c)
109#define DR(r)		OP (0, RL78_Operand_Register, RL78_Reg_##r, 0)
110#define DRB(r)		OP (0, RL78_Operand_Register, RB(r), 0)
111#define DRW(r)		OP (0, RL78_Operand_Register, RW(r), 0)
112#define DM(r,a)		OP (0, RL78_Operand_Indirect, RL78_Reg_##r, a)
113#define DM2(r1,r2,a)	OPX (0, RL78_Operand_Indirect, RL78_Reg_##r1, RL78_Reg_##r2, a)
114#define DE()		rl78->op[0].use_es = 1
115#define DB(b)		set_bit (rl78->op, b)
116#define DCY()		DR(PSW); DB(0)
117#define DPUSH()		OP (0, RL78_Operand_PreDec, RL78_Reg_SP, 0);
118
119#define SC(c)		OP (1, RL78_Operand_Immediate, 0, c)
120#define SR(r)		OP (1, RL78_Operand_Register, RL78_Reg_##r, 0)
121#define SRB(r)		OP (1, RL78_Operand_Register, RB(r), 0)
122#define SRW(r)		OP (1, RL78_Operand_Register, RW(r), 0)
123#define SM(r,a)		OP (1, RL78_Operand_Indirect, RL78_Reg_##r, a)
124#define SM2(r1,r2,a)	OPX (1, RL78_Operand_Indirect, RL78_Reg_##r1, RL78_Reg_##r2, a)
125#define SE()		rl78->op[1].use_es = 1
126#define SB(b)		set_bit (rl78->op+1, b)
127#define SCY()		SR(PSW); SB(0)
128#define COND(c)		rl78->op[1].condition = RL78_Condition_##c
129#define SPOP()		OP (1, RL78_Operand_PostInc, RL78_Reg_SP, 0);
130
131static void
132set_bit (RL78_Opcode_Operand *op, int bit)
133{
134  op->bit_number = bit;
135  switch (op->type) {
136  case RL78_Operand_Register:
137    op->type = RL78_Operand_Bit;
138    break;
139  case RL78_Operand_Indirect:
140    op->type = RL78_Operand_BitIndirect;
141    break;
142  default:
143    break;
144  }
145}
146
147static int
148saddr (int x)
149{
150  if (x < 0x20)
151    return 0xfff00 + x;
152  return 0xffe00 + x;
153}
154
155static int
156sfr (int x)
157{
158  return 0xfff00 + x;
159}
160
161#define SADDR saddr (IMMU (1))
162#define SFR sfr (IMMU (1))
163
164int
165rl78_decode_opcode (unsigned long pc AU,
166		  RL78_Opcode_Decoded * rl78,
167		  int (* getbyte)(void *),
168		  void * ptr)
169{
170  LocalData lds, * ld = &lds;
171  unsigned char op_buf[20] = {0};
172  unsigned char *op = op_buf;
173  int op0, op1;
174
175  lds.rl78 = rl78;
176  lds.getbyte = getbyte;
177  lds.ptr = ptr;
178  lds.op = op;
179
180  memset (rl78, 0, sizeof (*rl78));
181
182 start_again:
183
184/* Byte registers, not including A.  */
185/* Word registers, not including AX.  */
186
187/*----------------------------------------------------------------------*/
188/* ES: prefix								*/
189
190  GETBYTE ();
191  switch (op[0] & 0xff)
192  {
193    case 0x00:
194        {
195          /** 0000 0000			nop					*/
196          if (trace)
197            {
198              printf ("\033[33m%s\033[0m  %02x\n",
199                     "/** 0000 0000			nop					*/",
200                     op[0]);
201            }
202          SYNTAX("nop");
203#line 910 "rl78-decode.opc"
204          ID(nop);
205
206        /*----------------------------------------------------------------------*/
207
208        }
209      break;
210    case 0x01:
211    case 0x03:
212    case 0x05:
213    case 0x07:
214        {
215          /** 0000 0rw1			addw	%0, %1				*/
216#line 273 "rl78-decode.opc"
217          int rw AU = (op[0] >> 1) & 0x03;
218          if (trace)
219            {
220              printf ("\033[33m%s\033[0m  %02x\n",
221                     "/** 0000 0rw1			addw	%0, %1				*/",
222                     op[0]);
223              printf ("  rw = 0x%x\n", rw);
224            }
225          SYNTAX("addw	%0, %1");
226#line 273 "rl78-decode.opc"
227          ID(add); W(); DR(AX); SRW(rw); Fzac;
228
229        }
230      break;
231    case 0x02:
232        {
233          /** 0000 0010			addw	%0, %e!1			*/
234          if (trace)
235            {
236              printf ("\033[33m%s\033[0m  %02x\n",
237                     "/** 0000 0010			addw	%0, %e!1			*/",
238                     op[0]);
239            }
240          SYNTAX("addw	%0, %e!1");
241#line 264 "rl78-decode.opc"
242          ID(add); W(); DR(AX); SM(None, IMMU(2)); Fzac;
243
244        }
245      break;
246    case 0x04:
247        {
248          /** 0000 0100			addw	%0, #%1				*/
249          if (trace)
250            {
251              printf ("\033[33m%s\033[0m  %02x\n",
252                     "/** 0000 0100			addw	%0, #%1				*/",
253                     op[0]);
254            }
255          SYNTAX("addw	%0, #%1");
256#line 270 "rl78-decode.opc"
257          ID(add); W(); DR(AX); SC(IMMU(2)); Fzac;
258
259        }
260      break;
261    case 0x06:
262        {
263          /** 0000 0110			addw	%0, %1				*/
264          if (trace)
265            {
266              printf ("\033[33m%s\033[0m  %02x\n",
267                     "/** 0000 0110			addw	%0, %1				*/",
268                     op[0]);
269            }
270          SYNTAX("addw	%0, %1");
271#line 276 "rl78-decode.opc"
272          ID(add); W(); DR(AX); SM(None, SADDR); Fzac;
273
274        }
275      break;
276    case 0x08:
277        {
278          /** 0000 1000			xch	a, x				*/
279          if (trace)
280            {
281              printf ("\033[33m%s\033[0m  %02x\n",
282                     "/** 0000 1000			xch	a, x				*/",
283                     op[0]);
284            }
285          SYNTAX("xch	a, x");
286#line 1233 "rl78-decode.opc"
287          ID(xch); DR(A); SR(X);
288
289        /*----------------------------------------------------------------------*/
290
291        }
292      break;
293    case 0x09:
294        {
295          /** 0000 1001			mov	%0, %e1				*/
296          if (trace)
297            {
298              printf ("\033[33m%s\033[0m  %02x\n",
299                     "/** 0000 1001			mov	%0, %e1				*/",
300                     op[0]);
301            }
302          SYNTAX("mov	%0, %e1");
303#line 677 "rl78-decode.opc"
304          ID(mov); DR(A); SM(B, IMMU(2));
305
306        }
307      break;
308    case 0x0a:
309        {
310          /** 0000 1010			add	%0, #%1				*/
311          if (trace)
312            {
313              printf ("\033[33m%s\033[0m  %02x\n",
314                     "/** 0000 1010			add	%0, #%1				*/",
315                     op[0]);
316            }
317          SYNTAX("add	%0, #%1");
318#line 227 "rl78-decode.opc"
319          ID(add); DM(None, SADDR); SC(IMMU(1)); Fzac;
320
321        /*----------------------------------------------------------------------*/
322
323        }
324      break;
325    case 0x0b:
326        {
327          /** 0000 1011			add	%0, %1				*/
328          if (trace)
329            {
330              printf ("\033[33m%s\033[0m  %02x\n",
331                     "/** 0000 1011			add	%0, %1				*/",
332                     op[0]);
333            }
334          SYNTAX("add	%0, %1");
335#line 221 "rl78-decode.opc"
336          ID(add); DR(A); SM(None, SADDR); Fzac;
337
338        }
339      break;
340    case 0x0c:
341        {
342          /** 0000 1100			add	%0, #%1				*/
343          if (trace)
344            {
345              printf ("\033[33m%s\033[0m  %02x\n",
346                     "/** 0000 1100			add	%0, #%1				*/",
347                     op[0]);
348            }
349          SYNTAX("add	%0, #%1");
350#line 215 "rl78-decode.opc"
351          ID(add); DR(A); SC(IMMU(1)); Fzac;
352
353        }
354      break;
355    case 0x0d:
356        {
357          /** 0000 1101			add	%0, %e1				*/
358          if (trace)
359            {
360              printf ("\033[33m%s\033[0m  %02x\n",
361                     "/** 0000 1101			add	%0, %e1				*/",
362                     op[0]);
363            }
364          SYNTAX("add	%0, %e1");
365#line 203 "rl78-decode.opc"
366          ID(add); DR(A); SM(HL, 0); Fzac;
367
368        }
369      break;
370    case 0x0e:
371        {
372          /** 0000 1110			add	%0, %e1				*/
373          if (trace)
374            {
375              printf ("\033[33m%s\033[0m  %02x\n",
376                     "/** 0000 1110			add	%0, %e1				*/",
377                     op[0]);
378            }
379          SYNTAX("add	%0, %e1");
380#line 209 "rl78-decode.opc"
381          ID(add); DR(A); SM(HL, IMMU(1)); Fzac;
382
383        }
384      break;
385    case 0x0f:
386        {
387          /** 0000 1111			add	%0, %e!1			*/
388          if (trace)
389            {
390              printf ("\033[33m%s\033[0m  %02x\n",
391                     "/** 0000 1111			add	%0, %e!1			*/",
392                     op[0]);
393            }
394          SYNTAX("add	%0, %e!1");
395#line 200 "rl78-decode.opc"
396          ID(add); DR(A); SM(None, IMMU(2)); Fzac;
397
398        }
399      break;
400    case 0x10:
401        {
402          /** 0001 0000			addw	%0, #%1				*/
403          if (trace)
404            {
405              printf ("\033[33m%s\033[0m  %02x\n",
406                     "/** 0001 0000			addw	%0, #%1				*/",
407                     op[0]);
408            }
409          SYNTAX("addw	%0, #%1");
410#line 279 "rl78-decode.opc"
411          ID(add); W(); DR(SP); SC(IMMU(1)); Fzac;
412
413        /*----------------------------------------------------------------------*/
414
415        }
416      break;
417    case 0x11:
418        {
419          /** 0001 0001			es:					*/
420          if (trace)
421            {
422              printf ("\033[33m%s\033[0m  %02x\n",
423                     "/** 0001 0001			es:					*/",
424                     op[0]);
425            }
426          SYNTAX("es:");
427#line 192 "rl78-decode.opc"
428          DE(); SE();
429          op ++;
430          pc ++;
431          goto start_again;
432
433        /*----------------------------------------------------------------------*/
434
435        }
436      break;
437    case 0x12:
438    case 0x14:
439    case 0x16:
440        {
441          /** 0001 0ra0			movw	%0, %1				*/
442#line 858 "rl78-decode.opc"
443          int ra AU = (op[0] >> 1) & 0x03;
444          if (trace)
445            {
446              printf ("\033[33m%s\033[0m  %02x\n",
447                     "/** 0001 0ra0			movw	%0, %1				*/",
448                     op[0]);
449              printf ("  ra = 0x%x\n", ra);
450            }
451          SYNTAX("movw	%0, %1");
452#line 858 "rl78-decode.opc"
453          ID(mov); W(); DRW(ra); SR(AX);
454
455        }
456      break;
457    case 0x13:
458    case 0x15:
459    case 0x17:
460        {
461          /** 0001 0ra1			movw	%0, %1				*/
462#line 855 "rl78-decode.opc"
463          int ra AU = (op[0] >> 1) & 0x03;
464          if (trace)
465            {
466              printf ("\033[33m%s\033[0m  %02x\n",
467                     "/** 0001 0ra1			movw	%0, %1				*/",
468                     op[0]);
469              printf ("  ra = 0x%x\n", ra);
470            }
471          SYNTAX("movw	%0, %1");
472#line 855 "rl78-decode.opc"
473          ID(mov); W(); DR(AX); SRW(ra);
474
475        }
476      break;
477    case 0x18:
478        {
479          /** 0001 1000			mov	%e0, %1				*/
480          if (trace)
481            {
482              printf ("\033[33m%s\033[0m  %02x\n",
483                     "/** 0001 1000			mov	%e0, %1				*/",
484                     op[0]);
485            }
486          SYNTAX("mov	%e0, %1");
487#line 728 "rl78-decode.opc"
488          ID(mov); DM(B, IMMU(2)); SR(A);
489
490        }
491      break;
492    case 0x19:
493        {
494          /** 0001 1001			mov	%e0, #%1			*/
495          if (trace)
496            {
497              printf ("\033[33m%s\033[0m  %02x\n",
498                     "/** 0001 1001			mov	%e0, #%1			*/",
499                     op[0]);
500            }
501          SYNTAX("mov	%e0, #%1");
502#line 725 "rl78-decode.opc"
503          ID(mov); DM(B, IMMU(2)); SC(IMMU(1));
504
505        }
506      break;
507    case 0x1a:
508        {
509          /** 0001 1010			addc	%0, #%1				*/
510          if (trace)
511            {
512              printf ("\033[33m%s\033[0m  %02x\n",
513                     "/** 0001 1010			addc	%0, #%1				*/",
514                     op[0]);
515            }
516          SYNTAX("addc	%0, #%1");
517#line 259 "rl78-decode.opc"
518          ID(addc); DM(None, SADDR); SC(IMMU(1)); Fzac;
519
520        /*----------------------------------------------------------------------*/
521
522        }
523      break;
524    case 0x1b:
525        {
526          /** 0001 1011			addc	%0, %1				*/
527          if (trace)
528            {
529              printf ("\033[33m%s\033[0m  %02x\n",
530                     "/** 0001 1011			addc	%0, %1				*/",
531                     op[0]);
532            }
533          SYNTAX("addc	%0, %1");
534#line 256 "rl78-decode.opc"
535          ID(addc); DR(A); SM(None, SADDR); Fzac;
536
537        }
538      break;
539    case 0x1c:
540        {
541          /** 0001 1100			addc	%0, #%1				*/
542          if (trace)
543            {
544              printf ("\033[33m%s\033[0m  %02x\n",
545                     "/** 0001 1100			addc	%0, #%1				*/",
546                     op[0]);
547            }
548          SYNTAX("addc	%0, #%1");
549#line 247 "rl78-decode.opc"
550          ID(addc); DR(A); SC(IMMU(1)); Fzac;
551
552        }
553      break;
554    case 0x1d:
555        {
556          /** 0001 1101			addc	%0, %e1				*/
557          if (trace)
558            {
559              printf ("\033[33m%s\033[0m  %02x\n",
560                     "/** 0001 1101			addc	%0, %e1				*/",
561                     op[0]);
562            }
563          SYNTAX("addc	%0, %e1");
564#line 235 "rl78-decode.opc"
565          ID(addc); DR(A); SM(HL, 0); Fzac;
566
567        }
568      break;
569    case 0x1e:
570        {
571          /** 0001 1110			addc	%0, %e1				*/
572          if (trace)
573            {
574              printf ("\033[33m%s\033[0m  %02x\n",
575                     "/** 0001 1110			addc	%0, %e1				*/",
576                     op[0]);
577            }
578          SYNTAX("addc	%0, %e1");
579#line 244 "rl78-decode.opc"
580          ID(addc); DR(A); SM(HL, IMMU(1)); Fzac;
581
582        }
583      break;
584    case 0x1f:
585        {
586          /** 0001 1111			addc	%0, %e!1			*/
587          if (trace)
588            {
589              printf ("\033[33m%s\033[0m  %02x\n",
590                     "/** 0001 1111			addc	%0, %e!1			*/",
591                     op[0]);
592            }
593          SYNTAX("addc	%0, %e!1");
594#line 232 "rl78-decode.opc"
595          ID(addc); DR(A); SM(None, IMMU(2)); Fzac;
596
597        }
598      break;
599    case 0x20:
600        {
601          /** 0010 0000			subw	%0, #%1				*/
602          if (trace)
603            {
604              printf ("\033[33m%s\033[0m  %02x\n",
605                     "/** 0010 0000			subw	%0, #%1				*/",
606                     op[0]);
607            }
608          SYNTAX("subw	%0, #%1");
609#line 1197 "rl78-decode.opc"
610          ID(sub); W(); DR(SP); SC(IMMU(1)); Fzac;
611
612        /*----------------------------------------------------------------------*/
613
614        }
615      break;
616    case 0x21:
617    case 0x23:
618    case 0x25:
619    case 0x27:
620        {
621          /** 0010 0rw1			subw	%0, %1				*/
622#line 1191 "rl78-decode.opc"
623          int rw AU = (op[0] >> 1) & 0x03;
624          if (trace)
625            {
626              printf ("\033[33m%s\033[0m  %02x\n",
627                     "/** 0010 0rw1			subw	%0, %1				*/",
628                     op[0]);
629              printf ("  rw = 0x%x\n", rw);
630            }
631          SYNTAX("subw	%0, %1");
632#line 1191 "rl78-decode.opc"
633          ID(sub); W(); DR(AX); SRW(rw); Fzac;
634
635        }
636      break;
637    case 0x22:
638        {
639          /** 0010 0010			subw	%0, %e!1			*/
640          if (trace)
641            {
642              printf ("\033[33m%s\033[0m  %02x\n",
643                     "/** 0010 0010			subw	%0, %e!1			*/",
644                     op[0]);
645            }
646          SYNTAX("subw	%0, %e!1");
647#line 1182 "rl78-decode.opc"
648          ID(sub); W(); DR(AX); SM(None, IMMU(2)); Fzac;
649
650        }
651      break;
652    case 0x24:
653        {
654          /** 0010 0100			subw	%0, #%1				*/
655          if (trace)
656            {
657              printf ("\033[33m%s\033[0m  %02x\n",
658                     "/** 0010 0100			subw	%0, #%1				*/",
659                     op[0]);
660            }
661          SYNTAX("subw	%0, #%1");
662#line 1188 "rl78-decode.opc"
663          ID(sub); W(); DR(AX); SC(IMMU(2)); Fzac;
664
665        }
666      break;
667    case 0x26:
668        {
669          /** 0010 0110			subw	%0, %1				*/
670          if (trace)
671            {
672              printf ("\033[33m%s\033[0m  %02x\n",
673                     "/** 0010 0110			subw	%0, %1				*/",
674                     op[0]);
675            }
676          SYNTAX("subw	%0, %1");
677#line 1194 "rl78-decode.opc"
678          ID(sub); W(); DR(AX); SM(None, SADDR); Fzac;
679
680        }
681      break;
682    case 0x28:
683        {
684          /** 0010 1000			mov	%e0, %1				*/
685          if (trace)
686            {
687              printf ("\033[33m%s\033[0m  %02x\n",
688                     "/** 0010 1000			mov	%e0, %1				*/",
689                     op[0]);
690            }
691          SYNTAX("mov	%e0, %1");
692#line 740 "rl78-decode.opc"
693          ID(mov); DM(C, IMMU(2)); SR(A);
694
695        }
696      break;
697    case 0x29:
698        {
699          /** 0010 1001			mov	%0, %e1				*/
700          if (trace)
701            {
702              printf ("\033[33m%s\033[0m  %02x\n",
703                     "/** 0010 1001			mov	%0, %e1				*/",
704                     op[0]);
705            }
706          SYNTAX("mov	%0, %e1");
707#line 683 "rl78-decode.opc"
708          ID(mov); DR(A); SM(C, IMMU(2));
709
710        }
711      break;
712    case 0x2a:
713        {
714          /** 0010 1010			sub	%0, #%1				*/
715          if (trace)
716            {
717              printf ("\033[33m%s\033[0m  %02x\n",
718                     "/** 0010 1010			sub	%0, #%1				*/",
719                     op[0]);
720            }
721          SYNTAX("sub	%0, #%1");
722#line 1145 "rl78-decode.opc"
723          ID(sub); DM(None, SADDR); SC(IMMU(1)); Fzac;
724
725        /*----------------------------------------------------------------------*/
726
727        }
728      break;
729    case 0x2b:
730        {
731          /** 0010 1011			sub	%0, %1				*/
732          if (trace)
733            {
734              printf ("\033[33m%s\033[0m  %02x\n",
735                     "/** 0010 1011			sub	%0, %1				*/",
736                     op[0]);
737            }
738          SYNTAX("sub	%0, %1");
739#line 1139 "rl78-decode.opc"
740          ID(sub); DR(A); SM(None, SADDR); Fzac;
741
742        }
743      break;
744    case 0x2c:
745        {
746          /** 0010 1100			sub	%0, #%1				*/
747          if (trace)
748            {
749              printf ("\033[33m%s\033[0m  %02x\n",
750                     "/** 0010 1100			sub	%0, #%1				*/",
751                     op[0]);
752            }
753          SYNTAX("sub	%0, #%1");
754#line 1133 "rl78-decode.opc"
755          ID(sub); DR(A); SC(IMMU(1)); Fzac;
756
757        }
758      break;
759    case 0x2d:
760        {
761          /** 0010 1101			sub	%0, %e1				*/
762          if (trace)
763            {
764              printf ("\033[33m%s\033[0m  %02x\n",
765                     "/** 0010 1101			sub	%0, %e1				*/",
766                     op[0]);
767            }
768          SYNTAX("sub	%0, %e1");
769#line 1121 "rl78-decode.opc"
770          ID(sub); DR(A); SM(HL, 0); Fzac;
771
772        }
773      break;
774    case 0x2e:
775        {
776          /** 0010 1110			sub	%0, %e1				*/
777          if (trace)
778            {
779              printf ("\033[33m%s\033[0m  %02x\n",
780                     "/** 0010 1110			sub	%0, %e1				*/",
781                     op[0]);
782            }
783          SYNTAX("sub	%0, %e1");
784#line 1127 "rl78-decode.opc"
785          ID(sub); DR(A); SM(HL, IMMU(1)); Fzac;
786
787        }
788      break;
789    case 0x2f:
790        {
791          /** 0010 1111			sub	%0, %e!1			*/
792          if (trace)
793            {
794              printf ("\033[33m%s\033[0m  %02x\n",
795                     "/** 0010 1111			sub	%0, %e!1			*/",
796                     op[0]);
797            }
798          SYNTAX("sub	%0, %e!1");
799#line 1118 "rl78-decode.opc"
800          ID(sub); DR(A); SM(None, IMMU(2)); Fzac;
801
802        }
803      break;
804    case 0x30:
805    case 0x32:
806    case 0x34:
807    case 0x36:
808        {
809          /** 0011 0rg0			movw	%0, #%1				*/
810#line 852 "rl78-decode.opc"
811          int rg AU = (op[0] >> 1) & 0x03;
812          if (trace)
813            {
814              printf ("\033[33m%s\033[0m  %02x\n",
815                     "/** 0011 0rg0			movw	%0, #%1				*/",
816                     op[0]);
817              printf ("  rg = 0x%x\n", rg);
818            }
819          SYNTAX("movw	%0, #%1");
820#line 852 "rl78-decode.opc"
821          ID(mov); W(); DRW(rg); SC(IMMU(2));
822
823        }
824      break;
825    case 0x31:
826        GETBYTE ();
827        switch (op[1] & 0x8f)
828        {
829          case 0x00:
830              {
831                /** 0011 0001 0bit 0000		btclr	%s1, $%a0			*/
832#line 415 "rl78-decode.opc"
833                int bit AU = (op[1] >> 4) & 0x07;
834                if (trace)
835                  {
836                    printf ("\033[33m%s\033[0m  %02x %02x\n",
837                           "/** 0011 0001 0bit 0000		btclr	%s1, $%a0			*/",
838                           op[0], op[1]);
839                    printf ("  bit = 0x%x\n", bit);
840                  }
841                SYNTAX("btclr	%s1, $%a0");
842#line 415 "rl78-decode.opc"
843                ID(branch_cond_clear); SM(None, SADDR); SB(bit); DC(pc+IMMS(1)+4); COND(T);
844
845              /*----------------------------------------------------------------------*/
846
847              }
848            break;
849          case 0x01:
850              {
851                /** 0011 0001 0bit 0001		btclr	%1, $%a0			*/
852#line 409 "rl78-decode.opc"
853                int bit AU = (op[1] >> 4) & 0x07;
854                if (trace)
855                  {
856                    printf ("\033[33m%s\033[0m  %02x %02x\n",
857                           "/** 0011 0001 0bit 0001		btclr	%1, $%a0			*/",
858                           op[0], op[1]);
859                    printf ("  bit = 0x%x\n", bit);
860                  }
861                SYNTAX("btclr	%1, $%a0");
862#line 409 "rl78-decode.opc"
863                ID(branch_cond_clear); DC(pc+IMMS(1)+3); SR(A); SB(bit); COND(T);
864
865              }
866            break;
867          case 0x02:
868              {
869                /** 0011 0001 0bit 0010		bt	%s1, $%a0			*/
870#line 401 "rl78-decode.opc"
871                int bit AU = (op[1] >> 4) & 0x07;
872                if (trace)
873                  {
874                    printf ("\033[33m%s\033[0m  %02x %02x\n",
875                           "/** 0011 0001 0bit 0010		bt	%s1, $%a0			*/",
876                           op[0], op[1]);
877                    printf ("  bit = 0x%x\n", bit);
878                  }
879                SYNTAX("bt	%s1, $%a0");
880#line 401 "rl78-decode.opc"
881                ID(branch_cond); SM(None, SADDR); SB(bit); DC(pc+IMMS(1)+4); COND(T);
882
883              /*----------------------------------------------------------------------*/
884
885              }
886            break;
887          case 0x03:
888              {
889                /** 0011 0001 0bit 0011		bt	%1, $%a0			*/
890#line 395 "rl78-decode.opc"
891                int bit AU = (op[1] >> 4) & 0x07;
892                if (trace)
893                  {
894                    printf ("\033[33m%s\033[0m  %02x %02x\n",
895                           "/** 0011 0001 0bit 0011		bt	%1, $%a0			*/",
896                           op[0], op[1]);
897                    printf ("  bit = 0x%x\n", bit);
898                  }
899                SYNTAX("bt	%1, $%a0");
900#line 395 "rl78-decode.opc"
901                ID(branch_cond); DC(pc+IMMS(1)+3); SR(A); SB(bit); COND(T);
902
903              }
904            break;
905          case 0x04:
906              {
907                /** 0011 0001 0bit 0100		bf	%s1, $%a0			*/
908#line 362 "rl78-decode.opc"
909                int bit AU = (op[1] >> 4) & 0x07;
910                if (trace)
911                  {
912                    printf ("\033[33m%s\033[0m  %02x %02x\n",
913                           "/** 0011 0001 0bit 0100		bf	%s1, $%a0			*/",
914                           op[0], op[1]);
915                    printf ("  bit = 0x%x\n", bit);
916                  }
917                SYNTAX("bf	%s1, $%a0");
918#line 362 "rl78-decode.opc"
919                ID(branch_cond); SM(None, SADDR); SB(bit); DC(pc+IMMS(1)+4); COND(F);
920
921              /*----------------------------------------------------------------------*/
922
923              }
924            break;
925          case 0x05:
926              {
927                /** 0011 0001 0bit 0101		bf	%1, $%a0			*/
928#line 356 "rl78-decode.opc"
929                int bit AU = (op[1] >> 4) & 0x07;
930                if (trace)
931                  {
932                    printf ("\033[33m%s\033[0m  %02x %02x\n",
933                           "/** 0011 0001 0bit 0101		bf	%1, $%a0			*/",
934                           op[0], op[1]);
935                    printf ("  bit = 0x%x\n", bit);
936                  }
937                SYNTAX("bf	%1, $%a0");
938#line 356 "rl78-decode.opc"
939                ID(branch_cond); DC(pc+IMMS(1)+3); SR(A); SB(bit); COND(F);
940
941              }
942            break;
943          case 0x07:
944              {
945                /** 0011 0001 0cnt 0111		shl	%0, %1				*/
946#line 1074 "rl78-decode.opc"
947                int cnt AU = (op[1] >> 4) & 0x07;
948                if (trace)
949                  {
950                    printf ("\033[33m%s\033[0m  %02x %02x\n",
951                           "/** 0011 0001 0cnt 0111		shl	%0, %1				*/",
952                           op[0], op[1]);
953                    printf ("  cnt = 0x%x\n", cnt);
954                  }
955                SYNTAX("shl	%0, %1");
956#line 1074 "rl78-decode.opc"
957                ID(shl); DR(C); SC(cnt);
958
959              }
960            break;
961          case 0x08:
962              {
963                /** 0011 0001 0cnt 1000		shl	%0, %1				*/
964#line 1071 "rl78-decode.opc"
965                int cnt AU = (op[1] >> 4) & 0x07;
966                if (trace)
967                  {
968                    printf ("\033[33m%s\033[0m  %02x %02x\n",
969                           "/** 0011 0001 0cnt 1000		shl	%0, %1				*/",
970                           op[0], op[1]);
971                    printf ("  cnt = 0x%x\n", cnt);
972                  }
973                SYNTAX("shl	%0, %1");
974#line 1071 "rl78-decode.opc"
975                ID(shl); DR(B); SC(cnt);
976
977              }
978            break;
979          case 0x09:
980              {
981                /** 0011 0001 0cnt 1001		shl	%0, %1				*/
982#line 1068 "rl78-decode.opc"
983                int cnt AU = (op[1] >> 4) & 0x07;
984                if (trace)
985                  {
986                    printf ("\033[33m%s\033[0m  %02x %02x\n",
987                           "/** 0011 0001 0cnt 1001		shl	%0, %1				*/",
988                           op[0], op[1]);
989                    printf ("  cnt = 0x%x\n", cnt);
990                  }
991                SYNTAX("shl	%0, %1");
992#line 1068 "rl78-decode.opc"
993                ID(shl); DR(A); SC(cnt);
994
995              }
996            break;
997          case 0x0a:
998              {
999                /** 0011 0001 0cnt 1010		shr	%0, %1				*/
1000#line 1085 "rl78-decode.opc"
1001                int cnt AU = (op[1] >> 4) & 0x07;
1002                if (trace)
1003                  {
1004                    printf ("\033[33m%s\033[0m  %02x %02x\n",
1005                           "/** 0011 0001 0cnt 1010		shr	%0, %1				*/",
1006                           op[0], op[1]);
1007                    printf ("  cnt = 0x%x\n", cnt);
1008                  }
1009                SYNTAX("shr	%0, %1");
1010#line 1085 "rl78-decode.opc"
1011                ID(shr); DR(A); SC(cnt);
1012
1013              }
1014            break;
1015          case 0x0b:
1016              {
1017                /** 0011 0001 0cnt 1011		sar	%0, %1				*/
1018#line 1032 "rl78-decode.opc"
1019                int cnt AU = (op[1] >> 4) & 0x07;
1020                if (trace)
1021                  {
1022                    printf ("\033[33m%s\033[0m  %02x %02x\n",
1023                           "/** 0011 0001 0cnt 1011		sar	%0, %1				*/",
1024                           op[0], op[1]);
1025                    printf ("  cnt = 0x%x\n", cnt);
1026                  }
1027                SYNTAX("sar	%0, %1");
1028#line 1032 "rl78-decode.opc"
1029                ID(sar); DR(A); SC(cnt);
1030
1031              }
1032            break;
1033          case 0x0c:
1034          case 0x8c:
1035              {
1036                /** 0011 0001 wcnt 1100		shlw	%0, %1				*/
1037#line 1080 "rl78-decode.opc"
1038                int wcnt AU = (op[1] >> 4) & 0x0f;
1039                if (trace)
1040                  {
1041                    printf ("\033[33m%s\033[0m  %02x %02x\n",
1042                           "/** 0011 0001 wcnt 1100		shlw	%0, %1				*/",
1043                           op[0], op[1]);
1044                    printf ("  wcnt = 0x%x\n", wcnt);
1045                  }
1046                SYNTAX("shlw	%0, %1");
1047#line 1080 "rl78-decode.opc"
1048                ID(shl); W(); DR(BC); SC(wcnt);
1049
1050              /*----------------------------------------------------------------------*/
1051
1052              }
1053            break;
1054          case 0x0d:
1055          case 0x8d:
1056              {
1057                /** 0011 0001 wcnt 1101		shlw	%0, %1				*/
1058#line 1077 "rl78-decode.opc"
1059                int wcnt AU = (op[1] >> 4) & 0x0f;
1060                if (trace)
1061                  {
1062                    printf ("\033[33m%s\033[0m  %02x %02x\n",
1063                           "/** 0011 0001 wcnt 1101		shlw	%0, %1				*/",
1064                           op[0], op[1]);
1065                    printf ("  wcnt = 0x%x\n", wcnt);
1066                  }
1067                SYNTAX("shlw	%0, %1");
1068#line 1077 "rl78-decode.opc"
1069                ID(shl); W(); DR(AX); SC(wcnt);
1070
1071              }
1072            break;
1073          case 0x0e:
1074          case 0x8e:
1075              {
1076                /** 0011 0001 wcnt 1110		shrw	%0, %1				*/
1077#line 1088 "rl78-decode.opc"
1078                int wcnt AU = (op[1] >> 4) & 0x0f;
1079                if (trace)
1080                  {
1081                    printf ("\033[33m%s\033[0m  %02x %02x\n",
1082                           "/** 0011 0001 wcnt 1110		shrw	%0, %1				*/",
1083                           op[0], op[1]);
1084                    printf ("  wcnt = 0x%x\n", wcnt);
1085                  }
1086                SYNTAX("shrw	%0, %1");
1087#line 1088 "rl78-decode.opc"
1088                ID(shr); W(); DR(AX); SC(wcnt);
1089
1090              /*----------------------------------------------------------------------*/
1091
1092              }
1093            break;
1094          case 0x0f:
1095          case 0x8f:
1096              {
1097                /** 0011 0001 wcnt 1111		sarw	%0, %1				*/
1098#line 1035 "rl78-decode.opc"
1099                int wcnt AU = (op[1] >> 4) & 0x0f;
1100                if (trace)
1101                  {
1102                    printf ("\033[33m%s\033[0m  %02x %02x\n",
1103                           "/** 0011 0001 wcnt 1111		sarw	%0, %1				*/",
1104                           op[0], op[1]);
1105                    printf ("  wcnt = 0x%x\n", wcnt);
1106                  }
1107                SYNTAX("sarw	%0, %1");
1108#line 1035 "rl78-decode.opc"
1109                ID(sar); W(); DR(AX); SC(wcnt);
1110
1111              /*----------------------------------------------------------------------*/
1112
1113              }
1114            break;
1115          case 0x80:
1116              {
1117                /** 0011 0001 1bit 0000		btclr	%s1, $%a0			*/
1118#line 412 "rl78-decode.opc"
1119                int bit AU = (op[1] >> 4) & 0x07;
1120                if (trace)
1121                  {
1122                    printf ("\033[33m%s\033[0m  %02x %02x\n",
1123                           "/** 0011 0001 1bit 0000		btclr	%s1, $%a0			*/",
1124                           op[0], op[1]);
1125                    printf ("  bit = 0x%x\n", bit);
1126                  }
1127                SYNTAX("btclr	%s1, $%a0");
1128#line 412 "rl78-decode.opc"
1129                ID(branch_cond_clear); SM(None, SFR); SB(bit); DC(pc+IMMS(1)+4); COND(T);
1130
1131              }
1132            break;
1133          case 0x81:
1134              {
1135                /** 0011 0001 1bit 0001		btclr	%e1, $%a0			*/
1136#line 406 "rl78-decode.opc"
1137                int bit AU = (op[1] >> 4) & 0x07;
1138                if (trace)
1139                  {
1140                    printf ("\033[33m%s\033[0m  %02x %02x\n",
1141                           "/** 0011 0001 1bit 0001		btclr	%e1, $%a0			*/",
1142                           op[0], op[1]);
1143                    printf ("  bit = 0x%x\n", bit);
1144                  }
1145                SYNTAX("btclr	%e1, $%a0");
1146#line 406 "rl78-decode.opc"
1147                ID(branch_cond_clear); DC(pc+IMMS(1)+3); SM(HL,0); SB(bit); COND(T);
1148
1149              }
1150            break;
1151          case 0x82:
1152              {
1153                /** 0011 0001 1bit 0010		bt	%s1, $%a0			*/
1154#line 398 "rl78-decode.opc"
1155                int bit AU = (op[1] >> 4) & 0x07;
1156                if (trace)
1157                  {
1158                    printf ("\033[33m%s\033[0m  %02x %02x\n",
1159                           "/** 0011 0001 1bit 0010		bt	%s1, $%a0			*/",
1160                           op[0], op[1]);
1161                    printf ("  bit = 0x%x\n", bit);
1162                  }
1163                SYNTAX("bt	%s1, $%a0");
1164#line 398 "rl78-decode.opc"
1165                ID(branch_cond); SM(None, SFR); SB(bit); DC(pc+IMMS(1)+4); COND(T);
1166
1167              }
1168            break;
1169          case 0x83:
1170              {
1171                /** 0011 0001 1bit 0011		bt	%e1, $%a0			*/
1172#line 392 "rl78-decode.opc"
1173                int bit AU = (op[1] >> 4) & 0x07;
1174                if (trace)
1175                  {
1176                    printf ("\033[33m%s\033[0m  %02x %02x\n",
1177                           "/** 0011 0001 1bit 0011		bt	%e1, $%a0			*/",
1178                           op[0], op[1]);
1179                    printf ("  bit = 0x%x\n", bit);
1180                  }
1181                SYNTAX("bt	%e1, $%a0");
1182#line 392 "rl78-decode.opc"
1183                ID(branch_cond); DC(pc+IMMS(1)+3); SM(HL,0); SB(bit); COND(T);
1184
1185              }
1186            break;
1187          case 0x84:
1188              {
1189                /** 0011 0001 1bit 0100		bf	%s1, $%a0			*/
1190#line 359 "rl78-decode.opc"
1191                int bit AU = (op[1] >> 4) & 0x07;
1192                if (trace)
1193                  {
1194                    printf ("\033[33m%s\033[0m  %02x %02x\n",
1195                           "/** 0011 0001 1bit 0100		bf	%s1, $%a0			*/",
1196                           op[0], op[1]);
1197                    printf ("  bit = 0x%x\n", bit);
1198                  }
1199                SYNTAX("bf	%s1, $%a0");
1200#line 359 "rl78-decode.opc"
1201                ID(branch_cond); SM(None, SFR); SB(bit); DC(pc+IMMS(1)+4); COND(F);
1202
1203              }
1204            break;
1205          case 0x85:
1206              {
1207                /** 0011 0001 1bit 0101		bf	%e1, $%a0			*/
1208#line 353 "rl78-decode.opc"
1209                int bit AU = (op[1] >> 4) & 0x07;
1210                if (trace)
1211                  {
1212                    printf ("\033[33m%s\033[0m  %02x %02x\n",
1213                           "/** 0011 0001 1bit 0101		bf	%e1, $%a0			*/",
1214                           op[0], op[1]);
1215                    printf ("  bit = 0x%x\n", bit);
1216                  }
1217                SYNTAX("bf	%e1, $%a0");
1218#line 353 "rl78-decode.opc"
1219                ID(branch_cond); DC(pc+IMMS(1)+3); SM(HL,0); SB(bit); COND(F);
1220
1221              }
1222            break;
1223          default: UNSUPPORTED(); break;
1224        }
1225      break;
1226    case 0x33:
1227    case 0x35:
1228    case 0x37:
1229        {
1230          /** 0011 0ra1			xchw	%0, %1				*/
1231#line 1238 "rl78-decode.opc"
1232          int ra AU = (op[0] >> 1) & 0x03;
1233          if (trace)
1234            {
1235              printf ("\033[33m%s\033[0m  %02x\n",
1236                     "/** 0011 0ra1			xchw	%0, %1				*/",
1237                     op[0]);
1238              printf ("  ra = 0x%x\n", ra);
1239            }
1240          SYNTAX("xchw	%0, %1");
1241#line 1238 "rl78-decode.opc"
1242          ID(xch); W(); DR(AX); SRW(ra);
1243
1244        /*----------------------------------------------------------------------*/
1245
1246        }
1247      break;
1248    case 0x38:
1249        {
1250          /** 0011 1000			mov	%e0, #%1			*/
1251          if (trace)
1252            {
1253              printf ("\033[33m%s\033[0m  %02x\n",
1254                     "/** 0011 1000			mov	%e0, #%1			*/",
1255                     op[0]);
1256            }
1257          SYNTAX("mov	%e0, #%1");
1258#line 737 "rl78-decode.opc"
1259          ID(mov); DM(C, IMMU(2)); SC(IMMU(1));
1260
1261        }
1262      break;
1263    case 0x39:
1264        {
1265          /** 0011 1001			mov	%e0, #%1			*/
1266          if (trace)
1267            {
1268              printf ("\033[33m%s\033[0m  %02x\n",
1269                     "/** 0011 1001			mov	%e0, #%1			*/",
1270                     op[0]);
1271            }
1272          SYNTAX("mov	%e0, #%1");
1273#line 731 "rl78-decode.opc"
1274          ID(mov); DM(BC, IMMU(2)); SC(IMMU(1));
1275
1276        }
1277      break;
1278    case 0x3a:
1279        {
1280          /** 0011 1010			subc	%0, #%1				*/
1281          if (trace)
1282            {
1283              printf ("\033[33m%s\033[0m  %02x\n",
1284                     "/** 0011 1010			subc	%0, #%1				*/",
1285                     op[0]);
1286            }
1287          SYNTAX("subc	%0, #%1");
1288#line 1177 "rl78-decode.opc"
1289          ID(subc); DM(None, SADDR); SC(IMMU(1)); Fzac;
1290
1291        /*----------------------------------------------------------------------*/
1292
1293        }
1294      break;
1295    case 0x3b:
1296        {
1297          /** 0011 1011			subc	%0, %1				*/
1298          if (trace)
1299            {
1300              printf ("\033[33m%s\033[0m  %02x\n",
1301                     "/** 0011 1011			subc	%0, %1				*/",
1302                     op[0]);
1303            }
1304          SYNTAX("subc	%0, %1");
1305#line 1174 "rl78-decode.opc"
1306          ID(subc); DR(A); SM(None, SADDR); Fzac;
1307
1308        }
1309      break;
1310    case 0x3c:
1311        {
1312          /** 0011 1100			subc	%0, #%1				*/
1313          if (trace)
1314            {
1315              printf ("\033[33m%s\033[0m  %02x\n",
1316                     "/** 0011 1100			subc	%0, #%1				*/",
1317                     op[0]);
1318            }
1319          SYNTAX("subc	%0, #%1");
1320#line 1165 "rl78-decode.opc"
1321          ID(subc); DR(A); SC(IMMU(1)); Fzac;
1322
1323        }
1324      break;
1325    case 0x3d:
1326        {
1327          /** 0011 1101			subc	%0, %e1				*/
1328          if (trace)
1329            {
1330              printf ("\033[33m%s\033[0m  %02x\n",
1331                     "/** 0011 1101			subc	%0, %e1				*/",
1332                     op[0]);
1333            }
1334          SYNTAX("subc	%0, %e1");
1335#line 1153 "rl78-decode.opc"
1336          ID(subc); DR(A); SM(HL, 0); Fzac;
1337
1338        }
1339      break;
1340    case 0x3e:
1341        {
1342          /** 0011 1110			subc	%0, %e1				*/
1343          if (trace)
1344            {
1345              printf ("\033[33m%s\033[0m  %02x\n",
1346                     "/** 0011 1110			subc	%0, %e1				*/",
1347                     op[0]);
1348            }
1349          SYNTAX("subc	%0, %e1");
1350#line 1162 "rl78-decode.opc"
1351          ID(subc); DR(A); SM(HL, IMMU(1)); Fzac;
1352
1353        }
1354      break;
1355    case 0x3f:
1356        {
1357          /** 0011 1111			subc	%0, %e!1			*/
1358          if (trace)
1359            {
1360              printf ("\033[33m%s\033[0m  %02x\n",
1361                     "/** 0011 1111			subc	%0, %e!1			*/",
1362                     op[0]);
1363            }
1364          SYNTAX("subc	%0, %e!1");
1365#line 1150 "rl78-decode.opc"
1366          ID(subc); DR(A); SM(None, IMMU(2)); Fzac;
1367
1368        }
1369      break;
1370    case 0x40:
1371        {
1372          /** 0100 0000			cmp	%e!0, #%1			*/
1373          if (trace)
1374            {
1375              printf ("\033[33m%s\033[0m  %02x\n",
1376                     "/** 0100 0000			cmp	%e!0, #%1			*/",
1377                     op[0]);
1378            }
1379          SYNTAX("cmp	%e!0, #%1");
1380#line 479 "rl78-decode.opc"
1381          ID(cmp); DM(None, IMMU(2)); SC(IMMU(1)); Fzac;
1382
1383        }
1384      break;
1385    case 0x41:
1386        {
1387          /** 0100 0001			mov	%0, #%1				*/
1388          if (trace)
1389            {
1390              printf ("\033[33m%s\033[0m  %02x\n",
1391                     "/** 0100 0001			mov	%0, #%1				*/",
1392                     op[0]);
1393            }
1394          SYNTAX("mov	%0, #%1");
1395#line 716 "rl78-decode.opc"
1396          ID(mov); DR(ES); SC(IMMU(1));
1397
1398        }
1399      break;
1400    case 0x42:
1401        {
1402          /** 0100 0010			cmpw	%0, %e!1			*/
1403          if (trace)
1404            {
1405              printf ("\033[33m%s\033[0m  %02x\n",
1406                     "/** 0100 0010			cmpw	%0, %e!1			*/",
1407                     op[0]);
1408            }
1409          SYNTAX("cmpw	%0, %e!1");
1410#line 530 "rl78-decode.opc"
1411          ID(cmp); W(); DR(AX); SM(None, IMMU(2)); Fzac;
1412
1413        }
1414      break;
1415    case 0x43:
1416    case 0x45:
1417    case 0x47:
1418        {
1419          /** 0100 0ra1			cmpw	%0, %1				*/
1420#line 539 "rl78-decode.opc"
1421          int ra AU = (op[0] >> 1) & 0x03;
1422          if (trace)
1423            {
1424              printf ("\033[33m%s\033[0m  %02x\n",
1425                     "/** 0100 0ra1			cmpw	%0, %1				*/",
1426                     op[0]);
1427              printf ("  ra = 0x%x\n", ra);
1428            }
1429          SYNTAX("cmpw	%0, %1");
1430#line 539 "rl78-decode.opc"
1431          ID(cmp); W(); DR(AX); SRW(ra); Fzac;
1432
1433        }
1434      break;
1435    case 0x44:
1436        {
1437          /** 0100 0100			cmpw	%0, #%1				*/
1438          if (trace)
1439            {
1440              printf ("\033[33m%s\033[0m  %02x\n",
1441                     "/** 0100 0100			cmpw	%0, #%1				*/",
1442                     op[0]);
1443            }
1444          SYNTAX("cmpw	%0, #%1");
1445#line 536 "rl78-decode.opc"
1446          ID(cmp); W(); DR(AX); SC(IMMU(2)); Fzac;
1447
1448        }
1449      break;
1450    case 0x46:
1451        {
1452          /** 0100 0110			cmpw	%0, %1				*/
1453          if (trace)
1454            {
1455              printf ("\033[33m%s\033[0m  %02x\n",
1456                     "/** 0100 0110			cmpw	%0, %1				*/",
1457                     op[0]);
1458            }
1459          SYNTAX("cmpw	%0, %1");
1460#line 542 "rl78-decode.opc"
1461          ID(cmp); W(); DR(AX); SM(None, SADDR); Fzac;
1462
1463        /*----------------------------------------------------------------------*/
1464
1465        }
1466      break;
1467    case 0x48:
1468        {
1469          /** 0100 1000			mov	%e0, %1				*/
1470          if (trace)
1471            {
1472              printf ("\033[33m%s\033[0m  %02x\n",
1473                     "/** 0100 1000			mov	%e0, %1				*/",
1474                     op[0]);
1475            }
1476          SYNTAX("mov	%e0, %1");
1477#line 734 "rl78-decode.opc"
1478          ID(mov); DM(BC, IMMU(2)); SR(A);
1479
1480        }
1481      break;
1482    case 0x49:
1483        {
1484          /** 0100 1001			mov	%0, %e1				*/
1485          if (trace)
1486            {
1487              printf ("\033[33m%s\033[0m  %02x\n",
1488                     "/** 0100 1001			mov	%0, %e1				*/",
1489                     op[0]);
1490            }
1491          SYNTAX("mov	%0, %e1");
1492#line 680 "rl78-decode.opc"
1493          ID(mov); DR(A); SM(BC, IMMU(2));
1494
1495        }
1496      break;
1497    case 0x4a:
1498        {
1499          /** 0100 1010			cmp	%0, #%1				*/
1500          if (trace)
1501            {
1502              printf ("\033[33m%s\033[0m  %02x\n",
1503                     "/** 0100 1010			cmp	%0, #%1				*/",
1504                     op[0]);
1505            }
1506          SYNTAX("cmp	%0, #%1");
1507#line 482 "rl78-decode.opc"
1508          ID(cmp); DM(None, SADDR); SC(IMMU(1)); Fzac;
1509
1510        }
1511      break;
1512    case 0x4b:
1513        {
1514          /** 0100 1011			cmp	%0, %1				*/
1515          if (trace)
1516            {
1517              printf ("\033[33m%s\033[0m  %02x\n",
1518                     "/** 0100 1011			cmp	%0, %1				*/",
1519                     op[0]);
1520            }
1521          SYNTAX("cmp	%0, %1");
1522#line 509 "rl78-decode.opc"
1523          ID(cmp); DR(A); SM(None, SADDR); Fzac;
1524
1525        /*----------------------------------------------------------------------*/
1526
1527        }
1528      break;
1529    case 0x4c:
1530        {
1531          /** 0100 1100			cmp	%0, #%1				*/
1532          if (trace)
1533            {
1534              printf ("\033[33m%s\033[0m  %02x\n",
1535                     "/** 0100 1100			cmp	%0, #%1				*/",
1536                     op[0]);
1537            }
1538          SYNTAX("cmp	%0, #%1");
1539#line 500 "rl78-decode.opc"
1540          ID(cmp); DR(A); SC(IMMU(1)); Fzac;
1541
1542        }
1543      break;
1544    case 0x4d:
1545        {
1546          /** 0100 1101			cmp	%0, %e1				*/
1547          if (trace)
1548            {
1549              printf ("\033[33m%s\033[0m  %02x\n",
1550                     "/** 0100 1101			cmp	%0, %e1				*/",
1551                     op[0]);
1552            }
1553          SYNTAX("cmp	%0, %e1");
1554#line 488 "rl78-decode.opc"
1555          ID(cmp); DR(A); SM(HL, 0); Fzac;
1556
1557        }
1558      break;
1559    case 0x4e:
1560        {
1561          /** 0100 1110			cmp	%0, %e1				*/
1562          if (trace)
1563            {
1564              printf ("\033[33m%s\033[0m  %02x\n",
1565                     "/** 0100 1110			cmp	%0, %e1				*/",
1566                     op[0]);
1567            }
1568          SYNTAX("cmp	%0, %e1");
1569#line 497 "rl78-decode.opc"
1570          ID(cmp); DR(A); SM(HL, IMMU(1)); Fzac;
1571
1572        }
1573      break;
1574    case 0x4f:
1575        {
1576          /** 0100 1111			cmp	%0, %e!1			*/
1577          if (trace)
1578            {
1579              printf ("\033[33m%s\033[0m  %02x\n",
1580                     "/** 0100 1111			cmp	%0, %e!1			*/",
1581                     op[0]);
1582            }
1583          SYNTAX("cmp	%0, %e!1");
1584#line 485 "rl78-decode.opc"
1585          ID(cmp); DR(A); SM(None, IMMU(2)); Fzac;
1586
1587        }
1588      break;
1589    case 0x50:
1590    case 0x51:
1591    case 0x52:
1592    case 0x53:
1593    case 0x54:
1594    case 0x55:
1595    case 0x56:
1596    case 0x57:
1597        {
1598          /** 0101 0reg			mov	%0, #%1				*/
1599#line 668 "rl78-decode.opc"
1600          int reg AU = op[0] & 0x07;
1601          if (trace)
1602            {
1603              printf ("\033[33m%s\033[0m  %02x\n",
1604                     "/** 0101 0reg			mov	%0, #%1				*/",
1605                     op[0]);
1606              printf ("  reg = 0x%x\n", reg);
1607            }
1608          SYNTAX("mov	%0, #%1");
1609#line 668 "rl78-decode.opc"
1610          ID(mov); DRB(reg); SC(IMMU(1));
1611
1612        }
1613      break;
1614    case 0x58:
1615        {
1616          /** 0101 1000			movw	%e0, %1				*/
1617          if (trace)
1618            {
1619              printf ("\033[33m%s\033[0m  %02x\n",
1620                     "/** 0101 1000			movw	%e0, %1				*/",
1621                     op[0]);
1622            }
1623          SYNTAX("movw	%e0, %1");
1624#line 870 "rl78-decode.opc"
1625          ID(mov); W(); DM(B, IMMU(2)); SR(AX);
1626
1627        }
1628      break;
1629    case 0x59:
1630        {
1631          /** 0101 1001			movw	%0, %e1				*/
1632          if (trace)
1633            {
1634              printf ("\033[33m%s\033[0m  %02x\n",
1635                     "/** 0101 1001			movw	%0, %e1				*/",
1636                     op[0]);
1637            }
1638          SYNTAX("movw	%0, %e1");
1639#line 861 "rl78-decode.opc"
1640          ID(mov); W(); DR(AX); SM(B, IMMU(2));
1641
1642        }
1643      break;
1644    case 0x5a:
1645        {
1646          /** 0101 1010	       		and	%0, #%1				*/
1647          if (trace)
1648            {
1649              printf ("\033[33m%s\033[0m  %02x\n",
1650                     "/** 0101 1010	       		and	%0, #%1				*/",
1651                     op[0]);
1652            }
1653          SYNTAX("and	%0, #%1");
1654#line 311 "rl78-decode.opc"
1655          ID(and); DM(None, SADDR); SC(IMMU(1)); Fz;
1656
1657        /*----------------------------------------------------------------------*/
1658
1659        }
1660      break;
1661    case 0x5b:
1662        {
1663          /** 0101 1011	       		and	%0, %1				*/
1664          if (trace)
1665            {
1666              printf ("\033[33m%s\033[0m  %02x\n",
1667                     "/** 0101 1011	       		and	%0, %1				*/",
1668                     op[0]);
1669            }
1670          SYNTAX("and	%0, %1");
1671#line 308 "rl78-decode.opc"
1672          ID(and); DR(A); SM(None, SADDR); Fz;
1673
1674        }
1675      break;
1676    case 0x5c:
1677        {
1678          /** 0101 1100	       		and	%0, #%1				*/
1679          if (trace)
1680            {
1681              printf ("\033[33m%s\033[0m  %02x\n",
1682                     "/** 0101 1100	       		and	%0, #%1				*/",
1683                     op[0]);
1684            }
1685          SYNTAX("and	%0, #%1");
1686#line 299 "rl78-decode.opc"
1687          ID(and); DR(A); SC(IMMU(1)); Fz;
1688
1689        }
1690      break;
1691    case 0x5d:
1692        {
1693          /** 0101 1101			and	%0, %e1			*/
1694          if (trace)
1695            {
1696              printf ("\033[33m%s\033[0m  %02x\n",
1697                     "/** 0101 1101			and	%0, %e1			*/",
1698                     op[0]);
1699            }
1700          SYNTAX("and	%0, %e1");
1701#line 287 "rl78-decode.opc"
1702          ID(and); DR(A); SM(HL, 0); Fz;
1703
1704        }
1705      break;
1706    case 0x5e:
1707        {
1708          /** 0101 1110			and	%0, %e1			*/
1709          if (trace)
1710            {
1711              printf ("\033[33m%s\033[0m  %02x\n",
1712                     "/** 0101 1110			and	%0, %e1			*/",
1713                     op[0]);
1714            }
1715          SYNTAX("and	%0, %e1");
1716#line 293 "rl78-decode.opc"
1717          ID(and); DR(A); SM(HL, IMMU(1)); Fz;
1718
1719        }
1720      break;
1721    case 0x5f:
1722        {
1723          /** 0101 1111			and	%0, %e!1			*/
1724          if (trace)
1725            {
1726              printf ("\033[33m%s\033[0m  %02x\n",
1727                     "/** 0101 1111			and	%0, %e!1			*/",
1728                     op[0]);
1729            }
1730          SYNTAX("and	%0, %e!1");
1731#line 284 "rl78-decode.opc"
1732          ID(and); DR(A); SM(None, IMMU(2)); Fz;
1733
1734        }
1735      break;
1736    case 0x60:
1737    case 0x62:
1738    case 0x63:
1739    case 0x64:
1740    case 0x65:
1741    case 0x66:
1742    case 0x67:
1743        {
1744          /** 0110 0rba			mov	%0, %1				*/
1745#line 671 "rl78-decode.opc"
1746          int rba AU = op[0] & 0x07;
1747          if (trace)
1748            {
1749              printf ("\033[33m%s\033[0m  %02x\n",
1750                     "/** 0110 0rba			mov	%0, %1				*/",
1751                     op[0]);
1752              printf ("  rba = 0x%x\n", rba);
1753            }
1754          SYNTAX("mov	%0, %1");
1755#line 671 "rl78-decode.opc"
1756          ID(mov); DR(A); SRB(rba);
1757
1758        }
1759      break;
1760    case 0x61:
1761        GETBYTE ();
1762        switch (op[1] & 0xff)
1763        {
1764          case 0x00:
1765          case 0x01:
1766          case 0x02:
1767          case 0x03:
1768          case 0x04:
1769          case 0x05:
1770          case 0x06:
1771          case 0x07:
1772              {
1773                /** 0110 0001 0000 0reg		add	%0, %1				*/
1774#line 224 "rl78-decode.opc"
1775                int reg AU = op[1] & 0x07;
1776                if (trace)
1777                  {
1778                    printf ("\033[33m%s\033[0m  %02x %02x\n",
1779                           "/** 0110 0001 0000 0reg		add	%0, %1				*/",
1780                           op[0], op[1]);
1781                    printf ("  reg = 0x%x\n", reg);
1782                  }
1783                SYNTAX("add	%0, %1");
1784#line 224 "rl78-decode.opc"
1785                ID(add); DRB(reg); SR(A); Fzac;
1786
1787              }
1788            break;
1789          case 0x08:
1790          case 0x0a:
1791          case 0x0b:
1792          case 0x0c:
1793          case 0x0d:
1794          case 0x0e:
1795          case 0x0f:
1796              {
1797                /** 0110 0001 0000 1rba		add	%0, %1				*/
1798#line 218 "rl78-decode.opc"
1799                int rba AU = op[1] & 0x07;
1800                if (trace)
1801                  {
1802                    printf ("\033[33m%s\033[0m  %02x %02x\n",
1803                           "/** 0110 0001 0000 1rba		add	%0, %1				*/",
1804                           op[0], op[1]);
1805                    printf ("  rba = 0x%x\n", rba);
1806                  }
1807                SYNTAX("add	%0, %1");
1808#line 218 "rl78-decode.opc"
1809                ID(add); DR(A); SRB(rba); Fzac;
1810
1811              }
1812            break;
1813          case 0x09:
1814              {
1815                /** 0110 0001 0000 1001		addw	%0, %e1			*/
1816                if (trace)
1817                  {
1818                    printf ("\033[33m%s\033[0m  %02x %02x\n",
1819                           "/** 0110 0001 0000 1001		addw	%0, %e1			*/",
1820                           op[0], op[1]);
1821                  }
1822                SYNTAX("addw	%0, %e1");
1823#line 267 "rl78-decode.opc"
1824                ID(add); W(); DR(AX); SM(HL, IMMU(1)); Fzac;
1825
1826              }
1827            break;
1828          case 0x10:
1829          case 0x11:
1830          case 0x12:
1831          case 0x13:
1832          case 0x14:
1833          case 0x15:
1834          case 0x16:
1835          case 0x17:
1836              {
1837                /** 0110 0001 0001 0reg		addc	%0, %1				*/
1838#line 253 "rl78-decode.opc"
1839                int reg AU = op[1] & 0x07;
1840                if (trace)
1841                  {
1842                    printf ("\033[33m%s\033[0m  %02x %02x\n",
1843                           "/** 0110 0001 0001 0reg		addc	%0, %1				*/",
1844                           op[0], op[1]);
1845                    printf ("  reg = 0x%x\n", reg);
1846                  }
1847                SYNTAX("addc	%0, %1");
1848#line 253 "rl78-decode.opc"
1849                ID(addc); DRB(reg); SR(A); Fzac;
1850
1851              }
1852            break;
1853          case 0x18:
1854          case 0x1a:
1855          case 0x1b:
1856          case 0x1c:
1857          case 0x1d:
1858          case 0x1e:
1859          case 0x1f:
1860              {
1861                /** 0110 0001 0001 1rba		addc	%0, %1				*/
1862#line 250 "rl78-decode.opc"
1863                int rba AU = op[1] & 0x07;
1864                if (trace)
1865                  {
1866                    printf ("\033[33m%s\033[0m  %02x %02x\n",
1867                           "/** 0110 0001 0001 1rba		addc	%0, %1				*/",
1868                           op[0], op[1]);
1869                    printf ("  rba = 0x%x\n", rba);
1870                  }
1871                SYNTAX("addc	%0, %1");
1872#line 250 "rl78-decode.opc"
1873                ID(addc); DR(A); SRB(rba); Fzac;
1874
1875              }
1876            break;
1877          case 0x20:
1878          case 0x21:
1879          case 0x22:
1880          case 0x23:
1881          case 0x24:
1882          case 0x25:
1883          case 0x26:
1884          case 0x27:
1885              {
1886                /** 0110 0001 0010 0reg		sub	%0, %1				*/
1887#line 1142 "rl78-decode.opc"
1888                int reg AU = op[1] & 0x07;
1889                if (trace)
1890                  {
1891                    printf ("\033[33m%s\033[0m  %02x %02x\n",
1892                           "/** 0110 0001 0010 0reg		sub	%0, %1				*/",
1893                           op[0], op[1]);
1894                    printf ("  reg = 0x%x\n", reg);
1895                  }
1896                SYNTAX("sub	%0, %1");
1897#line 1142 "rl78-decode.opc"
1898                ID(sub); DRB(reg); SR(A); Fzac;
1899
1900              }
1901            break;
1902          case 0x28:
1903          case 0x2a:
1904          case 0x2b:
1905          case 0x2c:
1906          case 0x2d:
1907          case 0x2e:
1908          case 0x2f:
1909              {
1910                /** 0110 0001 0010 1rba		sub	%0, %1				*/
1911#line 1136 "rl78-decode.opc"
1912                int rba AU = op[1] & 0x07;
1913                if (trace)
1914                  {
1915                    printf ("\033[33m%s\033[0m  %02x %02x\n",
1916                           "/** 0110 0001 0010 1rba		sub	%0, %1				*/",
1917                           op[0], op[1]);
1918                    printf ("  rba = 0x%x\n", rba);
1919                  }
1920                SYNTAX("sub	%0, %1");
1921#line 1136 "rl78-decode.opc"
1922                ID(sub); DR(A); SRB(rba); Fzac;
1923
1924              }
1925            break;
1926          case 0x29:
1927              {
1928                /** 0110 0001 0010 1001		subw	%0, %e1				*/
1929                if (trace)
1930                  {
1931                    printf ("\033[33m%s\033[0m  %02x %02x\n",
1932                           "/** 0110 0001 0010 1001		subw	%0, %e1				*/",
1933                           op[0], op[1]);
1934                  }
1935                SYNTAX("subw	%0, %e1");
1936#line 1185 "rl78-decode.opc"
1937                ID(sub); W(); DR(AX); SM(HL, IMMU(1)); Fzac;
1938
1939              }
1940            break;
1941          case 0x30:
1942          case 0x31:
1943          case 0x32:
1944          case 0x33:
1945          case 0x34:
1946          case 0x35:
1947          case 0x36:
1948          case 0x37:
1949              {
1950                /** 0110 0001 0011 0reg		subc	%0, %1				*/
1951#line 1171 "rl78-decode.opc"
1952                int reg AU = op[1] & 0x07;
1953                if (trace)
1954                  {
1955                    printf ("\033[33m%s\033[0m  %02x %02x\n",
1956                           "/** 0110 0001 0011 0reg		subc	%0, %1				*/",
1957                           op[0], op[1]);
1958                    printf ("  reg = 0x%x\n", reg);
1959                  }
1960                SYNTAX("subc	%0, %1");
1961#line 1171 "rl78-decode.opc"
1962                ID(subc); DRB(reg); SR(A); Fzac;
1963
1964              }
1965            break;
1966          case 0x38:
1967          case 0x3a:
1968          case 0x3b:
1969          case 0x3c:
1970          case 0x3d:
1971          case 0x3e:
1972          case 0x3f:
1973              {
1974                /** 0110 0001 0011 1rba		subc	%0, %1				*/
1975#line 1168 "rl78-decode.opc"
1976                int rba AU = op[1] & 0x07;
1977                if (trace)
1978                  {
1979                    printf ("\033[33m%s\033[0m  %02x %02x\n",
1980                           "/** 0110 0001 0011 1rba		subc	%0, %1				*/",
1981                           op[0], op[1]);
1982                    printf ("  rba = 0x%x\n", rba);
1983                  }
1984                SYNTAX("subc	%0, %1");
1985#line 1168 "rl78-decode.opc"
1986                ID(subc); DR(A); SRB(rba); Fzac;
1987
1988              }
1989            break;
1990          case 0x40:
1991          case 0x41:
1992          case 0x42:
1993          case 0x43:
1994          case 0x44:
1995          case 0x45:
1996          case 0x46:
1997          case 0x47:
1998              {
1999                /** 0110 0001 0100 0reg		cmp	%0, %1				*/
2000#line 506 "rl78-decode.opc"
2001                int reg AU = op[1] & 0x07;
2002                if (trace)
2003                  {
2004                    printf ("\033[33m%s\033[0m  %02x %02x\n",
2005                           "/** 0110 0001 0100 0reg		cmp	%0, %1				*/",
2006                           op[0], op[1]);
2007                    printf ("  reg = 0x%x\n", reg);
2008                  }
2009                SYNTAX("cmp	%0, %1");
2010#line 506 "rl78-decode.opc"
2011                ID(cmp); DRB(reg); SR(A); Fzac;
2012
2013              }
2014            break;
2015          case 0x48:
2016          case 0x4a:
2017          case 0x4b:
2018          case 0x4c:
2019          case 0x4d:
2020          case 0x4e:
2021          case 0x4f:
2022              {
2023                /** 0110 0001 0100 1rba		cmp	%0, %1				*/
2024#line 503 "rl78-decode.opc"
2025                int rba AU = op[1] & 0x07;
2026                if (trace)
2027                  {
2028                    printf ("\033[33m%s\033[0m  %02x %02x\n",
2029                           "/** 0110 0001 0100 1rba		cmp	%0, %1				*/",
2030                           op[0], op[1]);
2031                    printf ("  rba = 0x%x\n", rba);
2032                  }
2033                SYNTAX("cmp	%0, %1");
2034#line 503 "rl78-decode.opc"
2035                ID(cmp); DR(A); SRB(rba); Fzac;
2036
2037              }
2038            break;
2039          case 0x49:
2040              {
2041                /** 0110 0001 0100 1001		cmpw	%0, %e1				*/
2042                if (trace)
2043                  {
2044                    printf ("\033[33m%s\033[0m  %02x %02x\n",
2045                           "/** 0110 0001 0100 1001		cmpw	%0, %e1				*/",
2046                           op[0], op[1]);
2047                  }
2048                SYNTAX("cmpw	%0, %e1");
2049#line 533 "rl78-decode.opc"
2050                ID(cmp); W(); DR(AX); SM(HL, IMMU(1)); Fzac;
2051
2052              }
2053            break;
2054          case 0x50:
2055          case 0x51:
2056          case 0x52:
2057          case 0x53:
2058          case 0x54:
2059          case 0x55:
2060          case 0x56:
2061          case 0x57:
2062              {
2063                /** 0110 0001 0101 0reg		and	%0, %1				*/
2064#line 305 "rl78-decode.opc"
2065                int reg AU = op[1] & 0x07;
2066                if (trace)
2067                  {
2068                    printf ("\033[33m%s\033[0m  %02x %02x\n",
2069                           "/** 0110 0001 0101 0reg		and	%0, %1				*/",
2070                           op[0], op[1]);
2071                    printf ("  reg = 0x%x\n", reg);
2072                  }
2073                SYNTAX("and	%0, %1");
2074#line 305 "rl78-decode.opc"
2075                ID(and); DRB(reg); SR(A); Fz;
2076
2077              }
2078            break;
2079          case 0x58:
2080          case 0x5a:
2081          case 0x5b:
2082          case 0x5c:
2083          case 0x5d:
2084          case 0x5e:
2085          case 0x5f:
2086              {
2087                /** 0110 0001 0101 1rba		and	%0, %1				*/
2088#line 302 "rl78-decode.opc"
2089                int rba AU = op[1] & 0x07;
2090                if (trace)
2091                  {
2092                    printf ("\033[33m%s\033[0m  %02x %02x\n",
2093                           "/** 0110 0001 0101 1rba		and	%0, %1				*/",
2094                           op[0], op[1]);
2095                    printf ("  rba = 0x%x\n", rba);
2096                  }
2097                SYNTAX("and	%0, %1");
2098#line 302 "rl78-decode.opc"
2099                ID(and); DR(A); SRB(rba); Fz;
2100
2101              }
2102            break;
2103          case 0x59:
2104              {
2105                /** 0110 0001 0101 1001		inc	%e0				*/
2106                if (trace)
2107                  {
2108                    printf ("\033[33m%s\033[0m  %02x %02x\n",
2109                           "/** 0110 0001 0101 1001		inc	%e0				*/",
2110                           op[0], op[1]);
2111                  }
2112                SYNTAX("inc	%e0");
2113#line 583 "rl78-decode.opc"
2114                ID(add); DM(HL, IMMU(1)); SC(1); Fza;
2115
2116              }
2117            break;
2118          case 0x60:
2119          case 0x61:
2120          case 0x62:
2121          case 0x63:
2122          case 0x64:
2123          case 0x65:
2124          case 0x66:
2125          case 0x67:
2126              {
2127                /** 0110 0001 0110 0reg		or	%0, %1				*/
2128#line 960 "rl78-decode.opc"
2129                int reg AU = op[1] & 0x07;
2130                if (trace)
2131                  {
2132                    printf ("\033[33m%s\033[0m  %02x %02x\n",
2133                           "/** 0110 0001 0110 0reg		or	%0, %1				*/",
2134                           op[0], op[1]);
2135                    printf ("  reg = 0x%x\n", reg);
2136                  }
2137                SYNTAX("or	%0, %1");
2138#line 960 "rl78-decode.opc"
2139                ID(or); DRB(reg); SR(A); Fz;
2140
2141              }
2142            break;
2143          case 0x68:
2144          case 0x6a:
2145          case 0x6b:
2146          case 0x6c:
2147          case 0x6d:
2148          case 0x6e:
2149          case 0x6f:
2150              {
2151                /** 0110 0001 0110 1rba		or	%0, %1				*/
2152#line 957 "rl78-decode.opc"
2153                int rba AU = op[1] & 0x07;
2154                if (trace)
2155                  {
2156                    printf ("\033[33m%s\033[0m  %02x %02x\n",
2157                           "/** 0110 0001 0110 1rba		or	%0, %1				*/",
2158                           op[0], op[1]);
2159                    printf ("  rba = 0x%x\n", rba);
2160                  }
2161                SYNTAX("or	%0, %1");
2162#line 957 "rl78-decode.opc"
2163                ID(or); DR(A); SRB(rba); Fz;
2164
2165              }
2166            break;
2167          case 0x69:
2168              {
2169                /** 0110 0001 0110 1001		dec	%e0				*/
2170                if (trace)
2171                  {
2172                    printf ("\033[33m%s\033[0m  %02x %02x\n",
2173                           "/** 0110 0001 0110 1001		dec	%e0				*/",
2174                           op[0], op[1]);
2175                  }
2176                SYNTAX("dec	%e0");
2177#line 550 "rl78-decode.opc"
2178                ID(sub); DM(HL, IMMU(1)); SC(1); Fza;
2179
2180              }
2181            break;
2182          case 0x70:
2183          case 0x71:
2184          case 0x72:
2185          case 0x73:
2186          case 0x74:
2187          case 0x75:
2188          case 0x76:
2189          case 0x77:
2190              {
2191                /** 0110 0001 0111 0reg		xor	%0, %1				*/
2192#line 1264 "rl78-decode.opc"
2193                int reg AU = op[1] & 0x07;
2194                if (trace)
2195                  {
2196                    printf ("\033[33m%s\033[0m  %02x %02x\n",
2197                           "/** 0110 0001 0111 0reg		xor	%0, %1				*/",
2198                           op[0], op[1]);
2199                    printf ("  reg = 0x%x\n", reg);
2200                  }
2201                SYNTAX("xor	%0, %1");
2202#line 1264 "rl78-decode.opc"
2203                ID(xor); DRB(reg); SR(A); Fz;
2204
2205              }
2206            break;
2207          case 0x78:
2208          case 0x7a:
2209          case 0x7b:
2210          case 0x7c:
2211          case 0x7d:
2212          case 0x7e:
2213          case 0x7f:
2214              {
2215                /** 0110 0001 0111 1rba		xor	%0, %1				*/
2216#line 1261 "rl78-decode.opc"
2217                int rba AU = op[1] & 0x07;
2218                if (trace)
2219                  {
2220                    printf ("\033[33m%s\033[0m  %02x %02x\n",
2221                           "/** 0110 0001 0111 1rba		xor	%0, %1				*/",
2222                           op[0], op[1]);
2223                    printf ("  rba = 0x%x\n", rba);
2224                  }
2225                SYNTAX("xor	%0, %1");
2226#line 1261 "rl78-decode.opc"
2227                ID(xor); DR(A); SRB(rba); Fz;
2228
2229              }
2230            break;
2231          case 0x79:
2232              {
2233                /** 0110 0001 0111 1001		incw	%e0				*/
2234                if (trace)
2235                  {
2236                    printf ("\033[33m%s\033[0m  %02x %02x\n",
2237                           "/** 0110 0001 0111 1001		incw	%e0				*/",
2238                           op[0], op[1]);
2239                  }
2240                SYNTAX("incw	%e0");
2241#line 597 "rl78-decode.opc"
2242                ID(add); W(); DM(HL, IMMU(1)); SC(1);
2243
2244              }
2245            break;
2246          case 0x80:
2247          case 0x81:
2248              {
2249                /** 0110 0001 1000 000		add	%0, %e1				*/
2250                if (trace)
2251                  {
2252                    printf ("\033[33m%s\033[0m  %02x %02x\n",
2253                           "/** 0110 0001 1000 000		add	%0, %e1				*/",
2254                           op[0], op[1]);
2255                  }
2256                SYNTAX("add	%0, %e1");
2257#line 206 "rl78-decode.opc"
2258                ID(add); DR(A); SM2(HL, B, 0); Fzac;
2259
2260              }
2261            break;
2262          case 0x82:
2263              {
2264                /** 0110 0001 1000 0010		add	%0, %e1				*/
2265                if (trace)
2266                  {
2267                    printf ("\033[33m%s\033[0m  %02x %02x\n",
2268                           "/** 0110 0001 1000 0010		add	%0, %e1				*/",
2269                           op[0], op[1]);
2270                  }
2271                SYNTAX("add	%0, %e1");
2272#line 212 "rl78-decode.opc"
2273                ID(add); DR(A); SM2(HL, C, 0); Fzac;
2274
2275              }
2276            break;
2277          case 0x84:
2278          case 0x85:
2279          case 0x86:
2280          case 0x87:
2281          case 0x94:
2282          case 0x95:
2283          case 0x96:
2284          case 0x97:
2285          case 0xa4:
2286          case 0xa5:
2287          case 0xa6:
2288          case 0xa7:
2289          case 0xb4:
2290          case 0xb5:
2291          case 0xb6:
2292          case 0xb7:
2293          case 0xc4:
2294          case 0xc5:
2295          case 0xc6:
2296          case 0xc7:
2297          case 0xd4:
2298          case 0xd5:
2299          case 0xd6:
2300          case 0xd7:
2301          case 0xe4:
2302          case 0xe5:
2303          case 0xe6:
2304          case 0xe7:
2305          case 0xf4:
2306          case 0xf5:
2307          case 0xf6:
2308          case 0xf7:
2309              {
2310                /** 0110 0001 1nnn 01mm		callt	[%x0]				*/
2311#line 432 "rl78-decode.opc"
2312                int nnn AU = (op[1] >> 4) & 0x07;
2313#line 432 "rl78-decode.opc"
2314                int mm AU = op[1] & 0x03;
2315                if (trace)
2316                  {
2317                    printf ("\033[33m%s\033[0m  %02x %02x\n",
2318                           "/** 0110 0001 1nnn 01mm		callt	[%x0]				*/",
2319                           op[0], op[1]);
2320                    printf ("  nnn = 0x%x,", nnn);
2321                    printf ("  mm = 0x%x\n", mm);
2322                  }
2323                SYNTAX("callt	[%x0]");
2324#line 432 "rl78-decode.opc"
2325                ID(call); DM(None, 0x80 + mm*16 + nnn*2);
2326
2327              /*----------------------------------------------------------------------*/
2328
2329              }
2330            break;
2331          case 0x88:
2332          case 0x8a:
2333          case 0x8b:
2334          case 0x8c:
2335          case 0x8d:
2336          case 0x8e:
2337          case 0x8f:
2338              {
2339                /** 0110 0001 1000 1reg		xch	%0, %1				*/
2340#line 1223 "rl78-decode.opc"
2341                int reg AU = op[1] & 0x07;
2342                if (trace)
2343                  {
2344                    printf ("\033[33m%s\033[0m  %02x %02x\n",
2345                           "/** 0110 0001 1000 1reg		xch	%0, %1				*/",
2346                           op[0], op[1]);
2347                    printf ("  reg = 0x%x\n", reg);
2348                  }
2349                SYNTAX("xch	%0, %1");
2350#line 1223 "rl78-decode.opc"
2351                /* Note: DECW uses reg == X, so this must follow DECW */
2352                ID(xch); DR(A); SRB(reg);
2353
2354              }
2355            break;
2356          case 0x89:
2357              {
2358                /** 0110 0001 1000 1001		decw	%e0				*/
2359                if (trace)
2360                  {
2361                    printf ("\033[33m%s\033[0m  %02x %02x\n",
2362                           "/** 0110 0001 1000 1001		decw	%e0				*/",
2363                           op[0], op[1]);
2364                  }
2365                SYNTAX("decw	%e0");
2366#line 564 "rl78-decode.opc"
2367                ID(sub); W(); DM(HL, IMMU(1)); SC(1);
2368
2369              }
2370            break;
2371          case 0x90:
2372              {
2373                /** 0110 0001 1001 0000		addc	%0, %e1				*/
2374                if (trace)
2375                  {
2376                    printf ("\033[33m%s\033[0m  %02x %02x\n",
2377                           "/** 0110 0001 1001 0000		addc	%0, %e1				*/",
2378                           op[0], op[1]);
2379                  }
2380                SYNTAX("addc	%0, %e1");
2381#line 238 "rl78-decode.opc"
2382                ID(addc); DR(A); SM2(HL, B, 0); Fzac;
2383
2384              }
2385            break;
2386          case 0x92:
2387              {
2388                /** 0110 0001 1001 0010		addc	%0, %e1				*/
2389                if (trace)
2390                  {
2391                    printf ("\033[33m%s\033[0m  %02x %02x\n",
2392                           "/** 0110 0001 1001 0010		addc	%0, %e1				*/",
2393                           op[0], op[1]);
2394                  }
2395                SYNTAX("addc	%0, %e1");
2396#line 241 "rl78-decode.opc"
2397                ID(addc); DR(A); SM2(HL, C, 0); Fzac;
2398
2399              }
2400            break;
2401          case 0xa0:
2402          case 0xa1:
2403              {
2404                /** 0110 0001 1010 000		sub	%0, %e1				*/
2405                if (trace)
2406                  {
2407                    printf ("\033[33m%s\033[0m  %02x %02x\n",
2408                           "/** 0110 0001 1010 000		sub	%0, %e1				*/",
2409                           op[0], op[1]);
2410                  }
2411                SYNTAX("sub	%0, %e1");
2412#line 1124 "rl78-decode.opc"
2413                ID(sub); DR(A); SM2(HL, B, 0); Fzac;
2414
2415              }
2416            break;
2417          case 0xa2:
2418              {
2419                /** 0110 0001 1010 0010		sub	%0, %e1				*/
2420                if (trace)
2421                  {
2422                    printf ("\033[33m%s\033[0m  %02x %02x\n",
2423                           "/** 0110 0001 1010 0010		sub	%0, %e1				*/",
2424                           op[0], op[1]);
2425                  }
2426                SYNTAX("sub	%0, %e1");
2427#line 1130 "rl78-decode.opc"
2428                ID(sub); DR(A); SM2(HL, C, 0); Fzac;
2429
2430              }
2431            break;
2432          case 0xa8:
2433              {
2434                /** 0110 0001 1010 1000	       	xch	%0, %1				*/
2435                if (trace)
2436                  {
2437                    printf ("\033[33m%s\033[0m  %02x %02x\n",
2438                           "/** 0110 0001 1010 1000	       	xch	%0, %1				*/",
2439                           op[0], op[1]);
2440                  }
2441                SYNTAX("xch	%0, %1");
2442#line 1227 "rl78-decode.opc"
2443                ID(xch); DR(A); SM(None, SADDR);
2444
2445              }
2446            break;
2447          case 0xa9:
2448              {
2449                /** 0110 0001 1010 1001		xch	%0, %e1				*/
2450                if (trace)
2451                  {
2452                    printf ("\033[33m%s\033[0m  %02x %02x\n",
2453                           "/** 0110 0001 1010 1001		xch	%0, %e1				*/",
2454                           op[0], op[1]);
2455                  }
2456                SYNTAX("xch	%0, %e1");
2457#line 1220 "rl78-decode.opc"
2458                ID(xch); DR(A); SM2(HL, C, 0);
2459
2460              }
2461            break;
2462          case 0xaa:
2463              {
2464                /** 0110 0001 1010 1010		xch	%0, %e!1			*/
2465                if (trace)
2466                  {
2467                    printf ("\033[33m%s\033[0m  %02x %02x\n",
2468                           "/** 0110 0001 1010 1010		xch	%0, %e!1			*/",
2469                           op[0], op[1]);
2470                  }
2471                SYNTAX("xch	%0, %e!1");
2472#line 1202 "rl78-decode.opc"
2473                ID(xch); DR(A); SM(None, IMMU(2));
2474
2475              }
2476            break;
2477          case 0xab:
2478              {
2479                /** 0110 0001 1010 1011	       	xch	%0, %1				*/
2480                if (trace)
2481                  {
2482                    printf ("\033[33m%s\033[0m  %02x %02x\n",
2483                           "/** 0110 0001 1010 1011	       	xch	%0, %1				*/",
2484                           op[0], op[1]);
2485                  }
2486                SYNTAX("xch	%0, %1");
2487#line 1230 "rl78-decode.opc"
2488                ID(xch); DR(A); SM(None, SFR);
2489
2490              }
2491            break;
2492          case 0xac:
2493              {
2494                /** 0110 0001 1010 1100		xch	%0, %e1				*/
2495                if (trace)
2496                  {
2497                    printf ("\033[33m%s\033[0m  %02x %02x\n",
2498                           "/** 0110 0001 1010 1100		xch	%0, %e1				*/",
2499                           op[0], op[1]);
2500                  }
2501                SYNTAX("xch	%0, %e1");
2502#line 1211 "rl78-decode.opc"
2503                ID(xch); DR(A); SM(HL, 0);
2504
2505              }
2506            break;
2507          case 0xad:
2508              {
2509                /** 0110 0001 1010 1101		xch	%0, %e1				*/
2510                if (trace)
2511                  {
2512                    printf ("\033[33m%s\033[0m  %02x %02x\n",
2513                           "/** 0110 0001 1010 1101		xch	%0, %e1				*/",
2514                           op[0], op[1]);
2515                  }
2516                SYNTAX("xch	%0, %e1");
2517#line 1217 "rl78-decode.opc"
2518                ID(xch); DR(A); SM(HL, IMMU(1));
2519
2520              }
2521            break;
2522          case 0xae:
2523              {
2524                /** 0110 0001 1010 1110		xch	%0, %e1				*/
2525                if (trace)
2526                  {
2527                    printf ("\033[33m%s\033[0m  %02x %02x\n",
2528                           "/** 0110 0001 1010 1110		xch	%0, %e1				*/",
2529                           op[0], op[1]);
2530                  }
2531                SYNTAX("xch	%0, %e1");
2532#line 1205 "rl78-decode.opc"
2533                ID(xch); DR(A); SM(DE, 0);
2534
2535              }
2536            break;
2537          case 0xaf:
2538              {
2539                /** 0110 0001 1010 1111		xch	%0, %e1				*/
2540                if (trace)
2541                  {
2542                    printf ("\033[33m%s\033[0m  %02x %02x\n",
2543                           "/** 0110 0001 1010 1111		xch	%0, %e1				*/",
2544                           op[0], op[1]);
2545                  }
2546                SYNTAX("xch	%0, %e1");
2547#line 1208 "rl78-decode.opc"
2548                ID(xch); DR(A); SM(DE, IMMU(1));
2549
2550              }
2551            break;
2552          case 0xb0:
2553              {
2554                /** 0110 0001 1011 0000		subc	%0, %e1				*/
2555                if (trace)
2556                  {
2557                    printf ("\033[33m%s\033[0m  %02x %02x\n",
2558                           "/** 0110 0001 1011 0000		subc	%0, %e1				*/",
2559                           op[0], op[1]);
2560                  }
2561                SYNTAX("subc	%0, %e1");
2562#line 1156 "rl78-decode.opc"
2563                ID(subc); DR(A); SM2(HL, B, 0); Fzac;
2564
2565              }
2566            break;
2567          case 0xb2:
2568              {
2569                /** 0110 0001 1011 0010		subc	%0, %e1				*/
2570                if (trace)
2571                  {
2572                    printf ("\033[33m%s\033[0m  %02x %02x\n",
2573                           "/** 0110 0001 1011 0010		subc	%0, %e1				*/",
2574                           op[0], op[1]);
2575                  }
2576                SYNTAX("subc	%0, %e1");
2577#line 1159 "rl78-decode.opc"
2578                ID(subc); DR(A); SM2(HL, C, 0); Fzac;
2579
2580              }
2581            break;
2582          case 0xb8:
2583              {
2584                /** 0110 0001 1011 1000		mov	%0, %1				*/
2585                if (trace)
2586                  {
2587                    printf ("\033[33m%s\033[0m  %02x %02x\n",
2588                           "/** 0110 0001 1011 1000		mov	%0, %1				*/",
2589                           op[0], op[1]);
2590                  }
2591                SYNTAX("mov	%0, %1");
2592#line 722 "rl78-decode.opc"
2593                ID(mov); DR(ES); SM(None, SADDR);
2594
2595              }
2596            break;
2597          case 0xb9:
2598              {
2599                /** 0110 0001 1011 1001		xch	%0, %e1				*/
2600                if (trace)
2601                  {
2602                    printf ("\033[33m%s\033[0m  %02x %02x\n",
2603                           "/** 0110 0001 1011 1001		xch	%0, %e1				*/",
2604                           op[0], op[1]);
2605                  }
2606                SYNTAX("xch	%0, %e1");
2607#line 1214 "rl78-decode.opc"
2608                ID(xch); DR(A); SM2(HL, B, 0);
2609
2610              }
2611            break;
2612          case 0xc0:
2613              {
2614                /** 0110 0001 1100 0000		cmp	%0, %e1				*/
2615                if (trace)
2616                  {
2617                    printf ("\033[33m%s\033[0m  %02x %02x\n",
2618                           "/** 0110 0001 1100 0000		cmp	%0, %e1				*/",
2619                           op[0], op[1]);
2620                  }
2621                SYNTAX("cmp	%0, %e1");
2622#line 491 "rl78-decode.opc"
2623                ID(cmp); DR(A); SM2(HL, B, 0); Fzac;
2624
2625              }
2626            break;
2627          case 0xc2:
2628              {
2629                /** 0110 0001 1100 0010		cmp	%0, %e1				*/
2630                if (trace)
2631                  {
2632                    printf ("\033[33m%s\033[0m  %02x %02x\n",
2633                           "/** 0110 0001 1100 0010		cmp	%0, %e1				*/",
2634                           op[0], op[1]);
2635                  }
2636                SYNTAX("cmp	%0, %e1");
2637#line 494 "rl78-decode.opc"
2638                ID(cmp); DR(A); SM2(HL, C, 0); Fzac;
2639
2640              }
2641            break;
2642          case 0xc3:
2643              {
2644                /** 0110 0001 1100 0011		bh	$%a0				*/
2645                if (trace)
2646                  {
2647                    printf ("\033[33m%s\033[0m  %02x %02x\n",
2648                           "/** 0110 0001 1100 0011		bh	$%a0				*/",
2649                           op[0], op[1]);
2650                  }
2651                SYNTAX("bh	$%a0");
2652#line 339 "rl78-decode.opc"
2653                ID(branch_cond); DC(pc+IMMS(1)+3); SR(None); COND(H);
2654
2655              }
2656            break;
2657          case 0xc8:
2658              {
2659                /** 0110 0001 1100 1000		sk%c1					*/
2660                if (trace)
2661                  {
2662                    printf ("\033[33m%s\033[0m  %02x %02x\n",
2663                           "/** 0110 0001 1100 1000		sk%c1					*/",
2664                           op[0], op[1]);
2665                  }
2666                SYNTAX("sk%c1");
2667#line 1093 "rl78-decode.opc"
2668                ID(skip); COND(C);
2669
2670              }
2671            break;
2672          case 0xc9:
2673              {
2674                /** 0110 0001 1100 1001		mov	%0, %e1				*/
2675                if (trace)
2676                  {
2677                    printf ("\033[33m%s\033[0m  %02x %02x\n",
2678                           "/** 0110 0001 1100 1001		mov	%0, %e1				*/",
2679                           op[0], op[1]);
2680                  }
2681                SYNTAX("mov	%0, %e1");
2682#line 659 "rl78-decode.opc"
2683                ID(mov); DR(A); SM2(HL, B, 0);
2684
2685              }
2686            break;
2687          case 0xca:
2688          case 0xda:
2689          case 0xea:
2690          case 0xfa:
2691              {
2692                /** 0110 0001 11rg 1010		call	%0				*/
2693#line 429 "rl78-decode.opc"
2694                int rg AU = (op[1] >> 4) & 0x03;
2695                if (trace)
2696                  {
2697                    printf ("\033[33m%s\033[0m  %02x %02x\n",
2698                           "/** 0110 0001 11rg 1010		call	%0				*/",
2699                           op[0], op[1]);
2700                    printf ("  rg = 0x%x\n", rg);
2701                  }
2702                SYNTAX("call	%0");
2703#line 429 "rl78-decode.opc"
2704                ID(call); DRW(rg);
2705
2706              }
2707            break;
2708          case 0xcb:
2709              {
2710                /** 0110 0001 1100 1011		br	ax				*/
2711                if (trace)
2712                  {
2713                    printf ("\033[33m%s\033[0m  %02x %02x\n",
2714                           "/** 0110 0001 1100 1011		br	ax				*/",
2715                           op[0], op[1]);
2716                  }
2717                SYNTAX("br	ax");
2718#line 379 "rl78-decode.opc"
2719                ID(branch); DR(AX);
2720
2721              /*----------------------------------------------------------------------*/
2722
2723              }
2724            break;
2725          case 0xcc:
2726              {
2727                /** 0110 0001 1100 1100		brk					*/
2728                if (trace)
2729                  {
2730                    printf ("\033[33m%s\033[0m  %02x %02x\n",
2731                           "/** 0110 0001 1100 1100		brk					*/",
2732                           op[0], op[1]);
2733                  }
2734                SYNTAX("brk");
2735#line 387 "rl78-decode.opc"
2736                ID(break);
2737
2738              /*----------------------------------------------------------------------*/
2739
2740              }
2741            break;
2742          case 0xcd:
2743              {
2744                /** 0110 0001 1100 1101		pop	%s0				*/
2745                if (trace)
2746                  {
2747                    printf ("\033[33m%s\033[0m  %02x %02x\n",
2748                           "/** 0110 0001 1100 1101		pop	%s0				*/",
2749                           op[0], op[1]);
2750                  }
2751                SYNTAX("pop	%s0");
2752#line 988 "rl78-decode.opc"
2753                ID(mov); W(); DR(PSW); SPOP();
2754
2755              /*----------------------------------------------------------------------*/
2756
2757              }
2758            break;
2759          case 0xce:
2760              {
2761                /** 0110 0001 1100 1110		movs	%e0, %1				*/
2762                if (trace)
2763                  {
2764                    printf ("\033[33m%s\033[0m  %02x %02x\n",
2765                           "/** 0110 0001 1100 1110		movs	%e0, %1				*/",
2766                           op[0], op[1]);
2767                  }
2768                SYNTAX("movs	%e0, %1");
2769#line 810 "rl78-decode.opc"
2770                ID(mov); DM(HL, IMMU(1)); SR(X); Fzc;
2771
2772              /*----------------------------------------------------------------------*/
2773
2774              }
2775            break;
2776          case 0xcf:
2777          case 0xdf:
2778          case 0xef:
2779          case 0xff:
2780              {
2781                /** 0110 0001 11rb 1111		sel	rb%1				*/
2782#line 1040 "rl78-decode.opc"
2783                int rb AU = (op[1] >> 4) & 0x03;
2784                if (trace)
2785                  {
2786                    printf ("\033[33m%s\033[0m  %02x %02x\n",
2787                           "/** 0110 0001 11rb 1111		sel	rb%1				*/",
2788                           op[0], op[1]);
2789                    printf ("  rb = 0x%x\n", rb);
2790                  }
2791                SYNTAX("sel	rb%1");
2792#line 1040 "rl78-decode.opc"
2793                ID(sel); SC(rb);
2794
2795              /*----------------------------------------------------------------------*/
2796
2797              }
2798            break;
2799          case 0xd0:
2800              {
2801                /** 0110 0001 1101 0000		and	%0, %e1			*/
2802                if (trace)
2803                  {
2804                    printf ("\033[33m%s\033[0m  %02x %02x\n",
2805                           "/** 0110 0001 1101 0000		and	%0, %e1			*/",
2806                           op[0], op[1]);
2807                  }
2808                SYNTAX("and	%0, %e1");
2809#line 290 "rl78-decode.opc"
2810                ID(and); DR(A); SM2(HL, B, 0); Fz;
2811
2812              }
2813            break;
2814          case 0xd2:
2815              {
2816                /** 0110 0001 1101 0010		and	%0, %e1			*/
2817                if (trace)
2818                  {
2819                    printf ("\033[33m%s\033[0m  %02x %02x\n",
2820                           "/** 0110 0001 1101 0010		and	%0, %e1			*/",
2821                           op[0], op[1]);
2822                  }
2823                SYNTAX("and	%0, %e1");
2824#line 296 "rl78-decode.opc"
2825                ID(and); DR(A); SM2(HL, C, 0); Fz;
2826
2827              }
2828            break;
2829          case 0xd3:
2830              {
2831                /** 0110 0001 1101 0011		bnh	$%a0				*/
2832                if (trace)
2833                  {
2834                    printf ("\033[33m%s\033[0m  %02x %02x\n",
2835                           "/** 0110 0001 1101 0011		bnh	$%a0				*/",
2836                           op[0], op[1]);
2837                  }
2838                SYNTAX("bnh	$%a0");
2839#line 342 "rl78-decode.opc"
2840                ID(branch_cond); DC(pc+IMMS(1)+3); SR(None); COND(NH);
2841
2842              }
2843            break;
2844          case 0xd8:
2845              {
2846                /** 0110 0001 1101 1000		sk%c1					*/
2847                if (trace)
2848                  {
2849                    printf ("\033[33m%s\033[0m  %02x %02x\n",
2850                           "/** 0110 0001 1101 1000		sk%c1					*/",
2851                           op[0], op[1]);
2852                  }
2853                SYNTAX("sk%c1");
2854#line 1099 "rl78-decode.opc"
2855                ID(skip); COND(NC);
2856
2857              }
2858            break;
2859          case 0xd9:
2860              {
2861                /** 0110 0001 1101 1001		mov	%e0, %1				*/
2862                if (trace)
2863                  {
2864                    printf ("\033[33m%s\033[0m  %02x %02x\n",
2865                           "/** 0110 0001 1101 1001		mov	%e0, %1				*/",
2866                           op[0], op[1]);
2867                  }
2868                SYNTAX("mov	%e0, %1");
2869#line 626 "rl78-decode.opc"
2870                ID(mov); DM2(HL, B, 0); SR(A);
2871
2872              }
2873            break;
2874          case 0xdb:
2875              {
2876                /** 0110 0001 1101 1011		ror	%0, %1				*/
2877                if (trace)
2878                  {
2879                    printf ("\033[33m%s\033[0m  %02x %02x\n",
2880                           "/** 0110 0001 1101 1011		ror	%0, %1				*/",
2881                           op[0], op[1]);
2882                  }
2883                SYNTAX("ror	%0, %1");
2884#line 1021 "rl78-decode.opc"
2885                ID(ror); DR(A); SC(1);
2886
2887              }
2888            break;
2889          case 0xdc:
2890              {
2891                /** 0110 0001 1101 1100		rolc	%0, %1				*/
2892                if (trace)
2893                  {
2894                    printf ("\033[33m%s\033[0m  %02x %02x\n",
2895                           "/** 0110 0001 1101 1100		rolc	%0, %1				*/",
2896                           op[0], op[1]);
2897                  }
2898                SYNTAX("rolc	%0, %1");
2899#line 1015 "rl78-decode.opc"
2900                ID(rolc); DR(A); SC(1);
2901
2902              }
2903            break;
2904          case 0xdd:
2905              {
2906                /** 0110 0001 1101 1101		push	%s1				*/
2907                if (trace)
2908                  {
2909                    printf ("\033[33m%s\033[0m  %02x %02x\n",
2910                           "/** 0110 0001 1101 1101		push	%s1				*/",
2911                           op[0], op[1]);
2912                  }
2913                SYNTAX("push	%s1");
2914#line 996 "rl78-decode.opc"
2915                ID(mov); W(); DPUSH(); SR(PSW);
2916
2917              /*----------------------------------------------------------------------*/
2918
2919              }
2920            break;
2921          case 0xde:
2922              {
2923                /** 0110 0001 1101 1110		cmps	%0, %e1				*/
2924                if (trace)
2925                  {
2926                    printf ("\033[33m%s\033[0m  %02x %02x\n",
2927                           "/** 0110 0001 1101 1110		cmps	%0, %e1				*/",
2928                           op[0], op[1]);
2929                  }
2930                SYNTAX("cmps	%0, %e1");
2931#line 525 "rl78-decode.opc"
2932                ID(cmp); DR(X); SM(HL, IMMU(1)); Fzac;
2933
2934              /*----------------------------------------------------------------------*/
2935
2936              }
2937            break;
2938          case 0xe0:
2939              {
2940                /** 0110 0001 1110 0000		or	%0, %e1				*/
2941                if (trace)
2942                  {
2943                    printf ("\033[33m%s\033[0m  %02x %02x\n",
2944                           "/** 0110 0001 1110 0000		or	%0, %e1				*/",
2945                           op[0], op[1]);
2946                  }
2947                SYNTAX("or	%0, %e1");
2948#line 945 "rl78-decode.opc"
2949                ID(or); DR(A); SM2(HL, B, 0); Fz;
2950
2951              }
2952            break;
2953          case 0xe2:
2954              {
2955                /** 0110 0001 1110 0010		or	%0, %e1				*/
2956                if (trace)
2957                  {
2958                    printf ("\033[33m%s\033[0m  %02x %02x\n",
2959                           "/** 0110 0001 1110 0010		or	%0, %e1				*/",
2960                           op[0], op[1]);
2961                  }
2962                SYNTAX("or	%0, %e1");
2963#line 951 "rl78-decode.opc"
2964                ID(or); DR(A); SM2(HL, C, 0); Fz;
2965
2966              }
2967            break;
2968          case 0xe3:
2969              {
2970                /** 0110 0001 1110 0011		sk%c1					*/
2971                if (trace)
2972                  {
2973                    printf ("\033[33m%s\033[0m  %02x %02x\n",
2974                           "/** 0110 0001 1110 0011		sk%c1					*/",
2975                           op[0], op[1]);
2976                  }
2977                SYNTAX("sk%c1");
2978#line 1096 "rl78-decode.opc"
2979                ID(skip); COND(H);
2980
2981              }
2982            break;
2983          case 0xe8:
2984              {
2985                /** 0110 0001 1110 1000		sk%c1					*/
2986                if (trace)
2987                  {
2988                    printf ("\033[33m%s\033[0m  %02x %02x\n",
2989                           "/** 0110 0001 1110 1000		sk%c1					*/",
2990                           op[0], op[1]);
2991                  }
2992                SYNTAX("sk%c1");
2993#line 1108 "rl78-decode.opc"
2994                ID(skip); COND(Z);
2995
2996              /*----------------------------------------------------------------------*/
2997
2998              }
2999            break;
3000          case 0xe9:
3001              {
3002                /** 0110 0001 1110 1001		mov	%0, %e1				*/
3003                if (trace)
3004                  {
3005                    printf ("\033[33m%s\033[0m  %02x %02x\n",
3006                           "/** 0110 0001 1110 1001		mov	%0, %e1				*/",
3007                           op[0], op[1]);
3008                  }
3009                SYNTAX("mov	%0, %e1");
3010#line 662 "rl78-decode.opc"
3011                ID(mov); DR(A); SM2(HL, C, 0);
3012
3013              }
3014            break;
3015          case 0xeb:
3016              {
3017                /** 0110 0001 1110 1011		rol	%0, %1				*/
3018                if (trace)
3019                  {
3020                    printf ("\033[33m%s\033[0m  %02x %02x\n",
3021                           "/** 0110 0001 1110 1011		rol	%0, %1				*/",
3022                           op[0], op[1]);
3023                  }
3024                SYNTAX("rol	%0, %1");
3025#line 1012 "rl78-decode.opc"
3026                ID(rol); DR(A); SC(1);
3027
3028              }
3029            break;
3030          case 0xec:
3031              {
3032                /** 0110 0001 1110 1100		retb					*/
3033                if (trace)
3034                  {
3035                    printf ("\033[33m%s\033[0m  %02x %02x\n",
3036                           "/** 0110 0001 1110 1100		retb					*/",
3037                           op[0], op[1]);
3038                  }
3039                SYNTAX("retb");
3040#line 1007 "rl78-decode.opc"
3041                ID(reti);
3042
3043              /*----------------------------------------------------------------------*/
3044
3045              }
3046            break;
3047          case 0xed:
3048              {
3049                /** 0110 0001 1110 1101		halt					*/
3050                if (trace)
3051                  {
3052                    printf ("\033[33m%s\033[0m  %02x %02x\n",
3053                           "/** 0110 0001 1110 1101		halt					*/",
3054                           op[0], op[1]);
3055                  }
3056                SYNTAX("halt");
3057#line 575 "rl78-decode.opc"
3058                ID(halt);
3059
3060              /*----------------------------------------------------------------------*/
3061
3062              }
3063            break;
3064          case 0xee:
3065          case 0xfe:
3066              {
3067                /** 0110 0001 111r 1110		rolwc	%0, %1				*/
3068#line 1018 "rl78-decode.opc"
3069                int r AU = (op[1] >> 4) & 0x01;
3070                if (trace)
3071                  {
3072                    printf ("\033[33m%s\033[0m  %02x %02x\n",
3073                           "/** 0110 0001 111r 1110		rolwc	%0, %1				*/",
3074                           op[0], op[1]);
3075                    printf ("  r = 0x%x\n", r);
3076                  }
3077                SYNTAX("rolwc	%0, %1");
3078#line 1018 "rl78-decode.opc"
3079                ID(rolc); W(); DRW(r); SC(1);
3080
3081              }
3082            break;
3083          case 0xf0:
3084              {
3085                /** 0110 0001 1111 0000		xor	%0, %e1				*/
3086                if (trace)
3087                  {
3088                    printf ("\033[33m%s\033[0m  %02x %02x\n",
3089                           "/** 0110 0001 1111 0000		xor	%0, %e1				*/",
3090                           op[0], op[1]);
3091                  }
3092                SYNTAX("xor	%0, %e1");
3093#line 1249 "rl78-decode.opc"
3094                ID(xor); DR(A); SM2(HL, B, 0); Fz;
3095
3096              }
3097            break;
3098          case 0xf2:
3099              {
3100                /** 0110 0001 1111 0010		xor	%0, %e1				*/
3101                if (trace)
3102                  {
3103                    printf ("\033[33m%s\033[0m  %02x %02x\n",
3104                           "/** 0110 0001 1111 0010		xor	%0, %e1				*/",
3105                           op[0], op[1]);
3106                  }
3107                SYNTAX("xor	%0, %e1");
3108#line 1255 "rl78-decode.opc"
3109                ID(xor); DR(A); SM2(HL, C, 0); Fz;
3110
3111              }
3112            break;
3113          case 0xf3:
3114              {
3115                /** 0110 0001 1111 0011		sk%c1					*/
3116                if (trace)
3117                  {
3118                    printf ("\033[33m%s\033[0m  %02x %02x\n",
3119                           "/** 0110 0001 1111 0011		sk%c1					*/",
3120                           op[0], op[1]);
3121                  }
3122                SYNTAX("sk%c1");
3123#line 1102 "rl78-decode.opc"
3124                ID(skip); COND(NH);
3125
3126              }
3127            break;
3128          case 0xf8:
3129              {
3130                /** 0110 0001 1111 1000		sk%c1					*/
3131                if (trace)
3132                  {
3133                    printf ("\033[33m%s\033[0m  %02x %02x\n",
3134                           "/** 0110 0001 1111 1000		sk%c1					*/",
3135                           op[0], op[1]);
3136                  }
3137                SYNTAX("sk%c1");
3138#line 1105 "rl78-decode.opc"
3139                ID(skip); COND(NZ);
3140
3141              }
3142            break;
3143          case 0xf9:
3144              {
3145                /** 0110 0001 1111 1001		mov	%e0, %1				*/
3146                if (trace)
3147                  {
3148                    printf ("\033[33m%s\033[0m  %02x %02x\n",
3149                           "/** 0110 0001 1111 1001		mov	%e0, %1				*/",
3150                           op[0], op[1]);
3151                  }
3152                SYNTAX("mov	%e0, %1");
3153#line 635 "rl78-decode.opc"
3154                ID(mov); DM2(HL, C, 0); SR(A);
3155
3156              }
3157            break;
3158          case 0xfb:
3159              {
3160                /** 0110 0001 1111 1011		rorc	%0, %1				*/
3161                if (trace)
3162                  {
3163                    printf ("\033[33m%s\033[0m  %02x %02x\n",
3164                           "/** 0110 0001 1111 1011		rorc	%0, %1				*/",
3165                           op[0], op[1]);
3166                  }
3167                SYNTAX("rorc	%0, %1");
3168#line 1024 "rl78-decode.opc"
3169                ID(rorc); DR(A); SC(1);
3170
3171              /*----------------------------------------------------------------------*/
3172
3173              /* Note that the branch insns need to be listed before the shift
3174                 ones, as "shift count of zero" means "branch insn" */
3175
3176              }
3177            break;
3178          case 0xfc:
3179              {
3180                /** 0110 0001 1111 1100		reti					*/
3181                if (trace)
3182                  {
3183                    printf ("\033[33m%s\033[0m  %02x %02x\n",
3184                           "/** 0110 0001 1111 1100		reti					*/",
3185                           op[0], op[1]);
3186                  }
3187                SYNTAX("reti");
3188#line 1004 "rl78-decode.opc"
3189                ID(reti);
3190
3191              }
3192            break;
3193          case 0xfd:
3194              {
3195                /** 0110 0001 1111 1101	stop						*/
3196                if (trace)
3197                  {
3198                    printf ("\033[33m%s\033[0m  %02x %02x\n",
3199                           "/** 0110 0001 1111 1101	stop						*/",
3200                           op[0], op[1]);
3201                  }
3202                SYNTAX("stop");
3203#line 1113 "rl78-decode.opc"
3204                ID(stop);
3205
3206              /*----------------------------------------------------------------------*/
3207
3208              }
3209            break;
3210          default: UNSUPPORTED(); break;
3211        }
3212      break;
3213    case 0x68:
3214        {
3215          /** 0110 1000			movw	%e0, %1				*/
3216          if (trace)
3217            {
3218              printf ("\033[33m%s\033[0m  %02x\n",
3219                     "/** 0110 1000			movw	%e0, %1				*/",
3220                     op[0]);
3221            }
3222          SYNTAX("movw	%e0, %1");
3223#line 873 "rl78-decode.opc"
3224          ID(mov); W(); DM(C, IMMU(2)); SR(AX);
3225
3226        }
3227      break;
3228    case 0x69:
3229        {
3230          /** 0110 1001			movw	%0, %e1				*/
3231          if (trace)
3232            {
3233              printf ("\033[33m%s\033[0m  %02x\n",
3234                     "/** 0110 1001			movw	%0, %e1				*/",
3235                     op[0]);
3236            }
3237          SYNTAX("movw	%0, %e1");
3238#line 864 "rl78-decode.opc"
3239          ID(mov); W(); DR(AX); SM(C, IMMU(2));
3240
3241        }
3242      break;
3243    case 0x6a:
3244        {
3245          /** 0110 1010	       		or	%0, #%1				*/
3246          if (trace)
3247            {
3248              printf ("\033[33m%s\033[0m  %02x\n",
3249                     "/** 0110 1010	       		or	%0, #%1				*/",
3250                     op[0]);
3251            }
3252          SYNTAX("or	%0, #%1");
3253#line 966 "rl78-decode.opc"
3254          ID(or); DM(None, SADDR); SC(IMMU(1)); Fz;
3255
3256        /*----------------------------------------------------------------------*/
3257
3258        }
3259      break;
3260    case 0x6b:
3261        {
3262          /** 0110 1011	       		or	%0, %1				*/
3263          if (trace)
3264            {
3265              printf ("\033[33m%s\033[0m  %02x\n",
3266                     "/** 0110 1011	       		or	%0, %1				*/",
3267                     op[0]);
3268            }
3269          SYNTAX("or	%0, %1");
3270#line 963 "rl78-decode.opc"
3271          ID(or); DR(A); SM(None, SADDR); Fz;
3272
3273        }
3274      break;
3275    case 0x6c:
3276        {
3277          /** 0110 1100	       		or	%0, #%1				*/
3278          if (trace)
3279            {
3280              printf ("\033[33m%s\033[0m  %02x\n",
3281                     "/** 0110 1100	       		or	%0, #%1				*/",
3282                     op[0]);
3283            }
3284          SYNTAX("or	%0, #%1");
3285#line 954 "rl78-decode.opc"
3286          ID(or); DR(A); SC(IMMU(1)); Fz;
3287
3288        }
3289      break;
3290    case 0x6d:
3291        {
3292          /** 0110 1101			or	%0, %e1				*/
3293          if (trace)
3294            {
3295              printf ("\033[33m%s\033[0m  %02x\n",
3296                     "/** 0110 1101			or	%0, %e1				*/",
3297                     op[0]);
3298            }
3299          SYNTAX("or	%0, %e1");
3300#line 942 "rl78-decode.opc"
3301          ID(or); DR(A); SM(HL, 0); Fz;
3302
3303        }
3304      break;
3305    case 0x6e:
3306        {
3307          /** 0110 1110			or	%0, %e1				*/
3308          if (trace)
3309            {
3310              printf ("\033[33m%s\033[0m  %02x\n",
3311                     "/** 0110 1110			or	%0, %e1				*/",
3312                     op[0]);
3313            }
3314          SYNTAX("or	%0, %e1");
3315#line 948 "rl78-decode.opc"
3316          ID(or); DR(A); SM(HL, IMMU(1)); Fz;
3317
3318        }
3319      break;
3320    case 0x6f:
3321        {
3322          /** 0110 1111			or	%0, %e!1			*/
3323          if (trace)
3324            {
3325              printf ("\033[33m%s\033[0m  %02x\n",
3326                     "/** 0110 1111			or	%0, %e!1			*/",
3327                     op[0]);
3328            }
3329          SYNTAX("or	%0, %e!1");
3330#line 939 "rl78-decode.opc"
3331          ID(or); DR(A); SM(None, IMMU(2)); Fz;
3332
3333        }
3334      break;
3335    case 0x70:
3336    case 0x72:
3337    case 0x73:
3338    case 0x74:
3339    case 0x75:
3340    case 0x76:
3341    case 0x77:
3342        {
3343          /** 0111 0rba			mov	%0, %1				*/
3344#line 695 "rl78-decode.opc"
3345          int rba AU = op[0] & 0x07;
3346          if (trace)
3347            {
3348              printf ("\033[33m%s\033[0m  %02x\n",
3349                     "/** 0111 0rba			mov	%0, %1				*/",
3350                     op[0]);
3351              printf ("  rba = 0x%x\n", rba);
3352            }
3353          SYNTAX("mov	%0, %1");
3354#line 695 "rl78-decode.opc"
3355          ID(mov); DRB(rba); SR(A);
3356
3357        }
3358      break;
3359    case 0x71:
3360        GETBYTE ();
3361        switch (op[1] & 0xff)
3362        {
3363          case 0x00:
3364          case 0x10:
3365          case 0x20:
3366          case 0x30:
3367          case 0x40:
3368          case 0x50:
3369          case 0x60:
3370          case 0x70:
3371              {
3372                /** 0111 0001 0bit 0000		set1	%e!0				*/
3373#line 1045 "rl78-decode.opc"
3374                int bit AU = (op[1] >> 4) & 0x07;
3375                if (trace)
3376                  {
3377                    printf ("\033[33m%s\033[0m  %02x %02x\n",
3378                           "/** 0111 0001 0bit 0000		set1	%e!0				*/",
3379                           op[0], op[1]);
3380                    printf ("  bit = 0x%x\n", bit);
3381                  }
3382                SYNTAX("set1	%e!0");
3383#line 1045 "rl78-decode.opc"
3384                ID(mov); DM(None, IMMU(2)); DB(bit); SC(1);
3385
3386              }
3387            break;
3388          case 0x01:
3389          case 0x11:
3390          case 0x21:
3391          case 0x31:
3392          case 0x41:
3393          case 0x51:
3394          case 0x61:
3395          case 0x71:
3396              {
3397                /** 0111 0001 0bit 0001		mov1	%0, cy				*/
3398#line 802 "rl78-decode.opc"
3399                int bit AU = (op[1] >> 4) & 0x07;
3400                if (trace)
3401                  {
3402                    printf ("\033[33m%s\033[0m  %02x %02x\n",
3403                           "/** 0111 0001 0bit 0001		mov1	%0, cy				*/",
3404                           op[0], op[1]);
3405                    printf ("  bit = 0x%x\n", bit);
3406                  }
3407                SYNTAX("mov1	%0, cy");
3408#line 802 "rl78-decode.opc"
3409                ID(mov); DM(None, SADDR); DB(bit); SCY();
3410
3411              }
3412            break;
3413          case 0x02:
3414          case 0x12:
3415          case 0x22:
3416          case 0x32:
3417          case 0x42:
3418          case 0x52:
3419          case 0x62:
3420          case 0x72:
3421              {
3422                /** 0111 0001 0bit 0010		set1	%0				*/
3423#line 1063 "rl78-decode.opc"
3424                int bit AU = (op[1] >> 4) & 0x07;
3425                if (trace)
3426                  {
3427                    printf ("\033[33m%s\033[0m  %02x %02x\n",
3428                           "/** 0111 0001 0bit 0010		set1	%0				*/",
3429                           op[0], op[1]);
3430                    printf ("  bit = 0x%x\n", bit);
3431                  }
3432                SYNTAX("set1	%0");
3433#line 1063 "rl78-decode.opc"
3434                ID(mov); DM(None, SADDR); DB(bit); SC(1);
3435
3436              /*----------------------------------------------------------------------*/
3437
3438              }
3439            break;
3440          case 0x03:
3441          case 0x13:
3442          case 0x23:
3443          case 0x33:
3444          case 0x43:
3445          case 0x53:
3446          case 0x63:
3447          case 0x73:
3448              {
3449                /** 0111 0001 0bit 0011		clr1	%0				*/
3450#line 455 "rl78-decode.opc"
3451                int bit AU = (op[1] >> 4) & 0x07;
3452                if (trace)
3453                  {
3454                    printf ("\033[33m%s\033[0m  %02x %02x\n",
3455                           "/** 0111 0001 0bit 0011		clr1	%0				*/",
3456                           op[0], op[1]);
3457                    printf ("  bit = 0x%x\n", bit);
3458                  }
3459                SYNTAX("clr1	%0");
3460#line 455 "rl78-decode.opc"
3461                ID(mov); DM(None, SADDR); DB(bit); SC(0);
3462
3463              /*----------------------------------------------------------------------*/
3464
3465              }
3466            break;
3467          case 0x04:
3468          case 0x14:
3469          case 0x24:
3470          case 0x34:
3471          case 0x44:
3472          case 0x54:
3473          case 0x64:
3474          case 0x74:
3475              {
3476                /** 0111 0001 0bit 0100		mov1	cy, %1				*/
3477#line 796 "rl78-decode.opc"
3478                int bit AU = (op[1] >> 4) & 0x07;
3479                if (trace)
3480                  {
3481                    printf ("\033[33m%s\033[0m  %02x %02x\n",
3482                           "/** 0111 0001 0bit 0100		mov1	cy, %1				*/",
3483                           op[0], op[1]);
3484                    printf ("  bit = 0x%x\n", bit);
3485                  }
3486                SYNTAX("mov1	cy, %1");
3487#line 796 "rl78-decode.opc"
3488                ID(mov); DCY(); SM(None, SADDR); SB(bit);
3489
3490              }
3491            break;
3492          case 0x05:
3493          case 0x15:
3494          case 0x25:
3495          case 0x35:
3496          case 0x45:
3497          case 0x55:
3498          case 0x65:
3499          case 0x75:
3500              {
3501                /** 0111 0001 0bit 0101		and1	cy, %s1				*/
3502#line 325 "rl78-decode.opc"
3503                int bit AU = (op[1] >> 4) & 0x07;
3504                if (trace)
3505                  {
3506                    printf ("\033[33m%s\033[0m  %02x %02x\n",
3507                           "/** 0111 0001 0bit 0101		and1	cy, %s1				*/",
3508                           op[0], op[1]);
3509                    printf ("  bit = 0x%x\n", bit);
3510                  }
3511                SYNTAX("and1	cy, %s1");
3512#line 325 "rl78-decode.opc"
3513                ID(and); DCY(); SM(None, SADDR); SB(bit);
3514
3515              /*----------------------------------------------------------------------*/
3516
3517              /* Note that the branch insns need to be listed before the shift
3518                 ones, as "shift count of zero" means "branch insn" */
3519
3520              }
3521            break;
3522          case 0x06:
3523          case 0x16:
3524          case 0x26:
3525          case 0x36:
3526          case 0x46:
3527          case 0x56:
3528          case 0x66:
3529          case 0x76:
3530              {
3531                /** 0111 0001 0bit 0110		or1	cy, %s1				*/
3532#line 980 "rl78-decode.opc"
3533                int bit AU = (op[1] >> 4) & 0x07;
3534                if (trace)
3535                  {
3536                    printf ("\033[33m%s\033[0m  %02x %02x\n",
3537                           "/** 0111 0001 0bit 0110		or1	cy, %s1				*/",
3538                           op[0], op[1]);
3539                    printf ("  bit = 0x%x\n", bit);
3540                  }
3541                SYNTAX("or1	cy, %s1");
3542#line 980 "rl78-decode.opc"
3543                ID(or); DCY(); SM(None, SADDR); SB(bit);
3544
3545              /*----------------------------------------------------------------------*/
3546
3547              }
3548            break;
3549          case 0x07:
3550          case 0x17:
3551          case 0x27:
3552          case 0x37:
3553          case 0x47:
3554          case 0x57:
3555          case 0x67:
3556          case 0x77:
3557              {
3558                /** 0111 0001 0bit 0111		xor1	cy, %s1				*/
3559#line 1284 "rl78-decode.opc"
3560                int bit AU = (op[1] >> 4) & 0x07;
3561                if (trace)
3562                  {
3563                    printf ("\033[33m%s\033[0m  %02x %02x\n",
3564                           "/** 0111 0001 0bit 0111		xor1	cy, %s1				*/",
3565                           op[0], op[1]);
3566                    printf ("  bit = 0x%x\n", bit);
3567                  }
3568                SYNTAX("xor1	cy, %s1");
3569#line 1284 "rl78-decode.opc"
3570                ID(xor); DCY(); SM(None, SADDR); SB(bit);
3571
3572              /*----------------------------------------------------------------------*/
3573
3574              }
3575            break;
3576          case 0x08:
3577          case 0x18:
3578          case 0x28:
3579          case 0x38:
3580          case 0x48:
3581          case 0x58:
3582          case 0x68:
3583          case 0x78:
3584              {
3585                /** 0111 0001 0bit 1000		clr1	%e!0				*/
3586#line 437 "rl78-decode.opc"
3587                int bit AU = (op[1] >> 4) & 0x07;
3588                if (trace)
3589                  {
3590                    printf ("\033[33m%s\033[0m  %02x %02x\n",
3591                           "/** 0111 0001 0bit 1000		clr1	%e!0				*/",
3592                           op[0], op[1]);
3593                    printf ("  bit = 0x%x\n", bit);
3594                  }
3595                SYNTAX("clr1	%e!0");
3596#line 437 "rl78-decode.opc"
3597                ID(mov); DM(None, IMMU(2)); DB(bit); SC(0);
3598
3599              }
3600            break;
3601          case 0x09:
3602          case 0x19:
3603          case 0x29:
3604          case 0x39:
3605          case 0x49:
3606          case 0x59:
3607          case 0x69:
3608          case 0x79:
3609              {
3610                /** 0111 0001 0bit 1001		mov1	%s0, cy				*/
3611#line 805 "rl78-decode.opc"
3612                int bit AU = (op[1] >> 4) & 0x07;
3613                if (trace)
3614                  {
3615                    printf ("\033[33m%s\033[0m  %02x %02x\n",
3616                           "/** 0111 0001 0bit 1001		mov1	%s0, cy				*/",
3617                           op[0], op[1]);
3618                    printf ("  bit = 0x%x\n", bit);
3619                  }
3620                SYNTAX("mov1	%s0, cy");
3621#line 805 "rl78-decode.opc"
3622                ID(mov); DM(None, SFR); DB(bit); SCY();
3623
3624              /*----------------------------------------------------------------------*/
3625
3626              }
3627            break;
3628          case 0x0a:
3629          case 0x1a:
3630          case 0x2a:
3631          case 0x3a:
3632          case 0x4a:
3633          case 0x5a:
3634          case 0x6a:
3635          case 0x7a:
3636              {
3637                /** 0111 0001 0bit 1010		set1	%s0				*/
3638#line 1057 "rl78-decode.opc"
3639                int bit AU = (op[1] >> 4) & 0x07;
3640                if (trace)
3641                  {
3642                    printf ("\033[33m%s\033[0m  %02x %02x\n",
3643                           "/** 0111 0001 0bit 1010		set1	%s0				*/",
3644                           op[0], op[1]);
3645                    printf ("  bit = 0x%x\n", bit);
3646                  }
3647                SYNTAX("set1	%s0");
3648#line 1057 "rl78-decode.opc"
3649                op0 = SFR;
3650                ID(mov); DM(None, op0); DB(bit); SC(1);
3651                if (op0 == RL78_SFR_PSW && bit == 7)
3652                  rl78->syntax = "ei";
3653
3654              }
3655            break;
3656          case 0x0b:
3657          case 0x1b:
3658          case 0x2b:
3659          case 0x3b:
3660          case 0x4b:
3661          case 0x5b:
3662          case 0x6b:
3663          case 0x7b:
3664              {
3665                /** 0111 0001 0bit 1011		clr1	%s0				*/
3666#line 449 "rl78-decode.opc"
3667                int bit AU = (op[1] >> 4) & 0x07;
3668                if (trace)
3669                  {
3670                    printf ("\033[33m%s\033[0m  %02x %02x\n",
3671                           "/** 0111 0001 0bit 1011		clr1	%s0				*/",
3672                           op[0], op[1]);
3673                    printf ("  bit = 0x%x\n", bit);
3674                  }
3675                SYNTAX("clr1	%s0");
3676#line 449 "rl78-decode.opc"
3677                op0 = SFR;
3678                ID(mov); DM(None, op0); DB(bit); SC(0);
3679                if (op0 == RL78_SFR_PSW && bit == 7)
3680                  rl78->syntax = "di";
3681
3682              }
3683            break;
3684          case 0x0c:
3685          case 0x1c:
3686          case 0x2c:
3687          case 0x3c:
3688          case 0x4c:
3689          case 0x5c:
3690          case 0x6c:
3691          case 0x7c:
3692              {
3693                /** 0111 0001 0bit 1100		mov1	cy, %s1				*/
3694#line 799 "rl78-decode.opc"
3695                int bit AU = (op[1] >> 4) & 0x07;
3696                if (trace)
3697                  {
3698                    printf ("\033[33m%s\033[0m  %02x %02x\n",
3699                           "/** 0111 0001 0bit 1100		mov1	cy, %s1				*/",
3700                           op[0], op[1]);
3701                    printf ("  bit = 0x%x\n", bit);
3702                  }
3703                SYNTAX("mov1	cy, %s1");
3704#line 799 "rl78-decode.opc"
3705                ID(mov); DCY(); SM(None, SFR); SB(bit);
3706
3707              }
3708            break;
3709          case 0x0d:
3710          case 0x1d:
3711          case 0x2d:
3712          case 0x3d:
3713          case 0x4d:
3714          case 0x5d:
3715          case 0x6d:
3716          case 0x7d:
3717              {
3718                /** 0111 0001 0bit 1101		and1	cy, %s1				*/
3719#line 322 "rl78-decode.opc"
3720                int bit AU = (op[1] >> 4) & 0x07;
3721                if (trace)
3722                  {
3723                    printf ("\033[33m%s\033[0m  %02x %02x\n",
3724                           "/** 0111 0001 0bit 1101		and1	cy, %s1				*/",
3725                           op[0], op[1]);
3726                    printf ("  bit = 0x%x\n", bit);
3727                  }
3728                SYNTAX("and1	cy, %s1");
3729#line 322 "rl78-decode.opc"
3730                ID(and); DCY(); SM(None, SFR); SB(bit);
3731
3732              }
3733            break;
3734          case 0x0e:
3735          case 0x1e:
3736          case 0x2e:
3737          case 0x3e:
3738          case 0x4e:
3739          case 0x5e:
3740          case 0x6e:
3741          case 0x7e:
3742              {
3743                /** 0111 0001 0bit 1110		or1	cy, %s1				*/
3744#line 977 "rl78-decode.opc"
3745                int bit AU = (op[1] >> 4) & 0x07;
3746                if (trace)
3747                  {
3748                    printf ("\033[33m%s\033[0m  %02x %02x\n",
3749                           "/** 0111 0001 0bit 1110		or1	cy, %s1				*/",
3750                           op[0], op[1]);
3751                    printf ("  bit = 0x%x\n", bit);
3752                  }
3753                SYNTAX("or1	cy, %s1");
3754#line 977 "rl78-decode.opc"
3755                ID(or); DCY(); SM(None, SFR); SB(bit);
3756
3757              }
3758            break;
3759          case 0x0f:
3760          case 0x1f:
3761          case 0x2f:
3762          case 0x3f:
3763          case 0x4f:
3764          case 0x5f:
3765          case 0x6f:
3766          case 0x7f:
3767              {
3768                /** 0111 0001 0bit 1111		xor1	cy, %s1				*/
3769#line 1281 "rl78-decode.opc"
3770                int bit AU = (op[1] >> 4) & 0x07;
3771                if (trace)
3772                  {
3773                    printf ("\033[33m%s\033[0m  %02x %02x\n",
3774                           "/** 0111 0001 0bit 1111		xor1	cy, %s1				*/",
3775                           op[0], op[1]);
3776                    printf ("  bit = 0x%x\n", bit);
3777                  }
3778                SYNTAX("xor1	cy, %s1");
3779#line 1281 "rl78-decode.opc"
3780                ID(xor); DCY(); SM(None, SFR); SB(bit);
3781
3782              }
3783            break;
3784          case 0x80:
3785              {
3786                /** 0111 0001 1000 0000		set1	cy				*/
3787                if (trace)
3788                  {
3789                    printf ("\033[33m%s\033[0m  %02x %02x\n",
3790                           "/** 0111 0001 1000 0000		set1	cy				*/",
3791                           op[0], op[1]);
3792                  }
3793                SYNTAX("set1	cy");
3794#line 1054 "rl78-decode.opc"
3795                ID(mov); DCY(); SC(1);
3796
3797              }
3798            break;
3799          case 0x81:
3800          case 0x91:
3801          case 0xa1:
3802          case 0xb1:
3803          case 0xc1:
3804          case 0xd1:
3805          case 0xe1:
3806          case 0xf1:
3807              {
3808                /** 0111 0001 1bit 0001		mov1	%e0, cy				*/
3809#line 784 "rl78-decode.opc"
3810                int bit AU = (op[1] >> 4) & 0x07;
3811                if (trace)
3812                  {
3813                    printf ("\033[33m%s\033[0m  %02x %02x\n",
3814                           "/** 0111 0001 1bit 0001		mov1	%e0, cy				*/",
3815                           op[0], op[1]);
3816                    printf ("  bit = 0x%x\n", bit);
3817                  }
3818                SYNTAX("mov1	%e0, cy");
3819#line 784 "rl78-decode.opc"
3820                ID(mov); DM(HL, 0); DB(bit); SCY();
3821
3822              }
3823            break;
3824          case 0x82:
3825          case 0x92:
3826          case 0xa2:
3827          case 0xb2:
3828          case 0xc2:
3829          case 0xd2:
3830          case 0xe2:
3831          case 0xf2:
3832              {
3833                /** 0111 0001 1bit 0010		set1	%e0				*/
3834#line 1048 "rl78-decode.opc"
3835                int bit AU = (op[1] >> 4) & 0x07;
3836                if (trace)
3837                  {
3838                    printf ("\033[33m%s\033[0m  %02x %02x\n",
3839                           "/** 0111 0001 1bit 0010		set1	%e0				*/",
3840                           op[0], op[1]);
3841                    printf ("  bit = 0x%x\n", bit);
3842                  }
3843                SYNTAX("set1	%e0");
3844#line 1048 "rl78-decode.opc"
3845                ID(mov); DM(HL, 0); DB(bit); SC(1);
3846
3847              }
3848            break;
3849          case 0x83:
3850          case 0x93:
3851          case 0xa3:
3852          case 0xb3:
3853          case 0xc3:
3854          case 0xd3:
3855          case 0xe3:
3856          case 0xf3:
3857              {
3858                /** 0111 0001 1bit 0011		clr1	%e0				*/
3859#line 440 "rl78-decode.opc"
3860                int bit AU = (op[1] >> 4) & 0x07;
3861                if (trace)
3862                  {
3863                    printf ("\033[33m%s\033[0m  %02x %02x\n",
3864                           "/** 0111 0001 1bit 0011		clr1	%e0				*/",
3865                           op[0], op[1]);
3866                    printf ("  bit = 0x%x\n", bit);
3867                  }
3868                SYNTAX("clr1	%e0");
3869#line 440 "rl78-decode.opc"
3870                ID(mov); DM(HL, 0); DB(bit); SC(0);
3871
3872              }
3873            break;
3874          case 0x84:
3875          case 0x94:
3876          case 0xa4:
3877          case 0xb4:
3878          case 0xc4:
3879          case 0xd4:
3880          case 0xe4:
3881          case 0xf4:
3882              {
3883                /** 0111 0001 1bit 0100		mov1	cy, %e1				*/
3884#line 790 "rl78-decode.opc"
3885                int bit AU = (op[1] >> 4) & 0x07;
3886                if (trace)
3887                  {
3888                    printf ("\033[33m%s\033[0m  %02x %02x\n",
3889                           "/** 0111 0001 1bit 0100		mov1	cy, %e1				*/",
3890                           op[0], op[1]);
3891                    printf ("  bit = 0x%x\n", bit);
3892                  }
3893                SYNTAX("mov1	cy, %e1");
3894#line 790 "rl78-decode.opc"
3895                ID(mov); DCY(); SM(HL, 0); SB(bit);
3896
3897              }
3898            break;
3899          case 0x85:
3900          case 0x95:
3901          case 0xa5:
3902          case 0xb5:
3903          case 0xc5:
3904          case 0xd5:
3905          case 0xe5:
3906          case 0xf5:
3907              {
3908                /** 0111 0001 1bit 0101		and1	cy, %e1			*/
3909#line 316 "rl78-decode.opc"
3910                int bit AU = (op[1] >> 4) & 0x07;
3911                if (trace)
3912                  {
3913                    printf ("\033[33m%s\033[0m  %02x %02x\n",
3914                           "/** 0111 0001 1bit 0101		and1	cy, %e1			*/",
3915                           op[0], op[1]);
3916                    printf ("  bit = 0x%x\n", bit);
3917                  }
3918                SYNTAX("and1	cy, %e1");
3919#line 316 "rl78-decode.opc"
3920                ID(and); DCY(); SM(HL, 0); SB(bit);
3921
3922              }
3923            break;
3924          case 0x86:
3925          case 0x96:
3926          case 0xa6:
3927          case 0xb6:
3928          case 0xc6:
3929          case 0xd6:
3930          case 0xe6:
3931          case 0xf6:
3932              {
3933                /** 0111 0001 1bit 0110		or1	cy, %e1				*/
3934#line 971 "rl78-decode.opc"
3935                int bit AU = (op[1] >> 4) & 0x07;
3936                if (trace)
3937                  {
3938                    printf ("\033[33m%s\033[0m  %02x %02x\n",
3939                           "/** 0111 0001 1bit 0110		or1	cy, %e1				*/",
3940                           op[0], op[1]);
3941                    printf ("  bit = 0x%x\n", bit);
3942                  }
3943                SYNTAX("or1	cy, %e1");
3944#line 971 "rl78-decode.opc"
3945                ID(or); DCY(); SM(HL, 0); SB(bit);
3946
3947              }
3948            break;
3949          case 0x87:
3950          case 0x97:
3951          case 0xa7:
3952          case 0xb7:
3953          case 0xc7:
3954          case 0xd7:
3955          case 0xe7:
3956          case 0xf7:
3957              {
3958                /** 0111 0001 1bit 0111		xor1	cy, %e1				*/
3959#line 1275 "rl78-decode.opc"
3960                int bit AU = (op[1] >> 4) & 0x07;
3961                if (trace)
3962                  {
3963                    printf ("\033[33m%s\033[0m  %02x %02x\n",
3964                           "/** 0111 0001 1bit 0111		xor1	cy, %e1				*/",
3965                           op[0], op[1]);
3966                    printf ("  bit = 0x%x\n", bit);
3967                  }
3968                SYNTAX("xor1	cy, %e1");
3969#line 1275 "rl78-decode.opc"
3970                ID(xor); DCY(); SM(HL, 0); SB(bit);
3971
3972              }
3973            break;
3974          case 0x88:
3975              {
3976                /** 0111 0001 1000 1000		clr1	cy				*/
3977                if (trace)
3978                  {
3979                    printf ("\033[33m%s\033[0m  %02x %02x\n",
3980                           "/** 0111 0001 1000 1000		clr1	cy				*/",
3981                           op[0], op[1]);
3982                  }
3983                SYNTAX("clr1	cy");
3984#line 446 "rl78-decode.opc"
3985                ID(mov); DCY(); SC(0);
3986
3987              }
3988            break;
3989          case 0x89:
3990          case 0x99:
3991          case 0xa9:
3992          case 0xb9:
3993          case 0xc9:
3994          case 0xd9:
3995          case 0xe9:
3996          case 0xf9:
3997              {
3998                /** 0111 0001 1bit 1001		mov1	%e0, cy				*/
3999#line 787 "rl78-decode.opc"
4000                int bit AU = (op[1] >> 4) & 0x07;
4001                if (trace)
4002                  {
4003                    printf ("\033[33m%s\033[0m  %02x %02x\n",
4004                           "/** 0111 0001 1bit 1001		mov1	%e0, cy				*/",
4005                           op[0], op[1]);
4006                    printf ("  bit = 0x%x\n", bit);
4007                  }
4008                SYNTAX("mov1	%e0, cy");
4009#line 787 "rl78-decode.opc"
4010                ID(mov); DR(A); DB(bit); SCY();
4011
4012              }
4013            break;
4014          case 0x8a:
4015          case 0x9a:
4016          case 0xaa:
4017          case 0xba:
4018          case 0xca:
4019          case 0xda:
4020          case 0xea:
4021          case 0xfa:
4022              {
4023                /** 0111 0001 1bit 1010		set1	%0				*/
4024#line 1051 "rl78-decode.opc"
4025                int bit AU = (op[1] >> 4) & 0x07;
4026                if (trace)
4027                  {
4028                    printf ("\033[33m%s\033[0m  %02x %02x\n",
4029                           "/** 0111 0001 1bit 1010		set1	%0				*/",
4030                           op[0], op[1]);
4031                    printf ("  bit = 0x%x\n", bit);
4032                  }
4033                SYNTAX("set1	%0");
4034#line 1051 "rl78-decode.opc"
4035                ID(mov); DR(A); DB(bit); SC(1);
4036
4037              }
4038            break;
4039          case 0x8b:
4040          case 0x9b:
4041          case 0xab:
4042          case 0xbb:
4043          case 0xcb:
4044          case 0xdb:
4045          case 0xeb:
4046          case 0xfb:
4047              {
4048                /** 0111 0001 1bit 1011		clr1	%0				*/
4049#line 443 "rl78-decode.opc"
4050                int bit AU = (op[1] >> 4) & 0x07;
4051                if (trace)
4052                  {
4053                    printf ("\033[33m%s\033[0m  %02x %02x\n",
4054                           "/** 0111 0001 1bit 1011		clr1	%0				*/",
4055                           op[0], op[1]);
4056                    printf ("  bit = 0x%x\n", bit);
4057                  }
4058                SYNTAX("clr1	%0");
4059#line 443 "rl78-decode.opc"
4060                ID(mov); DR(A); DB(bit); SC(0);
4061
4062              }
4063            break;
4064          case 0x8c:
4065          case 0x9c:
4066          case 0xac:
4067          case 0xbc:
4068          case 0xcc:
4069          case 0xdc:
4070          case 0xec:
4071          case 0xfc:
4072              {
4073                /** 0111 0001 1bit 1100		mov1	cy, %e1				*/
4074#line 793 "rl78-decode.opc"
4075                int bit AU = (op[1] >> 4) & 0x07;
4076                if (trace)
4077                  {
4078                    printf ("\033[33m%s\033[0m  %02x %02x\n",
4079                           "/** 0111 0001 1bit 1100		mov1	cy, %e1				*/",
4080                           op[0], op[1]);
4081                    printf ("  bit = 0x%x\n", bit);
4082                  }
4083                SYNTAX("mov1	cy, %e1");
4084#line 793 "rl78-decode.opc"
4085                ID(mov); DCY(); SR(A); SB(bit);
4086
4087              }
4088            break;
4089          case 0x8d:
4090          case 0x9d:
4091          case 0xad:
4092          case 0xbd:
4093          case 0xcd:
4094          case 0xdd:
4095          case 0xed:
4096          case 0xfd:
4097              {
4098                /** 0111 0001 1bit 1101		and1	cy, %1				*/
4099#line 319 "rl78-decode.opc"
4100                int bit AU = (op[1] >> 4) & 0x07;
4101                if (trace)
4102                  {
4103                    printf ("\033[33m%s\033[0m  %02x %02x\n",
4104                           "/** 0111 0001 1bit 1101		and1	cy, %1				*/",
4105                           op[0], op[1]);
4106                    printf ("  bit = 0x%x\n", bit);
4107                  }
4108                SYNTAX("and1	cy, %1");
4109#line 319 "rl78-decode.opc"
4110                ID(and); DCY(); SR(A); SB(bit);
4111
4112              }
4113            break;
4114          case 0x8e:
4115          case 0x9e:
4116          case 0xae:
4117          case 0xbe:
4118          case 0xce:
4119          case 0xde:
4120          case 0xee:
4121          case 0xfe:
4122              {
4123                /** 0111 0001 1bit 1110		or1	cy, %1				*/
4124#line 974 "rl78-decode.opc"
4125                int bit AU = (op[1] >> 4) & 0x07;
4126                if (trace)
4127                  {
4128                    printf ("\033[33m%s\033[0m  %02x %02x\n",
4129                           "/** 0111 0001 1bit 1110		or1	cy, %1				*/",
4130                           op[0], op[1]);
4131                    printf ("  bit = 0x%x\n", bit);
4132                  }
4133                SYNTAX("or1	cy, %1");
4134#line 974 "rl78-decode.opc"
4135                ID(or); DCY(); SR(A); SB(bit);
4136
4137              }
4138            break;
4139          case 0x8f:
4140          case 0x9f:
4141          case 0xaf:
4142          case 0xbf:
4143          case 0xcf:
4144          case 0xdf:
4145          case 0xef:
4146          case 0xff:
4147              {
4148                /** 0111 0001 1bit 1111		xor1	cy, %1				*/
4149#line 1278 "rl78-decode.opc"
4150                int bit AU = (op[1] >> 4) & 0x07;
4151                if (trace)
4152                  {
4153                    printf ("\033[33m%s\033[0m  %02x %02x\n",
4154                           "/** 0111 0001 1bit 1111		xor1	cy, %1				*/",
4155                           op[0], op[1]);
4156                    printf ("  bit = 0x%x\n", bit);
4157                  }
4158                SYNTAX("xor1	cy, %1");
4159#line 1278 "rl78-decode.opc"
4160                ID(xor); DCY(); SR(A); SB(bit);
4161
4162              }
4163            break;
4164          case 0xc0:
4165              {
4166                /** 0111 0001 1100 0000		not1	cy				*/
4167                if (trace)
4168                  {
4169                    printf ("\033[33m%s\033[0m  %02x %02x\n",
4170                           "/** 0111 0001 1100 0000		not1	cy				*/",
4171                           op[0], op[1]);
4172                  }
4173                SYNTAX("not1	cy");
4174#line 915 "rl78-decode.opc"
4175                ID(xor); DCY(); SC(1);
4176
4177              /*----------------------------------------------------------------------*/
4178
4179              }
4180            break;
4181          default: UNSUPPORTED(); break;
4182        }
4183      break;
4184    case 0x78:
4185        {
4186          /** 0111 1000			movw	%e0, %1				*/
4187          if (trace)
4188            {
4189              printf ("\033[33m%s\033[0m  %02x\n",
4190                     "/** 0111 1000			movw	%e0, %1				*/",
4191                     op[0]);
4192            }
4193          SYNTAX("movw	%e0, %1");
4194#line 876 "rl78-decode.opc"
4195          ID(mov); W(); DM(BC, IMMU(2)); SR(AX);
4196
4197        }
4198      break;
4199    case 0x79:
4200        {
4201          /** 0111 1001			movw	%0, %e1				*/
4202          if (trace)
4203            {
4204              printf ("\033[33m%s\033[0m  %02x\n",
4205                     "/** 0111 1001			movw	%0, %e1				*/",
4206                     op[0]);
4207            }
4208          SYNTAX("movw	%0, %e1");
4209#line 867 "rl78-decode.opc"
4210          ID(mov); W(); DR(AX); SM(BC, IMMU(2));
4211
4212        }
4213      break;
4214    case 0x7a:
4215        {
4216          /** 0111 1010	       		xor	%0, #%1				*/
4217          if (trace)
4218            {
4219              printf ("\033[33m%s\033[0m  %02x\n",
4220                     "/** 0111 1010	       		xor	%0, #%1				*/",
4221                     op[0]);
4222            }
4223          SYNTAX("xor	%0, #%1");
4224#line 1270 "rl78-decode.opc"
4225          ID(xor); DM(None, SADDR); SC(IMMU(1)); Fz;
4226
4227        /*----------------------------------------------------------------------*/
4228
4229        }
4230      break;
4231    case 0x7b:
4232        {
4233          /** 0111 1011	       		xor	%0, %1				*/
4234          if (trace)
4235            {
4236              printf ("\033[33m%s\033[0m  %02x\n",
4237                     "/** 0111 1011	       		xor	%0, %1				*/",
4238                     op[0]);
4239            }
4240          SYNTAX("xor	%0, %1");
4241#line 1267 "rl78-decode.opc"
4242          ID(xor); DR(A); SM(None, SADDR); Fz;
4243
4244        }
4245      break;
4246    case 0x7c:
4247        {
4248          /** 0111 1100	       		xor	%0, #%1				*/
4249          if (trace)
4250            {
4251              printf ("\033[33m%s\033[0m  %02x\n",
4252                     "/** 0111 1100	       		xor	%0, #%1				*/",
4253                     op[0]);
4254            }
4255          SYNTAX("xor	%0, #%1");
4256#line 1258 "rl78-decode.opc"
4257          ID(xor); DR(A); SC(IMMU(1)); Fz;
4258
4259        }
4260      break;
4261    case 0x7d:
4262        {
4263          /** 0111 1101			xor	%0, %e1				*/
4264          if (trace)
4265            {
4266              printf ("\033[33m%s\033[0m  %02x\n",
4267                     "/** 0111 1101			xor	%0, %e1				*/",
4268                     op[0]);
4269            }
4270          SYNTAX("xor	%0, %e1");
4271#line 1246 "rl78-decode.opc"
4272          ID(xor); DR(A); SM(HL, 0); Fz;
4273
4274        }
4275      break;
4276    case 0x7e:
4277        {
4278          /** 0111 1110			xor	%0, %e1				*/
4279          if (trace)
4280            {
4281              printf ("\033[33m%s\033[0m  %02x\n",
4282                     "/** 0111 1110			xor	%0, %e1				*/",
4283                     op[0]);
4284            }
4285          SYNTAX("xor	%0, %e1");
4286#line 1252 "rl78-decode.opc"
4287          ID(xor); DR(A); SM(HL, IMMU(1)); Fz;
4288
4289        }
4290      break;
4291    case 0x7f:
4292        {
4293          /** 0111 1111			xor	%0, %e!1			*/
4294          if (trace)
4295            {
4296              printf ("\033[33m%s\033[0m  %02x\n",
4297                     "/** 0111 1111			xor	%0, %e!1			*/",
4298                     op[0]);
4299            }
4300          SYNTAX("xor	%0, %e!1");
4301#line 1243 "rl78-decode.opc"
4302          ID(xor); DR(A); SM(None, IMMU(2)); Fz;
4303
4304        }
4305      break;
4306    case 0x80:
4307    case 0x81:
4308    case 0x82:
4309    case 0x83:
4310    case 0x84:
4311    case 0x85:
4312    case 0x86:
4313    case 0x87:
4314        {
4315          /** 1000 0reg			inc	%0				*/
4316#line 586 "rl78-decode.opc"
4317          int reg AU = op[0] & 0x07;
4318          if (trace)
4319            {
4320              printf ("\033[33m%s\033[0m  %02x\n",
4321                     "/** 1000 0reg			inc	%0				*/",
4322                     op[0]);
4323              printf ("  reg = 0x%x\n", reg);
4324            }
4325          SYNTAX("inc	%0");
4326#line 586 "rl78-decode.opc"
4327          ID(add); DRB(reg); SC(1); Fza;
4328
4329        }
4330      break;
4331    case 0x88:
4332        {
4333          /** 1000 1000			mov	%0, %e1				*/
4334          if (trace)
4335            {
4336              printf ("\033[33m%s\033[0m  %02x\n",
4337                     "/** 1000 1000			mov	%0, %e1				*/",
4338                     op[0]);
4339            }
4340          SYNTAX("mov	%0, %e1");
4341#line 665 "rl78-decode.opc"
4342          ID(mov); DR(A); SM(SP, IMMU(1));
4343
4344        }
4345      break;
4346    case 0x89:
4347        {
4348          /** 1000 1001			mov	%0, %e1				*/
4349          if (trace)
4350            {
4351              printf ("\033[33m%s\033[0m  %02x\n",
4352                     "/** 1000 1001			mov	%0, %e1				*/",
4353                     op[0]);
4354            }
4355          SYNTAX("mov	%0, %e1");
4356#line 647 "rl78-decode.opc"
4357          ID(mov); DR(A); SM(DE, 0);
4358
4359        }
4360      break;
4361    case 0x8a:
4362        {
4363          /** 1000 1010			mov	%0, %e1				*/
4364          if (trace)
4365            {
4366              printf ("\033[33m%s\033[0m  %02x\n",
4367                     "/** 1000 1010			mov	%0, %e1				*/",
4368                     op[0]);
4369            }
4370          SYNTAX("mov	%0, %e1");
4371#line 650 "rl78-decode.opc"
4372          ID(mov); DR(A); SM(DE, IMMU(1));
4373
4374        }
4375      break;
4376    case 0x8b:
4377        {
4378          /** 1000 1011			mov	%0, %e1				*/
4379          if (trace)
4380            {
4381              printf ("\033[33m%s\033[0m  %02x\n",
4382                     "/** 1000 1011			mov	%0, %e1				*/",
4383                     op[0]);
4384            }
4385          SYNTAX("mov	%0, %e1");
4386#line 653 "rl78-decode.opc"
4387          ID(mov); DR(A); SM(HL, 0);
4388
4389        }
4390      break;
4391    case 0x8c:
4392        {
4393          /** 1000 1100			mov	%0, %e1				*/
4394          if (trace)
4395            {
4396              printf ("\033[33m%s\033[0m  %02x\n",
4397                     "/** 1000 1100			mov	%0, %e1				*/",
4398                     op[0]);
4399            }
4400          SYNTAX("mov	%0, %e1");
4401#line 656 "rl78-decode.opc"
4402          ID(mov); DR(A); SM(HL, IMMU(1));
4403
4404        }
4405      break;
4406    case 0x8d:
4407        {
4408          /** 1000 1101			mov	%0, %1				*/
4409          if (trace)
4410            {
4411              printf ("\033[33m%s\033[0m  %02x\n",
4412                     "/** 1000 1101			mov	%0, %1				*/",
4413                     op[0]);
4414            }
4415          SYNTAX("mov	%0, %1");
4416#line 689 "rl78-decode.opc"
4417          ID(mov); DR(A); SM(None, SADDR);
4418
4419        }
4420      break;
4421    case 0x8e:
4422        {
4423          /** 1000 1110			mov	%0, %s1				*/
4424          if (trace)
4425            {
4426              printf ("\033[33m%s\033[0m  %02x\n",
4427                     "/** 1000 1110			mov	%0, %s1				*/",
4428                     op[0]);
4429            }
4430          SYNTAX("mov	%0, %s1");
4431#line 686 "rl78-decode.opc"
4432          ID(mov); DR(A); SM(None, SFR);
4433
4434        }
4435      break;
4436    case 0x8f:
4437        {
4438          /** 1000 1111			mov	%0, %e!1			*/
4439          if (trace)
4440            {
4441              printf ("\033[33m%s\033[0m  %02x\n",
4442                     "/** 1000 1111			mov	%0, %e!1			*/",
4443                     op[0]);
4444            }
4445          SYNTAX("mov	%0, %e!1");
4446#line 644 "rl78-decode.opc"
4447          ID(mov); DR(A); SM(None, IMMU(2));
4448
4449        }
4450      break;
4451    case 0x90:
4452    case 0x91:
4453    case 0x92:
4454    case 0x93:
4455    case 0x94:
4456    case 0x95:
4457    case 0x96:
4458    case 0x97:
4459        {
4460          /** 1001 0reg			dec	%0				*/
4461#line 553 "rl78-decode.opc"
4462          int reg AU = op[0] & 0x07;
4463          if (trace)
4464            {
4465              printf ("\033[33m%s\033[0m  %02x\n",
4466                     "/** 1001 0reg			dec	%0				*/",
4467                     op[0]);
4468              printf ("  reg = 0x%x\n", reg);
4469            }
4470          SYNTAX("dec	%0");
4471#line 553 "rl78-decode.opc"
4472          ID(sub); DRB(reg); SC(1); Fza;
4473
4474        }
4475      break;
4476    case 0x98:
4477        {
4478          /** 1001 1000			mov	%0, %1				*/
4479          if (trace)
4480            {
4481              printf ("\033[33m%s\033[0m  %02x\n",
4482                     "/** 1001 1000			mov	%0, %1				*/",
4483                     op[0]);
4484            }
4485          SYNTAX("mov	%0, %1");
4486#line 641 "rl78-decode.opc"
4487          ID(mov); DM(SP, IMMU(1)); SR(A);
4488
4489        }
4490      break;
4491    case 0x99:
4492        {
4493          /** 1001 1001			mov	%e0,%1				*/
4494          if (trace)
4495            {
4496              printf ("\033[33m%s\033[0m  %02x\n",
4497                     "/** 1001 1001			mov	%e0,%1				*/",
4498                     op[0]);
4499            }
4500          SYNTAX("mov	%e0,%1");
4501#line 614 "rl78-decode.opc"
4502          ID(mov); DM(DE, 0); SR(A);
4503
4504        }
4505      break;
4506    case 0x9a:
4507        {
4508          /** 1001 1010			mov	%e0, %1				*/
4509          if (trace)
4510            {
4511              printf ("\033[33m%s\033[0m  %02x\n",
4512                     "/** 1001 1010			mov	%e0, %1				*/",
4513                     op[0]);
4514            }
4515          SYNTAX("mov	%e0, %1");
4516#line 620 "rl78-decode.opc"
4517          ID(mov); DM(DE, IMMU(1)); SR(A);
4518
4519        }
4520      break;
4521    case 0x9b:
4522        {
4523          /** 1001 1011			mov	%e0,%1				*/
4524          if (trace)
4525            {
4526              printf ("\033[33m%s\033[0m  %02x\n",
4527                     "/** 1001 1011			mov	%e0,%1				*/",
4528                     op[0]);
4529            }
4530          SYNTAX("mov	%e0,%1");
4531#line 623 "rl78-decode.opc"
4532          ID(mov); DM(HL, 0); SR(A);
4533
4534        }
4535      break;
4536    case 0x9c:
4537        {
4538          /** 1001 1100			mov	%e0, %1				*/
4539          if (trace)
4540            {
4541              printf ("\033[33m%s\033[0m  %02x\n",
4542                     "/** 1001 1100			mov	%e0, %1				*/",
4543                     op[0]);
4544            }
4545          SYNTAX("mov	%e0, %1");
4546#line 632 "rl78-decode.opc"
4547          ID(mov); DM(HL, IMMU(1)); SR(A);
4548
4549        }
4550      break;
4551    case 0x9d:
4552        {
4553          /** 1001 1101			mov	%0, %1				*/
4554          if (trace)
4555            {
4556              printf ("\033[33m%s\033[0m  %02x\n",
4557                     "/** 1001 1101			mov	%0, %1				*/",
4558                     op[0]);
4559            }
4560          SYNTAX("mov	%0, %1");
4561#line 746 "rl78-decode.opc"
4562          ID(mov); DM(None, SADDR); SR(A);
4563
4564        }
4565      break;
4566    case 0x9e:
4567        {
4568          /** 1001 1110			mov	%0, %1				*/
4569          if (trace)
4570            {
4571              printf ("\033[33m%s\033[0m  %02x\n",
4572                     "/** 1001 1110			mov	%0, %1				*/",
4573                     op[0]);
4574            }
4575          SYNTAX("mov	%0, %1");
4576#line 779 "rl78-decode.opc"
4577          ID(mov); DM(None, SFR); SR(A);
4578
4579        /*----------------------------------------------------------------------*/
4580
4581        }
4582      break;
4583    case 0x9f:
4584        {
4585          /** 1001 1111			mov	%e!0, %1			*/
4586          if (trace)
4587            {
4588              printf ("\033[33m%s\033[0m  %02x\n",
4589                     "/** 1001 1111			mov	%e!0, %1			*/",
4590                     op[0]);
4591            }
4592          SYNTAX("mov	%e!0, %1");
4593#line 611 "rl78-decode.opc"
4594          ID(mov); DM(None, IMMU(2)); SR(A);
4595
4596        }
4597      break;
4598    case 0xa0:
4599        {
4600          /** 1010 0000			inc	%e!0				*/
4601          if (trace)
4602            {
4603              printf ("\033[33m%s\033[0m  %02x\n",
4604                     "/** 1010 0000			inc	%e!0				*/",
4605                     op[0]);
4606            }
4607          SYNTAX("inc	%e!0");
4608#line 580 "rl78-decode.opc"
4609          ID(add); DM(None, IMMU(2)); SC(1); Fza;
4610
4611        }
4612      break;
4613    case 0xa1:
4614    case 0xa3:
4615    case 0xa5:
4616    case 0xa7:
4617        {
4618          /** 1010 0rg1			incw	%0				*/
4619#line 600 "rl78-decode.opc"
4620          int rg AU = (op[0] >> 1) & 0x03;
4621          if (trace)
4622            {
4623              printf ("\033[33m%s\033[0m  %02x\n",
4624                     "/** 1010 0rg1			incw	%0				*/",
4625                     op[0]);
4626              printf ("  rg = 0x%x\n", rg);
4627            }
4628          SYNTAX("incw	%0");
4629#line 600 "rl78-decode.opc"
4630          ID(add); W(); DRW(rg); SC(1);
4631
4632        }
4633      break;
4634    case 0xa2:
4635        {
4636          /** 1010 0010			incw	%e!0				*/
4637          if (trace)
4638            {
4639              printf ("\033[33m%s\033[0m  %02x\n",
4640                     "/** 1010 0010			incw	%e!0				*/",
4641                     op[0]);
4642            }
4643          SYNTAX("incw	%e!0");
4644#line 594 "rl78-decode.opc"
4645          ID(add); W(); DM(None, IMMU(2)); SC(1);
4646
4647        }
4648      break;
4649    case 0xa4:
4650        {
4651          /** 1010 0100			inc	%0				*/
4652          if (trace)
4653            {
4654              printf ("\033[33m%s\033[0m  %02x\n",
4655                     "/** 1010 0100			inc	%0				*/",
4656                     op[0]);
4657            }
4658          SYNTAX("inc	%0");
4659#line 589 "rl78-decode.opc"
4660          ID(add); DM(None, SADDR); SC(1); Fza;
4661
4662        /*----------------------------------------------------------------------*/
4663
4664        }
4665      break;
4666    case 0xa6:
4667        {
4668          /** 1010 0110			incw	%0				*/
4669          if (trace)
4670            {
4671              printf ("\033[33m%s\033[0m  %02x\n",
4672                     "/** 1010 0110			incw	%0				*/",
4673                     op[0]);
4674            }
4675          SYNTAX("incw	%0");
4676#line 603 "rl78-decode.opc"
4677          ID(add); W(); DM(None, SADDR); SC(1);
4678
4679        /*----------------------------------------------------------------------*/
4680
4681        }
4682      break;
4683    case 0xa8:
4684        {
4685          /** 1010 1000			movw	%0, %1				*/
4686          if (trace)
4687            {
4688              printf ("\033[33m%s\033[0m  %02x\n",
4689                     "/** 1010 1000			movw	%0, %1				*/",
4690                     op[0]);
4691            }
4692          SYNTAX("movw	%0, %1");
4693#line 849 "rl78-decode.opc"
4694          ID(mov); W(); DR(AX); SM(SP, IMMU(1));
4695
4696        }
4697      break;
4698    case 0xa9:
4699        {
4700          /** 1010 1001			movw	%0, %e1				*/
4701          if (trace)
4702            {
4703              printf ("\033[33m%s\033[0m  %02x\n",
4704                     "/** 1010 1001			movw	%0, %e1				*/",
4705                     op[0]);
4706            }
4707          SYNTAX("movw	%0, %e1");
4708#line 837 "rl78-decode.opc"
4709          ID(mov); W(); DR(AX); SM(DE, 0);
4710
4711        }
4712      break;
4713    case 0xaa:
4714        {
4715          /** 1010 1010			movw	%0, %e1				*/
4716          if (trace)
4717            {
4718              printf ("\033[33m%s\033[0m  %02x\n",
4719                     "/** 1010 1010			movw	%0, %e1				*/",
4720                     op[0]);
4721            }
4722          SYNTAX("movw	%0, %e1");
4723#line 840 "rl78-decode.opc"
4724          ID(mov); W(); DR(AX); SM(DE, IMMU(1));
4725
4726        }
4727      break;
4728    case 0xab:
4729        {
4730          /** 1010 1011			movw	%0, %e1				*/
4731          if (trace)
4732            {
4733              printf ("\033[33m%s\033[0m  %02x\n",
4734                     "/** 1010 1011			movw	%0, %e1				*/",
4735                     op[0]);
4736            }
4737          SYNTAX("movw	%0, %e1");
4738#line 843 "rl78-decode.opc"
4739          ID(mov); W(); DR(AX); SM(HL, 0);
4740
4741        }
4742      break;
4743    case 0xac:
4744        {
4745          /** 1010 1100			movw	%0, %e1				*/
4746          if (trace)
4747            {
4748              printf ("\033[33m%s\033[0m  %02x\n",
4749                     "/** 1010 1100			movw	%0, %e1				*/",
4750                     op[0]);
4751            }
4752          SYNTAX("movw	%0, %e1");
4753#line 846 "rl78-decode.opc"
4754          ID(mov); W(); DR(AX); SM(HL, IMMU(1));
4755
4756        }
4757      break;
4758    case 0xad:
4759        {
4760          /** 1010 1101			movw	%0, %1				*/
4761          if (trace)
4762            {
4763              printf ("\033[33m%s\033[0m  %02x\n",
4764                     "/** 1010 1101			movw	%0, %1				*/",
4765                     op[0]);
4766            }
4767          SYNTAX("movw	%0, %1");
4768#line 879 "rl78-decode.opc"
4769          ID(mov); W(); DR(AX); SM(None, SADDR);
4770
4771        }
4772      break;
4773    case 0xae:
4774        {
4775          /** 1010 1110			movw	%0, %s1				*/
4776          if (trace)
4777            {
4778              printf ("\033[33m%s\033[0m  %02x\n",
4779                     "/** 1010 1110			movw	%0, %s1				*/",
4780                     op[0]);
4781            }
4782          SYNTAX("movw	%0, %s1");
4783#line 882 "rl78-decode.opc"
4784          ID(mov); W(); DR(AX); SM(None, SFR);
4785
4786        }
4787      break;
4788    case 0xaf:
4789        {
4790          /** 1010 1111			movw	%0, %e!1			*/
4791          if (trace)
4792            {
4793              printf ("\033[33m%s\033[0m  %02x\n",
4794                     "/** 1010 1111			movw	%0, %e!1			*/",
4795                     op[0]);
4796            }
4797          SYNTAX("movw	%0, %e!1");
4798#line 833 "rl78-decode.opc"
4799          ID(mov); W(); DR(AX); SM(None, IMMU(2));
4800
4801
4802        }
4803      break;
4804    case 0xb0:
4805        {
4806          /** 1011 0000			dec	%e!0				*/
4807          if (trace)
4808            {
4809              printf ("\033[33m%s\033[0m  %02x\n",
4810                     "/** 1011 0000			dec	%e!0				*/",
4811                     op[0]);
4812            }
4813          SYNTAX("dec	%e!0");
4814#line 547 "rl78-decode.opc"
4815          ID(sub); DM(None, IMMU(2)); SC(1); Fza;
4816
4817        }
4818      break;
4819    case 0xb1:
4820    case 0xb3:
4821    case 0xb5:
4822    case 0xb7:
4823        {
4824          /** 1011 0rg1 			decw	%0				*/
4825#line 567 "rl78-decode.opc"
4826          int rg AU = (op[0] >> 1) & 0x03;
4827          if (trace)
4828            {
4829              printf ("\033[33m%s\033[0m  %02x\n",
4830                     "/** 1011 0rg1 			decw	%0				*/",
4831                     op[0]);
4832              printf ("  rg = 0x%x\n", rg);
4833            }
4834          SYNTAX("decw	%0");
4835#line 567 "rl78-decode.opc"
4836          ID(sub); W(); DRW(rg); SC(1);
4837
4838        }
4839      break;
4840    case 0xb2:
4841        {
4842          /** 1011 0010			decw	%e!0				*/
4843          if (trace)
4844            {
4845              printf ("\033[33m%s\033[0m  %02x\n",
4846                     "/** 1011 0010			decw	%e!0				*/",
4847                     op[0]);
4848            }
4849          SYNTAX("decw	%e!0");
4850#line 561 "rl78-decode.opc"
4851          ID(sub); W(); DM(None, IMMU(2)); SC(1);
4852
4853        }
4854      break;
4855    case 0xb4:
4856        {
4857          /** 1011 0100			dec	%0				*/
4858          if (trace)
4859            {
4860              printf ("\033[33m%s\033[0m  %02x\n",
4861                     "/** 1011 0100			dec	%0				*/",
4862                     op[0]);
4863            }
4864          SYNTAX("dec	%0");
4865#line 556 "rl78-decode.opc"
4866          ID(sub); DM(None, SADDR); SC(1); Fza;
4867
4868        /*----------------------------------------------------------------------*/
4869
4870        }
4871      break;
4872    case 0xb6:
4873        {
4874          /** 1011 0110			decw	%0				*/
4875          if (trace)
4876            {
4877              printf ("\033[33m%s\033[0m  %02x\n",
4878                     "/** 1011 0110			decw	%0				*/",
4879                     op[0]);
4880            }
4881          SYNTAX("decw	%0");
4882#line 570 "rl78-decode.opc"
4883          ID(sub); W(); DM(None, SADDR); SC(1);
4884
4885        /*----------------------------------------------------------------------*/
4886
4887        }
4888      break;
4889    case 0xb8:
4890        {
4891          /** 1011 1000			movw	%0, %1				*/
4892          if (trace)
4893            {
4894              printf ("\033[33m%s\033[0m  %02x\n",
4895                     "/** 1011 1000			movw	%0, %1				*/",
4896                     op[0]);
4897            }
4898          SYNTAX("movw	%0, %1");
4899#line 830 "rl78-decode.opc"
4900          ID(mov); W(); DM(SP, IMMU(1)); SR(AX);
4901
4902        }
4903      break;
4904    case 0xb9:
4905        {
4906          /** 1011 1001			movw	%e0, %1				*/
4907          if (trace)
4908            {
4909              printf ("\033[33m%s\033[0m  %02x\n",
4910                     "/** 1011 1001			movw	%e0, %1				*/",
4911                     op[0]);
4912            }
4913          SYNTAX("movw	%e0, %1");
4914#line 818 "rl78-decode.opc"
4915          ID(mov); W(); DM(DE, 0); SR(AX);
4916
4917        }
4918      break;
4919    case 0xba:
4920        {
4921          /** 1011 1010			movw	%e0, %1				*/
4922          if (trace)
4923            {
4924              printf ("\033[33m%s\033[0m  %02x\n",
4925                     "/** 1011 1010			movw	%e0, %1				*/",
4926                     op[0]);
4927            }
4928          SYNTAX("movw	%e0, %1");
4929#line 821 "rl78-decode.opc"
4930          ID(mov); W(); DM(DE, IMMU(1)); SR(AX);
4931
4932        }
4933      break;
4934    case 0xbb:
4935        {
4936          /** 1011 1011			movw	%e0, %1				*/
4937          if (trace)
4938            {
4939              printf ("\033[33m%s\033[0m  %02x\n",
4940                     "/** 1011 1011			movw	%e0, %1				*/",
4941                     op[0]);
4942            }
4943          SYNTAX("movw	%e0, %1");
4944#line 824 "rl78-decode.opc"
4945          ID(mov); W(); DM(HL, 0); SR(AX);
4946
4947        }
4948      break;
4949    case 0xbc:
4950        {
4951          /** 1011 1100			movw	%e0, %1				*/
4952          if (trace)
4953            {
4954              printf ("\033[33m%s\033[0m  %02x\n",
4955                     "/** 1011 1100			movw	%e0, %1				*/",
4956                     op[0]);
4957            }
4958          SYNTAX("movw	%e0, %1");
4959#line 827 "rl78-decode.opc"
4960          ID(mov); W(); DM(HL, IMMU(1)); SR(AX);
4961
4962        }
4963      break;
4964    case 0xbd:
4965        {
4966          /** 1011 1101			movw	%0, %1				*/
4967          if (trace)
4968            {
4969              printf ("\033[33m%s\033[0m  %02x\n",
4970                     "/** 1011 1101			movw	%0, %1				*/",
4971                     op[0]);
4972            }
4973          SYNTAX("movw	%0, %1");
4974#line 894 "rl78-decode.opc"
4975          ID(mov); W(); DM(None, SADDR); SR(AX);
4976
4977        }
4978      break;
4979    case 0xbe:
4980        {
4981          /** 1011 1110			movw	%0, %1				*/
4982          if (trace)
4983            {
4984              printf ("\033[33m%s\033[0m  %02x\n",
4985                     "/** 1011 1110			movw	%0, %1				*/",
4986                     op[0]);
4987            }
4988          SYNTAX("movw	%0, %1");
4989#line 900 "rl78-decode.opc"
4990          ID(mov); W(); DM(None, SFR); SR(AX);
4991
4992        /*----------------------------------------------------------------------*/
4993
4994        }
4995      break;
4996    case 0xbf:
4997        {
4998          /** 1011 1111			movw	%e!0, %1			*/
4999          if (trace)
5000            {
5001              printf ("\033[33m%s\033[0m  %02x\n",
5002                     "/** 1011 1111			movw	%e!0, %1			*/",
5003                     op[0]);
5004            }
5005          SYNTAX("movw	%e!0, %1");
5006#line 815 "rl78-decode.opc"
5007          ID(mov); W(); DM(None, IMMU(2)); SR(AX);
5008
5009        }
5010      break;
5011    case 0xc0:
5012    case 0xc2:
5013    case 0xc4:
5014    case 0xc6:
5015        {
5016          /** 1100 0rg0			pop	%0				*/
5017#line 985 "rl78-decode.opc"
5018          int rg AU = (op[0] >> 1) & 0x03;
5019          if (trace)
5020            {
5021              printf ("\033[33m%s\033[0m  %02x\n",
5022                     "/** 1100 0rg0			pop	%0				*/",
5023                     op[0]);
5024              printf ("  rg = 0x%x\n", rg);
5025            }
5026          SYNTAX("pop	%0");
5027#line 985 "rl78-decode.opc"
5028          ID(mov); W(); DRW(rg); SPOP();
5029
5030        }
5031      break;
5032    case 0xc1:
5033    case 0xc3:
5034    case 0xc5:
5035    case 0xc7:
5036        {
5037          /** 1100 0rg1			push	%1				*/
5038#line 993 "rl78-decode.opc"
5039          int rg AU = (op[0] >> 1) & 0x03;
5040          if (trace)
5041            {
5042              printf ("\033[33m%s\033[0m  %02x\n",
5043                     "/** 1100 0rg1			push	%1				*/",
5044                     op[0]);
5045              printf ("  rg = 0x%x\n", rg);
5046            }
5047          SYNTAX("push	%1");
5048#line 993 "rl78-decode.opc"
5049          ID(mov); W(); DPUSH(); SRW(rg);
5050
5051        }
5052      break;
5053    case 0xc8:
5054        {
5055          /** 1100 1000			mov	%0, #%1				*/
5056          if (trace)
5057            {
5058              printf ("\033[33m%s\033[0m  %02x\n",
5059                     "/** 1100 1000			mov	%0, #%1				*/",
5060                     op[0]);
5061            }
5062          SYNTAX("mov	%0, #%1");
5063#line 638 "rl78-decode.opc"
5064          ID(mov); DM(SP, IMMU(1)); SC(IMMU(1));
5065
5066        }
5067      break;
5068    case 0xc9:
5069        {
5070          /** 1100 1001			movw	%0, #%1				*/
5071          if (trace)
5072            {
5073              printf ("\033[33m%s\033[0m  %02x\n",
5074                     "/** 1100 1001			movw	%0, #%1				*/",
5075                     op[0]);
5076            }
5077          SYNTAX("movw	%0, #%1");
5078#line 891 "rl78-decode.opc"
5079          ID(mov); W(); DM(None, SADDR); SC(IMMU(2));
5080
5081        }
5082      break;
5083    case 0xca:
5084        {
5085          /** 1100 1010			mov	%e0, #%1			*/
5086          if (trace)
5087            {
5088              printf ("\033[33m%s\033[0m  %02x\n",
5089                     "/** 1100 1010			mov	%e0, #%1			*/",
5090                     op[0]);
5091            }
5092          SYNTAX("mov	%e0, #%1");
5093#line 617 "rl78-decode.opc"
5094          ID(mov); DM(DE, IMMU(1)); SC(IMMU(1));
5095
5096        }
5097      break;
5098    case 0xcb:
5099        {
5100          /** 1100 1011			movw	%0, #%1				*/
5101          if (trace)
5102            {
5103              printf ("\033[33m%s\033[0m  %02x\n",
5104                     "/** 1100 1011			movw	%0, #%1				*/",
5105                     op[0]);
5106            }
5107          SYNTAX("movw	%0, #%1");
5108#line 897 "rl78-decode.opc"
5109          ID(mov); W(); DM(None, SFR); SC(IMMU(2));
5110
5111        }
5112      break;
5113    case 0xcc:
5114        {
5115          /** 1100 1100			mov	%e0, #%1			*/
5116          if (trace)
5117            {
5118              printf ("\033[33m%s\033[0m  %02x\n",
5119                     "/** 1100 1100			mov	%e0, #%1			*/",
5120                     op[0]);
5121            }
5122          SYNTAX("mov	%e0, #%1");
5123#line 629 "rl78-decode.opc"
5124          ID(mov); DM(HL, IMMU(1)); SC(IMMU(1));
5125
5126        }
5127      break;
5128    case 0xcd:
5129        {
5130          /** 1100 1101			mov	%0, #%1				*/
5131          if (trace)
5132            {
5133              printf ("\033[33m%s\033[0m  %02x\n",
5134                     "/** 1100 1101			mov	%0, #%1				*/",
5135                     op[0]);
5136            }
5137          SYNTAX("mov	%0, #%1");
5138#line 743 "rl78-decode.opc"
5139          ID(mov); DM(None, SADDR); SC(IMMU(1));
5140
5141        }
5142      break;
5143    case 0xce:
5144        {
5145          /** 1100 1110			mov	%s0, #%1			*/
5146          if (trace)
5147            {
5148              printf ("\033[33m%s\033[0m  %02x\n",
5149                     "/** 1100 1110			mov	%s0, #%1			*/",
5150                     op[0]);
5151            }
5152          SYNTAX("mov	%s0, #%1");
5153#line 749 "rl78-decode.opc"
5154          op0 = SFR;
5155          op1 = IMMU(1);
5156          ID(mov); DM(None, op0); SC(op1);
5157          if (op0 == 0xffffb)
5158            switch (op1)
5159              {
5160              case 0x01:
5161        	rl78->syntax = "mulhu"; ID(mulhu);
5162        	break;
5163              case 0x02:
5164        	rl78->syntax = "mulh"; ID(mulh);
5165        	break;
5166              case 0x03:
5167        	rl78->syntax = "divhu"; ID(divhu);
5168        	break;
5169              case 0x04:
5170        	rl78->syntax = "divwu <old-encoding>"; ID(divwu);
5171        	break;
5172              case 0x05:
5173        	rl78->syntax = "machu"; ID(machu);
5174        	break;
5175              case 0x06:
5176        	rl78->syntax = "mach"; ID(mach);
5177        	break;
5178              case 0x0b:
5179        	rl78->syntax = "divwu"; ID(divwu);
5180        	break;
5181              }
5182
5183        }
5184      break;
5185    case 0xcf:
5186        {
5187          /** 1100 1111			mov	%e!0, #%1			*/
5188          if (trace)
5189            {
5190              printf ("\033[33m%s\033[0m  %02x\n",
5191                     "/** 1100 1111			mov	%e!0, #%1			*/",
5192                     op[0]);
5193            }
5194          SYNTAX("mov	%e!0, #%1");
5195#line 608 "rl78-decode.opc"
5196          ID(mov); DM(None, IMMU(2)); SC(IMMU(1));
5197
5198        }
5199      break;
5200    case 0xd0:
5201    case 0xd1:
5202    case 0xd2:
5203    case 0xd3:
5204        {
5205          /** 1101 00rg			cmp0	%0				*/
5206#line 517 "rl78-decode.opc"
5207          int rg AU = op[0] & 0x03;
5208          if (trace)
5209            {
5210              printf ("\033[33m%s\033[0m  %02x\n",
5211                     "/** 1101 00rg			cmp0	%0				*/",
5212                     op[0]);
5213              printf ("  rg = 0x%x\n", rg);
5214            }
5215          SYNTAX("cmp0	%0");
5216#line 517 "rl78-decode.opc"
5217          ID(cmp); DRB(rg); SC(0); Fzac;
5218
5219        }
5220      break;
5221    case 0xd4:
5222        {
5223          /** 1101 0100			cmp0	%0				*/
5224          if (trace)
5225            {
5226              printf ("\033[33m%s\033[0m  %02x\n",
5227                     "/** 1101 0100			cmp0	%0				*/",
5228                     op[0]);
5229            }
5230          SYNTAX("cmp0	%0");
5231#line 520 "rl78-decode.opc"
5232          ID(cmp); DM(None, SADDR); SC(0); Fzac;
5233
5234        /*----------------------------------------------------------------------*/
5235
5236        }
5237      break;
5238    case 0xd5:
5239        {
5240          /** 1101 0101			cmp0	%e!0				*/
5241          if (trace)
5242            {
5243              printf ("\033[33m%s\033[0m  %02x\n",
5244                     "/** 1101 0101			cmp0	%e!0				*/",
5245                     op[0]);
5246            }
5247          SYNTAX("cmp0	%e!0");
5248#line 514 "rl78-decode.opc"
5249          ID(cmp); DM(None, IMMU(2)); SC(0); Fzac;
5250
5251        }
5252      break;
5253    case 0xd6:
5254        {
5255          /** 1101 0110			mulu	x				*/
5256          if (trace)
5257            {
5258              printf ("\033[33m%s\033[0m  %02x\n",
5259                     "/** 1101 0110			mulu	x				*/",
5260                     op[0]);
5261            }
5262          SYNTAX("mulu	x");
5263#line 905 "rl78-decode.opc"
5264          ID(mulu);
5265
5266        /*----------------------------------------------------------------------*/
5267
5268        }
5269      break;
5270    case 0xd7:
5271        {
5272          /** 1101 0111			ret					*/
5273          if (trace)
5274            {
5275              printf ("\033[33m%s\033[0m  %02x\n",
5276                     "/** 1101 0111			ret					*/",
5277                     op[0]);
5278            }
5279          SYNTAX("ret");
5280#line 1001 "rl78-decode.opc"
5281          ID(ret);
5282
5283        }
5284      break;
5285    case 0xd8:
5286        {
5287          /** 1101 1000			mov	%0, %1				*/
5288          if (trace)
5289            {
5290              printf ("\033[33m%s\033[0m  %02x\n",
5291                     "/** 1101 1000			mov	%0, %1				*/",
5292                     op[0]);
5293            }
5294          SYNTAX("mov	%0, %1");
5295#line 710 "rl78-decode.opc"
5296          ID(mov); DR(X); SM(None, SADDR);
5297
5298        }
5299      break;
5300    case 0xd9:
5301        {
5302          /** 1101 1001			mov	%0, %e!1			*/
5303          if (trace)
5304            {
5305              printf ("\033[33m%s\033[0m  %02x\n",
5306                     "/** 1101 1001			mov	%0, %e!1			*/",
5307                     op[0]);
5308            }
5309          SYNTAX("mov	%0, %e!1");
5310#line 707 "rl78-decode.opc"
5311          ID(mov); DR(X); SM(None, IMMU(2));
5312
5313        }
5314      break;
5315    case 0xda:
5316    case 0xea:
5317    case 0xfa:
5318        {
5319          /** 11ra 1010			movw	%0, %1				*/
5320#line 888 "rl78-decode.opc"
5321          int ra AU = (op[0] >> 4) & 0x03;
5322          if (trace)
5323            {
5324              printf ("\033[33m%s\033[0m  %02x\n",
5325                     "/** 11ra 1010			movw	%0, %1				*/",
5326                     op[0]);
5327              printf ("  ra = 0x%x\n", ra);
5328            }
5329          SYNTAX("movw	%0, %1");
5330#line 888 "rl78-decode.opc"
5331          ID(mov); W(); DRW(ra); SM(None, SADDR);
5332
5333        }
5334      break;
5335    case 0xdb:
5336    case 0xeb:
5337    case 0xfb:
5338        {
5339          /** 11ra 1011			movw	%0, %e!1			*/
5340#line 885 "rl78-decode.opc"
5341          int ra AU = (op[0] >> 4) & 0x03;
5342          if (trace)
5343            {
5344              printf ("\033[33m%s\033[0m  %02x\n",
5345                     "/** 11ra 1011			movw	%0, %e!1			*/",
5346                     op[0]);
5347              printf ("  ra = 0x%x\n", ra);
5348            }
5349          SYNTAX("movw	%0, %e!1");
5350#line 885 "rl78-decode.opc"
5351          ID(mov); W(); DRW(ra); SM(None, IMMU(2));
5352
5353        }
5354      break;
5355    case 0xdc:
5356        {
5357          /** 1101 1100			bc	$%a0				*/
5358          if (trace)
5359            {
5360              printf ("\033[33m%s\033[0m  %02x\n",
5361                     "/** 1101 1100			bc	$%a0				*/",
5362                     op[0]);
5363            }
5364          SYNTAX("bc	$%a0");
5365#line 333 "rl78-decode.opc"
5366          ID(branch_cond); DC(pc+IMMS(1)+2); SR(None); COND(C);
5367
5368        }
5369      break;
5370    case 0xdd:
5371        {
5372          /** 1101 1101			bz	$%a0				*/
5373          if (trace)
5374            {
5375              printf ("\033[33m%s\033[0m  %02x\n",
5376                     "/** 1101 1101			bz	$%a0				*/",
5377                     op[0]);
5378            }
5379          SYNTAX("bz	$%a0");
5380#line 345 "rl78-decode.opc"
5381          ID(branch_cond); DC(pc+IMMS(1)+2); SR(None); COND(Z);
5382
5383        }
5384      break;
5385    case 0xde:
5386        {
5387          /** 1101 1110			bnc	$%a0				*/
5388          if (trace)
5389            {
5390              printf ("\033[33m%s\033[0m  %02x\n",
5391                     "/** 1101 1110			bnc	$%a0				*/",
5392                     op[0]);
5393            }
5394          SYNTAX("bnc	$%a0");
5395#line 336 "rl78-decode.opc"
5396          ID(branch_cond); DC(pc+IMMS(1)+2); SR(None); COND(NC);
5397
5398        }
5399      break;
5400    case 0xdf:
5401        {
5402          /** 1101 1111			bnz	$%a0				*/
5403          if (trace)
5404            {
5405              printf ("\033[33m%s\033[0m  %02x\n",
5406                     "/** 1101 1111			bnz	$%a0				*/",
5407                     op[0]);
5408            }
5409          SYNTAX("bnz	$%a0");
5410#line 348 "rl78-decode.opc"
5411          ID(branch_cond); DC(pc+IMMS(1)+2); SR(None); COND(NZ);
5412
5413        /*----------------------------------------------------------------------*/
5414
5415        }
5416      break;
5417    case 0xe0:
5418    case 0xe1:
5419    case 0xe2:
5420    case 0xe3:
5421        {
5422          /** 1110 00rg			oneb	%0				*/
5423#line 923 "rl78-decode.opc"
5424          int rg AU = op[0] & 0x03;
5425          if (trace)
5426            {
5427              printf ("\033[33m%s\033[0m  %02x\n",
5428                     "/** 1110 00rg			oneb	%0				*/",
5429                     op[0]);
5430              printf ("  rg = 0x%x\n", rg);
5431            }
5432          SYNTAX("oneb	%0");
5433#line 923 "rl78-decode.opc"
5434          ID(mov); DRB(rg); SC(1);
5435
5436        }
5437      break;
5438    case 0xe4:
5439        {
5440          /** 1110 0100			oneb	%0				*/
5441          if (trace)
5442            {
5443              printf ("\033[33m%s\033[0m  %02x\n",
5444                     "/** 1110 0100			oneb	%0				*/",
5445                     op[0]);
5446            }
5447          SYNTAX("oneb	%0");
5448#line 926 "rl78-decode.opc"
5449          ID(mov); DM(None, SADDR); SC(1);
5450
5451        /*----------------------------------------------------------------------*/
5452
5453        }
5454      break;
5455    case 0xe5:
5456        {
5457          /** 1110 0101			oneb	%e!0				*/
5458          if (trace)
5459            {
5460              printf ("\033[33m%s\033[0m  %02x\n",
5461                     "/** 1110 0101			oneb	%e!0				*/",
5462                     op[0]);
5463            }
5464          SYNTAX("oneb	%e!0");
5465#line 920 "rl78-decode.opc"
5466          ID(mov); DM(None, IMMU(2)); SC(1);
5467
5468        }
5469      break;
5470    case 0xe6:
5471        {
5472          /** 1110 0110			onew	%0				*/
5473          if (trace)
5474            {
5475              printf ("\033[33m%s\033[0m  %02x\n",
5476                     "/** 1110 0110			onew	%0				*/",
5477                     op[0]);
5478            }
5479          SYNTAX("onew	%0");
5480#line 931 "rl78-decode.opc"
5481          ID(mov); DR(AX); SC(1);
5482
5483        }
5484      break;
5485    case 0xe7:
5486        {
5487          /** 1110 0111			onew	%0				*/
5488          if (trace)
5489            {
5490              printf ("\033[33m%s\033[0m  %02x\n",
5491                     "/** 1110 0111			onew	%0				*/",
5492                     op[0]);
5493            }
5494          SYNTAX("onew	%0");
5495#line 934 "rl78-decode.opc"
5496          ID(mov); DR(BC); SC(1);
5497
5498        /*----------------------------------------------------------------------*/
5499
5500        }
5501      break;
5502    case 0xe8:
5503        {
5504          /** 1110 1000			mov	%0, %1				*/
5505          if (trace)
5506            {
5507              printf ("\033[33m%s\033[0m  %02x\n",
5508                     "/** 1110 1000			mov	%0, %1				*/",
5509                     op[0]);
5510            }
5511          SYNTAX("mov	%0, %1");
5512#line 698 "rl78-decode.opc"
5513          ID(mov); DR(B); SM(None, SADDR);
5514
5515        }
5516      break;
5517    case 0xe9:
5518        {
5519          /** 1110 1001			mov	%0, %e!1			*/
5520          if (trace)
5521            {
5522              printf ("\033[33m%s\033[0m  %02x\n",
5523                     "/** 1110 1001			mov	%0, %e!1			*/",
5524                     op[0]);
5525            }
5526          SYNTAX("mov	%0, %e!1");
5527#line 692 "rl78-decode.opc"
5528          ID(mov); DR(B); SM(None, IMMU(2));
5529
5530        }
5531      break;
5532    case 0xec:
5533        {
5534          /** 1110 1100			br	!%!a0				*/
5535          if (trace)
5536            {
5537              printf ("\033[33m%s\033[0m  %02x\n",
5538                     "/** 1110 1100			br	!%!a0				*/",
5539                     op[0]);
5540            }
5541          SYNTAX("br	!%!a0");
5542#line 367 "rl78-decode.opc"
5543          ID(branch); DC(IMMU(3));
5544
5545        }
5546      break;
5547    case 0xed:
5548        {
5549          /** 1110 1101			br	%!a0				*/
5550          if (trace)
5551            {
5552              printf ("\033[33m%s\033[0m  %02x\n",
5553                     "/** 1110 1101			br	%!a0				*/",
5554                     op[0]);
5555            }
5556          SYNTAX("br	%!a0");
5557#line 370 "rl78-decode.opc"
5558          ID(branch); DC(IMMU(2));
5559
5560        }
5561      break;
5562    case 0xee:
5563        {
5564          /** 1110 1110			br	$%!a0				*/
5565          if (trace)
5566            {
5567              printf ("\033[33m%s\033[0m  %02x\n",
5568                     "/** 1110 1110			br	$%!a0				*/",
5569                     op[0]);
5570            }
5571          SYNTAX("br	$%!a0");
5572#line 373 "rl78-decode.opc"
5573          ID(branch); DC(pc+IMMS(2)+3);
5574
5575        }
5576      break;
5577    case 0xef:
5578        {
5579          /** 1110 1111			br	$%a0				*/
5580          if (trace)
5581            {
5582              printf ("\033[33m%s\033[0m  %02x\n",
5583                     "/** 1110 1111			br	$%a0				*/",
5584                     op[0]);
5585            }
5586          SYNTAX("br	$%a0");
5587#line 376 "rl78-decode.opc"
5588          ID(branch); DC(pc+IMMS(1)+2);
5589
5590        }
5591      break;
5592    case 0xf0:
5593    case 0xf1:
5594    case 0xf2:
5595    case 0xf3:
5596        {
5597          /** 1111 00rg			clrb	%0				*/
5598#line 463 "rl78-decode.opc"
5599          int rg AU = op[0] & 0x03;
5600          if (trace)
5601            {
5602              printf ("\033[33m%s\033[0m  %02x\n",
5603                     "/** 1111 00rg			clrb	%0				*/",
5604                     op[0]);
5605              printf ("  rg = 0x%x\n", rg);
5606            }
5607          SYNTAX("clrb	%0");
5608#line 463 "rl78-decode.opc"
5609          ID(mov); DRB(rg); SC(0);
5610
5611        }
5612      break;
5613    case 0xf4:
5614        {
5615          /** 1111 0100			clrb	%0				*/
5616          if (trace)
5617            {
5618              printf ("\033[33m%s\033[0m  %02x\n",
5619                     "/** 1111 0100			clrb	%0				*/",
5620                     op[0]);
5621            }
5622          SYNTAX("clrb	%0");
5623#line 466 "rl78-decode.opc"
5624          ID(mov); DM(None, SADDR); SC(0);
5625
5626        /*----------------------------------------------------------------------*/
5627
5628        }
5629      break;
5630    case 0xf5:
5631        {
5632          /** 1111 0101			clrb	%e!0				*/
5633          if (trace)
5634            {
5635              printf ("\033[33m%s\033[0m  %02x\n",
5636                     "/** 1111 0101			clrb	%e!0				*/",
5637                     op[0]);
5638            }
5639          SYNTAX("clrb	%e!0");
5640#line 460 "rl78-decode.opc"
5641          ID(mov); DM(None, IMMU(2)); SC(0);
5642
5643        }
5644      break;
5645    case 0xf6:
5646        {
5647          /** 1111 0110			clrw	%0				*/
5648          if (trace)
5649            {
5650              printf ("\033[33m%s\033[0m  %02x\n",
5651                     "/** 1111 0110			clrw	%0				*/",
5652                     op[0]);
5653            }
5654          SYNTAX("clrw	%0");
5655#line 471 "rl78-decode.opc"
5656          ID(mov); DR(AX); SC(0);
5657
5658        }
5659      break;
5660    case 0xf7:
5661        {
5662          /** 1111 0111			clrw	%0				*/
5663          if (trace)
5664            {
5665              printf ("\033[33m%s\033[0m  %02x\n",
5666                     "/** 1111 0111			clrw	%0				*/",
5667                     op[0]);
5668            }
5669          SYNTAX("clrw	%0");
5670#line 474 "rl78-decode.opc"
5671          ID(mov); DR(BC); SC(0);
5672
5673        /*----------------------------------------------------------------------*/
5674
5675        }
5676      break;
5677    case 0xf8:
5678        {
5679          /** 1111 1000			mov	%0, %1				*/
5680          if (trace)
5681            {
5682              printf ("\033[33m%s\033[0m  %02x\n",
5683                     "/** 1111 1000			mov	%0, %1				*/",
5684                     op[0]);
5685            }
5686          SYNTAX("mov	%0, %1");
5687#line 704 "rl78-decode.opc"
5688          ID(mov); DR(C); SM(None, SADDR);
5689
5690        }
5691      break;
5692    case 0xf9:
5693        {
5694          /** 1111 1001			mov	%0, %e!1			*/
5695          if (trace)
5696            {
5697              printf ("\033[33m%s\033[0m  %02x\n",
5698                     "/** 1111 1001			mov	%0, %e!1			*/",
5699                     op[0]);
5700            }
5701          SYNTAX("mov	%0, %e!1");
5702#line 701 "rl78-decode.opc"
5703          ID(mov); DR(C); SM(None, IMMU(2));
5704
5705        }
5706      break;
5707    case 0xfc:
5708        {
5709          /** 1111 1100			call	!%!a0				*/
5710          if (trace)
5711            {
5712              printf ("\033[33m%s\033[0m  %02x\n",
5713                     "/** 1111 1100			call	!%!a0				*/",
5714                     op[0]);
5715            }
5716          SYNTAX("call	!%!a0");
5717#line 420 "rl78-decode.opc"
5718          ID(call); DC(IMMU(3));
5719
5720        }
5721      break;
5722    case 0xfd:
5723        {
5724          /** 1111 1101			call	%!a0				*/
5725          if (trace)
5726            {
5727              printf ("\033[33m%s\033[0m  %02x\n",
5728                     "/** 1111 1101			call	%!a0				*/",
5729                     op[0]);
5730            }
5731          SYNTAX("call	%!a0");
5732#line 423 "rl78-decode.opc"
5733          ID(call); DC(IMMU(2));
5734
5735        }
5736      break;
5737    case 0xfe:
5738        {
5739          /** 1111 1110			call	$%!a0				*/
5740          if (trace)
5741            {
5742              printf ("\033[33m%s\033[0m  %02x\n",
5743                     "/** 1111 1110			call	$%!a0				*/",
5744                     op[0]);
5745            }
5746          SYNTAX("call	$%!a0");
5747#line 426 "rl78-decode.opc"
5748          ID(call); DC(pc+IMMS(2)+3);
5749
5750        }
5751      break;
5752    case 0xff:
5753        {
5754          /** 1111 1111			brk1					*/
5755          if (trace)
5756            {
5757              printf ("\033[33m%s\033[0m  %02x\n",
5758                     "/** 1111 1111			brk1					*/",
5759                     op[0]);
5760            }
5761          SYNTAX("brk1");
5762#line 384 "rl78-decode.opc"
5763          ID(break);
5764
5765        }
5766      break;
5767  }
5768#line 1289 "rl78-decode.opc"
5769
5770  return rl78->n_bytes;
5771}
5772