m68k-dis.c revision 1.1.1.7 
1/* Print Motorola 68k instructions.
2   Copyright (C) 1986-2020 Free Software Foundation, Inc.
3
4   This file is part of the GNU opcodes library.
5
6   This library is free software; you can redistribute it and/or modify
7   it under the terms of the GNU General Public License as published by
8   the Free Software Foundation; either version 3, or (at your option)
9   any later version.
10
11   It is distributed in the hope that it will be useful, but WITHOUT
12   ANY WARRANTY; without even the implied warranty of MERCHANTABILITY
13   or FITNESS FOR A PARTICULAR PURPOSE.  See the GNU General Public
14   License for more details.
15
16   You should have received a copy of the GNU General Public License
17   along with this program; if not, write to the Free Software
18   Foundation, Inc., 51 Franklin Street - Fifth Floor, Boston,
19   MA 02110-1301, USA.  */
20
21#include "sysdep.h"
22#include "disassemble.h"
23#include "floatformat.h"
24#include "libiberty.h"
25#include "opintl.h"
26#include "cpu-m68k.h"
27#include "opcode/m68k.h"
28
29/* Local function prototypes.  */
30
31const char * const fpcr_names[] =
32{
33  "", "%fpiar", "%fpsr", "%fpiar/%fpsr", "%fpcr",
34  "%fpiar/%fpcr", "%fpsr/%fpcr", "%fpiar/%fpsr/%fpcr"
35};
36
37static char *const reg_names[] =
38{
39  "%d0", "%d1", "%d2", "%d3", "%d4", "%d5", "%d6", "%d7",
40  "%a0", "%a1", "%a2", "%a3", "%a4", "%a5", "%fp", "%sp",
41  "%ps", "%pc"
42};
43
44/* Name of register halves for MAC/EMAC.
45   Seperate from reg_names since 'spu', 'fpl' look weird.  */
46static char *const reg_half_names[] =
47{
48  "%d0", "%d1", "%d2", "%d3", "%d4", "%d5", "%d6", "%d7",
49  "%a0", "%a1", "%a2", "%a3", "%a4", "%a5", "%a6", "%a7",
50  "%ps", "%pc"
51};
52
53/* Sign-extend an (unsigned char).  */
54#if __STDC__ == 1
55#define COERCE_SIGNED_CHAR(ch) ((signed char) (ch))
56#else
57#define COERCE_SIGNED_CHAR(ch) ((int) (((ch) ^ 0x80) & 0xFF) - 128)
58#endif
59
60/* Error code of print_insn_arg's return value.  */
61
62enum print_insn_arg_error
63  {
64    /* An invalid operand is found.  */
65    PRINT_INSN_ARG_INVALID_OPERAND = -1,
66
67    /* An opcode table error.  */
68    PRINT_INSN_ARG_INVALID_OP_TABLE = -2,
69
70    /* A memory error.  */
71    PRINT_INSN_ARG_MEMORY_ERROR = -3,
72  };
73
74/* Get a 1 byte signed integer.  */
75#define NEXTBYTE(p, val)			\
76  do						\
77    {						\
78      p += 2;					\
79      if (!FETCH_DATA (info, p))		\
80	return PRINT_INSN_ARG_MEMORY_ERROR;	\
81      val = COERCE_SIGNED_CHAR (p[-1]);		\
82    }						\
83  while (0)
84
85/* Get a 2 byte signed integer.  */
86#define COERCE16(x) ((int) (((x) ^ 0x8000) - 0x8000))
87
88#define NEXTWORD(p, val, ret_val)		\
89  do						\
90    {						\
91      p += 2;					\
92      if (!FETCH_DATA (info, p))		\
93	return ret_val;				\
94      val = COERCE16 ((p[-2] << 8) + p[-1]);	\
95    }						\
96  while (0)
97
98/* Get a 4 byte signed integer.  */
99#define COERCE32(x) (((bfd_vma) (x) ^ 0x80000000) - 0x80000000)
100
101#define NEXTLONG(p, val, ret_val)					\
102  do									\
103    {									\
104      p += 4;								\
105      if (!FETCH_DATA (info, p))					\
106	return ret_val;							\
107      val = COERCE32 (((((((unsigned) p[-4] << 8) + p[-3]) << 8)	\
108			+ p[-2]) << 8) + p[-1]);			\
109    }									\
110  while (0)
111
112/* Get a 4 byte unsigned integer.  */
113#define NEXTULONG(p, val)						\
114  do									\
115    {									\
116      p += 4;								\
117      if (!FETCH_DATA (info, p))					\
118	return PRINT_INSN_ARG_MEMORY_ERROR;				\
119      val = (((((((unsigned) p[-4] << 8) + p[-3]) << 8)			\
120	       + p[-2]) << 8) + p[-1]);					\
121    }									\
122  while (0)
123
124/* Get a single precision float.  */
125#define NEXTSINGLE(val, p)					\
126  do								\
127    {								\
128      p += 4;							\
129      if (!FETCH_DATA (info, p))				\
130	return PRINT_INSN_ARG_MEMORY_ERROR;			\
131      floatformat_to_double (& floatformat_ieee_single_big,	\
132			     (char *) p - 4, & val);		\
133    }								\
134  while (0)
135
136/* Get a double precision float.  */
137#define NEXTDOUBLE(val, p)					\
138  do								\
139    {								\
140      p += 8;							\
141      if (!FETCH_DATA (info, p))				\
142	return PRINT_INSN_ARG_MEMORY_ERROR;			\
143      floatformat_to_double (& floatformat_ieee_double_big,	\
144			     (char *) p - 8, & val);		\
145    }								\
146  while (0)
147
148/* Get an extended precision float.  */
149#define NEXTEXTEND(val, p)				\
150  do							\
151    {							\
152      p += 12;						\
153      if (!FETCH_DATA (info, p))			\
154	return PRINT_INSN_ARG_MEMORY_ERROR;		\
155      floatformat_to_double (& floatformat_m68881_ext,	\
156			     (char *) p - 12, & val);	\
157    }							\
158  while (0)
159
160/* Need a function to convert from packed to double
161   precision.   Actually, it's easier to print a
162   packed number than a double anyway, so maybe
163   there should be a special case to handle this... */
164#define NEXTPACKED(p, val)			\
165  do						\
166    {						\
167      p += 12;					\
168      if (!FETCH_DATA (info, p))		\
169	return PRINT_INSN_ARG_MEMORY_ERROR;	\
170      val = 0.0;				\
171    }						\
172  while (0)
173
174
175/* Maximum length of an instruction.  */
176#define MAXLEN 22
177
178struct private
179{
180  /* Points to first byte not fetched.  */
181  bfd_byte *max_fetched;
182  bfd_byte the_buffer[MAXLEN];
183  bfd_vma insn_start;
184};
185
186/* Make sure that bytes from INFO->PRIVATE_DATA->BUFFER (inclusive)
187   to ADDR (exclusive) are valid.  Returns 1 for success, 0 on memory
188   error.  */
189#define FETCH_DATA(info, addr) \
190  ((addr) <= ((struct private *) (info->private_data))->max_fetched \
191   ? 1 : fetch_data ((info), (addr)))
192
193static int
194fetch_data (struct disassemble_info *info, bfd_byte *addr)
195{
196  int status;
197  struct private *priv = (struct private *)info->private_data;
198  bfd_vma start = priv->insn_start + (priv->max_fetched - priv->the_buffer);
199
200  status = (*info->read_memory_func) (start,
201				      priv->max_fetched,
202				      addr - priv->max_fetched,
203				      info);
204  if (status != 0)
205    {
206      (*info->memory_error_func) (status, start, info);
207      return 0;
208    }
209  else
210    priv->max_fetched = addr;
211  return 1;
212}
213
214/* This function is used to print to the bit-bucket.  */
215static int
216dummy_printer (FILE *file ATTRIBUTE_UNUSED,
217	       const char *format ATTRIBUTE_UNUSED,
218	       ...)
219{
220  return 0;
221}
222
223static void
224dummy_print_address (bfd_vma vma ATTRIBUTE_UNUSED,
225		     struct disassemble_info *info ATTRIBUTE_UNUSED)
226{
227}
228
229/* Fetch BITS bits from a position in the instruction specified by CODE.
230   CODE is a "place to put an argument", or 'x' for a destination
231   that is a general address (mode and register).
232   BUFFER contains the instruction.
233   Returns -1 on failure.  */
234
235static int
236fetch_arg (unsigned char *buffer,
237	   int code,
238	   int bits,
239	   disassemble_info *info)
240{
241  int val = 0;
242
243  switch (code)
244    {
245    case '/': /* MAC/EMAC mask bit.  */
246      val = buffer[3] >> 5;
247      break;
248
249    case 'G': /* EMAC ACC load.  */
250      val = ((buffer[3] >> 3) & 0x2) | ((~buffer[1] >> 7) & 0x1);
251      break;
252
253    case 'H': /* EMAC ACC !load.  */
254      val = ((buffer[3] >> 3) & 0x2) | ((buffer[1] >> 7) & 0x1);
255      break;
256
257    case ']': /* EMAC ACCEXT bit.  */
258      val = buffer[0] >> 2;
259      break;
260
261    case 'I': /* MAC/EMAC scale factor.  */
262      val = buffer[2] >> 1;
263      break;
264
265    case 'F': /* EMAC ACCx.  */
266      val = buffer[0] >> 1;
267      break;
268
269    case 'f':
270      val = buffer[1];
271      break;
272
273    case 's':
274      val = buffer[1];
275      break;
276
277    case 'd':			/* Destination, for register or quick.  */
278      val = (buffer[0] << 8) + buffer[1];
279      val >>= 9;
280      break;
281
282    case 'x':			/* Destination, for general arg.  */
283      val = (buffer[0] << 8) + buffer[1];
284      val >>= 6;
285      break;
286
287    case 'k':
288      if (! FETCH_DATA (info, buffer + 3))
289	return -1;
290      val = (buffer[3] >> 4);
291      break;
292
293    case 'C':
294      if (! FETCH_DATA (info, buffer + 3))
295	return -1;
296      val = buffer[3];
297      break;
298
299    case '1':
300      if (! FETCH_DATA (info, buffer + 3))
301	return -1;
302      val = (buffer[2] << 8) + buffer[3];
303      val >>= 12;
304      break;
305
306    case '2':
307      if (! FETCH_DATA (info, buffer + 3))
308	return -1;
309      val = (buffer[2] << 8) + buffer[3];
310      val >>= 6;
311      break;
312
313    case '3':
314    case 'j':
315      if (! FETCH_DATA (info, buffer + 3))
316	return -1;
317      val = (buffer[2] << 8) + buffer[3];
318      break;
319
320    case '4':
321      if (! FETCH_DATA (info, buffer + 5))
322	return -1;
323      val = (buffer[4] << 8) + buffer[5];
324      val >>= 12;
325      break;
326
327    case '5':
328      if (! FETCH_DATA (info, buffer + 5))
329	return -1;
330      val = (buffer[4] << 8) + buffer[5];
331      val >>= 6;
332      break;
333
334    case '6':
335      if (! FETCH_DATA (info, buffer + 5))
336	return -1;
337      val = (buffer[4] << 8) + buffer[5];
338      break;
339
340    case '7':
341      if (! FETCH_DATA (info, buffer + 3))
342	return -1;
343      val = (buffer[2] << 8) + buffer[3];
344      val >>= 7;
345      break;
346
347    case '8':
348      if (! FETCH_DATA (info, buffer + 3))
349	return -1;
350      val = (buffer[2] << 8) + buffer[3];
351      val >>= 10;
352      break;
353
354    case '9':
355      if (! FETCH_DATA (info, buffer + 3))
356	return -1;
357      val = (buffer[2] << 8) + buffer[3];
358      val >>= 5;
359      break;
360
361    case 'e':
362      val = (buffer[1] >> 6);
363      break;
364
365    case 'E':
366      if (! FETCH_DATA (info, buffer + 3))
367	return -1;
368      val = (buffer[2] >> 1);
369      break;
370
371    case 'm':
372      val = (buffer[1] & 0x40 ? 0x8 : 0)
373	| ((buffer[0] >> 1) & 0x7)
374	| (buffer[3] & 0x80 ? 0x10 : 0);
375      break;
376
377    case 'n':
378      val = (buffer[1] & 0x40 ? 0x8 : 0) | ((buffer[0] >> 1) & 0x7);
379      break;
380
381    case 'o':
382      val = (buffer[2] >> 4) | (buffer[3] & 0x80 ? 0x10 : 0);
383      break;
384
385    case 'M':
386      val = (buffer[1] & 0xf) | (buffer[3] & 0x40 ? 0x10 : 0);
387      break;
388
389    case 'N':
390      val = (buffer[3] & 0xf) | (buffer[3] & 0x40 ? 0x10 : 0);
391      break;
392
393    case 'h':
394      val = buffer[2] >> 2;
395      break;
396
397    default:
398      abort ();
399    }
400
401  /* bits is never too big.  */
402  return val & ((1 << bits) - 1);
403}
404
405/* Check if an EA is valid for a particular code.  This is required
406   for the EMAC instructions since the type of source address determines
407   if it is a EMAC-load instruciton if the EA is mode 2-5, otherwise it
408   is a non-load EMAC instruction and the bits mean register Ry.
409   A similar case exists for the movem instructions where the register
410   mask is interpreted differently for different EAs.  */
411
412static bfd_boolean
413m68k_valid_ea (char code, int val)
414{
415  int mode, mask;
416#define M(n0,n1,n2,n3,n4,n5,n6,n70,n71,n72,n73,n74) \
417  (n0 | n1 << 1 | n2 << 2 | n3 << 3 | n4 << 4 | n5 << 5 | n6 << 6 \
418   | n70 << 7 | n71 << 8 | n72 << 9 | n73 << 10 | n74 << 11)
419
420  switch (code)
421    {
422    case '*':
423      mask = M (1,1,1,1,1,1,1,1,1,1,1,1);
424      break;
425    case '~':
426      mask = M (0,0,1,1,1,1,1,1,1,0,0,0);
427      break;
428    case '%':
429      mask = M (1,1,1,1,1,1,1,1,1,0,0,0);
430      break;
431    case ';':
432      mask = M (1,0,1,1,1,1,1,1,1,1,1,1);
433      break;
434    case '@':
435      mask = M (1,0,1,1,1,1,1,1,1,1,1,0);
436      break;
437    case '!':
438      mask = M (0,0,1,0,0,1,1,1,1,1,1,0);
439      break;
440    case '&':
441      mask = M (0,0,1,0,0,1,1,1,1,0,0,0);
442      break;
443    case '$':
444      mask = M (1,0,1,1,1,1,1,1,1,0,0,0);
445      break;
446    case '?':
447      mask = M (1,0,1,0,0,1,1,1,1,0,0,0);
448      break;
449    case '/':
450      mask = M (1,0,1,0,0,1,1,1,1,1,1,0);
451      break;
452    case '|':
453      mask = M (0,0,1,0,0,1,1,1,1,1,1,0);
454      break;
455    case '>':
456      mask = M (0,0,1,0,1,1,1,1,1,0,0,0);
457      break;
458    case '<':
459      mask = M (0,0,1,1,0,1,1,1,1,1,1,0);
460      break;
461    case 'm':
462      mask = M (1,1,1,1,1,0,0,0,0,0,0,0);
463      break;
464    case 'n':
465      mask = M (0,0,0,0,0,1,0,0,0,1,0,0);
466      break;
467    case 'o':
468      mask = M (0,0,0,0,0,0,1,1,1,0,1,1);
469      break;
470    case 'p':
471      mask = M (1,1,1,1,1,1,0,0,0,0,0,0);
472      break;
473    case 'q':
474      mask = M (1,0,1,1,1,1,0,0,0,0,0,0);
475      break;
476    case 'v':
477      mask = M (1,0,1,1,1,1,0,1,1,0,0,0);
478      break;
479    case 'b':
480      mask = M (1,0,1,1,1,1,0,0,0,1,0,0);
481      break;
482    case 'w':
483      mask = M (0,0,1,1,1,1,0,0,0,1,0,0);
484      break;
485    case 'y':
486      mask = M (0,0,1,0,0,1,0,0,0,0,0,0);
487      break;
488    case 'z':
489      mask = M (0,0,1,0,0,1,0,0,0,1,0,0);
490      break;
491    case '4':
492      mask = M (0,0,1,1,1,1,0,0,0,0,0,0);
493      break;
494    default:
495      abort ();
496    }
497#undef M
498
499  mode = (val >> 3) & 7;
500  if (mode == 7)
501    mode += val & 7;
502  return (mask & (1 << mode)) != 0;
503}
504
505/* Print a base register REGNO and displacement DISP, on INFO->STREAM.
506   REGNO = -1 for pc, -2 for none (suppressed).  */
507
508static void
509print_base (int regno, bfd_vma disp, disassemble_info *info)
510{
511  if (regno == -1)
512    {
513      (*info->fprintf_func) (info->stream, "%%pc@(");
514      (*info->print_address_func) (disp, info);
515    }
516  else
517    {
518      char buf[50];
519
520      if (regno == -2)
521	(*info->fprintf_func) (info->stream, "@(");
522      else if (regno == -3)
523	(*info->fprintf_func) (info->stream, "%%zpc@(");
524      else
525	(*info->fprintf_func) (info->stream, "%s@(", reg_names[regno]);
526
527      sprintf_vma (buf, disp);
528      (*info->fprintf_func) (info->stream, "%s", buf);
529    }
530}
531
532/* Print an indexed argument.  The base register is BASEREG (-1 for pc).
533   P points to extension word, in buffer.
534   ADDR is the nominal core address of that extension word.
535   Returns NULL upon error.  */
536
537static unsigned char *
538print_indexed (int basereg,
539	       unsigned char *p,
540	       bfd_vma addr,
541	       disassemble_info *info)
542{
543  int word;
544  static char *const scales[] = { "", ":2", ":4", ":8" };
545  bfd_vma base_disp;
546  bfd_vma outer_disp;
547  char buf[40];
548  char vmabuf[50];
549
550  NEXTWORD (p, word, NULL);
551
552  /* Generate the text for the index register.
553     Where this will be output is not yet determined.  */
554  sprintf (buf, "%s:%c%s",
555	   reg_names[(word >> 12) & 0xf],
556	   (word & 0x800) ? 'l' : 'w',
557	   scales[(word >> 9) & 3]);
558
559  /* Handle the 68000 style of indexing.  */
560
561  if ((word & 0x100) == 0)
562    {
563      base_disp = word & 0xff;
564      if ((base_disp & 0x80) != 0)
565	base_disp -= 0x100;
566      if (basereg == -1)
567	base_disp += addr;
568      print_base (basereg, base_disp, info);
569      (*info->fprintf_func) (info->stream, ",%s)", buf);
570      return p;
571    }
572
573  /* Handle the generalized kind.  */
574  /* First, compute the displacement to add to the base register.  */
575  if (word & 0200)
576    {
577      if (basereg == -1)
578	basereg = -3;
579      else
580	basereg = -2;
581    }
582  if (word & 0100)
583    buf[0] = '\0';
584  base_disp = 0;
585  switch ((word >> 4) & 3)
586    {
587    case 2:
588      NEXTWORD (p, base_disp, NULL);
589      break;
590    case 3:
591      NEXTLONG (p, base_disp, NULL);
592    }
593  if (basereg == -1)
594    base_disp += addr;
595
596  /* Handle single-level case (not indirect).  */
597  if ((word & 7) == 0)
598    {
599      print_base (basereg, base_disp, info);
600      if (buf[0] != '\0')
601	(*info->fprintf_func) (info->stream, ",%s", buf);
602      (*info->fprintf_func) (info->stream, ")");
603      return p;
604    }
605
606  /* Two level.  Compute displacement to add after indirection.  */
607  outer_disp = 0;
608  switch (word & 3)
609    {
610    case 2:
611      NEXTWORD (p, outer_disp, NULL);
612      break;
613    case 3:
614      NEXTLONG (p, outer_disp, NULL);
615    }
616
617  print_base (basereg, base_disp, info);
618  if ((word & 4) == 0 && buf[0] != '\0')
619    {
620      (*info->fprintf_func) (info->stream, ",%s", buf);
621      buf[0] = '\0';
622    }
623  sprintf_vma (vmabuf, outer_disp);
624  (*info->fprintf_func) (info->stream, ")@(%s", vmabuf);
625  if (buf[0] != '\0')
626    (*info->fprintf_func) (info->stream, ",%s", buf);
627  (*info->fprintf_func) (info->stream, ")");
628
629  return p;
630}
631
632#define FETCH_ARG(size, val)				\
633  do							\
634    {							\
635      val = fetch_arg (buffer, place, size, info);	\
636      if (val < 0)					\
637	return PRINT_INSN_ARG_MEMORY_ERROR;		\
638    }							\
639  while (0)
640
641/* Returns number of bytes "eaten" by the operand, or
642   return enum print_insn_arg_error.  ADDR is the pc for this arg to be
643   relative to.  */
644
645static int
646print_insn_arg (const char *d,
647		unsigned char *buffer,
648		unsigned char *p0,
649		bfd_vma addr,
650		disassemble_info *info)
651{
652  int val = 0;
653  int place = d[1];
654  unsigned char *p = p0;
655  int regno;
656  const char *regname;
657  unsigned char *p1;
658  double flval;
659  int flt_p;
660  bfd_signed_vma disp;
661  unsigned int uval;
662
663  switch (*d)
664    {
665    case 'c':		/* Cache identifier.  */
666      {
667        static char *const cacheFieldName[] = { "nc", "dc", "ic", "bc" };
668        FETCH_ARG (2, val);
669	(*info->fprintf_func) (info->stream, "%s", cacheFieldName[val]);
670        break;
671      }
672
673    case 'a':		/* Address register indirect only. Cf. case '+'.  */
674      {
675	FETCH_ARG (3, val);
676	(*info->fprintf_func) (info->stream, "%s@", reg_names[val + 8]);
677        break;
678      }
679
680    case '_':		/* 32-bit absolute address for move16.  */
681      {
682        NEXTULONG (p, uval);
683	(*info->print_address_func) (uval, info);
684        break;
685      }
686
687    case 'C':
688      (*info->fprintf_func) (info->stream, "%%ccr");
689      break;
690
691    case 'S':
692      (*info->fprintf_func) (info->stream, "%%sr");
693      break;
694
695    case 'U':
696      (*info->fprintf_func) (info->stream, "%%usp");
697      break;
698
699    case 'E':
700      (*info->fprintf_func) (info->stream, "%%acc");
701      break;
702
703    case 'G':
704      (*info->fprintf_func) (info->stream, "%%macsr");
705      break;
706
707    case 'H':
708      (*info->fprintf_func) (info->stream, "%%mask");
709      break;
710
711    case 'J':
712      {
713	/* FIXME: There's a problem here, different m68k processors call the
714	   same address different names.  The tables below try to get it right
715	   using info->mach, but only for v4e.  */
716	struct regname { char * name; int value; };
717	static const struct regname names[] =
718	  {
719	    {"%sfc", 0x000}, {"%dfc", 0x001}, {"%cacr", 0x002},
720	    {"%tc",  0x003}, {"%itt0",0x004}, {"%itt1", 0x005},
721	    {"%dtt0",0x006}, {"%dtt1",0x007}, {"%buscr",0x008},
722	    {"%rgpiobar", 0x009}, {"%acr4",0x00c},
723	    {"%acr5",0x00d}, {"%acr6",0x00e}, {"%acr7", 0x00f},
724	    {"%usp", 0x800}, {"%vbr", 0x801}, {"%caar", 0x802},
725	    {"%msp", 0x803}, {"%isp", 0x804},
726	    {"%pc", 0x80f},
727	    /* Reg c04 is sometimes called flashbar or rambar.
728	       Reg c05 is also sometimes called rambar.  */
729	    {"%rambar0", 0xc04}, {"%rambar1", 0xc05},
730
731	    /* reg c0e is sometimes called mbar2 or secmbar.
732	       reg c0f is sometimes called mbar.  */
733	    {"%mbar0", 0xc0e}, {"%mbar1", 0xc0f},
734
735	    /* Should we be calling this psr like we do in case 'Y'?  */
736	    {"%mmusr",0x805},
737
738	    {"%urp", 0x806}, {"%srp", 0x807}, {"%pcr", 0x808},
739
740	    /* Fido added these.  */
741	    {"%cac", 0xffe}, {"%mbo", 0xfff}
742	};
743	/* Alternate names for v4e (MCF5407/5445x/MCF547x/MCF548x), at least.  */
744	static const struct regname names_v4e[] =
745	  {
746	    {"%asid",0x003}, {"%acr0",0x004}, {"%acr1",0x005},
747	    {"%acr2",0x006}, {"%acr3",0x007}, {"%mmubar",0x008},
748	  };
749	unsigned int arch_mask;
750
751	arch_mask = bfd_m68k_mach_to_features (info->mach);
752	FETCH_ARG (12, val);
753	if (arch_mask & (mcfisa_b | mcfisa_c))
754	  {
755	    for (regno = ARRAY_SIZE (names_v4e); --regno >= 0;)
756	      if (names_v4e[regno].value == val)
757		{
758		  (*info->fprintf_func) (info->stream, "%s", names_v4e[regno].name);
759		  break;
760		}
761	    if (regno >= 0)
762	      break;
763	  }
764	for (regno = ARRAY_SIZE (names) - 1; regno >= 0; regno--)
765	  if (names[regno].value == val)
766	    {
767	      (*info->fprintf_func) (info->stream, "%s", names[regno].name);
768	      break;
769	    }
770	if (regno < 0)
771	  (*info->fprintf_func) (info->stream, "0x%x", val);
772      }
773      break;
774
775    case 'Q':
776      FETCH_ARG (3, val);
777      /* 0 means 8, except for the bkpt instruction... */
778      if (val == 0 && d[1] != 's')
779	val = 8;
780      (*info->fprintf_func) (info->stream, "#%d", val);
781      break;
782
783    case 'x':
784      FETCH_ARG (3, val);
785      /* 0 means -1.  */
786      if (val == 0)
787	val = -1;
788      (*info->fprintf_func) (info->stream, "#%d", val);
789      break;
790
791    case 'j':
792      FETCH_ARG (3, val);
793      (*info->fprintf_func) (info->stream, "#%d", val+1);
794      break;
795
796    case 'K':
797      FETCH_ARG (9, val);
798      (*info->fprintf_func) (info->stream, "#%d", val);
799      break;
800
801    case 'M':
802      if (place == 'h')
803	{
804	  static char *const scalefactor_name[] = { "<<", ">>" };
805
806	  FETCH_ARG (1, val);
807	  (*info->fprintf_func) (info->stream, "%s", scalefactor_name[val]);
808	}
809      else
810	{
811	  FETCH_ARG (8, val);
812	  if (val & 0x80)
813	    val = val - 0x100;
814	  (*info->fprintf_func) (info->stream, "#%d", val);
815	}
816      break;
817
818    case 'T':
819      FETCH_ARG (4, val);
820      (*info->fprintf_func) (info->stream, "#%d", val);
821      break;
822
823    case 'D':
824      FETCH_ARG (3, val);
825      (*info->fprintf_func) (info->stream, "%s", reg_names[val]);
826      break;
827
828    case 'A':
829      FETCH_ARG (3, val);
830      (*info->fprintf_func) (info->stream, "%s", reg_names[val + 010]);
831      break;
832
833    case 'R':
834      FETCH_ARG (4, val);
835      (*info->fprintf_func) (info->stream, "%s", reg_names[val]);
836      break;
837
838    case 'r':
839      FETCH_ARG (4, regno);
840      if (regno > 7)
841	(*info->fprintf_func) (info->stream, "%s@", reg_names[regno]);
842      else
843	(*info->fprintf_func) (info->stream, "@(%s)", reg_names[regno]);
844      break;
845
846    case 'F':
847      FETCH_ARG (3, val);
848      (*info->fprintf_func) (info->stream, "%%fp%d", val);
849      break;
850
851    case 'O':
852      FETCH_ARG (6, val);
853      if (val & 0x20)
854	(*info->fprintf_func) (info->stream, "%s", reg_names[val & 7]);
855      else
856	(*info->fprintf_func) (info->stream, "%d", val);
857      break;
858
859    case '+':
860      FETCH_ARG (3, val);
861      (*info->fprintf_func) (info->stream, "%s@+", reg_names[val + 8]);
862      break;
863
864    case '-':
865      FETCH_ARG (3, val);
866      (*info->fprintf_func) (info->stream, "%s@-", reg_names[val + 8]);
867      break;
868
869    case 'k':
870      if (place == 'k')
871	{
872	  FETCH_ARG (3, val);
873	  (*info->fprintf_func) (info->stream, "{%s}", reg_names[val]);
874	}
875      else if (place == 'C')
876	{
877	  FETCH_ARG (7, val);
878	  if (val > 63)		/* This is a signed constant.  */
879	    val -= 128;
880	  (*info->fprintf_func) (info->stream, "{#%d}", val);
881	}
882      else
883	return PRINT_INSN_ARG_INVALID_OPERAND;
884      break;
885
886    case '#':
887    case '^':
888      p1 = buffer + (*d == '#' ? 2 : 4);
889      if (place == 's')
890	FETCH_ARG (4, val);
891      else if (place == 'C')
892	FETCH_ARG (7, val);
893      else if (place == '8')
894	FETCH_ARG (3, val);
895      else if (place == '3')
896	FETCH_ARG (8, val);
897      else if (place == 'b')
898	NEXTBYTE (p1, val);
899      else if (place == 'w' || place == 'W')
900	NEXTWORD (p1, val, PRINT_INSN_ARG_MEMORY_ERROR);
901      else if (place == 'l')
902	NEXTLONG (p1, val, PRINT_INSN_ARG_MEMORY_ERROR);
903      else
904	return PRINT_INSN_ARG_INVALID_OP_TABLE;
905
906      (*info->fprintf_func) (info->stream, "#%d", val);
907      break;
908
909    case 'B':
910      if (place == 'b')
911	NEXTBYTE (p, disp);
912      else if (place == 'B')
913	disp = COERCE_SIGNED_CHAR (buffer[1]);
914      else if (place == 'w' || place == 'W')
915	NEXTWORD (p, disp, PRINT_INSN_ARG_MEMORY_ERROR);
916      else if (place == 'l' || place == 'L' || place == 'C')
917	NEXTLONG (p, disp, PRINT_INSN_ARG_MEMORY_ERROR);
918      else if (place == 'g')
919	{
920	  NEXTBYTE (buffer, disp);
921	  if (disp == 0)
922	    NEXTWORD (p, disp, PRINT_INSN_ARG_MEMORY_ERROR);
923	  else if (disp == -1)
924	    NEXTLONG (p, disp, PRINT_INSN_ARG_MEMORY_ERROR);
925	}
926      else if (place == 'c')
927	{
928	  if (buffer[1] & 0x40)		/* If bit six is one, long offset.  */
929	    NEXTLONG (p, disp, PRINT_INSN_ARG_MEMORY_ERROR);
930	  else
931	    NEXTWORD (p, disp, PRINT_INSN_ARG_MEMORY_ERROR);
932	}
933      else
934	return PRINT_INSN_ARG_INVALID_OP_TABLE;
935
936      (*info->print_address_func) (addr + disp, info);
937      break;
938
939    case 'd':
940      {
941	int val1;
942
943	NEXTWORD (p, val, PRINT_INSN_ARG_MEMORY_ERROR);
944	FETCH_ARG (3, val1);
945	(*info->fprintf_func) (info->stream, "%s@(%d)", reg_names[val1 + 8], val);
946	break;
947      }
948
949    case 's':
950      FETCH_ARG (3, val);
951      (*info->fprintf_func) (info->stream, "%s", fpcr_names[val]);
952      break;
953
954    case 'e':
955      FETCH_ARG (2, val);
956      (*info->fprintf_func) (info->stream, "%%acc%d", val);
957      break;
958
959    case 'g':
960      FETCH_ARG (1, val);
961      (*info->fprintf_func) (info->stream, "%%accext%s", val == 0 ? "01" : "23");
962      break;
963
964    case 'i':
965      FETCH_ARG (2, val);
966      if (val == 1)
967	(*info->fprintf_func) (info->stream, "<<");
968      else if (val == 3)
969	(*info->fprintf_func) (info->stream, ">>");
970      else
971	return PRINT_INSN_ARG_INVALID_OPERAND;
972      break;
973
974    case 'I':
975      /* Get coprocessor ID... */
976      val = fetch_arg (buffer, 'd', 3, info);
977      if (val < 0)
978	return PRINT_INSN_ARG_MEMORY_ERROR;
979      if (val != 1)				/* Unusual coprocessor ID?  */
980	(*info->fprintf_func) (info->stream, "(cpid=%d) ", val);
981      break;
982
983    case '4':
984    case '*':
985    case '~':
986    case '%':
987    case ';':
988    case '@':
989    case '!':
990    case '$':
991    case '?':
992    case '/':
993    case '&':
994    case '|':
995    case '<':
996    case '>':
997    case 'm':
998    case 'n':
999    case 'o':
1000    case 'p':
1001    case 'q':
1002    case 'v':
1003    case 'b':
1004    case 'w':
1005    case 'y':
1006    case 'z':
1007      if (place == 'd')
1008	{
1009	  val = fetch_arg (buffer, 'x', 6, info);
1010	  if (val < 0)
1011	    return PRINT_INSN_ARG_MEMORY_ERROR;
1012	  val = ((val & 7) << 3) + ((val >> 3) & 7);
1013	}
1014      else
1015	{
1016	  val = fetch_arg (buffer, 's', 6, info);
1017	  if (val < 0)
1018	    return PRINT_INSN_ARG_MEMORY_ERROR;
1019	}
1020
1021      /* If the <ea> is invalid for *d, then reject this match.  */
1022      if (!m68k_valid_ea (*d, val))
1023	return PRINT_INSN_ARG_INVALID_OPERAND;
1024
1025      /* Get register number assuming address register.  */
1026      regno = (val & 7) + 8;
1027      regname = reg_names[regno];
1028      switch (val >> 3)
1029	{
1030	case 0:
1031	  (*info->fprintf_func) (info->stream, "%s", reg_names[val]);
1032	  break;
1033
1034	case 1:
1035	  (*info->fprintf_func) (info->stream, "%s", regname);
1036	  break;
1037
1038	case 2:
1039	  (*info->fprintf_func) (info->stream, "%s@", regname);
1040	  break;
1041
1042	case 3:
1043	  (*info->fprintf_func) (info->stream, "%s@+", regname);
1044	  break;
1045
1046	case 4:
1047	  (*info->fprintf_func) (info->stream, "%s@-", regname);
1048	  break;
1049
1050	case 5:
1051	  NEXTWORD (p, val, PRINT_INSN_ARG_MEMORY_ERROR);
1052	  (*info->fprintf_func) (info->stream, "%s@(%d)", regname, val);
1053	  break;
1054
1055	case 6:
1056	  p = print_indexed (regno, p, addr, info);
1057	  if (p == NULL)
1058	    return PRINT_INSN_ARG_MEMORY_ERROR;
1059	  break;
1060
1061	case 7:
1062	  switch (val & 7)
1063	    {
1064	    case 0:
1065	      NEXTWORD (p, val, PRINT_INSN_ARG_MEMORY_ERROR);
1066	      (*info->print_address_func) (val, info);
1067	      break;
1068
1069	    case 1:
1070	      NEXTULONG (p, uval);
1071	      (*info->print_address_func) (uval, info);
1072	      break;
1073
1074	    case 2:
1075	      NEXTWORD (p, val, PRINT_INSN_ARG_MEMORY_ERROR);
1076	      (*info->fprintf_func) (info->stream, "%%pc@(");
1077	      (*info->print_address_func) (addr + val, info);
1078	      (*info->fprintf_func) (info->stream, ")");
1079	      break;
1080
1081	    case 3:
1082	      p = print_indexed (-1, p, addr, info);
1083	      if (p == NULL)
1084		return PRINT_INSN_ARG_MEMORY_ERROR;
1085	      break;
1086
1087	    case 4:
1088	      flt_p = 1;	/* Assume it's a float... */
1089	      switch (place)
1090	      {
1091		case 'b':
1092		  NEXTBYTE (p, val);
1093		  flt_p = 0;
1094		  break;
1095
1096		case 'w':
1097		  NEXTWORD (p, val, PRINT_INSN_ARG_MEMORY_ERROR);
1098		  flt_p = 0;
1099		  break;
1100
1101		case 'l':
1102		  NEXTLONG (p, val, PRINT_INSN_ARG_MEMORY_ERROR);
1103		  flt_p = 0;
1104		  break;
1105
1106		case 'f':
1107		  NEXTSINGLE (flval, p);
1108		  break;
1109
1110		case 'F':
1111		  NEXTDOUBLE (flval, p);
1112		  break;
1113
1114		case 'x':
1115		  NEXTEXTEND (flval, p);
1116		  break;
1117
1118		case 'p':
1119		  NEXTPACKED (p, flval);
1120		  break;
1121
1122		default:
1123		  return PRINT_INSN_ARG_INVALID_OPERAND;
1124	      }
1125	      if (flt_p)	/* Print a float? */
1126		(*info->fprintf_func) (info->stream, "#0e%g", flval);
1127	      else
1128		(*info->fprintf_func) (info->stream, "#%d", val);
1129	      break;
1130
1131	    default:
1132	      return PRINT_INSN_ARG_INVALID_OPERAND;
1133	    }
1134	}
1135
1136      /* If place is '/', then this is the case of the mask bit for
1137	 mac/emac loads. Now that the arg has been printed, grab the
1138	 mask bit and if set, add a '&' to the arg.  */
1139      if (place == '/')
1140	{
1141	  FETCH_ARG (1, val);
1142	  if (val)
1143	    info->fprintf_func (info->stream, "&");
1144	}
1145      break;
1146
1147    case 'L':
1148    case 'l':
1149	if (place == 'w')
1150	  {
1151	    char doneany;
1152	    p1 = buffer + 2;
1153	    NEXTWORD (p1, val, PRINT_INSN_ARG_MEMORY_ERROR);
1154	    /* Move the pointer ahead if this point is farther ahead
1155	       than the last.  */
1156	    p = p1 > p ? p1 : p;
1157	    if (val == 0)
1158	      {
1159		(*info->fprintf_func) (info->stream, "#0");
1160		break;
1161	      }
1162	    if (*d == 'l')
1163	      {
1164		int newval = 0;
1165
1166		for (regno = 0; regno < 16; ++regno)
1167		  if (val & (0x8000 >> regno))
1168		    newval |= 1 << regno;
1169		val = newval;
1170	      }
1171	    val &= 0xffff;
1172	    doneany = 0;
1173	    for (regno = 0; regno < 16; ++regno)
1174	      if (val & (1 << regno))
1175		{
1176		  int first_regno;
1177
1178		  if (doneany)
1179		    (*info->fprintf_func) (info->stream, "/");
1180		  doneany = 1;
1181		  (*info->fprintf_func) (info->stream, "%s", reg_names[regno]);
1182		  first_regno = regno;
1183		  while (val & (1 << (regno + 1)))
1184		    ++regno;
1185		  if (regno > first_regno)
1186		    (*info->fprintf_func) (info->stream, "-%s",
1187					   reg_names[regno]);
1188		}
1189	  }
1190	else if (place == '3')
1191	  {
1192	    /* `fmovem' insn.  */
1193	    char doneany;
1194
1195	    FETCH_ARG (8, val);
1196	    if (val == 0)
1197	      {
1198		(*info->fprintf_func) (info->stream, "#0");
1199		break;
1200	      }
1201	    if (*d == 'l')
1202	      {
1203		int newval = 0;
1204
1205		for (regno = 0; regno < 8; ++regno)
1206		  if (val & (0x80 >> regno))
1207		    newval |= 1 << regno;
1208		val = newval;
1209	      }
1210	    val &= 0xff;
1211	    doneany = 0;
1212	    for (regno = 0; regno < 8; ++regno)
1213	      if (val & (1 << regno))
1214		{
1215		  int first_regno;
1216		  if (doneany)
1217		    (*info->fprintf_func) (info->stream, "/");
1218		  doneany = 1;
1219		  (*info->fprintf_func) (info->stream, "%%fp%d", regno);
1220		  first_regno = regno;
1221		  while (val & (1 << (regno + 1)))
1222		    ++regno;
1223		  if (regno > first_regno)
1224		    (*info->fprintf_func) (info->stream, "-%%fp%d", regno);
1225		}
1226	  }
1227	else if (place == '8')
1228	  {
1229	    FETCH_ARG (3, val);
1230	    /* fmoveml for FP status registers.  */
1231	    (*info->fprintf_func) (info->stream, "%s", fpcr_names[val]);
1232	  }
1233	else
1234	  return PRINT_INSN_ARG_INVALID_OP_TABLE;
1235      break;
1236
1237    case 'X':
1238      place = '8';
1239      /* Fall through.  */
1240    case 'Y':
1241    case 'Z':
1242    case 'W':
1243    case '0':
1244    case '1':
1245    case '2':
1246    case '3':
1247      {
1248	char *name = 0;
1249
1250	FETCH_ARG (5, val);
1251	switch (val)
1252	  {
1253	  case 2: name = "%tt0"; break;
1254	  case 3: name = "%tt1"; break;
1255	  case 0x10: name = "%tc"; break;
1256	  case 0x11: name = "%drp"; break;
1257	  case 0x12: name = "%srp"; break;
1258	  case 0x13: name = "%crp"; break;
1259	  case 0x14: name = "%cal"; break;
1260	  case 0x15: name = "%val"; break;
1261	  case 0x16: name = "%scc"; break;
1262	  case 0x17: name = "%ac"; break;
1263 	  case 0x18: name = "%psr"; break;
1264	  case 0x19: name = "%pcsr"; break;
1265	  case 0x1c:
1266	  case 0x1d:
1267	    {
1268	      int break_reg = ((buffer[3] >> 2) & 7);
1269
1270	      (*info->fprintf_func)
1271		(info->stream, val == 0x1c ? "%%bad%d" : "%%bac%d",
1272		 break_reg);
1273	    }
1274	    break;
1275	  default:
1276	    (*info->fprintf_func) (info->stream, "<mmu register %d>", val);
1277	  }
1278	if (name)
1279	  (*info->fprintf_func) (info->stream, "%s", name);
1280      }
1281      break;
1282
1283    case 'f':
1284      {
1285	int fc;
1286
1287	FETCH_ARG (5, fc);
1288	if (fc == 1)
1289	  (*info->fprintf_func) (info->stream, "%%dfc");
1290	else if (fc == 0)
1291	  (*info->fprintf_func) (info->stream, "%%sfc");
1292	else
1293	  /* xgettext:c-format */
1294	  (*info->fprintf_func) (info->stream, _("<function code %d>"), fc);
1295      }
1296      break;
1297
1298    case 'V':
1299      (*info->fprintf_func) (info->stream, "%%val");
1300      break;
1301
1302    case 't':
1303      {
1304	int level;
1305
1306	FETCH_ARG (3, level);
1307	(*info->fprintf_func) (info->stream, "%d", level);
1308      }
1309      break;
1310
1311    case 'u':
1312      {
1313	short is_upper = 0;
1314	int reg;
1315
1316	FETCH_ARG (5, reg);
1317	if (reg & 0x10)
1318	  {
1319	    is_upper = 1;
1320	    reg &= 0xf;
1321	  }
1322	(*info->fprintf_func) (info->stream, "%s%s",
1323			       reg_half_names[reg],
1324			       is_upper ? "u" : "l");
1325      }
1326      break;
1327
1328    default:
1329      return PRINT_INSN_ARG_INVALID_OP_TABLE;
1330    }
1331
1332  return p - p0;
1333}
1334
1335/* Try to match the current instruction to best and if so, return the
1336   number of bytes consumed from the instruction stream, else zero.
1337   Return -1 on memory error.  */
1338
1339static int
1340match_insn_m68k (bfd_vma memaddr,
1341		 disassemble_info * info,
1342		 const struct m68k_opcode * best)
1343{
1344  unsigned char *save_p;
1345  unsigned char *p;
1346  const char *d;
1347  const char *args = best->args;
1348
1349  struct private *priv = (struct private *) info->private_data;
1350  bfd_byte *buffer = priv->the_buffer;
1351  fprintf_ftype save_printer = info->fprintf_func;
1352  void (* save_print_address) (bfd_vma, struct disassemble_info *)
1353    = info->print_address_func;
1354
1355  if (*args == '.')
1356    args++;
1357
1358  /* Point at first word of argument data,
1359     and at descriptor for first argument.  */
1360  p = buffer + 2;
1361
1362  /* Figure out how long the fixed-size portion of the instruction is.
1363     The only place this is stored in the opcode table is
1364     in the arguments--look for arguments which specify fields in the 2nd
1365     or 3rd words of the instruction.  */
1366  for (d = args; *d; d += 2)
1367    {
1368      /* I don't think it is necessary to be checking d[0] here;
1369	 I suspect all this could be moved to the case statement below.  */
1370      if (d[0] == '#')
1371	{
1372	  if (d[1] == 'l' && p - buffer < 6)
1373	    p = buffer + 6;
1374	  else if (p - buffer < 4 && d[1] != 'C' && d[1] != '8')
1375	    p = buffer + 4;
1376	}
1377
1378      if ((d[0] == 'L' || d[0] == 'l') && d[1] == 'w' && p - buffer < 4)
1379	p = buffer + 4;
1380
1381      switch (d[1])
1382	{
1383	case '1':
1384	case '2':
1385	case '3':
1386	case '7':
1387	case '8':
1388	case '9':
1389	case 'i':
1390	  if (p - buffer < 4)
1391	    p = buffer + 4;
1392	  break;
1393	case '4':
1394	case '5':
1395	case '6':
1396	  if (p - buffer < 6)
1397	    p = buffer + 6;
1398	  break;
1399	default:
1400	  break;
1401	}
1402    }
1403
1404  /* pflusha is an exceptions.  It takes no arguments but is two words
1405     long.  Recognize it by looking at the lower 16 bits of the mask.  */
1406  if (p - buffer < 4 && (best->match & 0xFFFF) != 0)
1407    p = buffer + 4;
1408
1409  /* lpstop is another exception.  It takes a one word argument but is
1410     three words long.  */
1411  if (p - buffer < 6
1412      && (best->match & 0xffff) == 0xffff
1413      && args[0] == '#'
1414      && args[1] == 'w')
1415    {
1416      /* Copy the one word argument into the usual location for a one
1417	 word argument, to simplify printing it.  We can get away with
1418	 this because we know exactly what the second word is, and we
1419	 aren't going to print anything based on it.  */
1420      p = buffer + 6;
1421      if (!FETCH_DATA (info, p))
1422	return -1;
1423      buffer[2] = buffer[4];
1424      buffer[3] = buffer[5];
1425    }
1426
1427  if (!FETCH_DATA (info, p))
1428    return -1;
1429
1430  save_p = p;
1431  info->print_address_func = dummy_print_address;
1432  info->fprintf_func = (fprintf_ftype) dummy_printer;
1433
1434  /* We scan the operands twice.  The first time we don't print anything,
1435     but look for errors.  */
1436  for (d = args; *d; d += 2)
1437    {
1438      int eaten = print_insn_arg (d, buffer, p, memaddr + (p - buffer), info);
1439
1440      if (eaten >= 0)
1441	p += eaten;
1442      else if (eaten == PRINT_INSN_ARG_INVALID_OPERAND
1443	       || eaten == PRINT_INSN_ARG_MEMORY_ERROR)
1444	{
1445	  info->fprintf_func = save_printer;
1446	  info->print_address_func = save_print_address;
1447	  return eaten == PRINT_INSN_ARG_MEMORY_ERROR ? -1 : 0;
1448	}
1449      else
1450	{
1451	  /* We must restore the print functions before trying to print the
1452	     error message.  */
1453	  info->fprintf_func = save_printer;
1454	  info->print_address_func = save_print_address;
1455	  info->fprintf_func (info->stream,
1456			      /* xgettext:c-format */
1457			      _("<internal error in opcode table: %s %s>\n"),
1458			      best->name, best->args);
1459	  return 2;
1460	}
1461    }
1462
1463  p = save_p;
1464  info->fprintf_func = save_printer;
1465  info->print_address_func = save_print_address;
1466
1467  d = args;
1468
1469  info->fprintf_func (info->stream, "%s", best->name);
1470
1471  if (*d)
1472    info->fprintf_func (info->stream, " ");
1473
1474  while (*d)
1475    {
1476      p += print_insn_arg (d, buffer, p, memaddr + (p - buffer), info);
1477      d += 2;
1478
1479      if (*d && *(d - 2) != 'I' && *d != 'k')
1480	info->fprintf_func (info->stream, ",");
1481    }
1482
1483  return p - buffer;
1484}
1485
1486/* Try to interpret the instruction at address MEMADDR as one that
1487   can execute on a processor with the features given by ARCH_MASK.
1488   If successful, print the instruction to INFO->STREAM and return
1489   its length in bytes.  Return 0 otherwise.  Return -1 on memory
1490   error.  */
1491
1492static int
1493m68k_scan_mask (bfd_vma memaddr, disassemble_info *info,
1494		unsigned int arch_mask)
1495{
1496  int i;
1497  const char *d;
1498  static const struct m68k_opcode **opcodes[16];
1499  static int numopcodes[16];
1500  int val;
1501  int major_opcode;
1502
1503  struct private *priv = (struct private *) info->private_data;
1504  bfd_byte *buffer = priv->the_buffer;
1505
1506  if (!opcodes[0])
1507    {
1508      /* Speed up the matching by sorting the opcode
1509	 table on the upper four bits of the opcode.  */
1510      const struct m68k_opcode **opc_pointer[16];
1511
1512      /* First count how many opcodes are in each of the sixteen buckets.  */
1513      for (i = 0; i < m68k_numopcodes; i++)
1514	numopcodes[(m68k_opcodes[i].opcode >> 28) & 15]++;
1515
1516      /* Then create a sorted table of pointers
1517	 that point into the unsorted table.  */
1518      opc_pointer[0] = xmalloc (sizeof (struct m68k_opcode *)
1519				* m68k_numopcodes);
1520      opcodes[0] = opc_pointer[0];
1521
1522      for (i = 1; i < 16; i++)
1523	{
1524	  opc_pointer[i] = opc_pointer[i - 1] + numopcodes[i - 1];
1525	  opcodes[i] = opc_pointer[i];
1526	}
1527
1528      for (i = 0; i < m68k_numopcodes; i++)
1529	*opc_pointer[(m68k_opcodes[i].opcode >> 28) & 15]++ = &m68k_opcodes[i];
1530    }
1531
1532  if (!FETCH_DATA (info, buffer + 2))
1533    return -1;
1534  major_opcode = (buffer[0] >> 4) & 15;
1535
1536  for (i = 0; i < numopcodes[major_opcode]; i++)
1537    {
1538      const struct m68k_opcode *opc = opcodes[major_opcode][i];
1539      unsigned long opcode = opc->opcode;
1540      unsigned long match = opc->match;
1541      const char *args = opc->args;
1542
1543      if (*args == '.')
1544	args++;
1545
1546      if (((0xff & buffer[0] & (match >> 24)) == (0xff & (opcode >> 24)))
1547	  && ((0xff & buffer[1] & (match >> 16)) == (0xff & (opcode >> 16)))
1548	  /* Only fetch the next two bytes if we need to.  */
1549	  && (((0xffff & match) == 0)
1550	      ||
1551	      (FETCH_DATA (info, buffer + 4)
1552	       && ((0xff & buffer[2] & (match >> 8)) == (0xff & (opcode >> 8)))
1553	       && ((0xff & buffer[3] & match) == (0xff & opcode)))
1554	      )
1555	  && (opc->arch & arch_mask) != 0)
1556	{
1557	  /* Don't use for printout the variants of divul and divsl
1558	     that have the same register number in two places.
1559	     The more general variants will match instead.  */
1560	  for (d = args; *d; d += 2)
1561	    if (d[1] == 'D')
1562	      break;
1563
1564	  /* Don't use for printout the variants of most floating
1565	     point coprocessor instructions which use the same
1566	     register number in two places, as above.  */
1567	  if (*d == '\0')
1568	    for (d = args; *d; d += 2)
1569	      if (d[1] == 't')
1570		break;
1571
1572	  /* Don't match fmovel with more than one register;
1573	     wait for fmoveml.  */
1574	  if (*d == '\0')
1575	    {
1576	      for (d = args; *d; d += 2)
1577		{
1578		  if (d[0] == 's' && d[1] == '8')
1579		    {
1580		      val = fetch_arg (buffer, d[1], 3, info);
1581		      if (val < 0)
1582			return 0;
1583		      if ((val & (val - 1)) != 0)
1584			break;
1585		    }
1586		}
1587	    }
1588
1589	  /* Don't match FPU insns with non-default coprocessor ID.  */
1590	  if (*d == '\0')
1591	    {
1592	      for (d = args; *d; d += 2)
1593		{
1594		  if (d[0] == 'I')
1595		    {
1596		      val = fetch_arg (buffer, 'd', 3, info);
1597		      if (val != 1)
1598			break;
1599		    }
1600		}
1601	    }
1602
1603	  if (*d == '\0')
1604	    if ((val = match_insn_m68k (memaddr, info, opc)))
1605	      return val;
1606	}
1607    }
1608  return 0;
1609}
1610
1611/* Print the m68k instruction at address MEMADDR in debugged memory,
1612   on INFO->STREAM.  Returns length of the instruction, in bytes.  */
1613
1614int
1615print_insn_m68k (bfd_vma memaddr, disassemble_info *info)
1616{
1617  unsigned int arch_mask;
1618  struct private priv;
1619  int val;
1620
1621  bfd_byte *buffer = priv.the_buffer;
1622
1623  info->private_data = & priv;
1624  /* Tell objdump to use two bytes per chunk
1625     and six bytes per line for displaying raw data.  */
1626  info->bytes_per_chunk = 2;
1627  info->bytes_per_line = 6;
1628  info->display_endian = BFD_ENDIAN_BIG;
1629  priv.max_fetched = priv.the_buffer;
1630  priv.insn_start = memaddr;
1631
1632  arch_mask = bfd_m68k_mach_to_features (info->mach);
1633  if (!arch_mask)
1634    {
1635      /* First try printing an m680x0 instruction.  Try printing a Coldfire
1636	 one if that fails.  */
1637      val = m68k_scan_mask (memaddr, info, m68k_mask);
1638      if (val <= 0)
1639	val = m68k_scan_mask (memaddr, info, mcf_mask);
1640    }
1641  else
1642    {
1643      val = m68k_scan_mask (memaddr, info, arch_mask);
1644    }
1645
1646  if (val == 0)
1647    /* Handle undefined instructions.  */
1648    info->fprintf_func (info->stream, ".short 0x%04x", (buffer[0] << 8) + buffer[1]);
1649
1650  return val ? val : 2;
1651}
1652