elf32-nds32.c revision 1.1.1.2
1/* NDS32-specific support for 32-bit ELF.
2   Copyright (C) 2012-2015 Free Software Foundation, Inc.
3   Contributed by Andes Technology Corporation.
4
5   This file is part of BFD, the Binary File Descriptor library.
6
7   This program is free software; you can redistribute it and/or modify
8   it under the terms of the GNU General Public License as published by
9   the Free Software Foundation; either version 3 of the License, or
10   (at your option) any later version.
11
12   This program is distributed in the hope that it will be useful,
13   but WITHOUT ANY WARRANTY; without even the implied warranty of
14   MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
15   GNU General Public License for more details.
16
17   You should have received a copy of the GNU General Public License
18   along with this program; if not, write to the Free Software
19   Foundation, Inc., 51 Franklin Street - Fifth Floor, Boston, MA
20   02110-1301, USA.  */
21
22
23#include "sysdep.h"
24#include "bfd.h"
25#include "bfd_stdint.h"
26#include "bfdlink.h"
27#include "libbfd.h"
28#include "elf-bfd.h"
29#include "libiberty.h"
30#include "bfd_stdint.h"
31#include "elf/nds32.h"
32#include "opcode/nds32.h"
33#include "elf32-nds32.h"
34#include "opcode/cgen.h"
35#include "../opcodes/nds32-opc.h"
36
37/* Relocation HOWTO functions.  */
38static bfd_reloc_status_type nds32_elf_ignore_reloc
39  (bfd *, arelent *, asymbol *, void *, asection *, bfd *, char **);
40static bfd_reloc_status_type nds32_elf_9_pcrel_reloc
41  (bfd *, arelent *, asymbol *, void *, asection *, bfd *, char **);
42static bfd_reloc_status_type nds32_elf_hi20_reloc
43  (bfd *, arelent *, asymbol *, void *,
44   asection *, bfd *, char **);
45static bfd_reloc_status_type nds32_elf_lo12_reloc
46  (bfd *, arelent *, asymbol *, void *,
47   asection *, bfd *, char **);
48static bfd_reloc_status_type nds32_elf_generic_reloc
49  (bfd *, arelent *, asymbol *, void *,
50   asection *, bfd *, char **);
51static bfd_reloc_status_type nds32_elf_sda15_reloc
52  (bfd *, arelent *, asymbol *, void *,
53   asection *, bfd *, char **);
54
55/* Helper functions for HOWTO.  */
56static bfd_reloc_status_type nds32_elf_do_9_pcrel_reloc
57  (bfd *, reloc_howto_type *, asection *, bfd_byte *, bfd_vma,
58   asection *, bfd_vma, bfd_vma);
59static void nds32_elf_relocate_hi20
60  (bfd *, int, Elf_Internal_Rela *, Elf_Internal_Rela *, bfd_byte *, bfd_vma);
61static reloc_howto_type *bfd_elf32_bfd_reloc_type_table_lookup
62  (enum elf_nds32_reloc_type);
63static reloc_howto_type *bfd_elf32_bfd_reloc_type_lookup
64  (bfd *, bfd_reloc_code_real_type);
65
66/* Target hooks.  */
67static void nds32_info_to_howto_rel
68  (bfd *, arelent *, Elf_Internal_Rela *dst);
69static void nds32_info_to_howto
70  (bfd *, arelent *, Elf_Internal_Rela *dst);
71static bfd_boolean nds32_elf_add_symbol_hook
72  (bfd *, struct bfd_link_info *, Elf_Internal_Sym *, const char **,
73   flagword *, asection **, bfd_vma *);
74static bfd_boolean nds32_elf_relocate_section
75  (bfd *, struct bfd_link_info *, bfd *, asection *, bfd_byte *,
76   Elf_Internal_Rela *, Elf_Internal_Sym *, asection **);
77static bfd_boolean nds32_elf_object_p (bfd *);
78static void nds32_elf_final_write_processing (bfd *, bfd_boolean);
79static bfd_boolean nds32_elf_set_private_flags (bfd *, flagword);
80static bfd_boolean nds32_elf_merge_private_bfd_data (bfd *, bfd *);
81static bfd_boolean nds32_elf_print_private_bfd_data (bfd *, void *);
82static bfd_boolean nds32_elf_gc_sweep_hook
83  (bfd *, struct bfd_link_info *, asection *, const Elf_Internal_Rela *);
84static bfd_boolean nds32_elf_check_relocs
85  (bfd *, struct bfd_link_info *, asection *, const Elf_Internal_Rela *);
86static asection *nds32_elf_gc_mark_hook
87  (asection *, struct bfd_link_info *, Elf_Internal_Rela *,
88   struct elf_link_hash_entry *, Elf_Internal_Sym *);
89static bfd_boolean nds32_elf_adjust_dynamic_symbol
90  (struct bfd_link_info *, struct elf_link_hash_entry *);
91static bfd_boolean nds32_elf_size_dynamic_sections
92  (bfd *, struct bfd_link_info *);
93static bfd_boolean nds32_elf_create_dynamic_sections
94  (bfd *, struct bfd_link_info *);
95static bfd_boolean nds32_elf_finish_dynamic_sections
96  (bfd *, struct bfd_link_info *info);
97static bfd_boolean nds32_elf_finish_dynamic_symbol
98  (bfd *, struct bfd_link_info *, struct elf_link_hash_entry *,
99   Elf_Internal_Sym *);
100static bfd_boolean nds32_elf_mkobject (bfd *);
101
102/* Nds32 helper functions.  */
103static bfd_reloc_status_type nds32_elf_final_sda_base
104  (bfd *, struct bfd_link_info *, bfd_vma *, bfd_boolean);
105static bfd_boolean allocate_dynrelocs (struct elf_link_hash_entry *, void *);
106static bfd_boolean readonly_dynrelocs (struct elf_link_hash_entry *, void *);
107static Elf_Internal_Rela *find_relocs_at_address
108  (Elf_Internal_Rela *, Elf_Internal_Rela *,
109   Elf_Internal_Rela *, enum elf_nds32_reloc_type);
110static bfd_vma calculate_memory_address
111  (bfd *, Elf_Internal_Rela *, Elf_Internal_Sym *, Elf_Internal_Shdr *);
112static int nds32_get_section_contents (bfd *, asection *, bfd_byte **);
113static bfd_boolean nds32_elf_ex9_build_hash_table
114  (bfd *, asection *, struct bfd_link_info *);
115static bfd_boolean nds32_elf_ex9_itb_base (struct bfd_link_info *);
116static void nds32_elf_ex9_import_table (struct bfd_link_info *);
117static void nds32_elf_ex9_finish (struct bfd_link_info *);
118static void nds32_elf_ex9_reloc_jmp (struct bfd_link_info *);
119static void nds32_elf_get_insn_with_reg
120  (Elf_Internal_Rela *, uint32_t, uint32_t *);
121static int nds32_get_local_syms (bfd *, asection *ATTRIBUTE_UNUSED,
122				 Elf_Internal_Sym **);
123static bfd_boolean nds32_elf_ex9_replace_instruction
124  (struct bfd_link_info *, bfd *, asection *);
125static bfd_boolean nds32_elf_ifc_calc (struct bfd_link_info *, bfd *,
126				       asection *);
127static bfd_boolean nds32_elf_ifc_finish (struct bfd_link_info *);
128static bfd_boolean nds32_elf_ifc_replace (struct bfd_link_info *);
129static bfd_boolean nds32_elf_ifc_reloc (void);
130static bfd_boolean  nds32_relax_fp_as_gp
131  (struct bfd_link_info *link_info, bfd *abfd, asection *sec,
132   Elf_Internal_Rela *internal_relocs, Elf_Internal_Rela *irelend,
133   Elf_Internal_Sym *isymbuf);
134static bfd_boolean nds32_fag_remove_unused_fpbase
135  (bfd *abfd, asection *sec, Elf_Internal_Rela *internal_relocs,
136   Elf_Internal_Rela *irelend);
137static bfd_byte *
138nds32_elf_get_relocated_section_contents (bfd *abfd,
139					  struct bfd_link_info *link_info,
140					  struct bfd_link_order *link_order,
141					  bfd_byte *data,
142					  bfd_boolean relocatable,
143					  asymbol **symbols);
144
145enum
146{
147  MACH_V1 = bfd_mach_n1h,
148  MACH_V2 = bfd_mach_n1h_v2,
149  MACH_V3 = bfd_mach_n1h_v3,
150  MACH_V3M = bfd_mach_n1h_v3m
151};
152
153#define MIN(a, b) ((a) > (b) ? (b) : (a))
154#define MAX(a, b) ((a) > (b) ? (a) : (b))
155
156/* The name of the dynamic interpreter.  This is put in the .interp
157   section.  */
158#define ELF_DYNAMIC_INTERPRETER "/usr/lib/ld.so.1"
159
160/* The nop opcode we use.  */
161#define NDS32_NOP32 0x40000009
162#define NDS32_NOP16 0x9200
163
164/* The size in bytes of an entry in the procedure linkage table.  */
165#define PLT_ENTRY_SIZE 24
166#define PLT_HEADER_SIZE 24
167
168/* The first entry in a procedure linkage table are reserved,
169   and the initial contents are unimportant (we zero them out).
170   Subsequent entries look like this.  */
171#define PLT0_ENTRY_WORD0  0x46f00000		/* sethi   r15, HI20(.got+4)      */
172#define PLT0_ENTRY_WORD1  0x58f78000		/* ori     r15, r25, LO12(.got+4) */
173#define PLT0_ENTRY_WORD2  0x05178000		/* lwi     r17, [r15+0]           */
174#define PLT0_ENTRY_WORD3  0x04f78001		/* lwi     r15, [r15+4]           */
175#define PLT0_ENTRY_WORD4  0x4a003c00		/* jr      r15                    */
176
177/* $ta is change to $r15 (from $r25).  */
178#define PLT0_PIC_ENTRY_WORD0  0x46f00000	/* sethi   r15, HI20(got[1]@GOT)  */
179#define PLT0_PIC_ENTRY_WORD1  0x58f78000	/* ori     r15, r15, LO12(got[1]@GOT) */
180#define PLT0_PIC_ENTRY_WORD2  0x40f7f400	/* add     r15, gp, r15           */
181#define PLT0_PIC_ENTRY_WORD3  0x05178000	/* lwi     r17, [r15+0]           */
182#define PLT0_PIC_ENTRY_WORD4  0x04f78001	/* lwi     r15, [r15+4]           */
183#define PLT0_PIC_ENTRY_WORD5  0x4a003c00	/* jr      r15                    */
184
185#define PLT_ENTRY_WORD0  0x46f00000		/* sethi   r15, HI20(&got[n+3])      */
186#define PLT_ENTRY_WORD1  0x04f78000		/* lwi     r15, r15, LO12(&got[n+3]) */
187#define PLT_ENTRY_WORD2  0x4a003c00		/* jr      r15                       */
188#define PLT_ENTRY_WORD3  0x45000000		/* movi    r16, sizeof(RELA) * n     */
189#define PLT_ENTRY_WORD4  0x48000000		/* j      .plt0.                     */
190
191#define PLT_PIC_ENTRY_WORD0  0x46f00000		/* sethi  r15, HI20(got[n+3]@GOT)    */
192#define PLT_PIC_ENTRY_WORD1  0x58f78000		/* ori    r15, r15,    LO12(got[n+3]@GOT) */
193#define PLT_PIC_ENTRY_WORD2  0x38febc02		/* lw     r15, [gp+r15]              */
194#define PLT_PIC_ENTRY_WORD3  0x4a003c00		/* jr     r15                        */
195#define PLT_PIC_ENTRY_WORD4  0x45000000		/* movi   r16, sizeof(RELA) * n      */
196#define PLT_PIC_ENTRY_WORD5  0x48000000		/* j      .plt0                      */
197
198/* These are macros used to get the relocation accurate value.  */
199#define ACCURATE_8BIT_S1	(0x100)
200#define ACCURATE_U9BIT_S1	(0x400)
201#define ACCURATE_12BIT_S1	(0x2000)
202#define ACCURATE_14BIT_S1	(0x4000)
203#define ACCURATE_19BIT		(0x40000)
204
205/* These are macros used to get the relocation conservative value.  */
206#define CONSERVATIVE_8BIT_S1	(0x100 - 4)
207#define CONSERVATIVE_14BIT_S1	(0x4000 - 4)
208#define CONSERVATIVE_16BIT_S1	(0x10000 - 4)
209#define CONSERVATIVE_24BIT_S1	(0x1000000 - 4)
210/* These must be more conservative because the address may be in
211   different segment.  */
212#define CONSERVATIVE_15BIT	(0x4000 - 0x1000)
213#define CONSERVATIVE_15BIT_S1	(0x8000 - 0x1000)
214#define CONSERVATIVE_15BIT_S2	(0x10000 - 0x1000)
215#define CONSERVATIVE_19BIT	(0x40000 - 0x1000)
216#define CONSERVATIVE_20BIT	(0x80000 - 0x1000)
217
218/* Size of small data/bss sections, used to calculate SDA_BASE.  */
219static long got_size = 0;
220static int is_SDA_BASE_set = 0;
221static int is_ITB_BASE_set = 0;
222
223/* Convert ELF-VER in eflags to string for debugging purpose.  */
224static const char *const nds32_elfver_strtab[] =
225{
226  "ELF-1.2",
227  "ELF-1.3",
228  "ELF-1.4",
229};
230
231/* The nds32 linker needs to keep track of the number of relocs that it
232   decides to copy in check_relocs for each symbol.  This is so that
233   it can discard PC relative relocs if it doesn't need them when
234   linking with -Bsymbolic.  We store the information in a field
235   extending the regular ELF linker hash table.  */
236
237/* This structure keeps track of the number of PC relative relocs we
238   have copied for a given symbol.  */
239
240struct elf_nds32_pcrel_relocs_copied
241{
242  /* Next section.  */
243  struct elf_nds32_pcrel_relocs_copied *next;
244  /* A section in dynobj.  */
245  asection *section;
246  /* Number of relocs copied in this section.  */
247  bfd_size_type count;
248};
249
250/* The sh linker needs to keep track of the number of relocs that it
251   decides to copy as dynamic relocs in check_relocs for each symbol.
252   This is so that it can later discard them if they are found to be
253   unnecessary.  We store the information in a field extending the
254   regular ELF linker hash table.  */
255
256struct elf_nds32_dyn_relocs
257{
258  struct elf_nds32_dyn_relocs *next;
259
260  /* The input section of the reloc.  */
261  asection *sec;
262
263  /* Total number of relocs copied for the input section.  */
264  bfd_size_type count;
265
266  /* Number of pc-relative relocs copied for the input section.  */
267  bfd_size_type pc_count;
268};
269
270/* Nds32 ELF linker hash entry.  */
271
272struct elf_nds32_link_hash_entry
273{
274  struct elf_link_hash_entry root;
275
276  /* Track dynamic relocs copied for this symbol.  */
277  struct elf_nds32_dyn_relocs *dyn_relocs;
278
279  /* For checking relocation type.  */
280#define GOT_UNKNOWN     0
281#define GOT_NORMAL      1
282#define GOT_TLS_IE      2
283  unsigned int tls_type;
284};
285
286/* Get the nds32 ELF linker hash table from a link_info structure.  */
287
288#define FP_BASE_NAME "_FP_BASE_"
289static int check_start_export_sym = 0;
290static size_t ex9_relax_size = 0;		/* Save ex9 predicted reducing size.  */
291
292/* The offset for executable tls relaxation.  */
293#define TP_OFFSET 0x0
294
295struct elf_nds32_obj_tdata
296{
297  struct elf_obj_tdata root;
298
299  /* tls_type for each local got entry.  */
300  char *local_got_tls_type;
301};
302
303#define elf_nds32_tdata(bfd) \
304  ((struct elf_nds32_obj_tdata *) (bfd)->tdata.any)
305
306#define elf32_nds32_local_got_tls_type(bfd) \
307  (elf_nds32_tdata (bfd)->local_got_tls_type)
308
309#define elf32_nds32_hash_entry(ent) ((struct elf_nds32_link_hash_entry *)(ent))
310
311static bfd_boolean
312nds32_elf_mkobject (bfd *abfd)
313{
314  return bfd_elf_allocate_object (abfd, sizeof (struct elf_nds32_obj_tdata),
315				  NDS32_ELF_DATA);
316}
317
318/* Relocations used for relocation.  */
319static reloc_howto_type nds32_elf_howto_table[] =
320{
321  /* This reloc does nothing.  */
322  HOWTO (R_NDS32_NONE,		/* type */
323	 0,			/* rightshift */
324	 2,			/* size (0 = byte, 1 = short, 2 = long) */
325	 32,			/* bitsize */
326	 FALSE,			/* pc_relative */
327	 0,			/* bitpos */
328	 complain_overflow_bitfield,	/* complain_on_overflow */
329	 bfd_elf_generic_reloc,	/* special_function */
330	 "R_NDS32_NONE",	/* name */
331	 FALSE,			/* partial_inplace */
332	 0,			/* src_mask */
333	 0,			/* dst_mask */
334	 FALSE),		/* pcrel_offset */
335
336  /* A 16 bit absolute relocation.  */
337  HOWTO (R_NDS32_16,		/* type */
338	 0,			/* rightshift */
339	 1,			/* size (0 = byte, 1 = short, 2 = long) */
340	 16,			/* bitsize */
341	 FALSE,			/* pc_relative */
342	 0,			/* bitpos */
343	 complain_overflow_bitfield,	/* complain_on_overflow */
344	 nds32_elf_generic_reloc,	/* special_function */
345	 "R_NDS32_16",		/* name */
346	 FALSE,			/* partial_inplace */
347	 0xffff,		/* src_mask */
348	 0xffff,		/* dst_mask */
349	 FALSE),		/* pcrel_offset */
350
351  /* A 32 bit absolute relocation.  */
352  HOWTO (R_NDS32_32,		/* type */
353	 0,			/* rightshift */
354	 2,			/* size (0 = byte, 1 = short, 2 = long) */
355	 32,			/* bitsize */
356	 FALSE,			/* pc_relative */
357	 0,			/* bitpos */
358	 complain_overflow_bitfield,	/* complain_on_overflow */
359	 nds32_elf_generic_reloc,	/* special_function */
360	 "R_NDS32_32",		/* name */
361	 FALSE,			/* partial_inplace */
362	 0xffffffff,		/* src_mask */
363	 0xffffffff,		/* dst_mask */
364	 FALSE),		/* pcrel_offset */
365
366  /* A 20 bit address.  */
367  HOWTO (R_NDS32_20,		/* type */
368	 0,			/* rightshift */
369	 2,			/* size (0 = byte, 1 = short, 2 = long) */
370	 20,			/* bitsize */
371	 FALSE,			/* pc_relative */
372	 0,			/* bitpos */
373	 complain_overflow_unsigned,	/* complain_on_overflow */
374	 nds32_elf_generic_reloc,	/* special_function */
375	 "R_NDS32_20",		/* name */
376	 FALSE,			/* partial_inplace */
377	 0xfffff,		/* src_mask */
378	 0xfffff,		/* dst_mask */
379	 FALSE),		/* pcrel_offset */
380
381  /* An PC Relative 9-bit relocation, shifted by 2.
382     This reloc is complicated because relocations are relative to pc & -4.
383     i.e. branches in the right insn slot use the address of the left insn
384     slot for pc.  */
385  /* ??? It's not clear whether this should have partial_inplace set or not.
386     Branch relaxing in the assembler can store the addend in the insn,
387     and if bfd_install_relocation gets called the addend may get added
388     again.  */
389  HOWTO (R_NDS32_9_PCREL,	/* type */
390	 1,			/* rightshift */
391	 1,			/* size (0 = byte, 1 = short, 2 = long) */
392	 8,			/* bitsize */
393	 TRUE,			/* pc_relative */
394	 0,			/* bitpos */
395	 complain_overflow_signed,	/* complain_on_overflow */
396	 nds32_elf_9_pcrel_reloc,	/* special_function */
397	 "R_NDS32_9_PCREL",	/* name */
398	 FALSE,			/* partial_inplace */
399	 0xff,			/* src_mask */
400	 0xff,			/* dst_mask */
401	 TRUE),			/* pcrel_offset */
402
403  /* A relative 15 bit relocation, right shifted by 1.  */
404  HOWTO (R_NDS32_15_PCREL,	/* type */
405	 1,			/* rightshift */
406	 2,			/* size (0 = byte, 1 = short, 2 = long) */
407	 14,			/* bitsize */
408	 TRUE,			/* pc_relative */
409	 0,			/* bitpos */
410	 complain_overflow_signed,	/* complain_on_overflow */
411	 bfd_elf_generic_reloc,	/* special_function */
412	 "R_NDS32_15_PCREL",	/* name */
413	 FALSE,			/* partial_inplace */
414	 0x3fff,		/* src_mask */
415	 0x3fff,		/* dst_mask */
416	 TRUE),			/* pcrel_offset */
417
418  /* A relative 17 bit relocation, right shifted by 1.  */
419  HOWTO (R_NDS32_17_PCREL,	/* type */
420	 1,			/* rightshift */
421	 2,			/* size (0 = byte, 1 = short, 2 = long) */
422	 16,			/* bitsize */
423	 TRUE,			/* pc_relative */
424	 0,			/* bitpos */
425	 complain_overflow_signed,	/* complain_on_overflow */
426	 bfd_elf_generic_reloc,	/* special_function */
427	 "R_NDS32_17_PCREL",	/* name */
428	 FALSE,			/* partial_inplace */
429	 0xffff,		/* src_mask */
430	 0xffff,		/* dst_mask */
431	 TRUE),			/* pcrel_offset */
432
433  /* A relative 25 bit relocation, right shifted by 1.  */
434  /* ??? It's not clear whether this should have partial_inplace set or not.
435     Branch relaxing in the assembler can store the addend in the insn,
436     and if bfd_install_relocation gets called the addend may get added
437     again.  */
438  HOWTO (R_NDS32_25_PCREL,	/* type */
439	 1,			/* rightshift */
440	 2,			/* size (0 = byte, 1 = short, 2 = long) */
441	 24,			/* bitsize */
442	 TRUE,			/* pc_relative */
443	 0,			/* bitpos */
444	 complain_overflow_signed,	/* complain_on_overflow */
445	 bfd_elf_generic_reloc,	/* special_function */
446	 "R_NDS32_25_PCREL",	/* name */
447	 FALSE,			/* partial_inplace */
448	 0xffffff,		/* src_mask */
449	 0xffffff,		/* dst_mask */
450	 TRUE),			/* pcrel_offset */
451
452  /* High 20 bits of address when lower 12 is or'd in.  */
453  HOWTO (R_NDS32_HI20,		/* type */
454	 12,			/* rightshift */
455	 2,			/* size (0 = byte, 1 = short, 2 = long) */
456	 20,			/* bitsize */
457	 FALSE,			/* pc_relative */
458	 0,			/* bitpos */
459	 complain_overflow_dont,/* complain_on_overflow */
460	 nds32_elf_hi20_reloc,	/* special_function */
461	 "R_NDS32_HI20",	/* name */
462	 FALSE,			/* partial_inplace */
463	 0x000fffff,		/* src_mask */
464	 0x000fffff,		/* dst_mask */
465	 FALSE),		/* pcrel_offset */
466
467  /* Lower 12 bits of address.  */
468  HOWTO (R_NDS32_LO12S3,	/* type */
469	 3,			/* rightshift */
470	 2,			/* size (0 = byte, 1 = short, 2 = long) */
471	 9,			/* bitsize */
472	 FALSE,			/* pc_relative */
473	 0,			/* bitpos */
474	 complain_overflow_dont,/* complain_on_overflow */
475	 nds32_elf_lo12_reloc,	/* special_function */
476	 "R_NDS32_LO12S3",	/* name */
477	 FALSE,			/* partial_inplace */
478	 0x000001ff,		/* src_mask */
479	 0x000001ff,		/* dst_mask */
480	 FALSE),		/* pcrel_offset */
481
482  /* Lower 12 bits of address.  */
483  HOWTO (R_NDS32_LO12S2,	/* type */
484	 2,			/* rightshift */
485	 2,			/* size (0 = byte, 1 = short, 2 = long) */
486	 10,			/* bitsize */
487	 FALSE,			/* pc_relative */
488	 0,			/* bitpos */
489	 complain_overflow_dont,/* complain_on_overflow */
490	 nds32_elf_lo12_reloc,	/* special_function */
491	 "R_NDS32_LO12S2",	/* name */
492	 FALSE,			/* partial_inplace */
493	 0x000003ff,		/* src_mask */
494	 0x000003ff,		/* dst_mask */
495	 FALSE),		/* pcrel_offset */
496
497  /* Lower 12 bits of address.  */
498  HOWTO (R_NDS32_LO12S1,	/* type */
499	 1,			/* rightshift */
500	 2,			/* size (0 = byte, 1 = short, 2 = long) */
501	 11,			/* bitsize */
502	 FALSE,			/* pc_relative */
503	 0,			/* bitpos */
504	 complain_overflow_dont,/* complain_on_overflow */
505	 nds32_elf_lo12_reloc,	/* special_function */
506	 "R_NDS32_LO12S1",	/* name */
507	 FALSE,			/* partial_inplace */
508	 0x000007ff,		/* src_mask */
509	 0x000007ff,		/* dst_mask */
510	 FALSE),		/* pcrel_offset */
511
512  /* Lower 12 bits of address.  */
513  HOWTO (R_NDS32_LO12S0,	/* type */
514	 0,			/* rightshift */
515	 2,			/* size (0 = byte, 1 = short, 2 = long) */
516	 12,			/* bitsize */
517	 FALSE,			/* pc_relative */
518	 0,			/* bitpos */
519	 complain_overflow_dont,/* complain_on_overflow */
520	 nds32_elf_lo12_reloc,	/* special_function */
521	 "R_NDS32_LO12S0",	/* name */
522	 FALSE,			/* partial_inplace */
523	 0x00000fff,		/* src_mask */
524	 0x00000fff,		/* dst_mask */
525	 FALSE),		/* pcrel_offset */
526
527  /* Small data area 15 bits offset.  */
528  HOWTO (R_NDS32_SDA15S3,	/* type */
529	 3,			/* rightshift */
530	 2,			/* size (0 = byte, 1 = short, 2 = long) */
531	 15,			/* bitsize */
532	 FALSE,			/* pc_relative */
533	 0,			/* bitpos */
534	 complain_overflow_signed,	/* complain_on_overflow */
535	 nds32_elf_sda15_reloc,	/* special_function */
536	 "R_NDS32_SDA15S3",	/* name */
537	 FALSE,			/* partial_inplace */
538	 0x00007fff,		/* src_mask */
539	 0x00007fff,		/* dst_mask */
540	 FALSE),		/* pcrel_offset */
541
542  /* Small data area 15 bits offset.  */
543  HOWTO (R_NDS32_SDA15S2,	/* type */
544	 2,			/* rightshift */
545	 2,			/* size (0 = byte, 1 = short, 2 = long) */
546	 15,			/* bitsize */
547	 FALSE,			/* pc_relative */
548	 0,			/* bitpos */
549	 complain_overflow_signed,	/* complain_on_overflow */
550	 nds32_elf_sda15_reloc,	/* special_function */
551	 "R_NDS32_SDA15S2",	/* name */
552	 FALSE,			/* partial_inplace */
553	 0x00007fff,		/* src_mask */
554	 0x00007fff,		/* dst_mask */
555	 FALSE),		/* pcrel_offset */
556
557  /* Small data area 15 bits offset.  */
558  HOWTO (R_NDS32_SDA15S1,	/* type */
559	 1,			/* rightshift */
560	 2,			/* size (0 = byte, 1 = short, 2 = long) */
561	 15,			/* bitsize */
562	 FALSE,			/* pc_relative */
563	 0,			/* bitpos */
564	 complain_overflow_signed,	/* complain_on_overflow */
565	 nds32_elf_sda15_reloc,	/* special_function */
566	 "R_NDS32_SDA15S1",	/* name */
567	 FALSE,			/* partial_inplace */
568	 0x00007fff,		/* src_mask */
569	 0x00007fff,		/* dst_mask */
570	 FALSE),		/* pcrel_offset */
571
572  /* Small data area 15 bits offset.  */
573  HOWTO (R_NDS32_SDA15S0,	/* type */
574	 0,			/* rightshift */
575	 2,			/* size (0 = byte, 1 = short, 2 = long) */
576	 15,			/* bitsize */
577	 FALSE,			/* pc_relative */
578	 0,			/* bitpos */
579	 complain_overflow_signed,	/* complain_on_overflow */
580	 nds32_elf_sda15_reloc,	/* special_function */
581	 "R_NDS32_SDA15S0",	/* name */
582	 FALSE,			/* partial_inplace */
583	 0x00007fff,		/* src_mask */
584	 0x00007fff,		/* dst_mask */
585	 FALSE),		/* pcrel_offset */
586
587  /* GNU extension to record C++ vtable hierarchy */
588  HOWTO (R_NDS32_GNU_VTINHERIT,	/* type */
589	 0,			/* rightshift */
590	 2,			/* size (0 = byte, 1 = short, 2 = long) */
591	 0,			/* bitsize */
592	 FALSE,			/* pc_relative */
593	 0,			/* bitpos */
594	 complain_overflow_dont,/* complain_on_overflow */
595	 NULL,			/* special_function */
596	 "R_NDS32_GNU_VTINHERIT",	/* name */
597	 FALSE,			/* partial_inplace */
598	 0,			/* src_mask */
599	 0,			/* dst_mask */
600	 FALSE),		/* pcrel_offset */
601
602  /* GNU extension to record C++ vtable member usage */
603  HOWTO (R_NDS32_GNU_VTENTRY,	/* type */
604	 0,			/* rightshift */
605	 2,			/* size (0 = byte, 1 = short, 2 = long) */
606	 0,			/* bitsize */
607	 FALSE,			/* pc_relative */
608	 0,			/* bitpos */
609	 complain_overflow_dont,/* complain_on_overflow */
610	 _bfd_elf_rel_vtable_reloc_fn,	/* special_function */
611	 "R_NDS32_GNU_VTENTRY",	/* name */
612	 FALSE,			/* partial_inplace */
613	 0,			/* src_mask */
614	 0,			/* dst_mask */
615	 FALSE),		/* pcrel_offset */
616
617  /* A 16 bit absolute relocation.  */
618  HOWTO (R_NDS32_16_RELA,	/* type */
619	 0,			/* rightshift */
620	 1,			/* size (0 = byte, 1 = short, 2 = long) */
621	 16,			/* bitsize */
622	 FALSE,			/* pc_relative */
623	 0,			/* bitpos */
624	 complain_overflow_bitfield,	/* complain_on_overflow */
625	 bfd_elf_generic_reloc,	/* special_function */
626	 "R_NDS32_16_RELA",	/* name */
627	 FALSE,			/* partial_inplace */
628	 0xffff,		/* src_mask */
629	 0xffff,		/* dst_mask */
630	 FALSE),		/* pcrel_offset */
631
632  /* A 32 bit absolute relocation.  */
633  HOWTO (R_NDS32_32_RELA,	/* type */
634	 0,			/* rightshift */
635	 2,			/* size (0 = byte, 1 = short, 2 = long) */
636	 32,			/* bitsize */
637	 FALSE,			/* pc_relative */
638	 0,			/* bitpos */
639	 complain_overflow_bitfield,	/* complain_on_overflow */
640	 bfd_elf_generic_reloc,	/* special_function */
641	 "R_NDS32_32_RELA",	/* name */
642	 FALSE,			/* partial_inplace */
643	 0xffffffff,		/* src_mask */
644	 0xffffffff,		/* dst_mask */
645	 FALSE),		/* pcrel_offset */
646
647  /* A 20 bit address.  */
648  HOWTO (R_NDS32_20_RELA,	/* type */
649	 0,			/* rightshift */
650	 2,			/* size (0 = byte, 1 = short, 2 = long) */
651	 20,			/* bitsize */
652	 FALSE,			/* pc_relative */
653	 0,			/* bitpos */
654	 complain_overflow_signed,	/* complain_on_overflow */
655	 bfd_elf_generic_reloc,	/* special_function */
656	 "R_NDS32_20_RELA",	/* name */
657	 FALSE,			/* partial_inplace */
658	 0xfffff,		/* src_mask */
659	 0xfffff,		/* dst_mask */
660	 FALSE),		/* pcrel_offset */
661
662  HOWTO (R_NDS32_9_PCREL_RELA,	/* type */
663	 1,			/* rightshift */
664	 1,			/* size (0 = byte, 1 = short, 2 = long) */
665	 8,			/* bitsize */
666	 TRUE,			/* pc_relative */
667	 0,			/* bitpos */
668	 complain_overflow_signed,	/* complain_on_overflow */
669	 bfd_elf_generic_reloc,	/* special_function */
670	 "R_NDS32_9_PCREL_RELA",/* name */
671	 FALSE,			/* partial_inplace */
672	 0xff,			/* src_mask */
673	 0xff,			/* dst_mask */
674	 TRUE),			/* pcrel_offset */
675
676  /* A relative 15 bit relocation, right shifted by 1.  */
677  HOWTO (R_NDS32_15_PCREL_RELA,	/* type */
678	 1,			/* rightshift */
679	 2,			/* size (0 = byte, 1 = short, 2 = long) */
680	 14,			/* bitsize */
681	 TRUE,			/* pc_relative */
682	 0,			/* bitpos */
683	 complain_overflow_signed,	/* complain_on_overflow */
684	 bfd_elf_generic_reloc,	/* special_function */
685	 "R_NDS32_15_PCREL_RELA",	/* name */
686	 FALSE,			/* partial_inplace */
687	 0x3fff,		/* src_mask */
688	 0x3fff,		/* dst_mask */
689	 TRUE),			/* pcrel_offset */
690
691  /* A relative 17 bit relocation, right shifted by 1.  */
692  HOWTO (R_NDS32_17_PCREL_RELA,	/* type */
693	 1,			/* rightshift */
694	 2,			/* size (0 = byte, 1 = short, 2 = long) */
695	 16,			/* bitsize */
696	 TRUE,			/* pc_relative */
697	 0,			/* bitpos */
698	 complain_overflow_signed,	/* complain_on_overflow */
699	 bfd_elf_generic_reloc,	/* special_function */
700	 "R_NDS32_17_PCREL_RELA",	/* name */
701	 FALSE,			/* partial_inplace */
702	 0xffff,		/* src_mask */
703	 0xffff,		/* dst_mask */
704	 TRUE),			/* pcrel_offset */
705
706  /* A relative 25 bit relocation, right shifted by 2.  */
707  HOWTO (R_NDS32_25_PCREL_RELA,	/* type */
708	 1,			/* rightshift */
709	 2,			/* size (0 = byte, 1 = short, 2 = long) */
710	 24,			/* bitsize */
711	 TRUE,			/* pc_relative */
712	 0,			/* bitpos */
713	 complain_overflow_signed,	/* complain_on_overflow */
714	 bfd_elf_generic_reloc,	/* special_function */
715	 "R_NDS32_25_PCREL_RELA",	/* name */
716	 FALSE,			/* partial_inplace */
717	 0xffffff,		/* src_mask */
718	 0xffffff,		/* dst_mask */
719	 TRUE),			/* pcrel_offset */
720
721  /* High 20 bits of address when lower 16 is or'd in.  */
722  HOWTO (R_NDS32_HI20_RELA,	/* type */
723	 12,			/* rightshift */
724	 2,			/* size (0 = byte, 1 = short, 2 = long) */
725	 20,			/* bitsize */
726	 FALSE,			/* pc_relative */
727	 0,			/* bitpos */
728	 complain_overflow_dont,/* complain_on_overflow */
729	 bfd_elf_generic_reloc,	/* special_function */
730	 "R_NDS32_HI20_RELA",	/* name */
731	 FALSE,			/* partial_inplace */
732	 0x000fffff,		/* src_mask */
733	 0x000fffff,		/* dst_mask */
734	 FALSE),		/* pcrel_offset */
735
736  /* Lower 12 bits of address.  */
737  HOWTO (R_NDS32_LO12S3_RELA,	/* type */
738	 3,			/* rightshift */
739	 2,			/* size (0 = byte, 1 = short, 2 = long) */
740	 9,			/* bitsize */
741	 FALSE,			/* pc_relative */
742	 0,			/* bitpos */
743	 complain_overflow_dont,/* complain_on_overflow */
744	 bfd_elf_generic_reloc,	/* special_function */
745	 "R_NDS32_LO12S3_RELA",	/* name */
746	 FALSE,			/* partial_inplace */
747	 0x000001ff,		/* src_mask */
748	 0x000001ff,		/* dst_mask */
749	 FALSE),		/* pcrel_offset */
750
751  /* Lower 12 bits of address.  */
752  HOWTO (R_NDS32_LO12S2_RELA,	/* type */
753	 2,			/* rightshift */
754	 2,			/* size (0 = byte, 1 = short, 2 = long) */
755	 10,			/* bitsize */
756	 FALSE,			/* pc_relative */
757	 0,			/* bitpos */
758	 complain_overflow_dont,/* complain_on_overflow */
759	 bfd_elf_generic_reloc,	/* special_function */
760	 "R_NDS32_LO12S2_RELA",	/* name */
761	 FALSE,			/* partial_inplace */
762	 0x000003ff,		/* src_mask */
763	 0x000003ff,		/* dst_mask */
764	 FALSE),		/* pcrel_offset */
765
766  /* Lower 12 bits of address.  */
767  HOWTO (R_NDS32_LO12S1_RELA,	/* type */
768	 1,			/* rightshift */
769	 2,			/* size (0 = byte, 1 = short, 2 = long) */
770	 11,			/* bitsize */
771	 FALSE,			/* pc_relative */
772	 0,			/* bitpos */
773	 complain_overflow_dont,/* complain_on_overflow */
774	 bfd_elf_generic_reloc,	/* special_function */
775	 "R_NDS32_LO12S1_RELA",	/* name */
776	 FALSE,			/* partial_inplace */
777	 0x000007ff,		/* src_mask */
778	 0x000007ff,		/* dst_mask */
779	 FALSE),		/* pcrel_offset */
780
781  /* Lower 12 bits of address.  */
782  HOWTO (R_NDS32_LO12S0_RELA,	/* type */
783	 0,			/* rightshift */
784	 2,			/* size (0 = byte, 1 = short, 2 = long) */
785	 12,			/* bitsize */
786	 FALSE,			/* pc_relative */
787	 0,			/* bitpos */
788	 complain_overflow_dont,/* complain_on_overflow */
789	 bfd_elf_generic_reloc,	/* special_function */
790	 "R_NDS32_LO12S0_RELA",	/* name */
791	 FALSE,			/* partial_inplace */
792	 0x00000fff,		/* src_mask */
793	 0x00000fff,		/* dst_mask */
794	 FALSE),		/* pcrel_offset */
795
796  /* Small data area 15 bits offset.  */
797  HOWTO (R_NDS32_SDA15S3_RELA,	/* type */
798	 3,			/* rightshift */
799	 2,			/* size (0 = byte, 1 = short, 2 = long) */
800	 15,			/* bitsize */
801	 FALSE,			/* pc_relative */
802	 0,			/* bitpos */
803	 complain_overflow_signed,	/* complain_on_overflow */
804	 bfd_elf_generic_reloc,	/* special_function */
805	 "R_NDS32_SDA15S3_RELA",/* name */
806	 FALSE,			/* partial_inplace */
807	 0x00007fff,		/* src_mask */
808	 0x00007fff,		/* dst_mask */
809	 FALSE),		/* pcrel_offset */
810
811  /* Small data area 15 bits offset.  */
812  HOWTO (R_NDS32_SDA15S2_RELA,	/* type */
813	 2,			/* rightshift */
814	 2,			/* size (0 = byte, 1 = short, 2 = long) */
815	 15,			/* bitsize */
816	 FALSE,			/* pc_relative */
817	 0,			/* bitpos */
818	 complain_overflow_signed,	/* complain_on_overflow */
819	 bfd_elf_generic_reloc,	/* special_function */
820	 "R_NDS32_SDA15S2_RELA",/* name */
821	 FALSE,			/* partial_inplace */
822	 0x00007fff,		/* src_mask */
823	 0x00007fff,		/* dst_mask */
824	 FALSE),		/* pcrel_offset */
825
826  HOWTO (R_NDS32_SDA15S1_RELA,	/* type */
827	 1,			/* rightshift */
828	 2,			/* size (0 = byte, 1 = short, 2 = long) */
829	 15,			/* bitsize */
830	 FALSE,			/* pc_relative */
831	 0,			/* bitpos */
832	 complain_overflow_signed,	/* complain_on_overflow */
833	 bfd_elf_generic_reloc,	/* special_function */
834	 "R_NDS32_SDA15S1_RELA",/* name */
835	 FALSE,			/* partial_inplace */
836	 0x00007fff,		/* src_mask */
837	 0x00007fff,		/* dst_mask */
838	 FALSE),		/* pcrel_offset */
839
840  HOWTO (R_NDS32_SDA15S0_RELA,	/* type */
841	 0,			/* rightshift */
842	 2,			/* size (0 = byte, 1 = short, 2 = long) */
843	 15,			/* bitsize */
844	 FALSE,			/* pc_relative */
845	 0,			/* bitpos */
846	 complain_overflow_signed,	/* complain_on_overflow */
847	 bfd_elf_generic_reloc,	/* special_function */
848	 "R_NDS32_SDA15S0_RELA",/* name */
849	 FALSE,			/* partial_inplace */
850	 0x00007fff,		/* src_mask */
851	 0x00007fff,		/* dst_mask */
852	 FALSE),		/* pcrel_offset */
853
854  /* GNU extension to record C++ vtable hierarchy */
855  HOWTO (R_NDS32_RELA_GNU_VTINHERIT,	/* type */
856	 0,			/* rightshift */
857	 2,			/* size (0 = byte, 1 = short, 2 = long) */
858	 0,			/* bitsize */
859	 FALSE,			/* pc_relative */
860	 0,			/* bitpos */
861	 complain_overflow_dont,/* complain_on_overflow */
862	 NULL,			/* special_function */
863	 "R_NDS32_RELA_GNU_VTINHERIT",	/* name */
864	 FALSE,			/* partial_inplace */
865	 0,			/* src_mask */
866	 0,			/* dst_mask */
867	 FALSE),		/* pcrel_offset */
868
869  /* GNU extension to record C++ vtable member usage */
870  HOWTO (R_NDS32_RELA_GNU_VTENTRY,	/* type */
871	 0,			/* rightshift */
872	 2,			/* size (0 = byte, 1 = short, 2 = long) */
873	 0,			/* bitsize */
874	 FALSE,			/* pc_relative */
875	 0,			/* bitpos */
876	 complain_overflow_dont,/* complain_on_overflow */
877	 _bfd_elf_rel_vtable_reloc_fn,	/* special_function */
878	 "R_NDS32_RELA_GNU_VTENTRY",	/* name */
879	 FALSE,			/* partial_inplace */
880	 0,			/* src_mask */
881	 0,			/* dst_mask */
882	 FALSE),		/* pcrel_offset */
883
884  /* Like R_NDS32_20, but referring to the GOT table entry for
885     the symbol.  */
886  HOWTO (R_NDS32_GOT20,		/* type */
887	 0,			/* rightshift */
888	 2,			/* size (0 = byte, 1 = short, 2 = long) */
889	 20,			/* bitsize */
890	 FALSE,			/* pc_relative */
891	 0,			/* bitpos */
892	 complain_overflow_signed,	/* complain_on_overflow */
893	 bfd_elf_generic_reloc,	/* special_function */
894	 "R_NDS32_GOT20",	/* name */
895	 FALSE,			/* partial_inplace */
896	 0xfffff,		/* src_mask */
897	 0xfffff,		/* dst_mask */
898	 FALSE),		/* pcrel_offset */
899
900  /* Like R_NDS32_PCREL, but referring to the procedure linkage table
901     entry for the symbol.  */
902  HOWTO (R_NDS32_25_PLTREL,	/* type */
903	 1,			/* rightshift */
904	 2,			/* size (0 = byte, 1 = short, 2 = long) */
905	 24,			/* bitsize */
906	 TRUE,			/* pc_relative */
907	 0,			/* bitpos */
908	 complain_overflow_signed,	/* complain_on_overflow */
909	 bfd_elf_generic_reloc,	/* special_function */
910	 "R_NDS32_25_PLTREL",	/* name */
911	 FALSE,			/* partial_inplace */
912	 0xffffff,		/* src_mask */
913	 0xffffff,		/* dst_mask */
914	 TRUE),			/* pcrel_offset */
915
916  /* This is used only by the dynamic linker.  The symbol should exist
917     both in the object being run and in some shared library.  The
918     dynamic linker copies the data addressed by the symbol from the
919     shared library into the object, because the object being
920     run has to have the data at some particular address.  */
921  HOWTO (R_NDS32_COPY,		/* type */
922	 0,			/* rightshift */
923	 2,			/* size (0 = byte, 1 = short, 2 = long) */
924	 32,			/* bitsize */
925	 FALSE,			/* pc_relative */
926	 0,			/* bitpos */
927	 complain_overflow_bitfield,	/* complain_on_overflow */
928	 bfd_elf_generic_reloc,	/* special_function */
929	 "R_NDS32_COPY",	/* name */
930	 FALSE,			/* partial_inplace */
931	 0xffffffff,		/* src_mask */
932	 0xffffffff,		/* dst_mask */
933	 FALSE),		/* pcrel_offset */
934
935  /* Like R_NDS32_20, but used when setting global offset table
936     entries.  */
937  HOWTO (R_NDS32_GLOB_DAT,	/* type */
938	 0,			/* rightshift */
939	 2,			/* size (0 = byte, 1 = short, 2 = long) */
940	 32,			/* bitsize */
941	 FALSE,			/* pc_relative */
942	 0,			/* bitpos */
943	 complain_overflow_bitfield,	/* complain_on_overflow */
944	 bfd_elf_generic_reloc,	/* special_function */
945	 "R_NDS32_GLOB_DAT",	/* name */
946	 FALSE,			/* partial_inplace */
947	 0xffffffff,		/* src_mask */
948	 0xffffffff,		/* dst_mask */
949	 FALSE),		/* pcrel_offset */
950
951  /* Marks a procedure linkage table entry for a symbol.  */
952  HOWTO (R_NDS32_JMP_SLOT,	/* type */
953	 0,			/* rightshift */
954	 2,			/* size (0 = byte, 1 = short, 2 = long) */
955	 32,			/* bitsize */
956	 FALSE,			/* pc_relative */
957	 0,			/* bitpos */
958	 complain_overflow_bitfield,	/* complain_on_overflow */
959	 bfd_elf_generic_reloc,	/* special_function */
960	 "R_NDS32_JMP_SLOT",	/* name */
961	 FALSE,			/* partial_inplace */
962	 0xffffffff,		/* src_mask */
963	 0xffffffff,		/* dst_mask */
964	 FALSE),		/* pcrel_offset */
965
966  /* Used only by the dynamic linker.  When the object is run, this
967     longword is set to the load address of the object, plus the
968     addend.  */
969  HOWTO (R_NDS32_RELATIVE,	/* type */
970	 0,			/* rightshift */
971	 2,			/* size (0 = byte, 1 = short, 2 = long) */
972	 32,			/* bitsize */
973	 FALSE,			/* pc_relative */
974	 0,			/* bitpos */
975	 complain_overflow_bitfield,	/* complain_on_overflow */
976	 bfd_elf_generic_reloc,	/* special_function */
977	 "R_NDS32_RELATIVE",	/* name */
978	 FALSE,			/* partial_inplace */
979	 0xffffffff,		/* src_mask */
980	 0xffffffff,		/* dst_mask */
981	 FALSE),		/* pcrel_offset */
982
983  HOWTO (R_NDS32_GOTOFF,	/* type */
984	 0,			/* rightshift */
985	 2,			/* size (0 = byte, 1 = short, 2 = long) */
986	 20,			/* bitsize */
987	 FALSE,			/* pc_relative */
988	 0,			/* bitpos */
989	 complain_overflow_signed,	/* complain_on_overflow */
990	 bfd_elf_generic_reloc,	/* special_function */
991	 "R_NDS32_GOTOFF",	/* name */
992	 FALSE,			/* partial_inplace */
993	 0xfffff,		/* src_mask */
994	 0xfffff,		/* dst_mask */
995	 FALSE),		/* pcrel_offset */
996
997  /* An PC Relative 20-bit relocation used when setting PIC offset
998     table register.  */
999  HOWTO (R_NDS32_GOTPC20,	/* type */
1000	 0,			/* rightshift */
1001	 2,			/* size (0 = byte, 1 = short, 2 = long) */
1002	 20,			/* bitsize */
1003	 TRUE,			/* pc_relative */
1004	 0,			/* bitpos */
1005	 complain_overflow_signed,	/* complain_on_overflow */
1006	 bfd_elf_generic_reloc,	/* special_function */
1007	 "R_NDS32_GOTPC20",	/* name */
1008	 FALSE,			/* partial_inplace */
1009	 0xfffff,		/* src_mask */
1010	 0xfffff,		/* dst_mask */
1011	 TRUE),			/* pcrel_offset */
1012
1013  /* Like R_NDS32_HI20, but referring to the GOT table entry for
1014     the symbol.  */
1015  HOWTO (R_NDS32_GOT_HI20,	/* type */
1016	 12,			/* rightshift */
1017	 2,			/* size (0 = byte, 1 = short, 2 = long) */
1018	 20,			/* bitsize */
1019	 FALSE,			/* pc_relative */
1020	 0,			/* bitpos */
1021	 complain_overflow_dont,/* complain_on_overflow */
1022	 bfd_elf_generic_reloc,	/* special_function */
1023	 "R_NDS32_GOT_HI20",	/* name */
1024	 FALSE,			/* partial_inplace */
1025	 0x000fffff,		/* src_mask */
1026	 0x000fffff,		/* dst_mask */
1027	 FALSE),		/* pcrel_offset */
1028  HOWTO (R_NDS32_GOT_LO12,	/* type */
1029	 0,			/* rightshift */
1030	 2,			/* size (0 = byte, 1 = short, 2 = long) */
1031	 12,			/* bitsize */
1032	 FALSE,			/* pc_relative */
1033	 0,			/* bitpos */
1034	 complain_overflow_dont,/* complain_on_overflow */
1035	 bfd_elf_generic_reloc,	/* special_function */
1036	 "R_NDS32_GOT_LO12",	/* name */
1037	 FALSE,			/* partial_inplace */
1038	 0x00000fff,		/* src_mask */
1039	 0x00000fff,		/* dst_mask */
1040	 FALSE),		/* pcrel_offset */
1041
1042  /* An PC Relative relocation used when setting PIC offset table register.
1043     Like R_NDS32_HI20, but referring to the GOT table entry for
1044     the symbol.  */
1045  HOWTO (R_NDS32_GOTPC_HI20,	/* type */
1046	 12,			/* rightshift */
1047	 2,			/* size (0 = byte, 1 = short, 2 = long) */
1048	 20,			/* bitsize */
1049	 FALSE,			/* pc_relative */
1050	 0,			/* bitpos */
1051	 complain_overflow_dont,/* complain_on_overflow */
1052	 bfd_elf_generic_reloc,	/* special_function */
1053	 "R_NDS32_GOTPC_HI20",	/* name */
1054	 FALSE,			/* partial_inplace */
1055	 0x000fffff,		/* src_mask */
1056	 0x000fffff,		/* dst_mask */
1057	 TRUE),			/* pcrel_offset */
1058  HOWTO (R_NDS32_GOTPC_LO12,	/* type */
1059	 0,			/* rightshift */
1060	 2,			/* size (0 = byte, 1 = short, 2 = long) */
1061	 12,			/* bitsize */
1062	 FALSE,			/* pc_relative */
1063	 0,			/* bitpos */
1064	 complain_overflow_dont,	/* complain_on_overflow */
1065	 bfd_elf_generic_reloc,	/* special_function */
1066	 "R_NDS32_GOTPC_LO12",	/* name */
1067	 FALSE,			/* partial_inplace */
1068	 0x00000fff,		/* src_mask */
1069	 0x00000fff,		/* dst_mask */
1070	 TRUE),			/* pcrel_offset */
1071
1072  HOWTO (R_NDS32_GOTOFF_HI20,	/* type */
1073	 12,			/* rightshift */
1074	 2,			/* size (0 = byte, 1 = short, 2 = long) */
1075	 20,			/* bitsize */
1076	 FALSE,			/* pc_relative */
1077	 0,			/* bitpos */
1078	 complain_overflow_dont,/* complain_on_overflow */
1079	 bfd_elf_generic_reloc,	/* special_function */
1080	 "R_NDS32_GOTOFF_HI20",	/* name */
1081	 FALSE,			/* partial_inplace */
1082	 0x000fffff,		/* src_mask */
1083	 0x000fffff,		/* dst_mask */
1084	 FALSE),		/* pcrel_offset */
1085  HOWTO (R_NDS32_GOTOFF_LO12,	/* type */
1086	 0,			/* rightshift */
1087	 2,			/* size (0 = byte, 1 = short, 2 = long) */
1088	 12,			/* bitsize */
1089	 FALSE,			/* pc_relative */
1090	 0,			/* bitpos */
1091	 complain_overflow_dont,/* complain_on_overflow */
1092	 bfd_elf_generic_reloc,	/* special_function */
1093	 "R_NDS32_GOTOFF_LO12",	/* name */
1094	 FALSE,			/* partial_inplace */
1095	 0x00000fff,		/* src_mask */
1096	 0x00000fff,		/* dst_mask */
1097	 FALSE),		/* pcrel_offset */
1098
1099  /* Alignment hint for relaxable instruction.  This is used with
1100     R_NDS32_LABEL as a pair.  Relax this instruction from 4 bytes to 2
1101     in order to make next label aligned on word boundary.  */
1102  HOWTO (R_NDS32_INSN16,	/* type */
1103	 0,			/* rightshift */
1104	 2,			/* size (0 = byte, 1 = short, 2 = long) */
1105	 32,			/* bitsize */
1106	 FALSE,			/* pc_relative */
1107	 0,			/* bitpos */
1108	 complain_overflow_dont,/* complain_on_overflow */
1109	 nds32_elf_ignore_reloc,/* special_function */
1110	 "R_NDS32_INSN16",	/* name */
1111	 FALSE,			/* partial_inplace */
1112	 0x00000fff,		/* src_mask */
1113	 0x00000fff,		/* dst_mask */
1114	 FALSE),		/* pcrel_offset */
1115
1116  /* Alignment hint for label.  */
1117  HOWTO (R_NDS32_LABEL,		/* type */
1118	 0,			/* rightshift */
1119	 2,			/* size (0 = byte, 1 = short, 2 = long) */
1120	 32,			/* bitsize */
1121	 FALSE,			/* pc_relative */
1122	 0,			/* bitpos */
1123	 complain_overflow_dont,/* complain_on_overflow */
1124	 nds32_elf_ignore_reloc,/* special_function */
1125	 "R_NDS32_LABEL",	/* name */
1126	 FALSE,			/* partial_inplace */
1127	 0xffffffff,		/* src_mask */
1128	 0xffffffff,		/* dst_mask */
1129	 FALSE),		/* pcrel_offset */
1130
1131  /* Relax hint for unconditional call sequence  */
1132  HOWTO (R_NDS32_LONGCALL1,	/* type */
1133	 0,			/* rightshift */
1134	 2,			/* size (0 = byte, 1 = short, 2 = long) */
1135	 32,			/* bitsize */
1136	 FALSE,			/* pc_relative */
1137	 0,			/* bitpos */
1138	 complain_overflow_dont,/* complain_on_overflow */
1139	 nds32_elf_ignore_reloc,/* special_function */
1140	 "R_NDS32_LONGCALL1",	/* name */
1141	 FALSE,			/* partial_inplace */
1142	 0xffffffff,		/* src_mask */
1143	 0xffffffff,		/* dst_mask */
1144	 FALSE),		/* pcrel_offset */
1145
1146  /* Relax hint for conditional call sequence.  */
1147  HOWTO (R_NDS32_LONGCALL2,	/* type */
1148	 0,			/* rightshift */
1149	 2,			/* size (0 = byte, 1 = short, 2 = long) */
1150	 32,			/* bitsize */
1151	 FALSE,			/* pc_relative */
1152	 0,			/* bitpos */
1153	 complain_overflow_dont,/* complain_on_overflow */
1154	 nds32_elf_ignore_reloc,/* special_function */
1155	 "R_NDS32_LONGCALL2",	/* name */
1156	 FALSE,			/* partial_inplace */
1157	 0xffffffff,		/* src_mask */
1158	 0xffffffff,		/* dst_mask */
1159	 FALSE),		/* pcrel_offset */
1160
1161  /* Relax hint for conditional call sequence.  */
1162  HOWTO (R_NDS32_LONGCALL3,	/* type */
1163	 0,			/* rightshift */
1164	 2,			/* size (0 = byte, 1 = short, 2 = long) */
1165	 32,			/* bitsize */
1166	 FALSE,			/* pc_relative */
1167	 0,			/* bitpos */
1168	 complain_overflow_dont,/* complain_on_overflow */
1169	 nds32_elf_ignore_reloc,/* special_function */
1170	 "R_NDS32_LONGCALL3",	/* name */
1171	 FALSE,			/* partial_inplace */
1172	 0xffffffff,		/* src_mask */
1173	 0xffffffff,		/* dst_mask */
1174	 FALSE),		/* pcrel_offset */
1175
1176  /* Relax hint for unconditional branch sequence.  */
1177  HOWTO (R_NDS32_LONGJUMP1,	/* type */
1178	 0,			/* rightshift */
1179	 2,			/* size (0 = byte, 1 = short, 2 = long) */
1180	 32,			/* bitsize */
1181	 FALSE,			/* pc_relative */
1182	 0,			/* bitpos */
1183	 complain_overflow_dont,/* complain_on_overflow */
1184	 nds32_elf_ignore_reloc,/* special_function */
1185	 "R_NDS32_LONGJUMP1",	/* name */
1186	 FALSE,			/* partial_inplace */
1187	 0xffffffff,		/* src_mask */
1188	 0xffffffff,		/* dst_mask */
1189	 FALSE),		/* pcrel_offset */
1190
1191  /* Relax hint for conditional branch sequence.  */
1192  HOWTO (R_NDS32_LONGJUMP2,	/* type */
1193	 0,			/* rightshift */
1194	 2,			/* size (0 = byte, 1 = short, 2 = long) */
1195	 32,			/* bitsize */
1196	 FALSE,			/* pc_relative */
1197	 0,			/* bitpos */
1198	 complain_overflow_dont,/* complain_on_overflow */
1199	 nds32_elf_ignore_reloc,/* special_function */
1200	 "R_NDS32_LONGJUMP2",	/* name */
1201	 FALSE,			/* partial_inplace */
1202	 0xffffffff,		/* src_mask */
1203	 0xffffffff,		/* dst_mask */
1204	 FALSE),		/* pcrel_offset */
1205
1206  /* Relax hint for conditional branch sequence.  */
1207  HOWTO (R_NDS32_LONGJUMP3,	/* type */
1208	 0,			/* rightshift */
1209	 2,			/* size (0 = byte, 1 = short, 2 = long) */
1210	 32,			/* bitsize */
1211	 FALSE,			/* pc_relative */
1212	 0,			/* bitpos */
1213	 complain_overflow_dont,/* complain_on_overflow */
1214	 nds32_elf_ignore_reloc,/* special_function */
1215	 "R_NDS32_LONGJUMP3",	/* name */
1216	 FALSE,			/* partial_inplace */
1217	 0xffffffff,		/* src_mask */
1218	 0xffffffff,		/* dst_mask */
1219	 FALSE),		/* pcrel_offset */
1220
1221  /* Relax hint for load/store sequence.   */
1222  HOWTO (R_NDS32_LOADSTORE,	/* type */
1223	 0,			/* rightshift */
1224	 2,			/* size (0 = byte, 1 = short, 2 = long) */
1225	 32,			/* bitsize */
1226	 FALSE,			/* pc_relative */
1227	 0,			/* bitpos */
1228	 complain_overflow_dont,/* complain_on_overflow */
1229	 nds32_elf_ignore_reloc,/* special_function */
1230	 "R_NDS32_LOADSTORE",	/* name */
1231	 FALSE,			/* partial_inplace */
1232	 0xffffffff,		/* src_mask */
1233	 0xffffffff,		/* dst_mask */
1234	 FALSE),		/* pcrel_offset */
1235
1236  /* Relax hint for load/store sequence.  */
1237  HOWTO (R_NDS32_9_FIXED_RELA,	/* type */
1238	 0,			/* rightshift */
1239	 1,			/* size (0 = byte, 1 = short, 2 = long) */
1240	 16,			/* bitsize */
1241	 FALSE,			/* pc_relative */
1242	 0,			/* bitpos */
1243	 complain_overflow_dont,/* complain_on_overflow */
1244	 nds32_elf_ignore_reloc,/* special_function */
1245	 "R_NDS32_9_FIXED_RELA",/* name */
1246	 FALSE,			/* partial_inplace */
1247	 0x000000ff,		/* src_mask */
1248	 0x000000ff,		/* dst_mask */
1249	 FALSE),		/* pcrel_offset */
1250
1251  /* Relax hint for load/store sequence.  */
1252  HOWTO (R_NDS32_15_FIXED_RELA,	/* type */
1253	 0,			/* rightshift */
1254	 2,			/* size (0 = byte, 1 = short, 2 = long) */
1255	 32,			/* bitsize */
1256	 FALSE,			/* pc_relative */
1257	 0,			/* bitpos */
1258	 complain_overflow_dont,/* complain_on_overflow */
1259	 nds32_elf_ignore_reloc,/* special_function */
1260	 "R_NDS32_15_FIXED_RELA",	/* name */
1261	 FALSE,			/* partial_inplace */
1262	 0x00003fff,		/* src_mask */
1263	 0x00003fff,		/* dst_mask */
1264	 FALSE),		/* pcrel_offset */
1265
1266  /* Relax hint for load/store sequence.  */
1267  HOWTO (R_NDS32_17_FIXED_RELA,	/* type */
1268	 0,			/* rightshift */
1269	 2,			/* size (0 = byte, 1 = short, 2 = long) */
1270	 32,			/* bitsize */
1271	 FALSE,			/* pc_relative */
1272	 0,			/* bitpos */
1273	 complain_overflow_dont,/* complain_on_overflow */
1274	 nds32_elf_ignore_reloc,/* special_function */
1275	 "R_NDS32_17_FIXED_RELA",	/* name */
1276	 FALSE,			/* partial_inplace */
1277	 0x0000ffff,		/* src_mask */
1278	 0x0000ffff,		/* dst_mask */
1279	 FALSE),		/* pcrel_offset */
1280
1281  /* Relax hint for load/store sequence.  */
1282  HOWTO (R_NDS32_25_FIXED_RELA,	/* type */
1283	 0,			/* rightshift */
1284	 2,			/* size (0 = byte, 1 = short, 2 = long) */
1285	 32,			/* bitsize */
1286	 FALSE,			/* pc_relative */
1287	 0,			/* bitpos */
1288	 complain_overflow_dont,/* complain_on_overflow */
1289	 nds32_elf_ignore_reloc,/* special_function */
1290	 "R_NDS32_25_FIXED_RELA",	/* name */
1291	 FALSE,			/* partial_inplace */
1292	 0x00ffffff,		/* src_mask */
1293	 0x00ffffff,		/* dst_mask */
1294	 FALSE),		/* pcrel_offset */
1295
1296  /* High 20 bits of PLT symbol offset relative to PC.  */
1297  HOWTO (R_NDS32_PLTREL_HI20,	/* type */
1298	 12,			/* rightshift */
1299	 2,			/* size (0 = byte, 1 = short, 2 = long) */
1300	 20,			/* bitsize */
1301	 FALSE,			/* pc_relative */
1302	 0,			/* bitpos */
1303	 complain_overflow_dont,/* complain_on_overflow */
1304	 bfd_elf_generic_reloc,	/* special_function */
1305	 "R_NDS32_PLTREL_HI20",	/* name */
1306	 FALSE,			/* partial_inplace */
1307	 0x000fffff,		/* src_mask */
1308	 0x000fffff,		/* dst_mask */
1309	 FALSE),		/* pcrel_offset */
1310
1311  /* Low 12 bits of PLT symbol offset relative to PC.  */
1312  HOWTO (R_NDS32_PLTREL_LO12,	/* type */
1313	 0,			/* rightshift */
1314	 2,			/* size (0 = byte, 1 = short, 2 = long) */
1315	 12,			/* bitsize */
1316	 FALSE,			/* pc_relative */
1317	 0,			/* bitpos */
1318	 complain_overflow_dont,/* complain_on_overflow */
1319	 bfd_elf_generic_reloc,	/* special_function */
1320	 "R_NDS32_PLTREL_LO12",	/* name */
1321	 FALSE,			/* partial_inplace */
1322	 0x00000fff,		/* src_mask */
1323	 0x00000fff,		/* dst_mask */
1324	 FALSE),		/* pcrel_offset */
1325
1326  /* High 20 bits of PLT symbol offset relative to GOT (GP).  */
1327  HOWTO (R_NDS32_PLT_GOTREL_HI20,	/* type */
1328	 12,			/* rightshift */
1329	 2,			/* size (0 = byte, 1 = short, 2 = long) */
1330	 20,			/* bitsize */
1331	 FALSE,			/* pc_relative */
1332	 0,			/* bitpos */
1333	 complain_overflow_dont,/* complain_on_overflow */
1334	 bfd_elf_generic_reloc,	/* special_function */
1335	 "R_NDS32_PLT_GOTREL_HI20",	/* name */
1336	 FALSE,			/* partial_inplace */
1337	 0x000fffff,		/* src_mask */
1338	 0x000fffff,		/* dst_mask */
1339	 FALSE),		/* pcrel_offset */
1340
1341  /* Low 12 bits of PLT symbol offset relative to GOT (GP).  */
1342  HOWTO (R_NDS32_PLT_GOTREL_LO12,	/* type */
1343	 0,			/* rightshift */
1344	 2,			/* size (0 = byte, 1 = short, 2 = long) */
1345	 12,			/* bitsize */
1346	 FALSE,			/* pc_relative */
1347	 0,			/* bitpos */
1348	 complain_overflow_dont,/* complain_on_overflow */
1349	 bfd_elf_generic_reloc,	/* special_function */
1350	 "R_NDS32_PLT_GOTREL_LO12",	/* name */
1351	 FALSE,			/* partial_inplace */
1352	 0x00000fff,		/* src_mask */
1353	 0x00000fff,		/* dst_mask */
1354	 FALSE),		/* pcrel_offset */
1355
1356  /* Small data area 12 bits offset.  */
1357  HOWTO (R_NDS32_SDA12S2_DP_RELA,	/* type */
1358	 2,			/* rightshift */
1359	 2,			/* size (0 = byte, 1 = short, 2 = long) */
1360	 12,			/* bitsize */
1361	 FALSE,			/* pc_relative */
1362	 0,			/* bitpos */
1363	 complain_overflow_signed,	/* complain_on_overflow */
1364	 bfd_elf_generic_reloc,	/* special_function */
1365	 "R_NDS32_SDA12S2_DP_RELA",	/* name */
1366	 FALSE,			/* partial_inplace */
1367	 0x00000fff,		/* src_mask */
1368	 0x00000fff,		/* dst_mask */
1369	 FALSE),		/* pcrel_offset */
1370
1371  /* Small data area 12 bits offset.  */
1372  HOWTO (R_NDS32_SDA12S2_SP_RELA,	/* type */
1373	 2,			/* rightshift */
1374	 2,			/* size (0 = byte, 1 = short, 2 = long) */
1375	 12,			/* bitsize */
1376	 FALSE,			/* pc_relative */
1377	 0,			/* bitpos */
1378	 complain_overflow_signed,	/* complain_on_overflow */
1379	 bfd_elf_generic_reloc,	/* special_function */
1380	 "R_NDS32_SDA12S2_SP_RELA",	/* name */
1381	 FALSE,			/* partial_inplace */
1382	 0x00000fff,		/* src_mask */
1383	 0x00000fff,		/* dst_mask */
1384	 FALSE),		/* pcrel_offset */
1385  /* Lower 12 bits of address.  */
1386
1387  HOWTO (R_NDS32_LO12S2_DP_RELA,	/* type */
1388	 2,			/* rightshift */
1389	 2,			/* size (0 = byte, 1 = short, 2 = long) */
1390	 10,			/* bitsize */
1391	 FALSE,			/* pc_relative */
1392	 0,			/* bitpos */
1393	 complain_overflow_dont,/* complain_on_overflow */
1394	 bfd_elf_generic_reloc,	/* special_function */
1395	 "R_NDS32_LO12S2_DP_RELA",	/* name */
1396	 FALSE,			/* partial_inplace */
1397	 0x000003ff,		/* src_mask */
1398	 0x000003ff,		/* dst_mask */
1399	 FALSE),		/* pcrel_offset */
1400
1401  /* Lower 12 bits of address.  */
1402  HOWTO (R_NDS32_LO12S2_SP_RELA,/* type */
1403	 2,			/* rightshift */
1404	 2,			/* size (0 = byte, 1 = short, 2 = long) */
1405	 10,			/* bitsize */
1406	 FALSE,			/* pc_relative */
1407	 0,			/* bitpos */
1408	 complain_overflow_dont,/* complain_on_overflow */
1409	 bfd_elf_generic_reloc,	/* special_function */
1410	 "R_NDS32_LO12S2_SP_RELA",	/* name */
1411	 FALSE,			/* partial_inplace */
1412	 0x000003ff,		/* src_mask */
1413	 0x000003ff,		/* dst_mask */
1414	 FALSE),		/* pcrel_offset */
1415  /* Lower 12 bits of address.  Special identity for or case.  */
1416  HOWTO (R_NDS32_LO12S0_ORI_RELA,	/* type */
1417	 0,			/* rightshift */
1418	 2,			/* size (0 = byte, 1 = short, 2 = long) */
1419	 12,			/* bitsize */
1420	 FALSE,			/* pc_relative */
1421	 0,			/* bitpos */
1422	 complain_overflow_dont,/* complain_on_overflow */
1423	 bfd_elf_generic_reloc,	/* special_function */
1424	 "R_NDS32_LO12S0_ORI_RELA",	/* name */
1425	 FALSE,			/* partial_inplace */
1426	 0x00000fff,		/* src_mask */
1427	 0x00000fff,		/* dst_mask */
1428	 FALSE),		/* pcrel_offset */
1429  /* Small data area 19 bits offset.  */
1430  HOWTO (R_NDS32_SDA16S3_RELA,	/* type */
1431	 3,			/* rightshift */
1432	 2,			/* size (0 = byte, 1 = short, 2 = long) */
1433	 16,			/* bitsize */
1434	 FALSE,			/* pc_relative */
1435	 0,			/* bitpos */
1436	 complain_overflow_signed,	/* complain_on_overflow */
1437	 bfd_elf_generic_reloc,	/* special_function */
1438	 "R_NDS32_SDA16S3_RELA",/* name */
1439	 FALSE,			/* partial_inplace */
1440	 0x0000ffff,		/* src_mask */
1441	 0x0000ffff,		/* dst_mask */
1442	 FALSE),		/* pcrel_offset */
1443
1444  /* Small data area 15 bits offset.  */
1445  HOWTO (R_NDS32_SDA17S2_RELA,	/* type */
1446	 2,			/* rightshift */
1447	 2,			/* size (0 = byte, 1 = short, 2 = long) */
1448	 17,			/* bitsize */
1449	 FALSE,			/* pc_relative */
1450	 0,			/* bitpos */
1451	 complain_overflow_signed,	/* complain_on_overflow */
1452	 bfd_elf_generic_reloc,	/* special_function */
1453	 "R_NDS32_SDA17S2_RELA",/* name */
1454	 FALSE,			/* partial_inplace */
1455	 0x0001ffff,		/* src_mask */
1456	 0x0001ffff,		/* dst_mask */
1457	 FALSE),		/* pcrel_offset */
1458
1459  HOWTO (R_NDS32_SDA18S1_RELA,	/* type */
1460	 1,			/* rightshift */
1461	 2,			/* size (0 = byte, 1 = short, 2 = long) */
1462	 18,			/* bitsize */
1463	 FALSE,			/* pc_relative */
1464	 0,			/* bitpos */
1465	 complain_overflow_signed,	/* complain_on_overflow */
1466	 bfd_elf_generic_reloc,	/* special_function */
1467	 "R_NDS32_SDA18S1_RELA",/* name */
1468	 FALSE,			/* partial_inplace */
1469	 0x0003ffff,		/* src_mask */
1470	 0x0003ffff,		/* dst_mask */
1471	 FALSE),		/* pcrel_offset */
1472
1473  HOWTO (R_NDS32_SDA19S0_RELA,	/* type */
1474	 0,			/* rightshift */
1475	 2,			/* size (0 = byte, 1 = short, 2 = long) */
1476	 19,			/* bitsize */
1477	 FALSE,			/* pc_relative */
1478	 0,			/* bitpos */
1479	 complain_overflow_signed,	/* complain_on_overflow */
1480	 bfd_elf_generic_reloc,	/* special_function */
1481	 "R_NDS32_SDA19S0_RELA",/* name */
1482	 FALSE,			/* partial_inplace */
1483	 0x0007ffff,		/* src_mask */
1484	 0x0007ffff,		/* dst_mask */
1485	 FALSE),		/* pcrel_offset */
1486  HOWTO (R_NDS32_DWARF2_OP1_RELA,	/* type */
1487	 0,			/* rightshift */
1488	 0,			/* size (0 = byte, 1 = short, 2 = long) */
1489	 8,			/* bitsize */
1490	 FALSE,			/* pc_relative */
1491	 0,			/* bitpos */
1492	 complain_overflow_dont,/* complain_on_overflow */
1493	 nds32_elf_ignore_reloc,/* special_function */
1494	 "R_NDS32_DWARF2_OP1_RELA",	/* name */
1495	 FALSE,			/* partial_inplace */
1496	 0xff,			/* src_mask */
1497	 0xff,			/* dst_mask */
1498	 FALSE),		/* pcrel_offset */
1499  HOWTO (R_NDS32_DWARF2_OP2_RELA,	/* type */
1500	 0,			/* rightshift */
1501	 1,			/* size (0 = byte, 1 = short, 2 = long) */
1502	 16,			/* bitsize */
1503	 FALSE,			/* pc_relative */
1504	 0,			/* bitpos */
1505	 complain_overflow_dont,/* complain_on_overflow */
1506	 nds32_elf_ignore_reloc,/* special_function */
1507	 "R_NDS32_DWARF2_OP2_RELA",	/* name */
1508	 FALSE,			/* partial_inplace */
1509	 0xffff,		/* src_mask */
1510	 0xffff,		/* dst_mask */
1511	 FALSE),		/* pcrel_offset */
1512  HOWTO (R_NDS32_DWARF2_LEB_RELA,	/* type */
1513	 0,			/* rightshift */
1514	 2,			/* size (0 = byte, 1 = short, 2 = long) */
1515	 32,			/* bitsize */
1516	 FALSE,			/* pc_relative */
1517	 0,			/* bitpos */
1518	 complain_overflow_dont,/* complain_on_overflow */
1519	 nds32_elf_ignore_reloc,/* special_function */
1520	 "R_NDS32_DWARF2_LEB_RELA",	/* name */
1521	 FALSE,			/* partial_inplace */
1522	 0xffffffff,		/* src_mask */
1523	 0xffffffff,		/* dst_mask */
1524	 FALSE),		/* pcrel_offset */
1525  HOWTO (R_NDS32_UPDATE_TA_RELA,/* type */
1526	 0,			/* rightshift */
1527	 1,			/* size (0 = byte, 1 = short, 2 = long) */
1528	 16,			/* bitsize */
1529	 FALSE,			/* pc_relative */
1530	 0,			/* bitpos */
1531	 complain_overflow_dont,/* complain_on_overflow */
1532	 nds32_elf_ignore_reloc,/* special_function */
1533	 "R_NDS32_UPDATE_TA_RELA",	/* name */
1534	 FALSE,			/* partial_inplace */
1535	 0xffff,		/* src_mask */
1536	 0xffff,		/* dst_mask */
1537	 FALSE),		/* pcrel_offset */
1538  /* Like R_NDS32_PCREL, but referring to the procedure linkage table
1539     entry for the symbol.  */
1540  HOWTO (R_NDS32_9_PLTREL,	/* type */
1541	 1,			/* rightshift */
1542	 1,			/* size (0 = byte, 1 = short, 2 = long) */
1543	 8,			/* bitsize */
1544	 TRUE,			/* pc_relative */
1545	 0,			/* bitpos */
1546	 complain_overflow_signed,	/* complain_on_overflow */
1547	 bfd_elf_generic_reloc,	/* special_function */
1548	 "R_NDS32_9_PLTREL",	/* name */
1549	 FALSE,			/* partial_inplace */
1550	 0xff,			/* src_mask */
1551	 0xff,			/* dst_mask */
1552	 TRUE),			/* pcrel_offset */
1553  /* Low 20 bits of PLT symbol offset relative to GOT (GP).  */
1554  HOWTO (R_NDS32_PLT_GOTREL_LO20,	/* type */
1555	 0,			/* rightshift */
1556	 2,			/* size (0 = byte, 1 = short, 2 = long) */
1557	 20,			/* bitsize */
1558	 FALSE,			/* pc_relative */
1559	 0,			/* bitpos */
1560	 complain_overflow_dont,/* complain_on_overflow */
1561	 bfd_elf_generic_reloc,	/* special_function */
1562	 "R_NDS32_PLT_GOTREL_LO20",	/* name */
1563	 FALSE,			/* partial_inplace */
1564	 0x000fffff,		/* src_mask */
1565	 0x000fffff,		/* dst_mask */
1566	 FALSE),		/* pcrel_offset */
1567  /* low 15 bits of PLT symbol offset relative to GOT (GP) */
1568  HOWTO (R_NDS32_PLT_GOTREL_LO15,	/* type */
1569	 0,			/* rightshift */
1570	 2,			/* size (0 = byte, 1 = short, 2 = long) */
1571	 15,			/* bitsize */
1572	 FALSE,			/* pc_relative */
1573	 0,			/* bitpos */
1574	 complain_overflow_dont,/* complain_on_overflow */
1575	 bfd_elf_generic_reloc,	/* special_function */
1576	 "R_NDS32_PLT_GOTREL_LO15",	/* name */
1577	 FALSE,			/* partial_inplace */
1578	 0x00007fff,		/* src_mask */
1579	 0x00007fff,		/* dst_mask */
1580	 FALSE),		/* pcrel_offset */
1581  /* Low 19 bits of PLT symbol offset relative to GOT (GP).  */
1582  HOWTO (R_NDS32_PLT_GOTREL_LO19,	/* type */
1583	 0,			/* rightshift */
1584	 2,			/* size (0 = byte, 1 = short, 2 = long) */
1585	 19,			/* bitsize */
1586	 FALSE,			/* pc_relative */
1587	 0,			/* bitpos */
1588	 complain_overflow_dont,/* complain_on_overflow */
1589	 bfd_elf_generic_reloc,	/* special_function */
1590	 "R_NDS32_PLT_GOTREL_LO19",	/* name */
1591	 FALSE,			/* partial_inplace */
1592	 0x0007ffff,		/* src_mask */
1593	 0x0007ffff,		/* dst_mask */
1594	 FALSE),		/* pcrel_offset */
1595  HOWTO (R_NDS32_GOT_LO15,	/* type */
1596	 0,			/* rightshift */
1597	 2,			/* size (0 = byte, 1 = short, 2 = long) */
1598	 15,			/* bitsize */
1599	 FALSE,			/* pc_relative */
1600	 0,			/* bitpos */
1601	 complain_overflow_dont,/* complain_on_overflow */
1602	 bfd_elf_generic_reloc,	/* special_function */
1603	 "R_NDS32_GOT_LO15",	/* name */
1604	 FALSE,			/* partial_inplace */
1605	 0x00007fff,		/* src_mask */
1606	 0x00007fff,		/* dst_mask */
1607	 FALSE),		/* pcrel_offset */
1608  HOWTO (R_NDS32_GOT_LO19,	/* type */
1609	 0,			/* rightshift */
1610	 2,			/* size (0 = byte, 1 = short, 2 = long) */
1611	 19,			/* bitsize */
1612	 FALSE,			/* pc_relative */
1613	 0,			/* bitpos */
1614	 complain_overflow_dont,/* complain_on_overflow */
1615	 bfd_elf_generic_reloc,	/* special_function */
1616	 "R_NDS32_GOT_LO19",	/* name */
1617	 FALSE,			/* partial_inplace */
1618	 0x0007ffff,		/* src_mask */
1619	 0x0007ffff,		/* dst_mask */
1620	 FALSE),		/* pcrel_offset */
1621  HOWTO (R_NDS32_GOTOFF_LO15,	/* type */
1622	 0,			/* rightshift */
1623	 2,			/* size (0 = byte, 1 = short, 2 = long) */
1624	 15,			/* bitsize */
1625	 FALSE,			/* pc_relative */
1626	 0,			/* bitpos */
1627	 complain_overflow_dont,/* complain_on_overflow */
1628	 bfd_elf_generic_reloc,	/* special_function */
1629	 "R_NDS32_GOTOFF_LO15",	/* name */
1630	 FALSE,			/* partial_inplace */
1631	 0x00007fff,		/* src_mask */
1632	 0x00007fff,		/* dst_mask */
1633	 FALSE),		/* pcrel_offset */
1634  HOWTO (R_NDS32_GOTOFF_LO19,	/* type */
1635	 0,			/* rightshift */
1636	 2,			/* size (0 = byte, 1 = short, 2 = long) */
1637	 19,			/* bitsize */
1638	 FALSE,			/* pc_relative */
1639	 0,			/* bitpos */
1640	 complain_overflow_dont,/* complain_on_overflow */
1641	 bfd_elf_generic_reloc,	/* special_function */
1642	 "R_NDS32_GOTOFF_LO19",	/* name */
1643	 FALSE,			/* partial_inplace */
1644	 0x0007ffff,		/* src_mask */
1645	 0x0007ffff,		/* dst_mask */
1646	 FALSE),		/* pcrel_offset */
1647  /* GOT 15 bits offset.  */
1648  HOWTO (R_NDS32_GOT15S2_RELA,	/* type */
1649	 2,			/* rightshift */
1650	 2,			/* size (0 = byte, 1 = short, 2 = long) */
1651	 15,			/* bitsize */
1652	 FALSE,			/* pc_relative */
1653	 0,			/* bitpos */
1654	 complain_overflow_signed,	/* complain_on_overflow */
1655	 bfd_elf_generic_reloc,	/* special_function */
1656	 "R_NDS32_GOT15S2_RELA",/* name */
1657	 FALSE,			/* partial_inplace */
1658	 0x00007fff,		/* src_mask */
1659	 0x00007fff,		/* dst_mask */
1660	 FALSE),		/* pcrel_offset */
1661  /* GOT 17 bits offset.  */
1662  HOWTO (R_NDS32_GOT17S2_RELA,	/* type */
1663	 2,			/* rightshift */
1664	 2,			/* size (0 = byte, 1 = short, 2 = long) */
1665	 17,			/* bitsize */
1666	 FALSE,			/* pc_relative */
1667	 0,			/* bitpos */
1668	 complain_overflow_signed,	/* complain_on_overflow */
1669	 bfd_elf_generic_reloc,	/* special_function */
1670	 "R_NDS32_GOT17S2_RELA",/* name */
1671	 FALSE,			/* partial_inplace */
1672	 0x0001ffff,		/* src_mask */
1673	 0x0001ffff,		/* dst_mask */
1674	 FALSE),		/* pcrel_offset */
1675  /* A 5 bit address.  */
1676  HOWTO (R_NDS32_5_RELA,	/* type */
1677	 0,			/* rightshift */
1678	 1,			/* size (0 = byte, 1 = short, 2 = long) */
1679	 5,			/* bitsize */
1680	 FALSE,			/* pc_relative */
1681	 0,			/* bitpos */
1682	 complain_overflow_signed,	/* complain_on_overflow */
1683	 bfd_elf_generic_reloc,	/* special_function */
1684	 "R_NDS32_5_RELA",	/* name */
1685	 FALSE,			/* partial_inplace */
1686	 0x1f,			/* src_mask */
1687	 0x1f,			/* dst_mask */
1688	 FALSE),		/* pcrel_offset */
1689  HOWTO (R_NDS32_10_UPCREL_RELA,/* type */
1690	 1,			/* rightshift */
1691	 1,			/* size (0 = byte, 1 = short, 2 = long) */
1692	 9,			/* bitsize */
1693	 TRUE,			/* pc_relative */
1694	 0,			/* bitpos */
1695	 complain_overflow_unsigned,	/* complain_on_overflow */
1696	 bfd_elf_generic_reloc,	/* special_function */
1697	 "R_NDS32_10_UPCREL_RELA",	/* name */
1698	 FALSE,			/* partial_inplace */
1699	 0x1ff,			/* src_mask */
1700	 0x1ff,			/* dst_mask */
1701	 TRUE),			/* pcrel_offset */
1702  HOWTO (R_NDS32_SDA_FP7U2_RELA,/* type */
1703	 2,			/* rightshift */
1704	 1,			/* size (0 = byte, 1 = short, 2 = long) */
1705	 7,			/* bitsize */
1706	 FALSE,			/* pc_relative */
1707	 0,			/* bitpos */
1708	 complain_overflow_unsigned,	/* complain_on_overflow */
1709	 bfd_elf_generic_reloc,	/* special_function */
1710	 "R_NDS32_SDA_FP7U2_RELA",	/* name */
1711	 FALSE,			/* partial_inplace */
1712	 0x0000007f,		/* src_mask */
1713	 0x0000007f,		/* dst_mask */
1714	 FALSE),		/* pcrel_offset */
1715  HOWTO (R_NDS32_WORD_9_PCREL_RELA,	/* type */
1716	 1,			/* rightshift */
1717	 2,			/* size (0 = byte, 1 = short, 2 = long) */
1718	 8,			/* bitsize */
1719	 TRUE,			/* pc_relative */
1720	 0,			/* bitpos */
1721	 complain_overflow_signed,	/* complain_on_overflow */
1722	 bfd_elf_generic_reloc,	/* special_function */
1723	 "R_NDS32_WORD_9_PCREL_RELA",	/* name */
1724	 FALSE,			/* partial_inplace */
1725	 0xff,			/* src_mask */
1726	 0xff,			/* dst_mask */
1727	 TRUE),			/* pcrel_offset */
1728  HOWTO (R_NDS32_25_ABS_RELA,	/* type */
1729	 1,			/* rightshift */
1730	 2,			/* size (0 = byte, 1 = short, 2 = long) */
1731	 24,			/* bitsize */
1732	 FALSE,			/* pc_relative */
1733	 0,			/* bitpos */
1734	 complain_overflow_dont,/* complain_on_overflow */
1735	 bfd_elf_generic_reloc,	/* special_function */
1736	 "R_NDS32_25_ABS_RELA",	/* name */
1737	 FALSE,			/* partial_inplace */
1738	 0xffffff,		/* src_mask */
1739	 0xffffff,		/* dst_mask */
1740	 FALSE),		/* pcrel_offset */
1741
1742  /* A relative 17 bit relocation for ifc, right shifted by 1.  */
1743  HOWTO (R_NDS32_17IFC_PCREL_RELA,	/* type */
1744	 1,			/* rightshift */
1745	 2,			/* size (0 = byte, 1 = short, 2 = long) */
1746	 16,			/* bitsize */
1747	 TRUE,			/* pc_relative */
1748	 0,			/* bitpos */
1749	 complain_overflow_signed,	/* complain_on_overflow */
1750	 bfd_elf_generic_reloc,	/* special_function */
1751	 "R_NDS32_17IFC_PCREL_RELA",	/* name */
1752	 FALSE,			/* partial_inplace */
1753	 0xffff,		/* src_mask */
1754	 0xffff,		/* dst_mask */
1755	 TRUE),			/* pcrel_offset */
1756
1757  /* A relative unsigned 10 bit relocation for ifc, right shifted by 1.  */
1758  HOWTO (R_NDS32_10IFCU_PCREL_RELA,	/* type */
1759	 1,			/* rightshift */
1760	 1,			/* size (0 = byte, 1 = short, 2 = long) */
1761	 9,			/* bitsize */
1762	 TRUE,			/* pc_relative */
1763	 0,			/* bitpos */
1764	 complain_overflow_unsigned,	/* complain_on_overflow */
1765	 bfd_elf_generic_reloc,	/* special_function */
1766	 "R_NDS32_10IFCU_PCREL_RELA",	/* name */
1767	 FALSE,			/* partial_inplace */
1768	 0x1ff,			/* src_mask */
1769	 0x1ff,			/* dst_mask */
1770	 TRUE),			/* pcrel_offset */
1771
1772  /* Like R_NDS32_HI20, but referring to the TLS entry for the symbol.  */
1773  HOWTO (R_NDS32_TLS_LE_HI20,	/* type */
1774	 12,			/* rightshift */
1775	 2,			/* size (0 = byte, 1 = short, 2 = long) */
1776	 20,			/* bitsize */
1777	 FALSE,			/* pc_relative */
1778	 0,			/* bitpos */
1779	 complain_overflow_dont,	/* complain_on_overflow */
1780	 bfd_elf_generic_reloc,	/* special_function */
1781	 "R_NDS32_TLS_LE_HI20",	/* name */
1782	 FALSE,			/* partial_inplace */
1783	 0x000fffff,		/* src_mask */
1784	 0x000fffff,		/* dst_mask */
1785	 FALSE),		/* pcrel_offset */
1786  HOWTO (R_NDS32_TLS_LE_LO12,	/* type */
1787	 0,			/* rightshift */
1788	 2,			/* size (0 = byte, 1 = short, 2 = long) */
1789	 12,			/* bitsize */
1790	 FALSE,			/* pc_relative */
1791	 0,			/* bitpos */
1792	 complain_overflow_dont,	/* complain_on_overflow */
1793	 bfd_elf_generic_reloc,	/* special_function */
1794	 "R_NDS32_TLS_LE_LO12",	/* name */
1795	 FALSE,			/* partial_inplace */
1796	 0x00000fff,		/* src_mask */
1797	 0x00000fff,		/* dst_mask */
1798	 FALSE),		/* pcrel_offset */
1799
1800  /* Like R_NDS32_HI20, but referring to the TLS entry for the symbol.  */
1801  HOWTO (R_NDS32_TLS_IE_HI20,	/* type */
1802	 12,			/* rightshift */
1803	 2,			/* size (0 = byte, 1 = short, 2 = long) */
1804	 20,			/* bitsize */
1805	 FALSE,			/* pc_relative */
1806	 0,			/* bitpos */
1807	 complain_overflow_dont,	/* complain_on_overflow */
1808	 bfd_elf_generic_reloc,	/* special_function */
1809	 "R_NDS32_TLS_IE_HI20",	/* name */
1810	 FALSE,			/* partial_inplace */
1811	 0x000fffff,		/* src_mask */
1812	 0x000fffff,		/* dst_mask */
1813	 FALSE),		/* pcrel_offset */
1814  HOWTO (R_NDS32_TLS_IE_LO12S2,	/* type */
1815	 2,			/* rightshift */
1816	 2,			/* size (0 = byte, 1 = short, 2 = long) */
1817	 10,			/* bitsize */
1818	 FALSE,			/* pc_relative */
1819	 0,			/* bitpos */
1820	 complain_overflow_dont,	/* complain_on_overflow */
1821	 bfd_elf_generic_reloc,	/* special_function */
1822	 "R_NDS32_TLS_IE_LO12S2",	/* name */
1823	 FALSE,			/* partial_inplace */
1824	 0x000003ff,		/* src_mask */
1825	 0x000003ff,		/* dst_mask */
1826	 FALSE),		/* pcrel_offset */
1827  /* Mark a TLS IE entry in GOT.  */
1828  HOWTO (R_NDS32_TLS_TPOFF,	/* type */
1829	 0,			/* rightshift */
1830	 2,			/* size (0 = byte, 1 = short, 2 = long) */
1831	 32,			/* bitsize */
1832	 FALSE,			/* pc_relative */
1833	 0,			/* bitpos */
1834	 complain_overflow_bitfield,	/* complain_on_overflow */
1835	 bfd_elf_generic_reloc,	/* special_function */
1836	 "R_NDS32_TLS_TPOFF",	/* name */
1837	 FALSE,			/* partial_inplace */
1838	 0xffffffff,		/* src_mask */
1839	 0xffffffff,		/* dst_mask */
1840	 FALSE),		/* pcrel_offset */
1841  /* A 20 bit address.  */
1842  HOWTO (R_NDS32_TLS_LE_20,	/* type */
1843	 0,			/* rightshift */
1844	 2,			/* size (0 = byte, 1 = short, 2 = long) */
1845	 20,			/* bitsize */
1846	 FALSE,		/* pc_relative */
1847	 0,			/* bitpos */
1848	 complain_overflow_signed,	/* complain_on_overflow */
1849	 bfd_elf_generic_reloc,	/* special_function */
1850	 "R_NDS32_TLS_LE_20",	/* name */
1851	 FALSE,		/* partial_inplace */
1852	 0xfffff,		/* src_mask */
1853	 0xfffff,		/* dst_mask */
1854	 FALSE),		/* pcrel_offset */
1855  HOWTO (R_NDS32_TLS_LE_15S0,	/* type */
1856	 0,			/* rightshift */
1857	 2,			/* size (0 = byte, 1 = short, 2 = long) */
1858	 15,			/* bitsize */
1859	 FALSE,		/* pc_relative */
1860	 0,			/* bitpos */
1861	 complain_overflow_signed,	/* complain_on_overflow */
1862	 bfd_elf_generic_reloc,	/* special_function */
1863	 "R_NDS32_TLS_LE_15S0",	/* name */
1864	 FALSE,		/* partial_inplace */
1865	 0x7fff,		/* src_mask */
1866	 0x7fff,		/* dst_mask */
1867	 FALSE),		/* pcrel_offset */
1868  HOWTO (R_NDS32_TLS_LE_15S1,	/* type */
1869	 1,			/* rightshift */
1870	 2,			/* size (0 = byte, 1 = short, 2 = long) */
1871	 15,			/* bitsize */
1872	 FALSE,		/* pc_relative */
1873	 0,			/* bitpos */
1874	 complain_overflow_signed,	/* complain_on_overflow */
1875	 bfd_elf_generic_reloc,	/* special_function */
1876	 "R_NDS32_TLS_LE_15S1",	/* name */
1877	 FALSE,		/* partial_inplace */
1878	 0x7fff,		/* src_mask */
1879	 0x7fff,		/* dst_mask */
1880	 FALSE),		/* pcrel_offset */
1881  HOWTO (R_NDS32_TLS_LE_15S2,	/* type */
1882	 2,			/* rightshift */
1883	 2,			/* size (0 = byte, 1 = short, 2 = long) */
1884	 15,			/* bitsize */
1885	 FALSE,		/* pc_relative */
1886	 0,			/* bitpos */
1887	 complain_overflow_signed,	/* complain_on_overflow */
1888	 bfd_elf_generic_reloc,	/* special_function */
1889	 "R_NDS32_TLS_LE_15S2",	/* name */
1890	 FALSE,		/* partial_inplace */
1891	 0x7fff,		/* src_mask */
1892	 0x7fff,		/* dst_mask */
1893	 FALSE),		/* pcrel_offset */
1894
1895  /* Relax hint for unconditional call sequence  */
1896  HOWTO (R_NDS32_LONGCALL4,	/* type */
1897	 0,			/* rightshift */
1898	 2,			/* size (0 = byte, 1 = short, 2 = long) */
1899	 32,			/* bitsize */
1900	 FALSE,			/* pc_relative */
1901	 0,			/* bitpos */
1902	 complain_overflow_dont,	/* complain_on_overflow */
1903	 nds32_elf_ignore_reloc,	/* special_function */
1904	 "R_NDS32_LONGCALL4",	/* name */
1905	 FALSE,			/* partial_inplace */
1906	 0xffffffff,		/* src_mask */
1907	 0xffffffff,		/* dst_mask */
1908	 FALSE),		/* pcrel_offset */
1909
1910  /* Relax hint for conditional call sequence.  */
1911  HOWTO (R_NDS32_LONGCALL5,	/* type */
1912	 0,			/* rightshift */
1913	 2,			/* size (0 = byte, 1 = short, 2 = long) */
1914	 32,			/* bitsize */
1915	 FALSE,			/* pc_relative */
1916	 0,			/* bitpos */
1917	 complain_overflow_dont,	/* complain_on_overflow */
1918	 nds32_elf_ignore_reloc,	/* special_function */
1919	 "R_NDS32_LONGCALL5",	/* name */
1920	 FALSE,			/* partial_inplace */
1921	 0xffffffff,		/* src_mask */
1922	 0xffffffff,		/* dst_mask */
1923	 FALSE),		/* pcrel_offset */
1924
1925  /* Relax hint for conditional call sequence.  */
1926  HOWTO (R_NDS32_LONGCALL6,	/* type */
1927	 0,			/* rightshift */
1928	 2,			/* size (0 = byte, 1 = short, 2 = long) */
1929	 32,			/* bitsize */
1930	 FALSE,			/* pc_relative */
1931	 0,			/* bitpos */
1932	 complain_overflow_dont,	/* complain_on_overflow */
1933	 nds32_elf_ignore_reloc,	/* special_function */
1934	 "R_NDS32_LONGCALL6",	/* name */
1935	 FALSE,			/* partial_inplace */
1936	 0xffffffff,		/* src_mask */
1937	 0xffffffff,		/* dst_mask */
1938	 FALSE),		/* pcrel_offset */
1939
1940  /* Relax hint for unconditional branch sequence.  */
1941  HOWTO (R_NDS32_LONGJUMP4,	/* type */
1942	 0,			/* rightshift */
1943	 2,			/* size (0 = byte, 1 = short, 2 = long) */
1944	 32,			/* bitsize */
1945	 FALSE,			/* pc_relative */
1946	 0,			/* bitpos */
1947	 complain_overflow_dont,	/* complain_on_overflow */
1948	 nds32_elf_ignore_reloc,	/* special_function */
1949	 "R_NDS32_LONGJUMP4",	/* name */
1950	 FALSE,			/* partial_inplace */
1951	 0xffffffff,		/* src_mask */
1952	 0xffffffff,		/* dst_mask */
1953	 FALSE),		/* pcrel_offset */
1954
1955  /* Relax hint for conditional branch sequence.  */
1956  HOWTO (R_NDS32_LONGJUMP5,	/* type */
1957	 0,			/* rightshift */
1958	 2,			/* size (0 = byte, 1 = short, 2 = long) */
1959	 32,			/* bitsize */
1960	 FALSE,			/* pc_relative */
1961	 0,			/* bitpos */
1962	 complain_overflow_dont,	/* complain_on_overflow */
1963	 nds32_elf_ignore_reloc,	/* special_function */
1964	 "R_NDS32_LONGJUMP5",	/* name */
1965	 FALSE,			/* partial_inplace */
1966	 0xffffffff,		/* src_mask */
1967	 0xffffffff,		/* dst_mask */
1968	 FALSE),		/* pcrel_offset */
1969
1970  /* Relax hint for conditional branch sequence.  */
1971  HOWTO (R_NDS32_LONGJUMP6,	/* type */
1972	 0,			/* rightshift */
1973	 2,			/* size (0 = byte, 1 = short, 2 = long) */
1974	 32,			/* bitsize */
1975	 FALSE,			/* pc_relative */
1976	 0,			/* bitpos */
1977	 complain_overflow_dont,	/* complain_on_overflow */
1978	 nds32_elf_ignore_reloc,	/* special_function */
1979	 "R_NDS32_LONGJUMP6",	/* name */
1980	 FALSE,			/* partial_inplace */
1981	 0xffffffff,		/* src_mask */
1982	 0xffffffff,		/* dst_mask */
1983	 FALSE),		/* pcrel_offset */
1984
1985  /* Relax hint for conditional branch sequence.  */
1986  HOWTO (R_NDS32_LONGJUMP7,	/* type */
1987	 0,			/* rightshift */
1988	 2,			/* size (0 = byte, 1 = short, 2 = long) */
1989	 32,			/* bitsize */
1990	 FALSE,			/* pc_relative */
1991	 0,			/* bitpos */
1992	 complain_overflow_dont,	/* complain_on_overflow */
1993	 nds32_elf_ignore_reloc,	/* special_function */
1994	 "R_NDS32_LONGJUMP7",	/* name */
1995	 FALSE,			/* partial_inplace */
1996	 0xffffffff,		/* src_mask */
1997	 0xffffffff,		/* dst_mask */
1998	 FALSE),		/* pcrel_offset */
1999};
2000
2001/* Relocations used for relaxation.  */
2002static reloc_howto_type nds32_elf_relax_howto_table[] =
2003{
2004  HOWTO (R_NDS32_RELAX_ENTRY,	/* type */
2005	 0,			/* rightshift */
2006	 2,			/* size (0 = byte, 1 = short, 2 = long) */
2007	 32,			/* bitsize */
2008	 FALSE,			/* pc_relative */
2009	 0,			/* bitpos */
2010	 complain_overflow_dont,/* complain_on_overflow */
2011	 nds32_elf_ignore_reloc,/* special_function */
2012	 "R_NDS32_RELAX_ENTRY",	/* name */
2013	 FALSE,			/* partial_inplace */
2014	 0xffffffff,		/* src_mask */
2015	 0xffffffff,		/* dst_mask */
2016	 FALSE),		/* pcrel_offset */
2017  HOWTO (R_NDS32_GOT_SUFF,	/* type */
2018	 0,			/* rightshift */
2019	 2,			/* size (0 = byte, 1 = short, 2 = long) */
2020	 32,			/* bitsize */
2021	 FALSE,			/* pc_relative */
2022	 0,			/* bitpos */
2023	 complain_overflow_dont,/* complain_on_overflow */
2024	 nds32_elf_ignore_reloc,/* special_function */
2025	 "R_NDS32_GOT_SUFF",	/* name */
2026	 FALSE,			/* partial_inplace */
2027	 0xffffffff,		/* src_mask */
2028	 0xffffffff,		/* dst_mask */
2029	 FALSE),		/* pcrel_offset */
2030  HOWTO (R_NDS32_GOTOFF_SUFF,	/* type */
2031	 0,			/* rightshift */
2032	 2,			/* size (0 = byte, 1 = short, 2 = long) */
2033	 32,			/* bitsize */
2034	 FALSE,			/* pc_relative */
2035	 0,			/* bitpos */
2036	 complain_overflow_bitfield,	/* complain_on_overflow */
2037	 nds32_elf_ignore_reloc,/* special_function */
2038	 "R_NDS32_GOTOFF_SUFF",	/* name */
2039	 FALSE,			/* partial_inplace */
2040	 0xffffffff,		/* src_mask */
2041	 0xffffffff,		/* dst_mask */
2042	 FALSE),		/* pcrel_offset */
2043  HOWTO (R_NDS32_PLT_GOT_SUFF,	/* type */
2044	 0,			/* rightshift */
2045	 2,			/* size (0 = byte, 1 = short, 2 = long) */
2046	 32,			/* bitsize */
2047	 FALSE,			/* pc_relative */
2048	 0,			/* bitpos */
2049	 complain_overflow_dont,/* complain_on_overflow */
2050	 nds32_elf_ignore_reloc,/* special_function */
2051	 "R_NDS32_PLT_GOT_SUFF",/* name */
2052	 FALSE,			/* partial_inplace */
2053	 0xffffffff,		/* src_mask */
2054	 0xffffffff,		/* dst_mask */
2055	 FALSE),		/* pcrel_offset */
2056  HOWTO (R_NDS32_MULCALL_SUFF,	/* type */
2057	 0,			/* rightshift */
2058	 2,			/* size (0 = byte, 1 = short, 2 = long) */
2059	 32,			/* bitsize */
2060	 FALSE,			/* pc_relative */
2061	 0,			/* bitpos */
2062	 complain_overflow_dont,/* complain_on_overflow */
2063	 nds32_elf_ignore_reloc,/* special_function */
2064	 "R_NDS32_MULCALL_SUFF",/* name */
2065	 FALSE,			/* partial_inplace */
2066	 0xffffffff,		/* src_mask */
2067	 0xffffffff,		/* dst_mask */
2068	 FALSE),		/* pcrel_offset */
2069  HOWTO (R_NDS32_PTR,		/* type */
2070	 0,			/* rightshift */
2071	 2,			/* size (0 = byte, 1 = short, 2 = long) */
2072	 32,			/* bitsize */
2073	 FALSE,			/* pc_relative */
2074	 0,			/* bitpos */
2075	 complain_overflow_dont,/* complain_on_overflow */
2076	 nds32_elf_ignore_reloc,/* special_function */
2077	 "R_NDS32_PTR",		/* name */
2078	 FALSE,			/* partial_inplace */
2079	 0xffffffff,		/* src_mask */
2080	 0xffffffff,		/* dst_mask */
2081	 FALSE),		/* pcrel_offset */
2082  HOWTO (R_NDS32_PTR_COUNT,	/* type */
2083	 0,			/* rightshift */
2084	 2,			/* size (0 = byte, 1 = short, 2 = long) */
2085	 32,			/* bitsize */
2086	 FALSE,			/* pc_relative */
2087	 0,			/* bitpos */
2088	 complain_overflow_dont,/* complain_on_overflow */
2089	 nds32_elf_ignore_reloc,/* special_function */
2090	 "R_NDS32_PTR_COUNT",	/* name */
2091	 FALSE,			/* partial_inplace */
2092	 0xffffffff,		/* src_mask */
2093	 0xffffffff,		/* dst_mask */
2094	 FALSE),		/* pcrel_offset */
2095  HOWTO (R_NDS32_PTR_RESOLVED,	/* type */
2096	 0,			/* rightshift */
2097	 2,			/* size (0 = byte, 1 = short, 2 = long) */
2098	 32,			/* bitsize */
2099	 FALSE,			/* pc_relative */
2100	 0,			/* bitpos */
2101	 complain_overflow_dont,/* complain_on_overflow */
2102	 nds32_elf_ignore_reloc,/* special_function */
2103	 "R_NDS32_PTR_RESOLVED",/* name */
2104	 FALSE,			/* partial_inplace */
2105	 0xffffffff,		/* src_mask */
2106	 0xffffffff,		/* dst_mask */
2107	 FALSE),		/* pcrel_offset */
2108  HOWTO (R_NDS32_PLTBLOCK,	/* type */
2109	 0,			/* rightshift */
2110	 2,			/* size (0 = byte, 1 = short, 2 = long) */
2111	 32,			/* bitsize */
2112	 FALSE,			/* pc_relative */
2113	 0,			/* bitpos */
2114	 complain_overflow_dont,/* complain_on_overflow */
2115	 nds32_elf_ignore_reloc,/* special_function */
2116	 "R_NDS32_PLTBLOCK",	/* name */
2117	 FALSE,			/* partial_inplace */
2118	 0xffffffff,		/* src_mask */
2119	 0xffffffff,		/* dst_mask */
2120	 FALSE),		/* pcrel_offset */
2121  HOWTO (R_NDS32_RELAX_REGION_BEGIN,	/* type */
2122	 0,			/* rightshift */
2123	 2,			/* size (0 = byte, 1 = short, 2 = long) */
2124	 32,			/* bitsize */
2125	 FALSE,			/* pc_relative */
2126	 0,			/* bitpos */
2127	 complain_overflow_dont,/* complain_on_overflow */
2128	 nds32_elf_ignore_reloc,/* special_function */
2129	 "R_NDS32_RELAX_REGION_BEGIN",	/* name */
2130	 FALSE,			/* partial_inplace */
2131	 0xffffffff,		/* src_mask */
2132	 0xffffffff,		/* dst_mask */
2133	 FALSE),		/* pcrel_offset */
2134  HOWTO (R_NDS32_RELAX_REGION_END,	/* type */
2135	 0,			/* rightshift */
2136	 2,			/* size (0 = byte, 1 = short, 2 = long) */
2137	 32,			/* bitsize */
2138	 FALSE,			/* pc_relative */
2139	 0,			/* bitpos */
2140	 complain_overflow_dont,/* complain_on_overflow */
2141	 nds32_elf_ignore_reloc,/* special_function */
2142	 "R_NDS32_RELAX_REGION_END",	/* name */
2143	 FALSE,			/* partial_inplace */
2144	 0xffffffff,		/* src_mask */
2145	 0xffffffff,		/* dst_mask */
2146	 FALSE),		/* pcrel_offset */
2147  HOWTO (R_NDS32_MINUEND,	/* type */
2148	 0,			/* rightshift */
2149	 2,			/* size (0 = byte, 1 = short, 2 = long) */
2150	 32,			/* bitsize */
2151	 FALSE,			/* pc_relative */
2152	 0,			/* bitpos */
2153	 complain_overflow_dont,/* complain_on_overflow */
2154	 nds32_elf_ignore_reloc,/* special_function */
2155	 "R_NDS32_MINUEND",	/* name */
2156	 FALSE,			/* partial_inplace */
2157	 0xffffffff,		/* src_mask */
2158	 0xffffffff,		/* dst_mask */
2159	 FALSE),		/* pcrel_offset */
2160  HOWTO (R_NDS32_SUBTRAHEND,	/* type */
2161	 0,			/* rightshift */
2162	 2,			/* size (0 = byte, 1 = short, 2 = long) */
2163	 32,			/* bitsize */
2164	 FALSE,			/* pc_relative */
2165	 0,			/* bitpos */
2166	 complain_overflow_dont,/* complain_on_overflow */
2167	 nds32_elf_ignore_reloc,/* special_function */
2168	 "R_NDS32_SUBTRAHEND",	/* name */
2169	 FALSE,			/* partial_inplace */
2170	 0xffffffff,		/* src_mask */
2171	 0xffffffff,		/* dst_mask */
2172	 FALSE),		/* pcrel_offset */
2173  HOWTO (R_NDS32_DIFF8,		/* type */
2174	 0,			/* rightshift */
2175	 0,			/* size (0 = byte, 1 = short, 2 = long) */
2176	 8,			/* bitsize */
2177	 FALSE,			/* pc_relative */
2178	 0,			/* bitpos */
2179	 complain_overflow_dont,/* complain_on_overflow */
2180	 nds32_elf_ignore_reloc,/* special_function */
2181	 "R_NDS32_DIFF8",	/* name */
2182	 FALSE,			/* partial_inplace */
2183	 0x000000ff,		/* src_mask */
2184	 0x000000ff,		/* dst_mask */
2185	 FALSE),		/* pcrel_offset */
2186  HOWTO (R_NDS32_DIFF16,	/* type */
2187	 0,			/* rightshift */
2188	 1,			/* size (0 = byte, 1 = short, 2 = long) */
2189	 16,			/* bitsize */
2190	 FALSE,			/* pc_relative */
2191	 0,			/* bitpos */
2192	 complain_overflow_dont,/* complain_on_overflow */
2193	 nds32_elf_ignore_reloc,/* special_function */
2194	 "R_NDS32_DIFF16",	/* name */
2195	 FALSE,			/* partial_inplace */
2196	 0x0000ffff,		/* src_mask */
2197	 0x0000ffff,		/* dst_mask */
2198	 FALSE),		/* pcrel_offset */
2199  HOWTO (R_NDS32_DIFF32,	/* type */
2200	 0,			/* rightshift */
2201	 2,			/* size (0 = byte, 1 = short, 2 = long) */
2202	 32,			/* bitsize */
2203	 FALSE,			/* pc_relative */
2204	 0,			/* bitpos */
2205	 complain_overflow_dont,/* complain_on_overflow */
2206	 nds32_elf_ignore_reloc,/* special_function */
2207	 "R_NDS32_DIFF32",	/* name */
2208	 FALSE,			/* partial_inplace */
2209	 0xffffffff,		/* src_mask */
2210	 0xffffffff,		/* dst_mask */
2211	 FALSE),		/* pcrel_offset */
2212  HOWTO (R_NDS32_DIFF_ULEB128,	/* type */
2213	 0,			/* rightshift */
2214	 0,			/* size (0 = byte, 1 = short, 2 = long) */
2215	 0,			/* bitsize */
2216	 FALSE,			/* pc_relative */
2217	 0,			/* bitpos */
2218	 complain_overflow_dont,/* complain_on_overflow */
2219	 nds32_elf_ignore_reloc,/* special_function */
2220	 "R_NDS32_DIFF_ULEB128",/* name */
2221	 FALSE,			/* partial_inplace */
2222	 0xffffffff,		/* src_mask */
2223	 0xffffffff,		/* dst_mask */
2224	 FALSE),		/* pcrel_offset */
2225  HOWTO (R_NDS32_DATA,		/* type */
2226	 0,			/* rightshift */
2227	 2,			/* size (0 = byte, 1 = short, 2 = long) */
2228	 32,			/* bitsize */
2229	 FALSE,			/* pc_relative */
2230	 0,			/* bitpos */
2231	 complain_overflow_dont,/* complain_on_overflow */
2232	 nds32_elf_ignore_reloc,/* special_function */
2233	 "R_NDS32_DATA",	/* name */
2234	 FALSE,			/* partial_inplace */
2235	 0xffffffff,		/* src_mask */
2236	 0xffffffff,		/* dst_mask */
2237	 FALSE),		/* pcrel_offset */
2238  HOWTO (R_NDS32_TRAN,		/* type */
2239	 0,			/* rightshift */
2240	 2,			/* size (0 = byte, 1 = short, 2 = long) */
2241	 32,			/* bitsize */
2242	 FALSE,			/* pc_relative */
2243	 0,			/* bitpos */
2244	 complain_overflow_dont,/* complain_on_overflow */
2245	 nds32_elf_ignore_reloc,/* special_function */
2246	 "R_NDS32_TRAN",	/* name */
2247	 FALSE,			/* partial_inplace */
2248	 0xffffffff,		/* src_mask */
2249	 0xffffffff,		/* dst_mask */
2250	 FALSE),		/* pcrel_offset */
2251  HOWTO (R_NDS32_TLS_LE_ADD,	/* type */
2252	 0,			/* rightshift */
2253	 2,			/* size (0 = byte, 1 = short, 2 = long) */
2254	 32,			/* bitsize */
2255	 FALSE,			/* pc_relative */
2256	 0,			/* bitpos */
2257	 complain_overflow_dont,	/* complain_on_overflow */
2258	 nds32_elf_ignore_reloc,	/* special_function */
2259	 "R_NDS32_TLS_LE_ADD",	/* name */
2260	 FALSE,			/* partial_inplace */
2261	 0xffffffff,		/* src_mask */
2262	 0xffffffff,		/* dst_mask */
2263	 FALSE),		/* pcrel_offset */
2264  HOWTO (R_NDS32_TLS_LE_LS,	/* type */
2265	 0,			/* rightshift */
2266	 2,			/* size (0 = byte, 1 = short, 2 = long) */
2267	 32,			/* bitsize */
2268	 FALSE,			/* pc_relative */
2269	 0,			/* bitpos */
2270	 complain_overflow_dont,	/* complain_on_overflow */
2271	 nds32_elf_ignore_reloc,	/* special_function */
2272	 "R_NDS32_TLS_LE_LS",	/* name */
2273	 FALSE,			/* partial_inplace */
2274	 0xffffffff,		/* src_mask */
2275	 0xffffffff,		/* dst_mask */
2276	 FALSE),		/* pcrel_offset */
2277  HOWTO (R_NDS32_EMPTY,		/* type */
2278	 0,			/* rightshift */
2279	 2,			/* size (0 = byte, 1 = short, 2 = long) */
2280	 32,			/* bitsize */
2281	 FALSE,			/* pc_relative */
2282	 0,			/* bitpos */
2283	 complain_overflow_dont,	/* complain_on_overflow */
2284	 nds32_elf_ignore_reloc,	/* special_function */
2285	 "R_NDS32_EMPTY",		/* name */
2286	 FALSE,			/* partial_inplace */
2287	 0xffffffff,		/* src_mask */
2288	 0xffffffff,		/* dst_mask */
2289	 FALSE),		/* pcrel_offset */
2290};
2291
2292
2293/* nds32_insertion_sort sorts an array with nmemb elements of size size.
2294   This prototype is the same as qsort ().  */
2295
2296void
2297nds32_insertion_sort (void *base, size_t nmemb, size_t size,
2298		      int (*compar) (const void *lhs, const void *rhs))
2299{
2300  char *ptr = (char *) base;
2301  int i, j;
2302  char *tmp = alloca (size);
2303
2304  /* If i is less than j, i is inserted before j.
2305
2306     |---- j ----- i --------------|
2307      \		 / \		  /
2308	 sorted		unsorted
2309   */
2310
2311  for (i = 1; i < (int) nmemb; i++)
2312    {
2313      for (j = (i - 1); j >= 0; j--)
2314	if (compar (ptr + i * size, ptr + j * size) >= 0)
2315	  break;
2316
2317      j++;
2318
2319      if (i == j)
2320	continue; /* i is in order.  */
2321
2322      memcpy (tmp, ptr + i * size, size);
2323      memmove (ptr + (j + 1) * size, ptr + j * size, (i - j) * size);
2324      memcpy (ptr + j * size, tmp, size);
2325    }
2326}
2327
2328/* Sort relocation by r_offset.
2329
2330   We didn't use qsort () in stdlib, because quick-sort is not a stable sorting
2331   algorithm.  Relocations at the same r_offset must keep their order.
2332   For example, RELAX_ENTRY must be the very first relocation entry.
2333
2334   Currently, this function implements insertion-sort.
2335
2336   FIXME: If we already sort them in assembler, why bother sort them
2337	  here again?  */
2338
2339static int
2340compar_reloc (const void *lhs, const void *rhs)
2341{
2342  const Elf_Internal_Rela *l = (const Elf_Internal_Rela *) lhs;
2343  const Elf_Internal_Rela *r = (const Elf_Internal_Rela *) rhs;
2344
2345  if (l->r_offset > r->r_offset)
2346    return 1;
2347  else if (l->r_offset == r->r_offset)
2348    return 0;
2349  else
2350    return -1;
2351}
2352
2353/* Functions listed below are only used for old relocs.
2354   * nds32_elf_9_pcrel_reloc
2355   * nds32_elf_do_9_pcrel_reloc
2356   * nds32_elf_hi20_reloc
2357   * nds32_elf_relocate_hi20
2358   * nds32_elf_lo12_reloc
2359   * nds32_elf_sda15_reloc
2360   * nds32_elf_generic_reloc
2361   */
2362
2363/* Handle the R_NDS32_9_PCREL & R_NDS32_9_PCREL_RELA reloc.  */
2364
2365static bfd_reloc_status_type
2366nds32_elf_9_pcrel_reloc (bfd *abfd, arelent *reloc_entry, asymbol *symbol,
2367			 void *data, asection *input_section, bfd *output_bfd,
2368			 char **error_message ATTRIBUTE_UNUSED)
2369{
2370  /* This part is from bfd_elf_generic_reloc.  */
2371  if (output_bfd != (bfd *) NULL
2372      && (symbol->flags & BSF_SECTION_SYM) == 0
2373      && (!reloc_entry->howto->partial_inplace || reloc_entry->addend == 0))
2374    {
2375      reloc_entry->address += input_section->output_offset;
2376      return bfd_reloc_ok;
2377    }
2378
2379  if (output_bfd != NULL)
2380    {
2381      /* FIXME: See bfd_perform_relocation.  Is this right?  */
2382      return bfd_reloc_continue;
2383    }
2384
2385  return nds32_elf_do_9_pcrel_reloc (abfd, reloc_entry->howto,
2386				     input_section,
2387				     data, reloc_entry->address,
2388				     symbol->section,
2389				     (symbol->value
2390				      + symbol->section->output_section->vma
2391				      + symbol->section->output_offset),
2392				     reloc_entry->addend);
2393}
2394
2395/* Utility to actually perform an R_NDS32_9_PCREL reloc.  */
2396#define N_ONES(n) (((((bfd_vma) 1 << ((n) - 1)) - 1) << 1) | 1)
2397
2398static bfd_reloc_status_type
2399nds32_elf_do_9_pcrel_reloc (bfd *abfd, reloc_howto_type *howto,
2400			    asection *input_section, bfd_byte *data,
2401			    bfd_vma offset,
2402			    asection *symbol_section ATTRIBUTE_UNUSED,
2403			    bfd_vma symbol_value, bfd_vma addend)
2404{
2405  bfd_signed_vma relocation;
2406  unsigned short x;
2407  bfd_reloc_status_type status;
2408
2409  /* Sanity check the address (offset in section).  */
2410  if (offset > bfd_get_section_limit (abfd, input_section))
2411    return bfd_reloc_outofrange;
2412
2413  relocation = symbol_value + addend;
2414  /* Make it pc relative.  */
2415  relocation -= (input_section->output_section->vma
2416		 + input_section->output_offset);
2417  /* These jumps mask off the lower two bits of the current address
2418     before doing pcrel calculations.  */
2419  relocation -= (offset & -(bfd_vma) 2);
2420
2421  if (relocation < -ACCURATE_8BIT_S1 || relocation >= ACCURATE_8BIT_S1)
2422    status = bfd_reloc_overflow;
2423  else
2424    status = bfd_reloc_ok;
2425
2426  x = bfd_getb16 (data + offset);
2427
2428  relocation >>= howto->rightshift;
2429  relocation <<= howto->bitpos;
2430  x = (x & ~howto->dst_mask)
2431      | (((x & howto->src_mask) + relocation) & howto->dst_mask);
2432
2433  bfd_putb16 ((bfd_vma) x, data + offset);
2434
2435  return status;
2436}
2437
2438/* Handle the R_NDS32_HI20_[SU]LO relocs.
2439   HI20_SLO is for the add3 and load/store with displacement instructions.
2440   HI20 is for the or3 instruction.
2441   For R_NDS32_HI20_SLO, the lower 16 bits are sign extended when added to
2442   the high 16 bytes so if the lower 16 bits are negative (bit 15 == 1) then
2443   we must add one to the high 16 bytes (which will get subtracted off when
2444   the low 16 bits are added).
2445   These relocs have to be done in combination with an R_NDS32_LO12 reloc
2446   because there is a carry from the LO12 to the HI20.  Here we just save
2447   the information we need; we do the actual relocation when we see the LO12.
2448   This code is copied from the elf32-mips.c.  We also support an arbitrary
2449   number of HI20 relocs to be associated with a single LO12 reloc.  The
2450   assembler sorts the relocs to ensure each HI20 immediately precedes its
2451   LO12.  However if there are multiple copies, the assembler may not find
2452   the real LO12 so it picks the first one it finds.  */
2453
2454struct nds32_hi20
2455{
2456  struct nds32_hi20 *next;
2457  bfd_byte *addr;
2458  bfd_vma addend;
2459};
2460
2461static struct nds32_hi20 *nds32_hi20_list;
2462
2463static bfd_reloc_status_type
2464nds32_elf_hi20_reloc (bfd *abfd ATTRIBUTE_UNUSED, arelent *reloc_entry,
2465		      asymbol *symbol, void *data, asection *input_section,
2466		      bfd *output_bfd, char **error_message ATTRIBUTE_UNUSED)
2467{
2468  bfd_reloc_status_type ret;
2469  bfd_vma relocation;
2470  struct nds32_hi20 *n;
2471
2472  /* This part is from bfd_elf_generic_reloc.
2473     If we're relocating, and this an external symbol, we don't want
2474     to change anything.  */
2475  if (output_bfd != (bfd *) NULL
2476      && (symbol->flags & BSF_SECTION_SYM) == 0 && reloc_entry->addend == 0)
2477    {
2478      reloc_entry->address += input_section->output_offset;
2479      return bfd_reloc_ok;
2480    }
2481
2482  /* Sanity check the address (offset in section).  */
2483  if (reloc_entry->address > bfd_get_section_limit (abfd, input_section))
2484    return bfd_reloc_outofrange;
2485
2486  ret = bfd_reloc_ok;
2487  if (bfd_is_und_section (symbol->section) && output_bfd == (bfd *) NULL)
2488    ret = bfd_reloc_undefined;
2489
2490  if (bfd_is_com_section (symbol->section))
2491    relocation = 0;
2492  else
2493    relocation = symbol->value;
2494
2495  relocation += symbol->section->output_section->vma;
2496  relocation += symbol->section->output_offset;
2497  relocation += reloc_entry->addend;
2498
2499  /* Save the information, and let LO12 do the actual relocation.  */
2500  n = (struct nds32_hi20 *) bfd_malloc ((bfd_size_type) sizeof *n);
2501  if (n == NULL)
2502    return bfd_reloc_outofrange;
2503
2504  n->addr = (bfd_byte *) data + reloc_entry->address;
2505  n->addend = relocation;
2506  n->next = nds32_hi20_list;
2507  nds32_hi20_list = n;
2508
2509  if (output_bfd != (bfd *) NULL)
2510    reloc_entry->address += input_section->output_offset;
2511
2512  return ret;
2513}
2514
2515/* Handle an NDS32 ELF HI20 reloc.  */
2516
2517static void
2518nds32_elf_relocate_hi20 (bfd *input_bfd ATTRIBUTE_UNUSED,
2519			 int type ATTRIBUTE_UNUSED, Elf_Internal_Rela *relhi,
2520			 Elf_Internal_Rela *rello, bfd_byte *contents,
2521			 bfd_vma addend)
2522{
2523  unsigned long insn;
2524  bfd_vma addlo;
2525
2526  insn = bfd_getb32 (contents + relhi->r_offset);
2527
2528  addlo = bfd_getb32 (contents + rello->r_offset);
2529  addlo &= 0xfff;
2530
2531  addend += ((insn & 0xfffff) << 20) + addlo;
2532
2533  insn = (insn & 0xfff00000) | ((addend >> 12) & 0xfffff);
2534  bfd_putb32 (insn, contents + relhi->r_offset);
2535}
2536
2537/* Do an R_NDS32_LO12 relocation.  This is a straightforward 12 bit
2538   inplace relocation; this function exists in order to do the
2539   R_NDS32_HI20_[SU]LO relocation described above.  */
2540
2541static bfd_reloc_status_type
2542nds32_elf_lo12_reloc (bfd *input_bfd, arelent *reloc_entry, asymbol *symbol,
2543		      void *data, asection *input_section, bfd *output_bfd,
2544		      char **error_message)
2545{
2546  /* This part is from bfd_elf_generic_reloc.
2547     If we're relocating, and this an external symbol, we don't want
2548     to change anything.  */
2549  if (output_bfd != NULL && (symbol->flags & BSF_SECTION_SYM) == 0
2550      && reloc_entry->addend == 0)
2551    {
2552      reloc_entry->address += input_section->output_offset;
2553      return bfd_reloc_ok;
2554    }
2555
2556  if (nds32_hi20_list != NULL)
2557    {
2558      struct nds32_hi20 *l;
2559
2560      l = nds32_hi20_list;
2561      while (l != NULL)
2562	{
2563	  unsigned long insn;
2564	  unsigned long val;
2565	  unsigned long vallo;
2566	  struct nds32_hi20 *next;
2567
2568	  /* Do the HI20 relocation.  Note that we actually don't need
2569	     to know anything about the LO12 itself, except where to
2570	     find the low 12 bits of the addend needed by the LO12.  */
2571	  insn = bfd_getb32 (l->addr);
2572	  vallo = bfd_getb32 ((bfd_byte *) data + reloc_entry->address);
2573	  vallo &= 0xfff;
2574	  switch (reloc_entry->howto->type)
2575	    {
2576	    case R_NDS32_LO12S3:
2577	      vallo <<= 3;
2578	      break;
2579
2580	    case R_NDS32_LO12S2:
2581	      vallo <<= 2;
2582	      break;
2583
2584	    case R_NDS32_LO12S1:
2585	      vallo <<= 1;
2586	      break;
2587
2588	    case R_NDS32_LO12S0:
2589	      vallo <<= 0;
2590	      break;
2591	    }
2592
2593	  val = ((insn & 0xfffff) << 12) + vallo;
2594	  val += l->addend;
2595
2596	  insn = (insn & ~(bfd_vma) 0xfffff) | ((val >> 12) & 0xfffff);
2597	  bfd_putb32 ((bfd_vma) insn, l->addr);
2598
2599	  next = l->next;
2600	  free (l);
2601	  l = next;
2602	}
2603
2604      nds32_hi20_list = NULL;
2605    }
2606
2607  /* Now do the LO12 reloc in the usual way.
2608     ??? It would be nice to call bfd_elf_generic_reloc here,
2609     but we have partial_inplace set.  bfd_elf_generic_reloc will
2610     pass the handling back to bfd_install_relocation which will install
2611     a section relative addend which is wrong.  */
2612  return nds32_elf_generic_reloc (input_bfd, reloc_entry, symbol, data,
2613				  input_section, output_bfd, error_message);
2614}
2615
2616/* Do generic partial_inplace relocation.
2617   This is a local replacement for bfd_elf_generic_reloc.  */
2618
2619static bfd_reloc_status_type
2620nds32_elf_generic_reloc (bfd *input_bfd, arelent *reloc_entry,
2621			 asymbol *symbol, void *data, asection *input_section,
2622			 bfd *output_bfd, char **error_message ATTRIBUTE_UNUSED)
2623{
2624  bfd_reloc_status_type ret;
2625  bfd_vma relocation;
2626  bfd_byte *inplace_address;
2627
2628  /* This part is from bfd_elf_generic_reloc.
2629     If we're relocating, and this an external symbol, we don't want
2630     to change anything.  */
2631  if (output_bfd != NULL && (symbol->flags & BSF_SECTION_SYM) == 0
2632      && reloc_entry->addend == 0)
2633    {
2634      reloc_entry->address += input_section->output_offset;
2635      return bfd_reloc_ok;
2636    }
2637
2638  /* Now do the reloc in the usual way.
2639     ??? It would be nice to call bfd_elf_generic_reloc here,
2640     but we have partial_inplace set.  bfd_elf_generic_reloc will
2641     pass the handling back to bfd_install_relocation which will install
2642     a section relative addend which is wrong.  */
2643
2644  /* Sanity check the address (offset in section).  */
2645  if (reloc_entry->address > bfd_get_section_limit (input_bfd, input_section))
2646    return bfd_reloc_outofrange;
2647
2648  ret = bfd_reloc_ok;
2649  if (bfd_is_und_section (symbol->section) && output_bfd == (bfd *) NULL)
2650    ret = bfd_reloc_undefined;
2651
2652  if (bfd_is_com_section (symbol->section) || output_bfd != (bfd *) NULL)
2653    relocation = 0;
2654  else
2655    relocation = symbol->value;
2656
2657  /* Only do this for a final link.  */
2658  if (output_bfd == (bfd *) NULL)
2659    {
2660      relocation += symbol->section->output_section->vma;
2661      relocation += symbol->section->output_offset;
2662    }
2663
2664  relocation += reloc_entry->addend;
2665  switch (reloc_entry->howto->type)
2666    {
2667    case R_NDS32_LO12S3:
2668      relocation >>= 3;
2669      break;
2670
2671    case R_NDS32_LO12S2:
2672      relocation >>= 2;
2673      break;
2674
2675    case R_NDS32_LO12S1:
2676      relocation >>= 1;
2677      break;
2678
2679    case R_NDS32_LO12S0:
2680    default:
2681      relocation >>= 0;
2682      break;
2683    }
2684
2685  inplace_address = (bfd_byte *) data + reloc_entry->address;
2686
2687#define DOIT(x)						\
2688  x = ((x & ~reloc_entry->howto->dst_mask) |		\
2689  (((x & reloc_entry->howto->src_mask) +  relocation) &	\
2690  reloc_entry->howto->dst_mask))
2691
2692  switch (reloc_entry->howto->size)
2693    {
2694    case 1:
2695      {
2696	short x = bfd_getb16 (inplace_address);
2697
2698	DOIT (x);
2699	bfd_putb16 ((bfd_vma) x, inplace_address);
2700      }
2701      break;
2702    case 2:
2703      {
2704	unsigned long x = bfd_getb32 (inplace_address);
2705
2706	DOIT (x);
2707	bfd_putb32 ((bfd_vma) x, inplace_address);
2708      }
2709      break;
2710    default:
2711      BFD_ASSERT (0);
2712    }
2713
2714  if (output_bfd != (bfd *) NULL)
2715    reloc_entry->address += input_section->output_offset;
2716
2717  return ret;
2718}
2719
2720/* Handle the R_NDS32_SDA15 reloc.
2721   This reloc is used to compute the address of objects in the small data area
2722   and to perform loads and stores from that area.
2723   The lower 15 bits are sign extended and added to the register specified
2724   in the instruction, which is assumed to point to _SDA_BASE_.
2725
2726   Since the lower 15 bits offset is left-shifted 0, 1 or 2 bits depending on
2727   the access size, this must be taken care of.  */
2728
2729static bfd_reloc_status_type
2730nds32_elf_sda15_reloc (bfd *abfd ATTRIBUTE_UNUSED, arelent *reloc_entry,
2731		       asymbol *symbol, void *data ATTRIBUTE_UNUSED,
2732		       asection *input_section, bfd *output_bfd,
2733		       char **error_message ATTRIBUTE_UNUSED)
2734{
2735  /* This part is from bfd_elf_generic_reloc.  */
2736  if (output_bfd != (bfd *) NULL
2737      && (symbol->flags & BSF_SECTION_SYM) == 0
2738      && (!reloc_entry->howto->partial_inplace || reloc_entry->addend == 0))
2739    {
2740      reloc_entry->address += input_section->output_offset;
2741      return bfd_reloc_ok;
2742    }
2743
2744  if (output_bfd != NULL)
2745    {
2746      /* FIXME: See bfd_perform_relocation.  Is this right?  */
2747      return bfd_reloc_continue;
2748    }
2749
2750  /* FIXME: not sure what to do here yet.  But then again, the linker
2751     may never call us.  */
2752  abort ();
2753}
2754
2755/* nds32_elf_ignore_reloc is the special function for
2756   relocation types which don't need to be relocated
2757   like relaxation relocation types.
2758   This function simply return bfd_reloc_ok when it is
2759   invoked.  */
2760
2761static bfd_reloc_status_type
2762nds32_elf_ignore_reloc (bfd *abfd ATTRIBUTE_UNUSED, arelent *reloc_entry,
2763			asymbol *symbol ATTRIBUTE_UNUSED,
2764			void *data ATTRIBUTE_UNUSED, asection *input_section,
2765			bfd *output_bfd, char **error_message ATTRIBUTE_UNUSED)
2766{
2767  if (output_bfd != NULL)
2768    reloc_entry->address += input_section->output_offset;
2769
2770  return bfd_reloc_ok;
2771}
2772
2773
2774/* Map BFD reloc types to NDS32 ELF reloc types.  */
2775
2776struct nds32_reloc_map_entry
2777{
2778  bfd_reloc_code_real_type bfd_reloc_val;
2779  unsigned char elf_reloc_val;
2780};
2781
2782static const struct nds32_reloc_map_entry nds32_reloc_map[] =
2783{
2784  {BFD_RELOC_NONE, R_NDS32_NONE},
2785  {BFD_RELOC_16, R_NDS32_16_RELA},
2786  {BFD_RELOC_32, R_NDS32_32_RELA},
2787  {BFD_RELOC_NDS32_20, R_NDS32_20_RELA},
2788  {BFD_RELOC_NDS32_5, R_NDS32_5_RELA},
2789  {BFD_RELOC_NDS32_9_PCREL, R_NDS32_9_PCREL_RELA},
2790  {BFD_RELOC_NDS32_WORD_9_PCREL, R_NDS32_WORD_9_PCREL_RELA},
2791  {BFD_RELOC_NDS32_15_PCREL, R_NDS32_15_PCREL_RELA},
2792  {BFD_RELOC_NDS32_17_PCREL, R_NDS32_17_PCREL_RELA},
2793  {BFD_RELOC_NDS32_25_PCREL, R_NDS32_25_PCREL_RELA},
2794  {BFD_RELOC_NDS32_10_UPCREL, R_NDS32_10_UPCREL_RELA},
2795  {BFD_RELOC_NDS32_HI20, R_NDS32_HI20_RELA},
2796  {BFD_RELOC_NDS32_LO12S3, R_NDS32_LO12S3_RELA},
2797  {BFD_RELOC_NDS32_LO12S2, R_NDS32_LO12S2_RELA},
2798  {BFD_RELOC_NDS32_LO12S1, R_NDS32_LO12S1_RELA},
2799  {BFD_RELOC_NDS32_LO12S0, R_NDS32_LO12S0_RELA},
2800  {BFD_RELOC_NDS32_LO12S0_ORI, R_NDS32_LO12S0_ORI_RELA},
2801  {BFD_RELOC_NDS32_SDA15S3, R_NDS32_SDA15S3_RELA},
2802  {BFD_RELOC_NDS32_SDA15S2, R_NDS32_SDA15S2_RELA},
2803  {BFD_RELOC_NDS32_SDA15S1, R_NDS32_SDA15S1_RELA},
2804  {BFD_RELOC_NDS32_SDA15S0, R_NDS32_SDA15S0_RELA},
2805  {BFD_RELOC_VTABLE_INHERIT, R_NDS32_RELA_GNU_VTINHERIT},
2806  {BFD_RELOC_VTABLE_ENTRY, R_NDS32_RELA_GNU_VTENTRY},
2807
2808  {BFD_RELOC_NDS32_GOT20, R_NDS32_GOT20},
2809  {BFD_RELOC_NDS32_9_PLTREL, R_NDS32_9_PLTREL},
2810  {BFD_RELOC_NDS32_25_PLTREL, R_NDS32_25_PLTREL},
2811  {BFD_RELOC_NDS32_COPY, R_NDS32_COPY},
2812  {BFD_RELOC_NDS32_GLOB_DAT, R_NDS32_GLOB_DAT},
2813  {BFD_RELOC_NDS32_JMP_SLOT, R_NDS32_JMP_SLOT},
2814  {BFD_RELOC_NDS32_RELATIVE, R_NDS32_RELATIVE},
2815  {BFD_RELOC_NDS32_GOTOFF, R_NDS32_GOTOFF},
2816  {BFD_RELOC_NDS32_GOTPC20, R_NDS32_GOTPC20},
2817  {BFD_RELOC_NDS32_GOT_HI20, R_NDS32_GOT_HI20},
2818  {BFD_RELOC_NDS32_GOT_LO12, R_NDS32_GOT_LO12},
2819  {BFD_RELOC_NDS32_GOT_LO15, R_NDS32_GOT_LO15},
2820  {BFD_RELOC_NDS32_GOT_LO19, R_NDS32_GOT_LO19},
2821  {BFD_RELOC_NDS32_GOTPC_HI20, R_NDS32_GOTPC_HI20},
2822  {BFD_RELOC_NDS32_GOTPC_LO12, R_NDS32_GOTPC_LO12},
2823  {BFD_RELOC_NDS32_GOTOFF_HI20, R_NDS32_GOTOFF_HI20},
2824  {BFD_RELOC_NDS32_GOTOFF_LO12, R_NDS32_GOTOFF_LO12},
2825  {BFD_RELOC_NDS32_GOTOFF_LO15, R_NDS32_GOTOFF_LO15},
2826  {BFD_RELOC_NDS32_GOTOFF_LO19, R_NDS32_GOTOFF_LO19},
2827  {BFD_RELOC_NDS32_INSN16, R_NDS32_INSN16},
2828  {BFD_RELOC_NDS32_LABEL, R_NDS32_LABEL},
2829  {BFD_RELOC_NDS32_LONGCALL1, R_NDS32_LONGCALL1},
2830  {BFD_RELOC_NDS32_LONGCALL2, R_NDS32_LONGCALL2},
2831  {BFD_RELOC_NDS32_LONGCALL3, R_NDS32_LONGCALL3},
2832  {BFD_RELOC_NDS32_LONGCALL4, R_NDS32_LONGCALL4},
2833  {BFD_RELOC_NDS32_LONGCALL5, R_NDS32_LONGCALL5},
2834  {BFD_RELOC_NDS32_LONGCALL6, R_NDS32_LONGCALL6},
2835  {BFD_RELOC_NDS32_LONGJUMP1, R_NDS32_LONGJUMP1},
2836  {BFD_RELOC_NDS32_LONGJUMP2, R_NDS32_LONGJUMP2},
2837  {BFD_RELOC_NDS32_LONGJUMP3, R_NDS32_LONGJUMP3},
2838  {BFD_RELOC_NDS32_LONGJUMP4, R_NDS32_LONGJUMP4},
2839  {BFD_RELOC_NDS32_LONGJUMP5, R_NDS32_LONGJUMP5},
2840  {BFD_RELOC_NDS32_LONGJUMP6, R_NDS32_LONGJUMP6},
2841  {BFD_RELOC_NDS32_LONGJUMP7, R_NDS32_LONGJUMP7},
2842  {BFD_RELOC_NDS32_LOADSTORE, R_NDS32_LOADSTORE},
2843  {BFD_RELOC_NDS32_9_FIXED, R_NDS32_9_FIXED_RELA},
2844  {BFD_RELOC_NDS32_15_FIXED, R_NDS32_15_FIXED_RELA},
2845  {BFD_RELOC_NDS32_17_FIXED, R_NDS32_17_FIXED_RELA},
2846  {BFD_RELOC_NDS32_25_FIXED, R_NDS32_25_FIXED_RELA},
2847  {BFD_RELOC_NDS32_PLTREL_HI20, R_NDS32_PLTREL_HI20},
2848  {BFD_RELOC_NDS32_PLTREL_LO12, R_NDS32_PLTREL_LO12},
2849  {BFD_RELOC_NDS32_PLT_GOTREL_HI20, R_NDS32_PLT_GOTREL_HI20},
2850  {BFD_RELOC_NDS32_PLT_GOTREL_LO12, R_NDS32_PLT_GOTREL_LO12},
2851  {BFD_RELOC_NDS32_PLT_GOTREL_LO15, R_NDS32_PLT_GOTREL_LO15},
2852  {BFD_RELOC_NDS32_PLT_GOTREL_LO19, R_NDS32_PLT_GOTREL_LO19},
2853  {BFD_RELOC_NDS32_PLT_GOTREL_LO20, R_NDS32_PLT_GOTREL_LO20},
2854  {BFD_RELOC_NDS32_SDA12S2_DP, R_NDS32_SDA12S2_DP_RELA},
2855  {BFD_RELOC_NDS32_SDA12S2_SP, R_NDS32_SDA12S2_SP_RELA},
2856  {BFD_RELOC_NDS32_LO12S2_DP, R_NDS32_LO12S2_DP_RELA},
2857  {BFD_RELOC_NDS32_LO12S2_SP, R_NDS32_LO12S2_SP_RELA},
2858  {BFD_RELOC_NDS32_SDA16S3, R_NDS32_SDA16S3_RELA},
2859  {BFD_RELOC_NDS32_SDA17S2, R_NDS32_SDA17S2_RELA},
2860  {BFD_RELOC_NDS32_SDA18S1, R_NDS32_SDA18S1_RELA},
2861  {BFD_RELOC_NDS32_SDA19S0, R_NDS32_SDA19S0_RELA},
2862  {BFD_RELOC_NDS32_SDA_FP7U2_RELA, R_NDS32_SDA_FP7U2_RELA},
2863  {BFD_RELOC_NDS32_DWARF2_OP1, R_NDS32_DWARF2_OP1_RELA},
2864  {BFD_RELOC_NDS32_DWARF2_OP2, R_NDS32_DWARF2_OP2_RELA},
2865  {BFD_RELOC_NDS32_DWARF2_LEB, R_NDS32_DWARF2_LEB_RELA},
2866  {BFD_RELOC_NDS32_UPDATE_TA, R_NDS32_UPDATE_TA_RELA},
2867  {BFD_RELOC_NDS32_GOT_SUFF, R_NDS32_GOT_SUFF},
2868  {BFD_RELOC_NDS32_GOTOFF_SUFF, R_NDS32_GOTOFF_SUFF},
2869  {BFD_RELOC_NDS32_GOT15S2, R_NDS32_GOT15S2_RELA},
2870  {BFD_RELOC_NDS32_GOT17S2, R_NDS32_GOT17S2_RELA},
2871  {BFD_RELOC_NDS32_PTR, R_NDS32_PTR},
2872  {BFD_RELOC_NDS32_PTR_COUNT, R_NDS32_PTR_COUNT},
2873  {BFD_RELOC_NDS32_PLT_GOT_SUFF, R_NDS32_PLT_GOT_SUFF},
2874  {BFD_RELOC_NDS32_PTR_RESOLVED, R_NDS32_PTR_RESOLVED},
2875  {BFD_RELOC_NDS32_RELAX_ENTRY, R_NDS32_RELAX_ENTRY},
2876  {BFD_RELOC_NDS32_MULCALL_SUFF, R_NDS32_MULCALL_SUFF},
2877  {BFD_RELOC_NDS32_PLTBLOCK, R_NDS32_PLTBLOCK},
2878  {BFD_RELOC_NDS32_RELAX_REGION_BEGIN, R_NDS32_RELAX_REGION_BEGIN},
2879  {BFD_RELOC_NDS32_RELAX_REGION_END, R_NDS32_RELAX_REGION_END},
2880  {BFD_RELOC_NDS32_MINUEND, R_NDS32_MINUEND},
2881  {BFD_RELOC_NDS32_SUBTRAHEND, R_NDS32_SUBTRAHEND},
2882  {BFD_RELOC_NDS32_EMPTY, R_NDS32_EMPTY},
2883
2884  {BFD_RELOC_NDS32_DIFF8, R_NDS32_DIFF8},
2885  {BFD_RELOC_NDS32_DIFF16, R_NDS32_DIFF16},
2886  {BFD_RELOC_NDS32_DIFF32, R_NDS32_DIFF32},
2887  {BFD_RELOC_NDS32_DIFF_ULEB128, R_NDS32_DIFF_ULEB128},
2888  {BFD_RELOC_NDS32_25_ABS, R_NDS32_25_ABS_RELA},
2889  {BFD_RELOC_NDS32_DATA, R_NDS32_DATA},
2890  {BFD_RELOC_NDS32_TRAN, R_NDS32_TRAN},
2891  {BFD_RELOC_NDS32_17IFC_PCREL, R_NDS32_17IFC_PCREL_RELA},
2892  {BFD_RELOC_NDS32_10IFCU_PCREL, R_NDS32_10IFCU_PCREL_RELA},
2893  {BFD_RELOC_NDS32_TLS_LE_HI20, R_NDS32_TLS_LE_HI20},
2894  {BFD_RELOC_NDS32_TLS_LE_LO12, R_NDS32_TLS_LE_LO12},
2895  {BFD_RELOC_NDS32_TLS_LE_ADD, R_NDS32_TLS_LE_ADD},
2896  {BFD_RELOC_NDS32_TLS_LE_LS, R_NDS32_TLS_LE_LS},
2897  {BFD_RELOC_NDS32_TLS_IE_HI20, R_NDS32_TLS_IE_HI20},
2898  {BFD_RELOC_NDS32_TLS_IE_LO12S2, R_NDS32_TLS_IE_LO12S2},
2899  {BFD_RELOC_NDS32_TLS_TPOFF, R_NDS32_TLS_TPOFF},
2900  {BFD_RELOC_NDS32_TLS_LE_20, R_NDS32_TLS_LE_20},
2901  {BFD_RELOC_NDS32_TLS_LE_15S0, R_NDS32_TLS_LE_15S0},
2902  {BFD_RELOC_NDS32_TLS_LE_15S1, R_NDS32_TLS_LE_15S1},
2903  {BFD_RELOC_NDS32_TLS_LE_15S2, R_NDS32_TLS_LE_15S2},
2904};
2905
2906/* Patch tag.  */
2907
2908static reloc_howto_type *
2909bfd_elf32_bfd_reloc_name_lookup (bfd *abfd ATTRIBUTE_UNUSED,
2910				 const char *r_name)
2911{
2912  unsigned int i;
2913
2914  for (i = 0; i < ARRAY_SIZE (nds32_elf_howto_table); i++)
2915    if (nds32_elf_howto_table[i].name != NULL
2916	&& strcasecmp (nds32_elf_howto_table[i].name, r_name) == 0)
2917      return &nds32_elf_howto_table[i];
2918
2919  for (i = 0; i < ARRAY_SIZE (nds32_elf_relax_howto_table); i++)
2920    if (nds32_elf_relax_howto_table[i].name != NULL
2921	&& strcasecmp (nds32_elf_relax_howto_table[i].name, r_name) == 0)
2922      return &nds32_elf_relax_howto_table[i];
2923
2924  return NULL;
2925}
2926
2927static reloc_howto_type *
2928bfd_elf32_bfd_reloc_type_table_lookup (enum elf_nds32_reloc_type code)
2929{
2930  if (code < R_NDS32_RELAX_ENTRY)
2931    {
2932      BFD_ASSERT (code < ARRAY_SIZE (nds32_elf_howto_table));
2933      return &nds32_elf_howto_table[code];
2934    }
2935  else
2936    {
2937      BFD_ASSERT ((size_t) (code - R_NDS32_RELAX_ENTRY)
2938		  < ARRAY_SIZE (nds32_elf_relax_howto_table));
2939      return &nds32_elf_relax_howto_table[code - R_NDS32_RELAX_ENTRY];
2940    }
2941}
2942
2943static reloc_howto_type *
2944bfd_elf32_bfd_reloc_type_lookup (bfd *abfd ATTRIBUTE_UNUSED,
2945				 bfd_reloc_code_real_type code)
2946{
2947  unsigned int i;
2948
2949  for (i = 0; i < ARRAY_SIZE (nds32_reloc_map); i++)
2950    {
2951      if (nds32_reloc_map[i].bfd_reloc_val == code)
2952	return bfd_elf32_bfd_reloc_type_table_lookup
2953		 (nds32_reloc_map[i].elf_reloc_val);
2954    }
2955
2956  return NULL;
2957}
2958
2959/* Set the howto pointer for an NDS32 ELF reloc.  */
2960
2961static void
2962nds32_info_to_howto_rel (bfd *abfd ATTRIBUTE_UNUSED, arelent *cache_ptr,
2963			 Elf_Internal_Rela *dst)
2964{
2965  enum elf_nds32_reloc_type r_type;
2966
2967  r_type = ELF32_R_TYPE (dst->r_info);
2968  if (r_type > R_NDS32_GNU_VTENTRY)
2969    {
2970      _bfd_error_handler (_("%A: invalid NDS32 reloc number: %d"), abfd, r_type);
2971      r_type = 0;
2972    }
2973  cache_ptr->howto = bfd_elf32_bfd_reloc_type_table_lookup (r_type);
2974}
2975
2976static void
2977nds32_info_to_howto (bfd *abfd ATTRIBUTE_UNUSED, arelent *cache_ptr,
2978		     Elf_Internal_Rela *dst)
2979{
2980  BFD_ASSERT ((ELF32_R_TYPE (dst->r_info) == R_NDS32_NONE)
2981	      || ((ELF32_R_TYPE (dst->r_info) > R_NDS32_GNU_VTENTRY)
2982		  && (ELF32_R_TYPE (dst->r_info) < R_NDS32_max)));
2983  cache_ptr->howto = bfd_elf32_bfd_reloc_type_table_lookup (ELF32_R_TYPE (dst->r_info));
2984}
2985
2986/* Support for core dump NOTE sections.
2987   Reference to include/linux/elfcore.h in Linux.  */
2988
2989static bfd_boolean
2990nds32_elf_grok_prstatus (bfd *abfd, Elf_Internal_Note *note)
2991{
2992  int offset;
2993  size_t size;
2994
2995  switch (note->descsz)
2996    {
2997    case 0x114:
2998      /* Linux/NDS32 32-bit, ABI1 */
2999
3000      /* pr_cursig */
3001      elf_tdata (abfd)->core->signal = bfd_get_16 (abfd, note->descdata + 12);
3002
3003      /* pr_pid */
3004      elf_tdata (abfd)->core->pid = bfd_get_32 (abfd, note->descdata + 24);
3005
3006      /* pr_reg */
3007      offset = 72;
3008      size = 200;
3009      break;
3010
3011    case 0xfc:
3012      /* Linux/NDS32 32-bit */
3013
3014      /* pr_cursig */
3015      elf_tdata (abfd)->core->signal = bfd_get_16 (abfd, note->descdata + 12);
3016
3017      /* pr_pid */
3018      elf_tdata (abfd)->core->pid = bfd_get_32 (abfd, note->descdata + 24);
3019
3020      /* pr_reg */
3021      offset = 72;
3022      size = 176;
3023      break;
3024
3025    default:
3026      return FALSE;
3027    }
3028
3029  /* Make a ".reg" section.  */
3030  return _bfd_elfcore_make_pseudosection (abfd, ".reg",
3031					  size, note->descpos + offset);
3032}
3033
3034static bfd_boolean
3035nds32_elf_grok_psinfo (bfd *abfd, Elf_Internal_Note *note)
3036{
3037  switch (note->descsz)
3038    {
3039    case 124:
3040      /* Linux/NDS32 */
3041
3042      /* __kernel_uid_t, __kernel_gid_t are short on NDS32 platform.  */
3043      elf_tdata (abfd)->core->program =
3044	_bfd_elfcore_strndup (abfd, note->descdata + 28, 16);
3045      elf_tdata (abfd)->core->command =
3046	_bfd_elfcore_strndup (abfd, note->descdata + 44, 80);
3047
3048    default:
3049      return FALSE;
3050    }
3051
3052  /* Note that for some reason, a spurious space is tacked
3053     onto the end of the args in some (at least one anyway)
3054     implementations, so strip it off if it exists.  */
3055  {
3056    char *command = elf_tdata (abfd)->core->command;
3057    int n = strlen (command);
3058
3059    if (0 < n && command[n - 1] == ' ')
3060      command[n - 1] = '\0';
3061  }
3062
3063  return TRUE;
3064}
3065
3066/* Hook called by the linker routine which adds symbols from an object
3067   file.  We must handle the special NDS32 section numbers here.
3068   We also keep watching for whether we need to create the sdata special
3069   linker sections.  */
3070
3071static bfd_boolean
3072nds32_elf_add_symbol_hook (bfd *abfd,
3073			   struct bfd_link_info *info ATTRIBUTE_UNUSED,
3074			   Elf_Internal_Sym *sym,
3075			   const char **namep ATTRIBUTE_UNUSED,
3076			   flagword *flagsp ATTRIBUTE_UNUSED,
3077			   asection **secp, bfd_vma *valp)
3078{
3079  switch (sym->st_shndx)
3080    {
3081    case SHN_COMMON:
3082      /* Common symbols less than the GP size are automatically
3083	 treated as SHN_MIPS_SCOMMON symbols.  */
3084      if (sym->st_size > elf_gp_size (abfd)
3085	  || ELF_ST_TYPE (sym->st_info) == STT_TLS)
3086	break;
3087
3088      /* st_value is the alignemnt constraint.
3089	 That might be its actual size if it is an array or structure.  */
3090      switch (sym->st_value)
3091	{
3092	case 1:
3093	  *secp = bfd_make_section_old_way (abfd, ".scommon_b");
3094	  break;
3095	case 2:
3096	  *secp = bfd_make_section_old_way (abfd, ".scommon_h");
3097	  break;
3098	case 4:
3099	  *secp = bfd_make_section_old_way (abfd, ".scommon_w");
3100	  break;
3101	case 8:
3102	  *secp = bfd_make_section_old_way (abfd, ".scommon_d");
3103	  break;
3104	default:
3105	  return TRUE;
3106	}
3107
3108      (*secp)->flags |= SEC_IS_COMMON;
3109      *valp = sym->st_size;
3110      break;
3111    }
3112
3113  return TRUE;
3114}
3115
3116
3117/* This function can figure out the best location for a base register to access
3118   data relative to this base register
3119   INPUT:
3120   sda_d0: size of first DOUBLE WORD data section
3121   sda_w0: size of first WORD data section
3122   sda_h0: size of first HALF WORD data section
3123   sda_b : size of BYTE data section
3124   sda_hi: size of second HALF WORD data section
3125   sda_w1: size of second WORD data section
3126   sda_d1: size of second DOUBLE WORD data section
3127   OUTPUT:
3128   offset (always positive) from the beginning of sda_d0 if OK
3129   a negative error value if fail
3130   NOTE:
3131   these 7 sections have to be located back to back if exist
3132   a pass in 0 value for non-existing section   */
3133
3134/* Due to the interpretation of simm15 field of load/store depending on
3135   data accessing size, the organization of base register relative data shall
3136   like the following figure
3137   -------------------------------------------
3138   |  DOUBLE WORD sized data (range +/- 128K)
3139   -------------------------------------------
3140   |  WORD sized data (range +/- 64K)
3141   -------------------------------------------
3142   |  HALF WORD sized data (range +/- 32K)
3143   -------------------------------------------
3144   |  BYTE sized data (range +/- 16K)
3145   -------------------------------------------
3146   |  HALF WORD sized data (range +/- 32K)
3147   -------------------------------------------
3148   |  WORD sized data (range +/- 64K)
3149   -------------------------------------------
3150   |  DOUBLE WORD sized data (range +/- 128K)
3151   -------------------------------------------
3152   Its base register shall be set to access these data freely.  */
3153
3154/* We have to figure out the SDA_BASE value, so that we can adjust the
3155   symbol value correctly.  We look up the symbol _SDA_BASE_ in the output
3156   BFD.  If we can't find it, we're stuck.  We cache it in the ELF
3157   target data.  We don't need to adjust the symbol value for an
3158   external symbol if we are producing relocatable output.  */
3159
3160static asection *sda_rela_sec = NULL;
3161
3162#define SDA_SECTION_NUM 10
3163
3164static bfd_reloc_status_type
3165nds32_elf_final_sda_base (bfd *output_bfd, struct bfd_link_info *info,
3166			  bfd_vma *psb, bfd_boolean add_symbol)
3167{
3168  int relax_fp_as_gp;
3169  struct elf_nds32_link_hash_table *table;
3170  struct bfd_link_hash_entry *h, *h2;
3171  long unsigned int total = 0;
3172
3173  h = bfd_link_hash_lookup (info->hash, "_SDA_BASE_", FALSE, FALSE, TRUE);
3174  if (!h || (h->type != bfd_link_hash_defined && h->type != bfd_link_hash_defweak))
3175    {
3176      asection *first = NULL, *final = NULL, *temp;
3177      bfd_vma sda_base;
3178      /* The first section must be 4-byte aligned to promise _SDA_BASE_ being
3179	 4 byte-aligned.  Therefore, it has to set the first section ".data"
3180	 4 byte-aligned.  */
3181      static const char sec_name[SDA_SECTION_NUM][10] =
3182	{
3183	  ".data", ".got", ".sdata_d", ".sdata_w", ".sdata_h", ".sdata_b",
3184	  ".sbss_b", ".sbss_h", ".sbss_w", ".sbss_d"
3185	};
3186      size_t i = 0;
3187
3188      if (output_bfd->sections == NULL)
3189	{
3190	  *psb = elf_gp (output_bfd);
3191	  return bfd_reloc_ok;
3192	}
3193
3194      /* Get the first and final section.  */
3195      while (i < sizeof (sec_name) / sizeof (sec_name [0]))
3196	{
3197	  temp = bfd_get_section_by_name (output_bfd, sec_name[i]);
3198	  if (temp && !first && (temp->size != 0 || temp->rawsize != 0))
3199	    first = temp;
3200	  if (temp && (temp->size != 0 || temp->rawsize != 0))
3201	    final = temp;
3202
3203	  /* Summarize the sections in order to check if joining .bss.  */
3204	  if (temp && temp->size != 0)
3205	    total += temp->size;
3206	  else if (temp && temp->rawsize != 0)
3207	    total += temp->rawsize;
3208
3209	  i++;
3210	}
3211
3212      /* Check .bss size.  */
3213      temp = bfd_get_section_by_name (output_bfd, ".bss");
3214      if (temp)
3215	{
3216	  if (temp->size != 0)
3217	    total += temp->size;
3218	  else if (temp->rawsize != 0)
3219	    total += temp->rawsize;
3220
3221	  if (total < 0x80000)
3222	    {
3223	      if (!first && (temp->size != 0 || temp->rawsize != 0))
3224		first = temp;
3225	      if ((temp->size != 0 || temp->rawsize != 0))
3226		final = temp;
3227	    }
3228	}
3229
3230      if (first && final)
3231	{
3232	  /* The middle of data region.  */
3233	  sda_base = final->vma / 2 + final->rawsize / 2 + first->vma / 2;
3234
3235	  /* Find the section sda_base located.  */
3236	  i = 0;
3237	  while (i < sizeof (sec_name) / sizeof (sec_name [0]))
3238	    {
3239	      final = bfd_get_section_by_name (output_bfd, sec_name[i]);
3240	      if (final && (final->size != 0 || final->rawsize != 0)
3241		  && sda_base >= final->vma)
3242		{
3243		  first = final;
3244		  i++;
3245		}
3246	      else
3247		break;
3248	    }
3249	}
3250      else
3251	{
3252	  /* There is not any data section in output bfd, and set _SDA_BASE_ in
3253	     first output section.  */
3254	  first = output_bfd->sections;
3255	  while (first && first->size == 0 && first->rawsize == 0)
3256	    first = first->next;
3257	  if (!first)
3258	    {
3259	      *psb = elf_gp (output_bfd);
3260	      return bfd_reloc_ok;
3261	    }
3262	  sda_base = first->vma + first->rawsize;
3263	}
3264
3265      sda_base -= first->vma;
3266      sda_base = sda_base & (~7);
3267
3268      if (!_bfd_generic_link_add_one_symbol
3269	     (info, output_bfd, "_SDA_BASE_", BSF_GLOBAL | BSF_WEAK, first,
3270	      (bfd_vma) sda_base, (const char *) NULL, FALSE,
3271	      get_elf_backend_data (output_bfd)->collect, &h))
3272	return FALSE;
3273
3274      sda_rela_sec = first;
3275
3276      table = nds32_elf_hash_table (info);
3277      relax_fp_as_gp = table->relax_fp_as_gp;
3278      if (relax_fp_as_gp)
3279	{
3280	  h2 = bfd_link_hash_lookup (info->hash, FP_BASE_NAME,
3281				     FALSE, FALSE, FALSE);
3282	  /* Define a weak FP_BASE_NAME here to prevent the undefined symbol.
3283	     And set FP equal to SDA_BASE to do relaxation for
3284	     la $fp, _FP_BASE_.  */
3285	  if (!_bfd_generic_link_add_one_symbol
3286		 (info, output_bfd, FP_BASE_NAME, BSF_GLOBAL | BSF_WEAK,
3287		  first, (bfd_vma) sda_base, (const char *) NULL,
3288		  FALSE, get_elf_backend_data (output_bfd)->collect, &h2))
3289	    return FALSE;
3290	}
3291    }
3292
3293  if (add_symbol == TRUE)
3294    {
3295      if (h)
3296	{
3297	  /* Now set gp.  */
3298	  elf_gp (output_bfd) = (h->u.def.value
3299				 + h->u.def.section->output_section->vma
3300				 + h->u.def.section->output_offset);
3301	}
3302      else
3303	{
3304	  (*_bfd_error_handler) (_("error: Can't find symbol: _SDA_BASE_."));
3305	  return bfd_reloc_dangerous;
3306	}
3307    }
3308
3309  *psb = h->u.def.value + h->u.def.section->output_section->vma
3310	 + h->u.def.section->output_offset;
3311  return bfd_reloc_ok;
3312}
3313
3314
3315/* Return size of a PLT entry.  */
3316#define elf_nds32_sizeof_plt(info) PLT_ENTRY_SIZE
3317
3318
3319/* Create an entry in an nds32 ELF linker hash table.  */
3320
3321static struct bfd_hash_entry *
3322nds32_elf_link_hash_newfunc (struct bfd_hash_entry *entry,
3323			     struct bfd_hash_table *table,
3324			     const char *string)
3325{
3326  struct elf_nds32_link_hash_entry *ret;
3327
3328  ret = (struct elf_nds32_link_hash_entry *) entry;
3329
3330  /* Allocate the structure if it has not already been allocated by a
3331     subclass.  */
3332  if (ret == NULL)
3333    ret = (struct elf_nds32_link_hash_entry *)
3334       bfd_hash_allocate (table, sizeof (struct elf_nds32_link_hash_entry));
3335
3336  if (ret == NULL)
3337    return (struct bfd_hash_entry *) ret;
3338
3339  /* Call the allocation method of the superclass.  */
3340  ret = (struct elf_nds32_link_hash_entry *)
3341    _bfd_elf_link_hash_newfunc ((struct bfd_hash_entry *) ret, table, string);
3342
3343  if (ret != NULL)
3344    {
3345      struct elf_nds32_link_hash_entry *eh;
3346
3347      eh = (struct elf_nds32_link_hash_entry *) ret;
3348      eh->dyn_relocs = NULL;
3349      eh->tls_type = GOT_UNKNOWN;
3350    }
3351
3352  return (struct bfd_hash_entry *) ret;
3353}
3354
3355/* Create an nds32 ELF linker hash table.  */
3356
3357static struct bfd_link_hash_table *
3358nds32_elf_link_hash_table_create (bfd *abfd)
3359{
3360  struct elf_nds32_link_hash_table *ret;
3361
3362  bfd_size_type amt = sizeof (struct elf_nds32_link_hash_table);
3363
3364  ret = (struct elf_nds32_link_hash_table *) bfd_zmalloc (amt);
3365  if (ret == NULL)
3366    return NULL;
3367
3368  /* patch tag.  */
3369  if (!_bfd_elf_link_hash_table_init (&ret->root, abfd,
3370				      nds32_elf_link_hash_newfunc,
3371				      sizeof (struct elf_nds32_link_hash_entry),
3372				      NDS32_ELF_DATA))
3373    {
3374      free (ret);
3375      return NULL;
3376    }
3377
3378  ret->sgot = NULL;
3379  ret->sgotplt = NULL;
3380  ret->srelgot = NULL;
3381  ret->splt = NULL;
3382  ret->srelplt = NULL;
3383  ret->sdynbss = NULL;
3384  ret->srelbss = NULL;
3385  ret->sym_ld_script = NULL;
3386  ret->ex9_export_file = NULL;
3387  ret->ex9_import_file = NULL;
3388
3389  return &ret->root.root;
3390}
3391
3392/* Create .got, .gotplt, and .rela.got sections in DYNOBJ, and set up
3393   shortcuts to them in our hash table.  */
3394
3395static bfd_boolean
3396create_got_section (bfd *dynobj, struct bfd_link_info *info)
3397{
3398  struct elf_nds32_link_hash_table *htab;
3399
3400  if (!_bfd_elf_create_got_section (dynobj, info))
3401    return FALSE;
3402
3403  htab = nds32_elf_hash_table (info);
3404  htab->sgot = bfd_get_section_by_name (dynobj, ".got");
3405  htab->sgotplt = bfd_get_section_by_name (dynobj, ".got.plt");
3406  if (!htab->sgot || !htab->sgotplt)
3407    abort ();
3408
3409  /* _bfd_elf_create_got_section will create it for us.  */
3410  htab->srelgot = bfd_get_section_by_name (dynobj, ".rela.got");
3411  if (htab->srelgot == NULL
3412      || !bfd_set_section_flags (dynobj, htab->srelgot,
3413				 (SEC_ALLOC | SEC_LOAD | SEC_HAS_CONTENTS
3414				  | SEC_IN_MEMORY | SEC_LINKER_CREATED
3415				  | SEC_READONLY))
3416      || !bfd_set_section_alignment (dynobj, htab->srelgot, 2))
3417    return FALSE;
3418
3419  return TRUE;
3420}
3421
3422/* Create dynamic sections when linking against a dynamic object.  */
3423
3424static bfd_boolean
3425nds32_elf_create_dynamic_sections (bfd *abfd, struct bfd_link_info *info)
3426{
3427  struct elf_nds32_link_hash_table *htab;
3428  flagword flags, pltflags;
3429  register asection *s;
3430  const struct elf_backend_data *bed;
3431  int ptralign = 2;		/* 32-bit  */
3432
3433  bed = get_elf_backend_data (abfd);
3434
3435  htab = nds32_elf_hash_table (info);
3436
3437  /* We need to create .plt, .rel[a].plt, .got, .got.plt, .dynbss, and
3438     .rel[a].bss sections.  */
3439
3440  flags = (SEC_ALLOC | SEC_LOAD | SEC_HAS_CONTENTS | SEC_IN_MEMORY
3441	   | SEC_LINKER_CREATED);
3442
3443  pltflags = flags;
3444  pltflags |= SEC_CODE;
3445  if (bed->plt_not_loaded)
3446    pltflags &= ~(SEC_LOAD | SEC_HAS_CONTENTS);
3447  if (bed->plt_readonly)
3448    pltflags |= SEC_READONLY;
3449
3450  s = bfd_make_section (abfd, ".plt");
3451  htab->splt = s;
3452  if (s == NULL
3453      || !bfd_set_section_flags (abfd, s, pltflags)
3454      || !bfd_set_section_alignment (abfd, s, bed->plt_alignment))
3455    return FALSE;
3456
3457  if (bed->want_plt_sym)
3458    {
3459      /* Define the symbol _PROCEDURE_LINKAGE_TABLE_ at the start of the
3460	 .plt section.  */
3461      struct bfd_link_hash_entry *bh = NULL;
3462      struct elf_link_hash_entry *h;
3463
3464      if (!(_bfd_generic_link_add_one_symbol
3465	    (info, abfd, "_PROCEDURE_LINKAGE_TABLE_", BSF_GLOBAL, s,
3466	     (bfd_vma) 0, (const char *) NULL, FALSE,
3467	     get_elf_backend_data (abfd)->collect, &bh)))
3468	return FALSE;
3469
3470      h = (struct elf_link_hash_entry *) bh;
3471      h->def_regular = 1;
3472      h->type = STT_OBJECT;
3473
3474      if (info->shared && !bfd_elf_link_record_dynamic_symbol (info, h))
3475	return FALSE;
3476    }
3477
3478  s = bfd_make_section (abfd,
3479			bed->default_use_rela_p ? ".rela.plt" : ".rel.plt");
3480  htab->srelplt = s;
3481  if (s == NULL
3482      || !bfd_set_section_flags (abfd, s, flags | SEC_READONLY)
3483      || !bfd_set_section_alignment (abfd, s, ptralign))
3484    return FALSE;
3485
3486  if (htab->sgot == NULL && !create_got_section (abfd, info))
3487    return FALSE;
3488
3489  {
3490    const char *secname;
3491    char *relname;
3492    flagword secflags;
3493    asection *sec;
3494
3495    for (sec = abfd->sections; sec; sec = sec->next)
3496      {
3497	secflags = bfd_get_section_flags (abfd, sec);
3498	if ((secflags & (SEC_DATA | SEC_LINKER_CREATED))
3499	    || ((secflags & SEC_HAS_CONTENTS) != SEC_HAS_CONTENTS))
3500	  continue;
3501	secname = bfd_get_section_name (abfd, sec);
3502	relname = (char *) bfd_malloc ((bfd_size_type) strlen (secname) + 6);
3503	strcpy (relname, ".rela");
3504	strcat (relname, secname);
3505	if (bfd_get_section_by_name (abfd, secname))
3506	  continue;
3507	s = bfd_make_section (abfd, relname);
3508	if (s == NULL
3509	    || !bfd_set_section_flags (abfd, s, flags | SEC_READONLY)
3510	    || !bfd_set_section_alignment (abfd, s, ptralign))
3511	  return FALSE;
3512      }
3513  }
3514
3515  if (bed->want_dynbss)
3516    {
3517      /* The .dynbss section is a place to put symbols which are defined
3518	 by dynamic objects, are referenced by regular objects, and are
3519	 not functions.  We must allocate space for them in the process
3520	 image and use a R_*_COPY reloc to tell the dynamic linker to
3521	 initialize them at run time.  The linker script puts the .dynbss
3522	 section into the .bss section of the final image.  */
3523      s = bfd_make_section (abfd, ".dynbss");
3524      htab->sdynbss = s;
3525      if (s == NULL
3526	  || !bfd_set_section_flags (abfd, s, SEC_ALLOC | SEC_LINKER_CREATED))
3527	return FALSE;
3528      /* The .rel[a].bss section holds copy relocs.  This section is not
3529	 normally needed.  We need to create it here, though, so that the
3530	 linker will map it to an output section.  We can't just create it
3531	 only if we need it, because we will not know whether we need it
3532	 until we have seen all the input files, and the first time the
3533	 main linker code calls BFD after examining all the input files
3534	 (size_dynamic_sections) the input sections have already been
3535	 mapped to the output sections.  If the section turns out not to
3536	 be needed, we can discard it later.  We will never need this
3537	 section when generating a shared object, since they do not use
3538	 copy relocs.  */
3539      if (!info->shared)
3540	{
3541	  s = bfd_make_section (abfd, (bed->default_use_rela_p
3542				       ? ".rela.bss" : ".rel.bss"));
3543	  htab->srelbss = s;
3544	  if (s == NULL
3545	      || !bfd_set_section_flags (abfd, s, flags | SEC_READONLY)
3546	      || !bfd_set_section_alignment (abfd, s, ptralign))
3547	    return FALSE;
3548	}
3549    }
3550
3551  return TRUE;
3552}
3553
3554/* Copy the extra info we tack onto an elf_link_hash_entry.  */
3555static void
3556nds32_elf_copy_indirect_symbol (struct bfd_link_info *info,
3557				struct elf_link_hash_entry *dir,
3558				struct elf_link_hash_entry *ind)
3559{
3560  struct elf_nds32_link_hash_entry *edir, *eind;
3561
3562  edir = (struct elf_nds32_link_hash_entry *) dir;
3563  eind = (struct elf_nds32_link_hash_entry *) ind;
3564
3565  if (eind->dyn_relocs != NULL)
3566    {
3567      if (edir->dyn_relocs != NULL)
3568	{
3569	  struct elf_nds32_dyn_relocs **pp;
3570	  struct elf_nds32_dyn_relocs *p;
3571
3572	  if (ind->root.type == bfd_link_hash_indirect)
3573	    abort ();
3574
3575	  /* Add reloc counts against the weak sym to the strong sym
3576	     list.  Merge any entries against the same section.  */
3577	  for (pp = &eind->dyn_relocs; (p = *pp) != NULL;)
3578	    {
3579	      struct elf_nds32_dyn_relocs *q;
3580
3581	      for (q = edir->dyn_relocs; q != NULL; q = q->next)
3582		if (q->sec == p->sec)
3583		  {
3584		    q->pc_count += p->pc_count;
3585		    q->count += p->count;
3586		    *pp = p->next;
3587		    break;
3588		  }
3589	      if (q == NULL)
3590		pp = &p->next;
3591	    }
3592	  *pp = edir->dyn_relocs;
3593	}
3594
3595      edir->dyn_relocs = eind->dyn_relocs;
3596      eind->dyn_relocs = NULL;
3597    }
3598
3599  _bfd_elf_link_hash_copy_indirect (info, dir, ind);
3600}
3601
3602
3603/* Adjust a symbol defined by a dynamic object and referenced by a
3604   regular object.  The current definition is in some section of the
3605   dynamic object, but we're not including those sections.  We have to
3606   change the definition to something the rest of the link can
3607   understand.  */
3608
3609static bfd_boolean
3610nds32_elf_adjust_dynamic_symbol (struct bfd_link_info *info,
3611				 struct elf_link_hash_entry *h)
3612{
3613  struct elf_nds32_link_hash_table *htab;
3614  struct elf_nds32_link_hash_entry *eh;
3615  struct elf_nds32_dyn_relocs *p;
3616  bfd *dynobj;
3617  asection *s;
3618  unsigned int power_of_two;
3619
3620  dynobj = elf_hash_table (info)->dynobj;
3621
3622  /* Make sure we know what is going on here.  */
3623  BFD_ASSERT (dynobj != NULL
3624	      && (h->needs_plt
3625		  || h->u.weakdef != NULL
3626		  || (h->def_dynamic && h->ref_regular && !h->def_regular)));
3627
3628
3629  /* If this is a function, put it in the procedure linkage table.  We
3630     will fill in the contents of the procedure linkage table later,
3631     when we know the address of the .got section.  */
3632  if (h->type == STT_FUNC || h->needs_plt)
3633    {
3634      if (!info->shared
3635	  && !h->def_dynamic
3636	  && !h->ref_dynamic
3637	  && h->root.type != bfd_link_hash_undefweak
3638	  && h->root.type != bfd_link_hash_undefined)
3639	{
3640	  /* This case can occur if we saw a PLT reloc in an input
3641	     file, but the symbol was never referred to by a dynamic
3642	     object.  In such a case, we don't actually need to build
3643	     a procedure linkage table, and we can just do a PCREL
3644	     reloc instead.  */
3645	  h->plt.offset = (bfd_vma) - 1;
3646	  h->needs_plt = 0;
3647	}
3648
3649      return TRUE;
3650    }
3651  else
3652    h->plt.offset = (bfd_vma) - 1;
3653
3654  /* If this is a weak symbol, and there is a real definition, the
3655     processor independent code will have arranged for us to see the
3656     real definition first, and we can just use the same value.  */
3657  if (h->u.weakdef != NULL)
3658    {
3659      BFD_ASSERT (h->u.weakdef->root.type == bfd_link_hash_defined
3660		  || h->u.weakdef->root.type == bfd_link_hash_defweak);
3661      h->root.u.def.section = h->u.weakdef->root.u.def.section;
3662      h->root.u.def.value = h->u.weakdef->root.u.def.value;
3663      return TRUE;
3664    }
3665
3666  /* This is a reference to a symbol defined by a dynamic object which
3667     is not a function.  */
3668
3669  /* If we are creating a shared library, we must presume that the
3670     only references to the symbol are via the global offset table.
3671     For such cases we need not do anything here; the relocations will
3672     be handled correctly by relocate_section.  */
3673  if (info->shared)
3674    return TRUE;
3675
3676  /* If there are no references to this symbol that do not use the
3677     GOT, we don't need to generate a copy reloc.  */
3678  if (!h->non_got_ref)
3679    return TRUE;
3680
3681  /* If -z nocopyreloc was given, we won't generate them either.  */
3682  if (info->nocopyreloc)
3683    {
3684      h->non_got_ref = 0;
3685      return TRUE;
3686    }
3687
3688  eh = (struct elf_nds32_link_hash_entry *) h;
3689  for (p = eh->dyn_relocs; p != NULL; p = p->next)
3690    {
3691      s = p->sec->output_section;
3692      if (s != NULL && (s->flags & (SEC_READONLY | SEC_HAS_CONTENTS)) != 0)
3693	break;
3694    }
3695
3696  /* If we didn't find any dynamic relocs in sections which needs the
3697     copy reloc, then we'll be keeping the dynamic relocs and avoiding
3698     the copy reloc.  */
3699  if (p == NULL)
3700    {
3701      h->non_got_ref = 0;
3702      return TRUE;
3703    }
3704
3705  /* We must allocate the symbol in our .dynbss section, which will
3706     become part of the .bss section of the executable.  There will be
3707     an entry for this symbol in the .dynsym section.  The dynamic
3708     object will contain position independent code, so all references
3709     from the dynamic object to this symbol will go through the global
3710     offset table.  The dynamic linker will use the .dynsym entry to
3711     determine the address it must put in the global offset table, so
3712     both the dynamic object and the regular object will refer to the
3713     same memory location for the variable.  */
3714
3715  htab = nds32_elf_hash_table (info);
3716  s = htab->sdynbss;
3717  BFD_ASSERT (s != NULL);
3718
3719  /* We must generate a R_NDS32_COPY reloc to tell the dynamic linker
3720     to copy the initial value out of the dynamic object and into the
3721     runtime process image.  We need to remember the offset into the
3722     .rela.bss section we are going to use.  */
3723  if ((h->root.u.def.section->flags & SEC_ALLOC) != 0)
3724    {
3725      asection *srel;
3726
3727      srel = htab->srelbss;
3728      BFD_ASSERT (srel != NULL);
3729      srel->size += sizeof (Elf32_External_Rela);
3730      h->needs_copy = 1;
3731    }
3732
3733  /* We need to figure out the alignment required for this symbol.  I
3734     have no idea how ELF linkers handle this.  */
3735  power_of_two = bfd_log2 (h->size);
3736  if (power_of_two > 3)
3737    power_of_two = 3;
3738
3739  /* Apply the required alignment.  */
3740  s->size = BFD_ALIGN (s->size, (bfd_size_type) (1 << power_of_two));
3741  if (power_of_two > bfd_get_section_alignment (dynobj, s))
3742    {
3743      if (!bfd_set_section_alignment (dynobj, s, power_of_two))
3744	return FALSE;
3745    }
3746
3747  /* Define the symbol as being at this point in the section.  */
3748  h->root.u.def.section = s;
3749  h->root.u.def.value = s->size;
3750
3751  /* Increment the section size to make room for the symbol.  */
3752  s->size += h->size;
3753
3754  return TRUE;
3755}
3756
3757/* Allocate space in .plt, .got and associated reloc sections for
3758   dynamic relocs.  */
3759
3760static bfd_boolean
3761allocate_dynrelocs (struct elf_link_hash_entry *h, void *inf)
3762{
3763  struct bfd_link_info *info;
3764  struct elf_nds32_link_hash_table *htab;
3765  struct elf_nds32_link_hash_entry *eh;
3766  struct elf_nds32_dyn_relocs *p;
3767
3768  if (h->root.type == bfd_link_hash_indirect)
3769    return TRUE;
3770
3771  if (h->root.type == bfd_link_hash_warning)
3772    /* When warning symbols are created, they **replace** the "real"
3773       entry in the hash table, thus we never get to see the real
3774       symbol in a hash traversal.  So look at it now.  */
3775    h = (struct elf_link_hash_entry *) h->root.u.i.link;
3776
3777  info = (struct bfd_link_info *) inf;
3778  htab = nds32_elf_hash_table (info);
3779
3780  eh = (struct elf_nds32_link_hash_entry *) h;
3781
3782  if (htab->root.dynamic_sections_created && h->plt.refcount > 0)
3783    {
3784      /* Make sure this symbol is output as a dynamic symbol.
3785	 Undefined weak syms won't yet be marked as dynamic.  */
3786      if (h->dynindx == -1 && !h->forced_local)
3787	{
3788	  if (!bfd_elf_link_record_dynamic_symbol (info, h))
3789	    return FALSE;
3790	}
3791
3792      if (WILL_CALL_FINISH_DYNAMIC_SYMBOL (1, info->shared, h))
3793	{
3794	  asection *s = htab->splt;
3795
3796	  /* If this is the first .plt entry, make room for the special
3797	     first entry.  */
3798	  if (s->size == 0)
3799	    s->size += PLT_ENTRY_SIZE;
3800
3801	  h->plt.offset = s->size;
3802
3803	  /* If this symbol is not defined in a regular file, and we are
3804	     not generating a shared library, then set the symbol to this
3805	     location in the .plt.  This is required to make function
3806	     pointers compare as equal between the normal executable and
3807	     the shared library.  */
3808	  if (!info->shared && !h->def_regular)
3809	    {
3810	      h->root.u.def.section = s;
3811	      h->root.u.def.value = h->plt.offset;
3812	    }
3813
3814	  /* Make room for this entry.  */
3815	  s->size += PLT_ENTRY_SIZE;
3816
3817	  /* We also need to make an entry in the .got.plt section, which
3818	     will be placed in the .got section by the linker script.  */
3819	  htab->sgotplt->size += 4;
3820
3821	  /* We also need to make an entry in the .rel.plt section.  */
3822	  htab->srelplt->size += sizeof (Elf32_External_Rela);
3823	}
3824      else
3825	{
3826	  h->plt.offset = (bfd_vma) - 1;
3827	  h->needs_plt = 0;
3828	}
3829    }
3830  else
3831    {
3832      h->plt.offset = (bfd_vma) - 1;
3833      h->needs_plt = 0;
3834    }
3835
3836  if (h->got.refcount > 0)
3837    {
3838      asection *s;
3839      bfd_boolean dyn;
3840      int tls_type = elf32_nds32_hash_entry (h)->tls_type;
3841
3842      /* Make sure this symbol is output as a dynamic symbol.
3843	 Undefined weak syms won't yet be marked as dynamic.  */
3844      if (h->dynindx == -1 && !h->forced_local)
3845	{
3846	  if (!bfd_elf_link_record_dynamic_symbol (info, h))
3847	    return FALSE;
3848	}
3849
3850      s = htab->sgot;
3851      h->got.offset = s->size;
3852
3853      if (tls_type == GOT_UNKNOWN)
3854	abort ();
3855      else if (tls_type == GOT_NORMAL
3856	       || tls_type == GOT_TLS_IE)
3857	/* Need a GOT slot.  */
3858	s->size += 4;
3859
3860      dyn = htab->root.dynamic_sections_created;
3861      if (WILL_CALL_FINISH_DYNAMIC_SYMBOL (dyn, info->shared, h))
3862	htab->srelgot->size += sizeof (Elf32_External_Rela);
3863    }
3864  else
3865    h->got.offset = (bfd_vma) - 1;
3866
3867  if (eh->dyn_relocs == NULL)
3868    return TRUE;
3869
3870  /* In the shared -Bsymbolic case, discard space allocated for
3871     dynamic pc-relative relocs against symbols which turn out to be
3872     defined in regular objects.  For the normal shared case, discard
3873     space for pc-relative relocs that have become local due to symbol
3874     visibility changes.  */
3875
3876  if (info->shared)
3877    {
3878      if (h->def_regular && (h->forced_local || info->symbolic))
3879	{
3880	  struct elf_nds32_dyn_relocs **pp;
3881
3882	  for (pp = &eh->dyn_relocs; (p = *pp) != NULL;)
3883	    {
3884	      p->count -= p->pc_count;
3885	      p->pc_count = 0;
3886	      if (p->count == 0)
3887		*pp = p->next;
3888	      else
3889		pp = &p->next;
3890	    }
3891	}
3892    }
3893  else
3894    {
3895      /* For the non-shared case, discard space for relocs against
3896	 symbols which turn out to need copy relocs or are not dynamic.  */
3897
3898      if (!h->non_got_ref
3899	  && ((h->def_dynamic
3900	       && !h->def_regular)
3901	      || (htab->root.dynamic_sections_created
3902		  && (h->root.type == bfd_link_hash_undefweak
3903		      || h->root.type == bfd_link_hash_undefined))))
3904	{
3905	  /* Make sure this symbol is output as a dynamic symbol.
3906	     Undefined weak syms won't yet be marked as dynamic.  */
3907	  if (h->dynindx == -1 && !h->forced_local)
3908	    {
3909	      if (!bfd_elf_link_record_dynamic_symbol (info, h))
3910		return FALSE;
3911	    }
3912
3913	  /* If that succeeded, we know we'll be keeping all the
3914	     relocs.  */
3915	  if (h->dynindx != -1)
3916	    goto keep;
3917	}
3918
3919      eh->dyn_relocs = NULL;
3920
3921    keep:;
3922    }
3923
3924  /* Finally, allocate space.  */
3925  for (p = eh->dyn_relocs; p != NULL; p = p->next)
3926    {
3927      asection *sreloc = elf_section_data (p->sec)->sreloc;
3928      sreloc->size += p->count * sizeof (Elf32_External_Rela);
3929    }
3930
3931  return TRUE;
3932}
3933
3934/* Find any dynamic relocs that apply to read-only sections.  */
3935
3936static bfd_boolean
3937readonly_dynrelocs (struct elf_link_hash_entry *h, void *inf)
3938{
3939  struct elf_nds32_link_hash_entry *eh;
3940  struct elf_nds32_dyn_relocs *p;
3941
3942  if (h->root.type == bfd_link_hash_warning)
3943    h = (struct elf_link_hash_entry *) h->root.u.i.link;
3944
3945  eh = (struct elf_nds32_link_hash_entry *) h;
3946  for (p = eh->dyn_relocs; p != NULL; p = p->next)
3947    {
3948      asection *s = p->sec->output_section;
3949
3950      if (s != NULL && (s->flags & SEC_READONLY) != 0)
3951	{
3952	  struct bfd_link_info *info = (struct bfd_link_info *) inf;
3953
3954	  info->flags |= DF_TEXTREL;
3955
3956	  /* Not an error, just cut short the traversal.  */
3957	  return FALSE;
3958	}
3959    }
3960  return TRUE;
3961}
3962
3963/* Set the sizes of the dynamic sections.  */
3964
3965static bfd_boolean
3966nds32_elf_size_dynamic_sections (bfd *output_bfd ATTRIBUTE_UNUSED,
3967				 struct bfd_link_info *info)
3968{
3969  struct elf_nds32_link_hash_table *htab;
3970  bfd *dynobj;
3971  asection *s;
3972  bfd_boolean relocs;
3973  bfd *ibfd;
3974
3975  htab = nds32_elf_hash_table (info);
3976  dynobj = htab->root.dynobj;
3977  BFD_ASSERT (dynobj != NULL);
3978
3979  if (htab->root.dynamic_sections_created)
3980    {
3981      /* Set the contents of the .interp section to the interpreter.  */
3982      if (!info->shared)
3983	{
3984	  s = bfd_get_section_by_name (dynobj, ".interp");
3985	  BFD_ASSERT (s != NULL);
3986	  s->size = sizeof ELF_DYNAMIC_INTERPRETER;
3987	  s->contents = (unsigned char *) ELF_DYNAMIC_INTERPRETER;
3988	}
3989    }
3990
3991  /* Set up .got offsets for local syms, and space for local dynamic
3992     relocs.  */
3993  for (ibfd = info->input_bfds; ibfd != NULL; ibfd = ibfd->link.next)
3994    {
3995      bfd_signed_vma *local_got;
3996      bfd_signed_vma *end_local_got;
3997      bfd_size_type locsymcount;
3998      Elf_Internal_Shdr *symtab_hdr;
3999      asection *srel;
4000
4001      if (bfd_get_flavour (ibfd) != bfd_target_elf_flavour)
4002	continue;
4003
4004      for (s = ibfd->sections; s != NULL; s = s->next)
4005	{
4006	  struct elf_nds32_dyn_relocs *p;
4007
4008	  for (p = ((struct elf_nds32_dyn_relocs *)
4009		    elf_section_data (s)->local_dynrel);
4010	       p != NULL; p = p->next)
4011	    {
4012	      if (!bfd_is_abs_section (p->sec)
4013		  && bfd_is_abs_section (p->sec->output_section))
4014		{
4015		  /* Input section has been discarded, either because
4016		     it is a copy of a linkonce section or due to
4017		     linker script /DISCARD/, so we'll be discarding
4018		     the relocs too.  */
4019		}
4020	      else if (p->count != 0)
4021		{
4022		  srel = elf_section_data (p->sec)->sreloc;
4023		  srel->size += p->count * sizeof (Elf32_External_Rela);
4024		  if ((p->sec->output_section->flags & SEC_READONLY) != 0)
4025		    info->flags |= DF_TEXTREL;
4026		}
4027	    }
4028	}
4029
4030      local_got = elf_local_got_refcounts (ibfd);
4031      if (!local_got)
4032	continue;
4033
4034      symtab_hdr = &elf_tdata (ibfd)->symtab_hdr;
4035      locsymcount = symtab_hdr->sh_info;
4036      end_local_got = local_got + locsymcount;
4037      s = htab->sgot;
4038      srel = htab->srelgot;
4039      for (; local_got < end_local_got; ++local_got)
4040	{
4041	  if (*local_got > 0)
4042	    {
4043	      *local_got = s->size;
4044	      s->size += 4;
4045	      if (info->shared)
4046		srel->size += sizeof (Elf32_External_Rela);
4047	    }
4048	  else
4049	    *local_got = (bfd_vma) - 1;
4050	}
4051    }
4052
4053  /* Allocate global sym .plt and .got entries, and space for global
4054     sym dynamic relocs.  */
4055  elf_link_hash_traverse (&htab->root, allocate_dynrelocs, (void *) info);
4056
4057  /* We now have determined the sizes of the various dynamic sections.
4058     Allocate memory for them.  */
4059  relocs = FALSE;
4060  for (s = dynobj->sections; s != NULL; s = s->next)
4061    {
4062      if ((s->flags & SEC_LINKER_CREATED) == 0)
4063	continue;
4064
4065      if (s == htab->splt)
4066	{
4067	  /* Strip this section if we don't need it; see the
4068	     comment below.  */
4069	}
4070      else if (s == htab->sgot)
4071	{
4072	  got_size += s->size;
4073	}
4074      else if (s == htab->sgotplt)
4075	{
4076	  got_size += s->size;
4077	}
4078      else if (strncmp (bfd_get_section_name (dynobj, s), ".rela", 5) == 0)
4079	{
4080	  if (s->size != 0 && s != htab->srelplt)
4081	    relocs = TRUE;
4082
4083	  /* We use the reloc_count field as a counter if we need
4084	     to copy relocs into the output file.  */
4085	  s->reloc_count = 0;
4086	}
4087      else
4088	{
4089	  /* It's not one of our sections, so don't allocate space.  */
4090	  continue;
4091	}
4092
4093      if (s->size == 0)
4094	{
4095	  /* If we don't need this section, strip it from the
4096	     output file.  This is mostly to handle .rela.bss and
4097	     .rela.plt.  We must create both sections in
4098	     create_dynamic_sections, because they must be created
4099	     before the linker maps input sections to output
4100	     sections.  The linker does that before
4101	     adjust_dynamic_symbol is called, and it is that
4102	     function which decides whether anything needs to go
4103	     into these sections.  */
4104	  s->flags |= SEC_EXCLUDE;
4105	  continue;
4106	}
4107
4108      /* Allocate memory for the section contents.  We use bfd_zalloc
4109	 here in case unused entries are not reclaimed before the
4110	 section's contents are written out.  This should not happen,
4111	 but this way if it does, we get a R_NDS32_NONE reloc instead
4112	 of garbage.  */
4113      s->contents = (bfd_byte *) bfd_zalloc (dynobj, s->size);
4114      if (s->contents == NULL)
4115	return FALSE;
4116    }
4117
4118
4119  if (htab->root.dynamic_sections_created)
4120    {
4121      /* Add some entries to the .dynamic section.  We fill in the
4122	 values later, in nds32_elf_finish_dynamic_sections, but we
4123	 must add the entries now so that we get the correct size for
4124	 the .dynamic section.  The DT_DEBUG entry is filled in by the
4125	 dynamic linker and used by the debugger.  */
4126#define add_dynamic_entry(TAG, VAL) \
4127  _bfd_elf_add_dynamic_entry (info, TAG, VAL)
4128
4129      if (!info->shared)
4130	{
4131	  if (!add_dynamic_entry (DT_DEBUG, 0))
4132	    return FALSE;
4133	}
4134
4135      if (htab->splt->size != 0)
4136	{
4137	  if (!add_dynamic_entry (DT_PLTGOT, 0)
4138	      || !add_dynamic_entry (DT_PLTRELSZ, 0)
4139	      || !add_dynamic_entry (DT_PLTREL, DT_RELA)
4140	      || !add_dynamic_entry (DT_JMPREL, 0))
4141	    return FALSE;
4142	}
4143
4144      if (relocs)
4145	{
4146	  if (!add_dynamic_entry (DT_RELA, 0)
4147	      || !add_dynamic_entry (DT_RELASZ, 0)
4148	      || !add_dynamic_entry (DT_RELAENT, sizeof (Elf32_External_Rela)))
4149	    return FALSE;
4150
4151	  /* If any dynamic relocs apply to a read-only section,
4152	     then we need a DT_TEXTREL entry.  */
4153	  if ((info->flags & DF_TEXTREL) == 0)
4154	    elf_link_hash_traverse (&htab->root, readonly_dynrelocs,
4155				    (void *) info);
4156
4157	  if ((info->flags & DF_TEXTREL) != 0)
4158	    {
4159	      if (!add_dynamic_entry (DT_TEXTREL, 0))
4160		return FALSE;
4161	    }
4162	}
4163    }
4164#undef add_dynamic_entry
4165
4166  return TRUE;
4167}
4168
4169static bfd_reloc_status_type
4170nds32_relocate_contents (reloc_howto_type *howto, bfd *input_bfd,
4171			 bfd_vma relocation, bfd_byte *location)
4172{
4173  int size;
4174  bfd_vma x = 0;
4175  bfd_reloc_status_type flag;
4176  unsigned int rightshift = howto->rightshift;
4177  unsigned int bitpos = howto->bitpos;
4178
4179  /* If the size is negative, negate RELOCATION.  This isn't very
4180     general.  */
4181  if (howto->size < 0)
4182    relocation = -relocation;
4183
4184  /* Get the value we are going to relocate.  */
4185  size = bfd_get_reloc_size (howto);
4186  switch (size)
4187    {
4188    default:
4189    case 0:
4190    case 1:
4191    case 8:
4192      abort ();
4193      break;
4194    case 2:
4195      x = bfd_getb16 (location);
4196      break;
4197    case 4:
4198      x = bfd_getb32 (location);
4199      break;
4200    }
4201
4202  /* Check for overflow.  FIXME: We may drop bits during the addition
4203     which we don't check for.  We must either check at every single
4204     operation, which would be tedious, or we must do the computations
4205     in a type larger than bfd_vma, which would be inefficient.  */
4206  flag = bfd_reloc_ok;
4207  if (howto->complain_on_overflow != complain_overflow_dont)
4208    {
4209      bfd_vma addrmask, fieldmask, signmask, ss;
4210      bfd_vma a, b, sum;
4211
4212      /* Get the values to be added together.  For signed and unsigned
4213	 relocations, we assume that all values should be truncated to
4214	 the size of an address.  For bitfields, all the bits matter.
4215	 See also bfd_check_overflow.  */
4216      fieldmask = N_ONES (howto->bitsize);
4217      signmask = ~fieldmask;
4218      addrmask = N_ONES (bfd_arch_bits_per_address (input_bfd)) | fieldmask;
4219      a = (relocation & addrmask) >> rightshift;
4220      b = (x & howto->src_mask & addrmask) >> bitpos;
4221
4222      switch (howto->complain_on_overflow)
4223	{
4224	case complain_overflow_signed:
4225	  /* If any sign bits are set, all sign bits must be set.
4226	     That is, A must be a valid negative address after
4227	     shifting.  */
4228	  signmask = ~(fieldmask >> 1);
4229	  /* Fall through.  */
4230
4231	case complain_overflow_bitfield:
4232	  /* Much like the signed check, but for a field one bit
4233	     wider.  We allow a bitfield to represent numbers in the
4234	     range -2**n to 2**n-1, where n is the number of bits in the
4235	     field.  Note that when bfd_vma is 32 bits, a 32-bit reloc
4236	     can't overflow, which is exactly what we want.  */
4237	  ss = a & signmask;
4238	  if (ss != 0 && ss != ((addrmask >> rightshift) & signmask))
4239	    flag = bfd_reloc_overflow;
4240
4241	  /* We only need this next bit of code if the sign bit of B
4242	     is below the sign bit of A.  This would only happen if
4243	     SRC_MASK had fewer bits than BITSIZE.  Note that if
4244	     SRC_MASK has more bits than BITSIZE, we can get into
4245	     trouble; we would need to verify that B is in range, as
4246	     we do for A above.  */
4247	  ss = ((~howto->src_mask) >> 1) & howto->src_mask;
4248	  ss >>= bitpos;
4249
4250	  /* Set all the bits above the sign bit.  */
4251	  b = (b ^ ss) - ss;
4252
4253	  /* Now we can do the addition.  */
4254	  sum = a + b;
4255
4256	  /* See if the result has the correct sign.  Bits above the
4257	     sign bit are junk now; ignore them.  If the sum is
4258	     positive, make sure we did not have all negative inputs;
4259	     if the sum is negative, make sure we did not have all
4260	     positive inputs.  The test below looks only at the sign
4261	     bits, and it really just
4262	     SIGN (A) == SIGN (B) && SIGN (A) != SIGN (SUM)
4263
4264	     We mask with addrmask here to explicitly allow an address
4265	     wrap-around.  The Linux kernel relies on it, and it is
4266	     the only way to write assembler code which can run when
4267	     loaded at a location 0x80000000 away from the location at
4268	     which it is linked.  */
4269	  if (((~(a ^ b)) & (a ^ sum)) & signmask & addrmask)
4270	    flag = bfd_reloc_overflow;
4271
4272	  break;
4273
4274	case complain_overflow_unsigned:
4275	  /* Checking for an unsigned overflow is relatively easy:
4276	     trim the addresses and add, and trim the result as well.
4277	     Overflow is normally indicated when the result does not
4278	     fit in the field.  However, we also need to consider the
4279	     case when, e.g., fieldmask is 0x7fffffff or smaller, an
4280	     input is 0x80000000, and bfd_vma is only 32 bits; then we
4281	     will get sum == 0, but there is an overflow, since the
4282	     inputs did not fit in the field.  Instead of doing a
4283	     separate test, we can check for this by or-ing in the
4284	     operands when testing for the sum overflowing its final
4285	     field.  */
4286	  sum = (a + b) & addrmask;
4287	  if ((a | b | sum) & signmask)
4288	    flag = bfd_reloc_overflow;
4289	  break;
4290
4291	default:
4292	  abort ();
4293	}
4294    }
4295
4296  /* Put RELOCATION in the right bits.  */
4297  relocation >>= (bfd_vma) rightshift;
4298  relocation <<= (bfd_vma) bitpos;
4299
4300  /* Add RELOCATION to the right bits of X.  */
4301  /* FIXME : 090616
4302     Because the relaxation may generate duplicate relocation at one address,
4303     an addition to immediate in the instruction may cause the relocation added
4304     several times.
4305     This bug should be fixed in assembler, but a check is also needed here.  */
4306  if (howto->partial_inplace)
4307    x = ((x & ~howto->dst_mask)
4308	 | (((x & howto->src_mask) + relocation) & howto->dst_mask));
4309  else
4310    x = ((x & ~howto->dst_mask) | ((relocation) & howto->dst_mask));
4311
4312
4313  /* Put the relocated value back in the object file.  */
4314  switch (size)
4315    {
4316    default:
4317    case 0:
4318    case 1:
4319    case 8:
4320      abort ();
4321      break;
4322    case 2:
4323      bfd_putb16 (x, location);
4324      break;
4325    case 4:
4326      bfd_putb32 (x, location);
4327      break;
4328    }
4329
4330  return flag;
4331}
4332
4333static bfd_reloc_status_type
4334nds32_elf_final_link_relocate (reloc_howto_type *howto, bfd *input_bfd,
4335			       asection *input_section, bfd_byte *contents,
4336			       bfd_vma address, bfd_vma value, bfd_vma addend)
4337{
4338  bfd_vma relocation;
4339
4340  /* Sanity check the address.  */
4341  if (address > bfd_get_section_limit (input_bfd, input_section))
4342    return bfd_reloc_outofrange;
4343
4344  /* This function assumes that we are dealing with a basic relocation
4345     against a symbol.  We want to compute the value of the symbol to
4346     relocate to.  This is just VALUE, the value of the symbol, plus
4347     ADDEND, any addend associated with the reloc.  */
4348  relocation = value + addend;
4349
4350  /* If the relocation is PC relative, we want to set RELOCATION to
4351     the distance between the symbol (currently in RELOCATION) and the
4352     location we are relocating.  Some targets (e.g., i386-aout)
4353     arrange for the contents of the section to be the negative of the
4354     offset of the location within the section; for such targets
4355     pcrel_offset is FALSE.  Other targets (e.g., m88kbcs or ELF)
4356     simply leave the contents of the section as zero; for such
4357     targets pcrel_offset is TRUE.  If pcrel_offset is FALSE we do not
4358     need to subtract out the offset of the location within the
4359     section (which is just ADDRESS).  */
4360  if (howto->pc_relative)
4361    {
4362      relocation -= (input_section->output_section->vma
4363		     + input_section->output_offset);
4364      if (howto->pcrel_offset)
4365	relocation -= address;
4366    }
4367
4368  return nds32_relocate_contents (howto, input_bfd, relocation,
4369				  contents + address);
4370}
4371
4372static bfd_boolean
4373nds32_elf_output_symbol_hook (struct bfd_link_info *info,
4374			      const char *name,
4375			      Elf_Internal_Sym *elfsym ATTRIBUTE_UNUSED,
4376			      asection *input_sec,
4377			      struct elf_link_hash_entry *h ATTRIBUTE_UNUSED)
4378{
4379  const char *source;
4380  FILE *sym_ld_script = NULL;
4381  struct elf_nds32_link_hash_table *table;
4382
4383  table = nds32_elf_hash_table (info);
4384  sym_ld_script = table->sym_ld_script;
4385  if (!sym_ld_script)
4386    return TRUE;
4387
4388  if (!h || !name || *name == '\0')
4389    return TRUE;
4390
4391  if (input_sec->flags & SEC_EXCLUDE)
4392    return TRUE;
4393
4394  if (!check_start_export_sym)
4395    {
4396      fprintf (sym_ld_script, "SECTIONS\n{\n");
4397      check_start_export_sym = 1;
4398    }
4399
4400  if (h->root.type == bfd_link_hash_defined
4401      || h->root.type == bfd_link_hash_defweak)
4402    {
4403      if (!h->root.u.def.section->output_section)
4404	return TRUE;
4405
4406      if (bfd_is_const_section (input_sec))
4407	source = input_sec->name;
4408      else
4409	source = input_sec->owner->filename;
4410
4411      fprintf (sym_ld_script, "\t%s = 0x%08lx;\t /* %s */\n",
4412	       h->root.root.string,
4413	       (long) (h->root.u.def.value
4414		+ h->root.u.def.section->output_section->vma
4415		+ h->root.u.def.section->output_offset), source);
4416    }
4417
4418  return TRUE;
4419}
4420
4421/* Relocate an NDS32/D ELF section.
4422   There is some attempt to make this function usable for many architectures,
4423   both for RELA and REL type relocs, if only to serve as a learning tool.
4424
4425   The RELOCATE_SECTION function is called by the new ELF backend linker
4426   to handle the relocations for a section.
4427
4428   The relocs are always passed as Rela structures; if the section
4429   actually uses Rel structures, the r_addend field will always be
4430   zero.
4431
4432   This function is responsible for adjust the section contents as
4433   necessary, and (if using Rela relocs and generating a
4434   relocatable output file) adjusting the reloc addend as
4435   necessary.
4436
4437   This function does not have to worry about setting the reloc
4438   address or the reloc symbol index.
4439
4440   LOCAL_SYMS is a pointer to the swapped in local symbols.
4441
4442   LOCAL_SECTIONS is an array giving the section in the input file
4443   corresponding to the st_shndx field of each local symbol.
4444
4445   The global hash table entry for the global symbols can be found
4446   via elf_sym_hashes (input_bfd).
4447
4448   When generating relocatable output, this function must handle
4449   STB_LOCAL/STT_SECTION symbols specially.  The output symbol is
4450   going to be the section symbol corresponding to the output
4451   section, which means that the addend must be adjusted
4452   accordingly.  */
4453
4454static bfd_vma
4455dtpoff_base (struct bfd_link_info *info)
4456{
4457  /* If tls_sec is NULL, we should have signalled an error already.  */
4458  if (elf_hash_table (info)->tls_sec == NULL)
4459    return 0;
4460  return elf_hash_table (info)->tls_sec->vma;
4461}
4462
4463static bfd_boolean
4464nds32_elf_relocate_section (bfd *                  output_bfd ATTRIBUTE_UNUSED,
4465			    struct bfd_link_info * info,
4466			    bfd *                  input_bfd,
4467			    asection *             input_section,
4468			    bfd_byte *             contents,
4469			    Elf_Internal_Rela *    relocs,
4470			    Elf_Internal_Sym *     local_syms,
4471			    asection **            local_sections)
4472{
4473  Elf_Internal_Shdr *symtab_hdr;
4474  struct elf_link_hash_entry **sym_hashes;
4475  Elf_Internal_Rela *rel, *relend;
4476  bfd_boolean ret = TRUE;		/* Assume success.  */
4477  int align = 0;
4478  bfd_reloc_status_type r;
4479  const char *errmsg = NULL;
4480  bfd_vma gp;
4481  struct elf_nds32_link_hash_table *htab;
4482  bfd *dynobj;
4483  bfd_vma *local_got_offsets;
4484  asection *sgot, *splt, *sreloc;
4485  bfd_vma high_address;
4486  struct elf_nds32_link_hash_table *table;
4487  int eliminate_gc_relocs;
4488  bfd_vma fpbase_addr;
4489
4490  symtab_hdr = &elf_tdata (input_bfd)->symtab_hdr;
4491  sym_hashes = elf_sym_hashes (input_bfd);
4492  htab = nds32_elf_hash_table (info);
4493  high_address = bfd_get_section_limit (input_bfd, input_section);
4494
4495  dynobj = htab->root.dynobj;
4496  local_got_offsets = elf_local_got_offsets (input_bfd);
4497
4498  sgot = htab->sgot;
4499  splt = htab->splt;
4500  sreloc = NULL;
4501
4502  rel = relocs;
4503  relend = relocs + input_section->reloc_count;
4504
4505  table = nds32_elf_hash_table (info);
4506  eliminate_gc_relocs = table->eliminate_gc_relocs;
4507  /* By this time, we can adjust the value of _SDA_BASE_.  */
4508  if ((!info->relocatable))
4509    {
4510      is_SDA_BASE_set = 1;
4511      r = nds32_elf_final_sda_base (output_bfd, info, &gp, TRUE);
4512      if (r != bfd_reloc_ok)
4513	return FALSE;
4514    }
4515
4516  if (table->target_optimize & NDS32_RELAX_JUMP_IFC_ON)
4517    if (!nds32_elf_ifc_reloc ())
4518      (*_bfd_error_handler) (_("error: IFC relocation error."));
4519
4520 /* Relocation for .ex9.itable.  */
4521  if (table->target_optimize & NDS32_RELAX_EX9_ON
4522      || (table->ex9_import_file && table->update_ex9_table))
4523    nds32_elf_ex9_reloc_jmp (info);
4524
4525  /* Use gp as fp to prevent truncated fit.  Because in relaxation time
4526     the fp value is set as gp, and it has be reverted for instruction
4527     setting fp.  */
4528  fpbase_addr = elf_gp (output_bfd);
4529
4530  for (rel = relocs; rel < relend; rel++)
4531    {
4532      enum elf_nds32_reloc_type r_type;
4533      reloc_howto_type *howto = NULL;
4534      unsigned long r_symndx;
4535      struct elf_link_hash_entry *h = NULL;
4536      Elf_Internal_Sym *sym = NULL;
4537      asection *sec;
4538      bfd_vma relocation;
4539
4540      /* We can't modify r_addend here as elf_link_input_bfd has an assert to
4541	 ensure it's zero (we use REL relocs, not RELA).  Therefore this
4542	 should be assigning zero to `addend', but for clarity we use
4543	 `r_addend'.  */
4544
4545      bfd_vma addend = rel->r_addend;
4546      bfd_vma offset = rel->r_offset;
4547
4548      r_type = ELF32_R_TYPE (rel->r_info);
4549      if (r_type >= R_NDS32_max)
4550	{
4551	  (*_bfd_error_handler) (_("%B: error: unknown relocation type %d."),
4552				 input_bfd, r_type);
4553	  bfd_set_error (bfd_error_bad_value);
4554	  ret = FALSE;
4555	  continue;
4556	}
4557
4558      if (r_type == R_NDS32_GNU_VTENTRY
4559	  || r_type == R_NDS32_GNU_VTINHERIT
4560	  || r_type == R_NDS32_NONE
4561	  || r_type == R_NDS32_RELA_GNU_VTENTRY
4562	  || r_type == R_NDS32_RELA_GNU_VTINHERIT
4563	  || (r_type >= R_NDS32_INSN16 && r_type <= R_NDS32_25_FIXED_RELA)
4564	  || r_type == R_NDS32_DATA
4565	  || r_type == R_NDS32_TRAN
4566	  || (r_type >= R_NDS32_LONGCALL4 && r_type <= R_NDS32_LONGJUMP6))
4567	continue;
4568
4569      /* If we enter the fp-as-gp region.  Resolve the address of best fp-base.  */
4570      if (ELF32_R_TYPE (rel->r_info) == R_NDS32_RELAX_REGION_BEGIN
4571	  && (rel->r_addend & R_NDS32_RELAX_REGION_OMIT_FP_FLAG))
4572	{
4573	  int dist;
4574
4575	  /* Distance to relocation of best fp-base is encoded in R_SYM.  */
4576	  dist =  rel->r_addend >> 16;
4577	  fpbase_addr = calculate_memory_address (input_bfd, rel + dist,
4578						  local_syms, symtab_hdr);
4579	}
4580      else if (ELF32_R_TYPE (rel->r_info) == R_NDS32_RELAX_REGION_END
4581	       && (rel->r_addend & R_NDS32_RELAX_REGION_OMIT_FP_FLAG))
4582	{
4583	  fpbase_addr = elf_gp (output_bfd);
4584	}
4585
4586      if (((r_type >= R_NDS32_DWARF2_OP1_RELA
4587	    && r_type <= R_NDS32_DWARF2_LEB_RELA)
4588	   || r_type >= R_NDS32_RELAX_ENTRY) && !info->relocatable)
4589	continue;
4590
4591      howto = bfd_elf32_bfd_reloc_type_table_lookup (r_type);
4592      r_symndx = ELF32_R_SYM (rel->r_info);
4593
4594      /* This is a final link.  */
4595      sym = NULL;
4596      sec = NULL;
4597      h = NULL;
4598
4599      if (r_symndx < symtab_hdr->sh_info)
4600	{
4601	  /* Local symbol.  */
4602	  sym = local_syms + r_symndx;
4603	  sec = local_sections[r_symndx];
4604
4605	  relocation = _bfd_elf_rela_local_sym (output_bfd, sym, &sec, rel);
4606	  addend = rel->r_addend;
4607	}
4608      else
4609	{
4610	  /* External symbol.  */
4611	  bfd_boolean warned, ignored, unresolved_reloc;
4612	  int symndx = r_symndx - symtab_hdr->sh_info;
4613
4614	  RELOC_FOR_GLOBAL_SYMBOL (info, input_bfd, input_section, rel,
4615				   r_symndx, symtab_hdr, sym_hashes, h, sec,
4616				   relocation, unresolved_reloc, warned,
4617				   ignored);
4618
4619	  /* la $fp, _FP_BASE_ is per-function (region).
4620	     Handle it specially.  */
4621	  switch ((int) r_type)
4622	    {
4623	    case R_NDS32_SDA19S0_RELA:
4624	    case R_NDS32_SDA15S0_RELA:
4625	    case R_NDS32_20_RELA:
4626	      if (strcmp (elf_sym_hashes (input_bfd)[symndx]->root.root.string,
4627			  FP_BASE_NAME) == 0)
4628		{
4629		  relocation = fpbase_addr;
4630		  break;
4631		}
4632	    }
4633
4634	}
4635
4636      if (info->relocatable)
4637	{
4638	  /* This is a relocatable link.  We don't have to change
4639	     anything, unless the reloc is against a section symbol,
4640	     in which case we have to adjust according to where the
4641	     section symbol winds up in the output section.  */
4642	  if (sym != NULL && ELF_ST_TYPE (sym->st_info) == STT_SECTION)
4643	    rel->r_addend += sec->output_offset + sym->st_value;
4644
4645	  continue;
4646	}
4647
4648      /* Sanity check the address.  */
4649      if (offset > high_address)
4650	{
4651	  r = bfd_reloc_outofrange;
4652	  goto check_reloc;
4653	}
4654
4655      if ((r_type >= R_NDS32_DWARF2_OP1_RELA
4656	   && r_type <= R_NDS32_DWARF2_LEB_RELA)
4657	  || r_type >= R_NDS32_RELAX_ENTRY)
4658	continue;
4659
4660      switch ((int) r_type)
4661	{
4662	case R_NDS32_GOTOFF:
4663	  /* Relocation is relative to the start of the global offset
4664	     table (for ld24 rx, #uimm24), e.g. access at label+addend
4665
4666	     ld24 rx. #label@GOTOFF + addend
4667	     sub  rx, r12.  */
4668	case R_NDS32_GOTOFF_HI20:
4669	case R_NDS32_GOTOFF_LO12:
4670	case R_NDS32_GOTOFF_LO15:
4671	case R_NDS32_GOTOFF_LO19:
4672	  BFD_ASSERT (sgot != NULL);
4673
4674	  relocation -= elf_gp (output_bfd);
4675	  break;
4676
4677	case R_NDS32_9_PLTREL:
4678	case R_NDS32_25_PLTREL:
4679	  /* Relocation is to the entry for this symbol in the
4680	     procedure linkage table.  */
4681
4682	  /* The native assembler will generate a 25_PLTREL reloc
4683	     for a local symbol if you assemble a call from one
4684	     section to another when using -K pic.  */
4685	  if (h == NULL)
4686	    break;
4687
4688	  if (h->forced_local)
4689	    break;
4690
4691	  /* We didn't make a PLT entry for this symbol.  This
4692	     happens when statically linking PIC code, or when
4693	     using -Bsymbolic.  */
4694	  if (h->plt.offset == (bfd_vma) - 1)
4695	    break;
4696
4697	  relocation = (splt->output_section->vma
4698			+ splt->output_offset + h->plt.offset);
4699	  break;
4700
4701	case R_NDS32_PLT_GOTREL_HI20:
4702	case R_NDS32_PLT_GOTREL_LO12:
4703	case R_NDS32_PLT_GOTREL_LO15:
4704	case R_NDS32_PLT_GOTREL_LO19:
4705	case R_NDS32_PLT_GOTREL_LO20:
4706	  if (h == NULL || h->forced_local || h->plt.offset == (bfd_vma) - 1)
4707	    {
4708	      /* We didn't make a PLT entry for this symbol.  This
4709		 happens when statically linking PIC code, or when
4710		 using -Bsymbolic.  */
4711	      relocation -= elf_gp (output_bfd);
4712	      break;
4713	    }
4714
4715	  relocation = (splt->output_section->vma
4716			+ splt->output_offset + h->plt.offset);
4717
4718	  relocation -= elf_gp (output_bfd);
4719	  break;
4720
4721	case R_NDS32_PLTREL_HI20:
4722	case R_NDS32_PLTREL_LO12:
4723
4724	  /* Relocation is to the entry for this symbol in the
4725	     procedure linkage table.  */
4726
4727	  /* The native assembler will generate a 25_PLTREL reloc
4728	     for a local symbol if you assemble a call from one
4729	     section to another when using -K pic.  */
4730	  if (h == NULL)
4731	    break;
4732
4733	  if (h->forced_local)
4734	    break;
4735
4736	  if (h->plt.offset == (bfd_vma) - 1)
4737	    /* We didn't make a PLT entry for this symbol.  This
4738	       happens when statically linking PIC code, or when
4739	       using -Bsymbolic.  */
4740	    break;
4741
4742	  if (splt == NULL)
4743	    break;
4744
4745	  relocation = (splt->output_section->vma
4746			+ splt->output_offset
4747			+ h->plt.offset + 4)
4748		       - (input_section->output_section->vma
4749			  + input_section->output_offset
4750			  + rel->r_offset);
4751
4752	  break;
4753
4754	case R_NDS32_GOTPC20:
4755	  /* .got(_GLOBAL_OFFSET_TABLE_) - pc relocation
4756	     ld24 rx,#_GLOBAL_OFFSET_TABLE_  */
4757	  relocation = elf_gp (output_bfd);
4758	  break;
4759
4760	case R_NDS32_GOTPC_HI20:
4761	case R_NDS32_GOTPC_LO12:
4762	    {
4763	      /* .got(_GLOBAL_OFFSET_TABLE_) - pc relocation
4764		 bl .+4
4765		 seth rx,#high(_GLOBAL_OFFSET_TABLE_)
4766		 or3 rx,rx,#low(_GLOBAL_OFFSET_TABLE_ +4)
4767		 or
4768		 bl .+4
4769		 seth rx,#shigh(_GLOBAL_OFFSET_TABLE_)
4770		 add3 rx,rx,#low(_GLOBAL_OFFSET_TABLE_ +4)
4771	       */
4772	      relocation = elf_gp (output_bfd);
4773	      relocation -= (input_section->output_section->vma
4774			     + input_section->output_offset + rel->r_offset);
4775	      break;
4776	    }
4777
4778	case R_NDS32_GOT20:
4779	  /* Fall through.  */
4780	case R_NDS32_GOT_HI20:
4781	case R_NDS32_GOT_LO12:
4782	case R_NDS32_GOT_LO15:
4783	case R_NDS32_GOT_LO19:
4784	  /* Relocation is to the entry for this symbol in the global
4785	     offset table.  */
4786	  BFD_ASSERT (sgot != NULL);
4787
4788	  if (h != NULL)
4789	    {
4790	      bfd_boolean dyn;
4791	      bfd_vma off;
4792
4793	      off = h->got.offset;
4794	      BFD_ASSERT (off != (bfd_vma) - 1);
4795	      dyn = htab->root.dynamic_sections_created;
4796	      if (!WILL_CALL_FINISH_DYNAMIC_SYMBOL (dyn, info->shared, h)
4797		  || (info->shared
4798		      && (info->symbolic
4799			  || h->dynindx == -1
4800			  || h->forced_local) && h->def_regular))
4801		{
4802		  /* This is actually a static link, or it is a
4803		     -Bsymbolic link and the symbol is defined
4804		     locally, or the symbol was forced to be local
4805		     because of a version file.  We must initialize
4806		     this entry in the global offset table.  Since the
4807		     offset must always be a multiple of 4, we use the
4808		     least significant bit to record whether we have
4809		     initialized it already.
4810
4811		     When doing a dynamic link, we create a .rela.got
4812		     relocation entry to initialize the value.  This
4813		     is done in the finish_dynamic_symbol routine.  */
4814		  if ((off & 1) != 0)
4815		    off &= ~1;
4816		  else
4817		    {
4818		      bfd_put_32 (output_bfd, relocation, sgot->contents + off);
4819		      h->got.offset |= 1;
4820		    }
4821		}
4822	      relocation = sgot->output_section->vma + sgot->output_offset + off
4823			   - elf_gp (output_bfd);
4824	    }
4825	  else
4826	    {
4827	      bfd_vma off;
4828	      bfd_byte *loc;
4829
4830	      BFD_ASSERT (local_got_offsets != NULL
4831			  && local_got_offsets[r_symndx] != (bfd_vma) - 1);
4832
4833	      off = local_got_offsets[r_symndx];
4834
4835	      /* The offset must always be a multiple of 4.  We use
4836		 the least significant bit to record whether we have
4837		 already processed this entry.  */
4838	      if ((off & 1) != 0)
4839		off &= ~1;
4840	      else
4841		{
4842		  bfd_put_32 (output_bfd, relocation, sgot->contents + off);
4843
4844		  if (info->shared)
4845		    {
4846		      asection *srelgot;
4847		      Elf_Internal_Rela outrel;
4848
4849		      /* We need to generate a R_NDS32_RELATIVE reloc
4850			 for the dynamic linker.  */
4851		      srelgot = bfd_get_section_by_name (dynobj, ".rela.got");
4852		      BFD_ASSERT (srelgot != NULL);
4853
4854		      outrel.r_offset = (elf_gp (output_bfd)
4855					 + sgot->output_offset + off);
4856		      outrel.r_info = ELF32_R_INFO (0, R_NDS32_RELATIVE);
4857		      outrel.r_addend = relocation;
4858		      loc = srelgot->contents;
4859		      loc +=
4860			srelgot->reloc_count * sizeof (Elf32_External_Rela);
4861		      bfd_elf32_swap_reloca_out (output_bfd, &outrel, loc);
4862		      ++srelgot->reloc_count;
4863		    }
4864		  local_got_offsets[r_symndx] |= 1;
4865		}
4866	      relocation = sgot->output_section->vma + sgot->output_offset + off
4867			   - elf_gp (output_bfd);
4868	    }
4869
4870	  break;
4871
4872	case R_NDS32_16_RELA:
4873	case R_NDS32_20_RELA:
4874	case R_NDS32_5_RELA:
4875	case R_NDS32_32_RELA:
4876	case R_NDS32_9_PCREL_RELA:
4877	case R_NDS32_WORD_9_PCREL_RELA:
4878	case R_NDS32_10_UPCREL_RELA:
4879	case R_NDS32_15_PCREL_RELA:
4880	case R_NDS32_17_PCREL_RELA:
4881	case R_NDS32_25_PCREL_RELA:
4882	case R_NDS32_HI20_RELA:
4883	case R_NDS32_LO12S3_RELA:
4884	case R_NDS32_LO12S2_RELA:
4885	case R_NDS32_LO12S2_DP_RELA:
4886	case R_NDS32_LO12S2_SP_RELA:
4887	case R_NDS32_LO12S1_RELA:
4888	case R_NDS32_LO12S0_RELA:
4889	case R_NDS32_LO12S0_ORI_RELA:
4890	  if (info->shared && r_symndx != 0
4891	      && (input_section->flags & SEC_ALLOC) != 0
4892	      && (eliminate_gc_relocs == 0
4893		  || (sec && (sec->flags & SEC_EXCLUDE) == 0))
4894	      && ((r_type != R_NDS32_9_PCREL_RELA
4895		   && r_type != R_NDS32_WORD_9_PCREL_RELA
4896		   && r_type != R_NDS32_10_UPCREL_RELA
4897		   && r_type != R_NDS32_15_PCREL_RELA
4898		   && r_type != R_NDS32_17_PCREL_RELA
4899		   && r_type != R_NDS32_25_PCREL_RELA
4900		   && !(r_type == R_NDS32_32_RELA
4901			&& strcmp (input_section->name, ".eh_frame") == 0))
4902		  || (h != NULL && h->dynindx != -1
4903		      && (!info->symbolic || !h->def_regular))))
4904	    {
4905	      Elf_Internal_Rela outrel;
4906	      bfd_boolean skip, relocate;
4907	      bfd_byte *loc;
4908
4909	      /* When generating a shared object, these relocations
4910		 are copied into the output file to be resolved at run
4911		 time.  */
4912
4913	      if (sreloc == NULL)
4914		{
4915		  const char *name;
4916
4917		  name = bfd_elf_string_from_elf_section
4918		    (input_bfd, elf_elfheader (input_bfd)->e_shstrndx,
4919		     elf_section_data (input_section)->rela.hdr->sh_name);
4920		  if (name == NULL)
4921		    return FALSE;
4922
4923		  BFD_ASSERT (strncmp (name, ".rela", 5) == 0
4924			      && strcmp (bfd_get_section_name (input_bfd,
4925							       input_section),
4926					 name + 5) == 0);
4927
4928		  sreloc = bfd_get_section_by_name (dynobj, name);
4929		  BFD_ASSERT (sreloc != NULL);
4930		}
4931
4932	      skip = FALSE;
4933	      relocate = FALSE;
4934
4935	      outrel.r_offset = _bfd_elf_section_offset (output_bfd,
4936							 info,
4937							 input_section,
4938							 rel->r_offset);
4939	      if (outrel.r_offset == (bfd_vma) - 1)
4940		skip = TRUE;
4941	      else if (outrel.r_offset == (bfd_vma) - 2)
4942		skip = TRUE, relocate = TRUE;
4943	      outrel.r_offset += (input_section->output_section->vma
4944				  + input_section->output_offset);
4945
4946	      if (skip)
4947		memset (&outrel, 0, sizeof outrel);
4948	      else if (r_type == R_NDS32_17_PCREL_RELA
4949		       || r_type == R_NDS32_15_PCREL_RELA
4950		       || r_type == R_NDS32_25_PCREL_RELA)
4951		{
4952		  BFD_ASSERT (h != NULL && h->dynindx != -1);
4953		  outrel.r_info = ELF32_R_INFO (h->dynindx, r_type);
4954		  outrel.r_addend = rel->r_addend;
4955		}
4956	      else
4957		{
4958		  /* h->dynindx may be -1 if this symbol was marked to
4959		     become local.  */
4960		  if (h == NULL
4961		      || ((info->symbolic || h->dynindx == -1)
4962			  && h->def_regular))
4963		    {
4964		      relocate = TRUE;
4965		      outrel.r_info = ELF32_R_INFO (0, R_NDS32_RELATIVE);
4966		      outrel.r_addend = relocation + rel->r_addend;
4967		    }
4968		  else
4969		    {
4970		      BFD_ASSERT (h->dynindx != -1);
4971		      outrel.r_info = ELF32_R_INFO (h->dynindx, r_type);
4972		      outrel.r_addend = rel->r_addend;
4973		    }
4974		}
4975
4976	      loc = sreloc->contents;
4977	      loc += sreloc->reloc_count * sizeof (Elf32_External_Rela);
4978	      bfd_elf32_swap_reloca_out (output_bfd, &outrel, loc);
4979	      ++sreloc->reloc_count;
4980
4981	      /* If this reloc is against an external symbol, we do
4982		 not want to fiddle with the addend.  Otherwise, we
4983		 need to include the symbol value so that it becomes
4984		 an addend for the dynamic reloc.  */
4985	      if (!relocate)
4986		continue;
4987	    }
4988	  break;
4989
4990	case R_NDS32_25_ABS_RELA:
4991	  if (info->shared)
4992	    {
4993	      (*_bfd_error_handler)
4994		(_("%s: warning: cannot deal R_NDS32_25_ABS_RELA in shared "
4995		   "mode."), bfd_get_filename (input_bfd));
4996	      return FALSE;
4997	    }
4998	  break;
4999
5000	case R_NDS32_9_PCREL:
5001	  r = nds32_elf_do_9_pcrel_reloc (input_bfd, howto, input_section,
5002					  contents, offset,
5003					  sec, relocation, addend);
5004	  goto check_reloc;
5005
5006	case R_NDS32_HI20:
5007	    {
5008	      Elf_Internal_Rela *lorel;
5009
5010	      /* We allow an arbitrary number of HI20 relocs before the
5011		 LO12 reloc.  This permits gcc to emit the HI and LO relocs
5012		 itself.  */
5013	      for (lorel = rel + 1;
5014		   (lorel < relend
5015		    && ELF32_R_TYPE (lorel->r_info) == R_NDS32_HI20); lorel++)
5016		continue;
5017	      if (lorel < relend
5018		  && (ELF32_R_TYPE (lorel->r_info) == R_NDS32_LO12S3
5019		      || ELF32_R_TYPE (lorel->r_info) == R_NDS32_LO12S2
5020		      || ELF32_R_TYPE (lorel->r_info) == R_NDS32_LO12S1
5021		      || ELF32_R_TYPE (lorel->r_info) == R_NDS32_LO12S0))
5022		{
5023		  nds32_elf_relocate_hi20 (input_bfd, r_type, rel, lorel,
5024					   contents, relocation + addend);
5025		  r = bfd_reloc_ok;
5026		}
5027	      else
5028		r = _bfd_final_link_relocate (howto, input_bfd, input_section,
5029					      contents, offset, relocation,
5030					      addend);
5031	    }
5032
5033	  goto check_reloc;
5034
5035	case R_NDS32_GOT17S2_RELA:
5036	case R_NDS32_GOT15S2_RELA:
5037	    {
5038	      bfd_vma off;
5039
5040	      BFD_ASSERT (sgot != NULL);
5041
5042	      if (h != NULL)
5043		{
5044		  bfd_boolean dyn;
5045
5046		  off = h->got.offset;
5047		  BFD_ASSERT (off != (bfd_vma) - 1);
5048
5049		  dyn = htab->root.dynamic_sections_created;
5050		  if (!WILL_CALL_FINISH_DYNAMIC_SYMBOL
5051		      (dyn, info->shared, h) || (info->shared
5052						 && (info->symbolic
5053						     || h->dynindx == -1
5054						     || h->forced_local)
5055						 && h->def_regular))
5056		    {
5057		      /* This is actually a static link, or it is a
5058			 -Bsymbolic link and the symbol is defined
5059			 locally, or the symbol was forced to be local
5060			 because of a version file.  We must initialize
5061			 this entry in the global offset table.  Since the
5062			 offset must always be a multiple of 4, we use the
5063			 least significant bit to record whether we have
5064			 initialized it already.
5065
5066			 When doing a dynamic link, we create a .rela.got
5067			 relocation entry to initialize the value.  This
5068			 is done in the finish_dynamic_symbol routine.  */
5069		      if ((off & 1) != 0)
5070			off &= ~1;
5071		      else
5072			{
5073			  bfd_put_32 (output_bfd, relocation,
5074				      sgot->contents + off);
5075			  h->got.offset |= 1;
5076			}
5077		    }
5078		}
5079	      else
5080		{
5081		  bfd_byte *loc;
5082
5083		  BFD_ASSERT (local_got_offsets != NULL
5084			      && local_got_offsets[r_symndx] != (bfd_vma) - 1);
5085
5086		  off = local_got_offsets[r_symndx];
5087
5088		  /* The offset must always be a multiple of 4.  We use
5089		     the least significant bit to record whether we have
5090		     already processed this entry.  */
5091		  if ((off & 1) != 0)
5092		    off &= ~1;
5093		  else
5094		    {
5095		      bfd_put_32 (output_bfd, relocation, sgot->contents + off);
5096
5097		      if (info->shared)
5098			{
5099			  asection *srelgot;
5100			  Elf_Internal_Rela outrel;
5101
5102			  /* We need to generate a R_NDS32_RELATIVE reloc
5103			     for the dynamic linker.  */
5104			  srelgot = bfd_get_section_by_name (dynobj, ".rela.got");
5105			  BFD_ASSERT (srelgot != NULL);
5106
5107			  outrel.r_offset = (elf_gp (output_bfd)
5108					     + sgot->output_offset + off);
5109			  outrel.r_info = ELF32_R_INFO (0, R_NDS32_RELATIVE);
5110			  outrel.r_addend = relocation;
5111			  loc = srelgot->contents;
5112			  loc +=
5113			    srelgot->reloc_count * sizeof (Elf32_External_Rela);
5114			  bfd_elf32_swap_reloca_out (output_bfd, &outrel, loc);
5115			  ++srelgot->reloc_count;
5116			}
5117		      local_got_offsets[r_symndx] |= 1;
5118		    }
5119		}
5120	      relocation = sgot->output_section->vma + sgot->output_offset + off
5121			   - elf_gp (output_bfd);
5122	    }
5123	  if (relocation & align)
5124	    {
5125	      /* Incorrect alignment.  */
5126	      (*_bfd_error_handler)
5127		(_("%B: warning: unaligned access to GOT entry."), input_bfd);
5128	      ret = FALSE;
5129	      r = bfd_reloc_dangerous;
5130	      goto check_reloc;
5131	    }
5132	  break;
5133
5134	case R_NDS32_SDA16S3_RELA:
5135	case R_NDS32_SDA15S3_RELA:
5136	case R_NDS32_SDA15S3:
5137	  align = 0x7;
5138	  goto handle_sda;
5139
5140	case R_NDS32_SDA17S2_RELA:
5141	case R_NDS32_SDA15S2_RELA:
5142	case R_NDS32_SDA12S2_SP_RELA:
5143	case R_NDS32_SDA12S2_DP_RELA:
5144	case R_NDS32_SDA15S2:
5145	case R_NDS32_SDA_FP7U2_RELA:
5146	  align = 0x3;
5147	  goto handle_sda;
5148
5149	case R_NDS32_SDA18S1_RELA:
5150	case R_NDS32_SDA15S1_RELA:
5151	case R_NDS32_SDA15S1:
5152	  align = 0x1;
5153	  goto handle_sda;
5154
5155	case R_NDS32_SDA19S0_RELA:
5156	case R_NDS32_SDA15S0_RELA:
5157	case R_NDS32_SDA15S0:
5158	    {
5159	      align = 0x0;
5160handle_sda:
5161	      BFD_ASSERT (sec != NULL);
5162
5163	      /* If the symbol is in the abs section, the out_bfd will be null.
5164		 This happens when the relocation has a symbol@GOTOFF.  */
5165	      r = nds32_elf_final_sda_base (output_bfd, info, &gp, FALSE);
5166	      if (r != bfd_reloc_ok)
5167		{
5168		  (*_bfd_error_handler)
5169		    (_("%B: warning: relocate SDA_BASE failed."), input_bfd);
5170		  ret = FALSE;
5171		  goto check_reloc;
5172		}
5173
5174	      /* At this point `relocation' contains the object's
5175		 address.  */
5176	      if (r_type == R_NDS32_SDA_FP7U2_RELA)
5177		{
5178		  relocation -= fpbase_addr;
5179		}
5180	      else
5181		relocation -= gp;
5182	      /* Now it contains the offset from _SDA_BASE_.  */
5183
5184	      /* Make sure alignment is correct.  */
5185
5186	      if (relocation & align)
5187		{
5188		  /* Incorrect alignment.  */
5189		  (*_bfd_error_handler)
5190		    (_("%B(%A): warning: unaligned small data access of type %d."),
5191		     input_bfd, input_section, r_type);
5192		  ret = FALSE;
5193		  goto check_reloc;
5194		}
5195	    }
5196
5197	  break;
5198	case R_NDS32_17IFC_PCREL_RELA:
5199	case R_NDS32_10IFCU_PCREL_RELA:
5200	  /* do nothing */
5201	  break;
5202
5203	case R_NDS32_TLS_LE_HI20:
5204	case R_NDS32_TLS_LE_LO12:
5205	case R_NDS32_TLS_LE_20:
5206	case R_NDS32_TLS_LE_15S0:
5207	case R_NDS32_TLS_LE_15S1:
5208	case R_NDS32_TLS_LE_15S2:
5209	  if (elf_hash_table (info)->tls_sec != NULL)
5210	    relocation -= (elf_hash_table (info)->tls_sec->vma + TP_OFFSET);
5211	  break;
5212	case R_NDS32_TLS_IE_HI20:
5213	case R_NDS32_TLS_IE_LO12S2:
5214	  {
5215	    /* Relocation is to the entry for this symbol in the global
5216	       offset table.  */
5217	    unsigned int tls_type;
5218	    asection *srelgot;
5219	    Elf_Internal_Rela outrel;
5220	    bfd_vma off;
5221	    bfd_byte *loc;
5222	    int indx = 0;
5223
5224	    BFD_ASSERT (sgot != NULL);
5225	    if (h != NULL)
5226	      {
5227		bfd_boolean dyn;
5228
5229		off = h->got.offset;
5230		BFD_ASSERT (off != (bfd_vma) - 1);
5231		dyn = htab->root.dynamic_sections_created;
5232		tls_type = ((struct elf_nds32_link_hash_entry *) h)->tls_type;
5233		if (WILL_CALL_FINISH_DYNAMIC_SYMBOL (dyn, info->shared, h)
5234		    && (!info->shared
5235			|| !SYMBOL_REFERENCES_LOCAL (info, h)))
5236		  indx = h->dynindx;
5237	      }
5238	    else
5239	      {
5240		/* Never happen currently.  */
5241		BFD_ASSERT (local_got_offsets != NULL
5242			    && local_got_offsets[r_symndx] != (bfd_vma) - 1);
5243
5244		off = local_got_offsets[r_symndx];
5245
5246		tls_type = elf32_nds32_local_got_tls_type (input_bfd)[r_symndx];
5247	      }
5248	    relocation = sgot->output_section->vma + sgot->output_offset + off;
5249
5250	    if (r_type == R_NDS32_TLS_IE_LO12S2)
5251	      break;
5252
5253	    /* The offset must always be a multiple of 4.  We use
5254	       the least significant bit to record whether we have
5255	       already processed this entry.  */
5256	    if ((off & 1) != 0)
5257	      off &= ~1;
5258	    else
5259	      {
5260		bfd_boolean need_relocs = FALSE;
5261		srelgot = htab->srelgot;
5262		if ((info->shared || indx != 0)
5263		    && (h == NULL
5264			|| ELF_ST_VISIBILITY (h->other) == STV_DEFAULT
5265			|| h->root.type != bfd_link_hash_undefweak))
5266		  {
5267		    need_relocs = TRUE;
5268		    BFD_ASSERT (srelgot != NULL);
5269		  }
5270		if (tls_type & GOT_TLS_IE)
5271		  {
5272		    if (need_relocs)
5273		      {
5274			if (h->dynindx == 0)
5275			  outrel.r_addend = relocation - dtpoff_base (info);
5276			else
5277			  outrel.r_addend = 0;
5278			outrel.r_offset = (sgot->output_section->vma
5279					   + sgot->output_offset
5280					   + off);
5281			outrel.r_info =
5282			  ELF32_R_INFO (h->dynindx, R_NDS32_TLS_TPOFF);
5283
5284			loc = srelgot->contents;
5285			loc +=
5286			  srelgot->reloc_count * sizeof (Elf32_External_Rela);
5287			bfd_elf32_swap_reloca_out (output_bfd, &outrel, loc);
5288			++srelgot->reloc_count;
5289		      }
5290		    else
5291		      bfd_put_32 (output_bfd, h->root.u.def.value - TP_OFFSET,
5292				  sgot->contents + off);
5293		  }
5294	      }
5295	  }
5296	break;
5297
5298	  /* DON'T   fall through.  */
5299
5300	default:
5301	  /* OLD_NDS32_RELOC.  */
5302
5303	  r = _bfd_final_link_relocate (howto, input_bfd, input_section,
5304					contents, offset, relocation, addend);
5305	  goto check_reloc;
5306	}
5307
5308      switch ((int) r_type)
5309	{
5310	case R_NDS32_20_RELA:
5311	case R_NDS32_5_RELA:
5312	case R_NDS32_9_PCREL_RELA:
5313	case R_NDS32_WORD_9_PCREL_RELA:
5314	case R_NDS32_10_UPCREL_RELA:
5315	case R_NDS32_15_PCREL_RELA:
5316	case R_NDS32_17_PCREL_RELA:
5317	case R_NDS32_25_PCREL_RELA:
5318	case R_NDS32_25_ABS_RELA:
5319	case R_NDS32_HI20_RELA:
5320	case R_NDS32_LO12S3_RELA:
5321	case R_NDS32_LO12S2_RELA:
5322	case R_NDS32_LO12S2_DP_RELA:
5323	case R_NDS32_LO12S2_SP_RELA:
5324	case R_NDS32_LO12S1_RELA:
5325	case R_NDS32_LO12S0_RELA:
5326	case R_NDS32_LO12S0_ORI_RELA:
5327	case R_NDS32_SDA16S3_RELA:
5328	case R_NDS32_SDA17S2_RELA:
5329	case R_NDS32_SDA18S1_RELA:
5330	case R_NDS32_SDA19S0_RELA:
5331	case R_NDS32_SDA15S3_RELA:
5332	case R_NDS32_SDA15S2_RELA:
5333	case R_NDS32_SDA12S2_DP_RELA:
5334	case R_NDS32_SDA12S2_SP_RELA:
5335	case R_NDS32_SDA15S1_RELA:
5336	case R_NDS32_SDA15S0_RELA:
5337	case R_NDS32_SDA_FP7U2_RELA:
5338	case R_NDS32_9_PLTREL:
5339	case R_NDS32_25_PLTREL:
5340	case R_NDS32_GOT20:
5341	case R_NDS32_GOT_HI20:
5342	case R_NDS32_GOT_LO12:
5343	case R_NDS32_GOT_LO15:
5344	case R_NDS32_GOT_LO19:
5345	case R_NDS32_GOT15S2_RELA:
5346	case R_NDS32_GOT17S2_RELA:
5347	case R_NDS32_GOTPC20:
5348	case R_NDS32_GOTPC_HI20:
5349	case R_NDS32_GOTPC_LO12:
5350	case R_NDS32_GOTOFF:
5351	case R_NDS32_GOTOFF_HI20:
5352	case R_NDS32_GOTOFF_LO12:
5353	case R_NDS32_GOTOFF_LO15:
5354	case R_NDS32_GOTOFF_LO19:
5355	case R_NDS32_PLTREL_HI20:
5356	case R_NDS32_PLTREL_LO12:
5357	case R_NDS32_PLT_GOTREL_HI20:
5358	case R_NDS32_PLT_GOTREL_LO12:
5359	case R_NDS32_PLT_GOTREL_LO15:
5360	case R_NDS32_PLT_GOTREL_LO19:
5361	case R_NDS32_PLT_GOTREL_LO20:
5362	case R_NDS32_17IFC_PCREL_RELA:
5363	case R_NDS32_10IFCU_PCREL_RELA:
5364	case R_NDS32_TLS_LE_HI20:
5365	case R_NDS32_TLS_LE_LO12:
5366	case R_NDS32_TLS_IE_HI20:
5367	case R_NDS32_TLS_IE_LO12S2:
5368	case R_NDS32_TLS_LE_20:
5369	case R_NDS32_TLS_LE_15S0:
5370	case R_NDS32_TLS_LE_15S1:
5371	case R_NDS32_TLS_LE_15S2:
5372	  /* Instruction related relocs must handle endian properly.  */
5373	  /* NOTE: PIC IS NOT HANDLE YET; DO IT LATER.  */
5374	  r = nds32_elf_final_link_relocate (howto, input_bfd,
5375					     input_section, contents,
5376					     rel->r_offset, relocation,
5377					     rel->r_addend);
5378	  break;
5379
5380	default:
5381	  /* All other relocs can use default handler.  */
5382	  r = _bfd_final_link_relocate (howto, input_bfd, input_section,
5383					contents, rel->r_offset,
5384					relocation, rel->r_addend);
5385	  break;
5386	}
5387
5388check_reloc:
5389
5390      if (r != bfd_reloc_ok)
5391	{
5392	  /* FIXME: This should be generic enough to go in a utility.  */
5393	  const char *name;
5394
5395	  if (h != NULL)
5396	    name = h->root.root.string;
5397	  else
5398	    {
5399	      name = bfd_elf_string_from_elf_section
5400		      (input_bfd, symtab_hdr->sh_link, sym->st_name);
5401	      if (name == NULL || *name == '\0')
5402		name = bfd_section_name (input_bfd, sec);
5403	    }
5404
5405	  if (errmsg != NULL)
5406	    goto common_error;
5407
5408	  switch (r)
5409	    {
5410	    case bfd_reloc_overflow:
5411	      if (!((*info->callbacks->reloc_overflow)
5412		    (info, (h ? &h->root : NULL), name, howto->name,
5413		     (bfd_vma) 0, input_bfd, input_section, offset)))
5414		return FALSE;
5415	      break;
5416
5417	    case bfd_reloc_undefined:
5418	      if (!((*info->callbacks->undefined_symbol)
5419		    (info, name, input_bfd, input_section, offset, TRUE)))
5420		return FALSE;
5421	      break;
5422
5423	    case bfd_reloc_outofrange:
5424	      errmsg = _("internal error: out of range error");
5425	      goto common_error;
5426
5427	    case bfd_reloc_notsupported:
5428	      errmsg = _("internal error: unsupported relocation error");
5429	      goto common_error;
5430
5431	    case bfd_reloc_dangerous:
5432	      errmsg = _("internal error: dangerous error");
5433	      goto common_error;
5434
5435	    default:
5436	      errmsg = _("internal error: unknown error");
5437	      /* Fall through.  */
5438
5439common_error:
5440	      if (!((*info->callbacks->warning)
5441		    (info, errmsg, name, input_bfd, input_section, offset)))
5442		return FALSE;
5443	      break;
5444	    }
5445	}
5446    }
5447
5448  return ret;
5449}
5450
5451/* Finish up dynamic symbol handling.  We set the contents of various
5452   dynamic sections here.  */
5453
5454static bfd_boolean
5455nds32_elf_finish_dynamic_symbol (bfd *output_bfd, struct bfd_link_info *info,
5456				 struct elf_link_hash_entry *h, Elf_Internal_Sym *sym)
5457{
5458  struct elf_nds32_link_hash_table *htab;
5459  bfd_byte *loc;
5460
5461  htab = nds32_elf_hash_table (info);
5462
5463  if (h->plt.offset != (bfd_vma) - 1)
5464    {
5465      asection *splt;
5466      asection *sgot;
5467      asection *srela;
5468
5469      bfd_vma plt_index;
5470      bfd_vma got_offset;
5471      bfd_vma local_plt_offset;
5472      Elf_Internal_Rela rela;
5473
5474      /* This symbol has an entry in the procedure linkage table.  Set
5475	 it up.  */
5476
5477      BFD_ASSERT (h->dynindx != -1);
5478
5479      splt = htab->splt;
5480      sgot = htab->sgotplt;
5481      srela = htab->srelplt;
5482      BFD_ASSERT (splt != NULL && sgot != NULL && srela != NULL);
5483
5484      /* Get the index in the procedure linkage table which
5485	 corresponds to this symbol.  This is the index of this symbol
5486	 in all the symbols for which we are making plt entries.  The
5487	 first entry in the procedure linkage table is reserved.  */
5488      plt_index = h->plt.offset / PLT_ENTRY_SIZE - 1;
5489
5490      /* Get the offset into the .got table of the entry that
5491	 corresponds to this function.  Each .got entry is 4 bytes.
5492	 The first three are reserved.  */
5493      got_offset = (plt_index + 3) * 4;
5494
5495      /* Fill in the entry in the procedure linkage table.  */
5496      if (!info->shared)
5497	{
5498	  unsigned long insn;
5499
5500	  insn = PLT_ENTRY_WORD0 + (((sgot->output_section->vma
5501				      + sgot->output_offset + got_offset) >> 12)
5502				    & 0xfffff);
5503	  bfd_putb32 (insn, splt->contents + h->plt.offset);
5504
5505	  insn = PLT_ENTRY_WORD1 + (((sgot->output_section->vma
5506				      + sgot->output_offset + got_offset) & 0x0fff)
5507				    >> 2);
5508	  bfd_putb32 (insn, splt->contents + h->plt.offset + 4);
5509
5510	  insn = PLT_ENTRY_WORD2;
5511	  bfd_putb32 (insn, splt->contents + h->plt.offset + 8);
5512
5513	  insn = PLT_ENTRY_WORD3 + (plt_index & 0x7ffff);
5514	  bfd_putb32 (insn, splt->contents + h->plt.offset + 12);
5515
5516	  insn = PLT_ENTRY_WORD4
5517		 + (((unsigned int) ((-(h->plt.offset + 16)) >> 1)) & 0xffffff);
5518	  bfd_putb32 (insn, splt->contents + h->plt.offset + 16);
5519	  local_plt_offset = 12;
5520	}
5521      else
5522	{
5523	  /* sda_base must be set at this time.  */
5524	  unsigned long insn;
5525	  long offset;
5526
5527	  /* FIXME, sda_base is 65536, it will damage opcode.  */
5528	  /* insn = PLT_PIC_ENTRY_WORD0 + (((got_offset - sda_base) >> 2) & 0x7fff); */
5529	  offset = sgot->output_section->vma + sgot->output_offset + got_offset
5530		   - elf_gp (output_bfd);
5531	  insn = PLT_PIC_ENTRY_WORD0 + ((offset >> 12) & 0xfffff);
5532	  bfd_putb32 (insn, splt->contents + h->plt.offset);
5533
5534	  insn = PLT_PIC_ENTRY_WORD1 + (offset & 0xfff);
5535	  bfd_putb32 (insn, splt->contents + h->plt.offset + 4);
5536
5537	  insn = PLT_PIC_ENTRY_WORD2;
5538	  bfd_putb32 (insn, splt->contents + h->plt.offset + 8);
5539
5540	  insn = PLT_PIC_ENTRY_WORD3;
5541	  bfd_putb32 (insn, splt->contents + h->plt.offset + 12);
5542
5543	  insn = PLT_PIC_ENTRY_WORD4 + (plt_index & 0x7fffff);
5544	  bfd_putb32 (insn, splt->contents + h->plt.offset + 16);
5545
5546	  insn = PLT_PIC_ENTRY_WORD5
5547	    + (((unsigned int) ((-(h->plt.offset + 20)) >> 1)) & 0xffffff);
5548	  bfd_putb32 (insn, splt->contents + h->plt.offset + 20);
5549
5550	  local_plt_offset = 16;
5551	}
5552
5553      /* Fill in the entry in the global offset table,
5554	 so it will fall through to the next instruction for the first time.  */
5555      bfd_put_32 (output_bfd,
5556		  (splt->output_section->vma + splt->output_offset
5557		   + h->plt.offset + local_plt_offset),
5558		  sgot->contents + got_offset);
5559
5560      /* Fill in the entry in the .rela.plt section.  */
5561      rela.r_offset = (sgot->output_section->vma
5562		       + sgot->output_offset + got_offset);
5563      rela.r_info = ELF32_R_INFO (h->dynindx, R_NDS32_JMP_SLOT);
5564      rela.r_addend = 0;
5565      loc = srela->contents;
5566      loc += plt_index * sizeof (Elf32_External_Rela);
5567      bfd_elf32_swap_reloca_out (output_bfd, &rela, loc);
5568
5569      if (!h->def_regular)
5570	{
5571	  /* Mark the symbol as undefined, rather than as defined in
5572	     the .plt section.  Leave the value alone.  */
5573	  sym->st_shndx = SHN_UNDEF;
5574	  if (!h->ref_regular_nonweak)
5575	    sym->st_value = 0;
5576	}
5577    }
5578
5579  if (h->got.offset != (bfd_vma) - 1)
5580    {
5581      asection *sgot;
5582      asection *srela;
5583      Elf_Internal_Rela rela;
5584
5585      /* This symbol has an entry in the global offset table.
5586	 Set it up.  */
5587
5588      sgot = htab->sgot;
5589      srela = htab->srelgot;
5590      BFD_ASSERT (sgot != NULL && srela != NULL);
5591
5592      rela.r_offset = (sgot->output_section->vma
5593		       + sgot->output_offset + (h->got.offset & ~1));
5594
5595      /* If this is a -Bsymbolic link, and the symbol is defined
5596	 locally, we just want to emit a RELATIVE reloc.  Likewise if
5597	 the symbol was forced to be local because of a version file.
5598	 The entry in the global offset table will already have been
5599	 initialized in the relocate_section function.  */
5600      if (info->shared
5601	  && (info->symbolic
5602	      || h->dynindx == -1 || h->forced_local) && h->def_regular)
5603	{
5604	  rela.r_info = ELF32_R_INFO (0, R_NDS32_RELATIVE);
5605	  rela.r_addend = (h->root.u.def.value
5606			   + h->root.u.def.section->output_section->vma
5607			   + h->root.u.def.section->output_offset);
5608	}
5609      else
5610	{
5611	  BFD_ASSERT ((h->got.offset & 1) == 0);
5612	  bfd_put_32 (output_bfd, (bfd_vma) 0,
5613		      sgot->contents + h->got.offset);
5614	  rela.r_info = ELF32_R_INFO (h->dynindx, R_NDS32_GLOB_DAT);
5615	  rela.r_addend = 0;
5616	}
5617
5618      loc = srela->contents;
5619      loc += srela->reloc_count * sizeof (Elf32_External_Rela);
5620      bfd_elf32_swap_reloca_out (output_bfd, &rela, loc);
5621      ++srela->reloc_count;
5622    }
5623
5624  if (h->needs_copy)
5625    {
5626      asection *s;
5627      Elf_Internal_Rela rela;
5628
5629      /* This symbols needs a copy reloc.  Set it up.  */
5630
5631      BFD_ASSERT (h->dynindx != -1
5632		  && (h->root.type == bfd_link_hash_defined
5633		      || h->root.type == bfd_link_hash_defweak));
5634
5635      s = bfd_get_section_by_name (h->root.u.def.section->owner, ".rela.bss");
5636      BFD_ASSERT (s != NULL);
5637
5638      rela.r_offset = (h->root.u.def.value
5639		       + h->root.u.def.section->output_section->vma
5640		       + h->root.u.def.section->output_offset);
5641      rela.r_info = ELF32_R_INFO (h->dynindx, R_NDS32_COPY);
5642      rela.r_addend = 0;
5643      loc = s->contents;
5644      loc += s->reloc_count * sizeof (Elf32_External_Rela);
5645      bfd_elf32_swap_reloca_out (output_bfd, &rela, loc);
5646      ++s->reloc_count;
5647    }
5648
5649  /* Mark some specially defined symbols as absolute.  */
5650  if (strcmp (h->root.root.string, "_DYNAMIC") == 0
5651      || strcmp (h->root.root.string, "_GLOBAL_OFFSET_TABLE_") == 0)
5652    sym->st_shndx = SHN_ABS;
5653
5654  return TRUE;
5655}
5656
5657
5658/* Finish up the dynamic sections.  */
5659
5660static bfd_boolean
5661nds32_elf_finish_dynamic_sections (bfd *output_bfd, struct bfd_link_info *info)
5662{
5663  struct elf_nds32_link_hash_table *htab;
5664  bfd *dynobj;
5665  asection *sdyn;
5666  asection *sgot;
5667
5668  htab = nds32_elf_hash_table (info);
5669  dynobj = htab->root.dynobj;
5670
5671  sgot = htab->sgotplt;
5672  sdyn = bfd_get_section_by_name (dynobj, ".dynamic");
5673
5674  if (htab->root.dynamic_sections_created)
5675    {
5676      asection *splt;
5677      Elf32_External_Dyn *dyncon, *dynconend;
5678
5679      BFD_ASSERT (sgot != NULL && sdyn != NULL);
5680
5681      dyncon = (Elf32_External_Dyn *) sdyn->contents;
5682      dynconend = (Elf32_External_Dyn *) (sdyn->contents + sdyn->size);
5683
5684      for (; dyncon < dynconend; dyncon++)
5685	{
5686	  Elf_Internal_Dyn dyn;
5687	  asection *s;
5688
5689	  bfd_elf32_swap_dyn_in (dynobj, dyncon, &dyn);
5690
5691	  switch (dyn.d_tag)
5692	    {
5693	    default:
5694	      break;
5695
5696	    case DT_PLTGOT:
5697	      /* name = ".got"; */
5698	      s = htab->sgot->output_section;
5699	      goto get_vma;
5700	    case DT_JMPREL:
5701	      s = htab->srelplt->output_section;
5702	    get_vma:
5703	      BFD_ASSERT (s != NULL);
5704	      dyn.d_un.d_ptr = s->vma;
5705	      bfd_elf32_swap_dyn_out (output_bfd, &dyn, dyncon);
5706	      break;
5707
5708	    case DT_PLTRELSZ:
5709	      s = htab->srelplt->output_section;
5710	      BFD_ASSERT (s != NULL);
5711	      dyn.d_un.d_val = s->size;
5712	      bfd_elf32_swap_dyn_out (output_bfd, &dyn, dyncon);
5713	      break;
5714
5715	    case DT_RELASZ:
5716	      /* My reading of the SVR4 ABI indicates that the
5717		 procedure linkage table relocs (DT_JMPREL) should be
5718		 included in the overall relocs (DT_RELA).  This is
5719		 what Solaris does.  However, UnixWare can not handle
5720		 that case.  Therefore, we override the DT_RELASZ entry
5721		 here to make it not include the JMPREL relocs.  Since
5722		 the linker script arranges for .rela.plt to follow all
5723		 other relocation sections, we don't have to worry
5724		 about changing the DT_RELA entry.  */
5725	      if (htab->srelplt != NULL)
5726		{
5727		  s = htab->srelplt->output_section;
5728		  dyn.d_un.d_val -= s->size;
5729		}
5730	      bfd_elf32_swap_dyn_out (output_bfd, &dyn, dyncon);
5731	      break;
5732	    }
5733	}
5734
5735      /* Fill in the first entry in the procedure linkage table.  */
5736      splt = htab->splt;
5737      if (splt && splt->size > 0)
5738	{
5739	  if (info->shared)
5740	    {
5741	      unsigned long insn;
5742	      long offset;
5743
5744	      /* FIXME, sda_base is 65536, it will damage opcode.  */
5745	      /* insn = PLT_PIC_ENTRY_WORD0 + (((got_offset - sda_base) >> 2) & 0x7fff); */
5746	      offset = sgot->output_section->vma + sgot->output_offset + 4
5747		       - elf_gp (output_bfd);
5748	      insn = PLT0_PIC_ENTRY_WORD0 | ((offset >> 12) & 0xfffff);
5749	      bfd_putb32 (insn, splt->contents);
5750
5751	      /* insn = PLT0_PIC_ENTRY_WORD0 | (((8 - sda_base) >> 2) & 0x7fff) ; */
5752	      /* here has a typo?  */
5753	      insn = PLT0_PIC_ENTRY_WORD1 | (offset & 0xfff);
5754	      bfd_putb32 (insn, splt->contents + 4);
5755
5756	      insn = PLT0_PIC_ENTRY_WORD2;
5757	      bfd_putb32 (insn, splt->contents + 8);
5758
5759	      insn = PLT0_PIC_ENTRY_WORD3;
5760	      bfd_putb32 (insn, splt->contents + 12);
5761
5762	      insn = PLT0_PIC_ENTRY_WORD4;
5763	      bfd_putb32 (insn, splt->contents + 16);
5764
5765	      insn = PLT0_PIC_ENTRY_WORD5;
5766	      bfd_putb32 (insn, splt->contents + 20);
5767	    }
5768	  else
5769	    {
5770	      unsigned long insn;
5771	      unsigned long addr;
5772
5773	      /* addr = .got + 4 */
5774	      addr = sgot->output_section->vma + sgot->output_offset + 4;
5775	      insn = PLT0_ENTRY_WORD0 | ((addr >> 12) & 0xfffff);
5776	      bfd_putb32 (insn, splt->contents);
5777
5778	      insn = PLT0_ENTRY_WORD1 | (addr & 0x0fff);
5779	      bfd_putb32 (insn, splt->contents + 4);
5780
5781	      insn = PLT0_ENTRY_WORD2;
5782	      bfd_putb32 (insn, splt->contents + 8);
5783
5784	      insn = PLT0_ENTRY_WORD3;
5785	      bfd_putb32 (insn, splt->contents + 12);
5786
5787	      insn = PLT0_ENTRY_WORD4;
5788	      bfd_putb32 (insn, splt->contents + 16);
5789	    }
5790
5791	  elf_section_data (splt->output_section)->this_hdr.sh_entsize =
5792	    PLT_ENTRY_SIZE;
5793	}
5794    }
5795
5796  /* Fill in the first three entries in the global offset table.  */
5797  if (sgot && sgot->size > 0)
5798    {
5799      if (sdyn == NULL)
5800	bfd_put_32 (output_bfd, (bfd_vma) 0, sgot->contents);
5801      else
5802	bfd_put_32 (output_bfd,
5803		    sdyn->output_section->vma + sdyn->output_offset,
5804		    sgot->contents);
5805      bfd_put_32 (output_bfd, (bfd_vma) 0, sgot->contents + 4);
5806      bfd_put_32 (output_bfd, (bfd_vma) 0, sgot->contents + 8);
5807
5808      elf_section_data (sgot->output_section)->this_hdr.sh_entsize = 4;
5809    }
5810
5811  return TRUE;
5812}
5813
5814
5815/* Set the right machine number.  */
5816
5817static bfd_boolean
5818nds32_elf_object_p (bfd *abfd)
5819{
5820  static unsigned int cur_arch = 0;
5821
5822  if (E_N1_ARCH != (elf_elfheader (abfd)->e_flags & EF_NDS_ARCH))
5823    {
5824      /* E_N1_ARCH is a wild card, so it is set only when no others exist.  */
5825      cur_arch = (elf_elfheader (abfd)->e_flags & EF_NDS_ARCH);
5826    }
5827
5828  switch (cur_arch)
5829    {
5830    default:
5831    case E_N1_ARCH:
5832      bfd_default_set_arch_mach (abfd, bfd_arch_nds32, bfd_mach_n1);
5833      break;
5834    case E_N1H_ARCH:
5835      bfd_default_set_arch_mach (abfd, bfd_arch_nds32, bfd_mach_n1h);
5836      break;
5837    case E_NDS_ARCH_STAR_V2_0:
5838      bfd_default_set_arch_mach (abfd, bfd_arch_nds32, bfd_mach_n1h_v2);
5839      break;
5840    case E_NDS_ARCH_STAR_V3_0:
5841      bfd_default_set_arch_mach (abfd, bfd_arch_nds32, bfd_mach_n1h_v3);
5842      break;
5843    case E_NDS_ARCH_STAR_V3_M:
5844      bfd_default_set_arch_mach (abfd, bfd_arch_nds32, bfd_mach_n1h_v3m);
5845      break;
5846    }
5847
5848  return TRUE;
5849}
5850
5851/* Store the machine number in the flags field.  */
5852
5853static void
5854nds32_elf_final_write_processing (bfd *abfd,
5855				  bfd_boolean linker ATTRIBUTE_UNUSED)
5856{
5857  unsigned long val;
5858  static unsigned int cur_mach = 0;
5859
5860  if (bfd_mach_n1 != bfd_get_mach (abfd))
5861    {
5862      cur_mach = bfd_get_mach (abfd);
5863    }
5864
5865  switch (cur_mach)
5866    {
5867    case bfd_mach_n1:
5868      /* Only happen when object is empty, since the case is abandon.  */
5869      val = E_N1_ARCH;
5870      val |= E_NDS_ABI_AABI;
5871      val |= E_NDS32_ELF_VER_1_4;
5872      break;
5873    case bfd_mach_n1h:
5874      val = E_N1H_ARCH;
5875      break;
5876    case bfd_mach_n1h_v2:
5877      val = E_NDS_ARCH_STAR_V2_0;
5878      break;
5879    case bfd_mach_n1h_v3:
5880      val = E_NDS_ARCH_STAR_V3_0;
5881      break;
5882    case bfd_mach_n1h_v3m:
5883      val = E_NDS_ARCH_STAR_V3_M;
5884      break;
5885    default:
5886      val = 0;
5887      break;
5888    }
5889
5890  elf_elfheader (abfd)->e_flags &= ~EF_NDS_ARCH;
5891  elf_elfheader (abfd)->e_flags |= val;
5892}
5893
5894/* Function to keep NDS32 specific file flags.  */
5895
5896static bfd_boolean
5897nds32_elf_set_private_flags (bfd *abfd, flagword flags)
5898{
5899  BFD_ASSERT (!elf_flags_init (abfd)
5900	      || elf_elfheader (abfd)->e_flags == flags);
5901
5902  elf_elfheader (abfd)->e_flags = flags;
5903  elf_flags_init (abfd) = TRUE;
5904  return TRUE;
5905}
5906
5907static unsigned int
5908convert_e_flags (unsigned int e_flags, unsigned int arch)
5909{
5910  if ((e_flags & EF_NDS_ARCH) == E_NDS_ARCH_STAR_V0_9)
5911    {
5912      /* From 0.9 to 1.0.  */
5913      e_flags = (e_flags & (~EF_NDS_ARCH)) | E_NDS_ARCH_STAR_V1_0;
5914
5915      /* Invert E_NDS32_HAS_NO_MAC_INST.  */
5916      e_flags ^= E_NDS32_HAS_NO_MAC_INST;
5917      if (arch == E_NDS_ARCH_STAR_V1_0)
5918	{
5919	  /* Done.  */
5920	  return e_flags;
5921	}
5922    }
5923
5924  /* From 1.0 to 2.0.  */
5925  e_flags = (e_flags & (~EF_NDS_ARCH)) | E_NDS_ARCH_STAR_V2_0;
5926
5927  /* Clear E_NDS32_HAS_MFUSR_PC_INST.  */
5928  e_flags &= ~E_NDS32_HAS_MFUSR_PC_INST;
5929
5930  /* Invert E_NDS32_HAS_NO_MAC_INST.  */
5931  e_flags ^= E_NDS32_HAS_NO_MAC_INST;
5932  return e_flags;
5933}
5934
5935static bfd_boolean
5936nds32_check_vec_size (bfd *ibfd)
5937{
5938  static unsigned int nds32_vec_size = 0;
5939
5940  asection *sec_t = NULL;
5941  bfd_byte *contents = NULL;
5942
5943  sec_t = bfd_get_section_by_name (ibfd, ".nds32_e_flags");
5944
5945  if (sec_t && sec_t->size >= 4)
5946    {
5947      /* Get vec_size in file.  */
5948      unsigned int flag_t;
5949
5950      nds32_get_section_contents (ibfd, sec_t, &contents);
5951      flag_t = bfd_get_32 (ibfd, contents);
5952
5953      /* The value could only be 4 or 16.  */
5954
5955      if (!nds32_vec_size)
5956	/* Set if not set yet.  */
5957	nds32_vec_size = (flag_t & 0x3);
5958      else if (nds32_vec_size != (flag_t & 0x3))
5959	{
5960	  (*_bfd_error_handler) (_("%B: ISR vector size mismatch"
5961				   " with previous modules, previous %u-byte, current %u-byte"),
5962				 ibfd,
5963				 nds32_vec_size == 1 ? 4 : nds32_vec_size == 2 ? 16 : 0xffffffff,
5964				 (flag_t & 0x3) == 1 ? 4 : (flag_t & 0x3) == 2 ? 16 : 0xffffffff);
5965	  return FALSE;
5966	}
5967      else
5968	/* Only keep the first vec_size section.  */
5969	sec_t->flags |= SEC_EXCLUDE;
5970    }
5971
5972  return TRUE;
5973}
5974
5975/* Merge backend specific data from an object file to the output
5976   object file when linking.  */
5977
5978static bfd_boolean
5979nds32_elf_merge_private_bfd_data (bfd *ibfd, bfd *obfd)
5980{
5981  flagword out_flags;
5982  flagword in_flags;
5983  flagword out_16regs;
5984  flagword in_no_mac;
5985  flagword out_no_mac;
5986  flagword in_16regs;
5987  flagword out_version;
5988  flagword in_version;
5989  flagword out_fpu_config;
5990  flagword in_fpu_config;
5991
5992  /* TODO: Revise to use object-attributes instead.  */
5993  if (!nds32_check_vec_size (ibfd))
5994    return FALSE;
5995
5996  if (bfd_get_flavour (ibfd) != bfd_target_elf_flavour
5997      || bfd_get_flavour (obfd) != bfd_target_elf_flavour)
5998    return TRUE;
5999
6000  if (bfd_little_endian (ibfd) != bfd_little_endian (obfd))
6001    {
6002      (*_bfd_error_handler)
6003	(_("%B: warning: Endian mismatch with previous modules."), ibfd);
6004
6005      bfd_set_error (bfd_error_bad_value);
6006      return FALSE;
6007    }
6008
6009  in_version = elf_elfheader (ibfd)->e_flags & EF_NDS32_ELF_VERSION;
6010  if (in_version == E_NDS32_ELF_VER_1_2)
6011    {
6012      (*_bfd_error_handler)
6013	(_("%B: warning: Older version of object file encountered, "
6014	   "Please recompile with current tool chain."), ibfd);
6015    }
6016
6017  /* We may need to merge V1 and V2 arch object files to V2.  */
6018  if ((elf_elfheader (ibfd)->e_flags & EF_NDS_ARCH)
6019      != (elf_elfheader (obfd)->e_flags & EF_NDS_ARCH))
6020    {
6021      /* Need to convert version.  */
6022      if ((elf_elfheader (ibfd)->e_flags & EF_NDS_ARCH)
6023	  == E_NDS_ARCH_STAR_RESERVED)
6024	{
6025	  elf_elfheader (obfd)->e_flags = elf_elfheader (ibfd)->e_flags;
6026	}
6027      else if ((elf_elfheader (obfd)->e_flags & EF_NDS_ARCH) == E_NDS_ARCH_STAR_V0_9
6028	       || (elf_elfheader (ibfd)->e_flags & EF_NDS_ARCH)
6029		  > (elf_elfheader (obfd)->e_flags & EF_NDS_ARCH))
6030	{
6031	  elf_elfheader (obfd)->e_flags =
6032	    convert_e_flags (elf_elfheader (obfd)->e_flags,
6033			     (elf_elfheader (ibfd)->e_flags & EF_NDS_ARCH));
6034	}
6035      else
6036	{
6037	  elf_elfheader (ibfd)->e_flags =
6038	    convert_e_flags (elf_elfheader (ibfd)->e_flags,
6039			     (elf_elfheader (obfd)->e_flags & EF_NDS_ARCH));
6040	}
6041    }
6042
6043  /* Extract some flags.  */
6044  in_flags = elf_elfheader (ibfd)->e_flags
6045	     & (~(E_NDS32_HAS_REDUCED_REGS | EF_NDS32_ELF_VERSION
6046		  | E_NDS32_HAS_NO_MAC_INST | E_NDS32_FPU_REG_CONF));
6047
6048  /* The following flags need special treatment.  */
6049  in_16regs = elf_elfheader (ibfd)->e_flags & E_NDS32_HAS_REDUCED_REGS;
6050  in_no_mac = elf_elfheader (ibfd)->e_flags & E_NDS32_HAS_NO_MAC_INST;
6051  in_fpu_config = elf_elfheader (ibfd)->e_flags & E_NDS32_FPU_REG_CONF;
6052
6053  /* Extract some flags.  */
6054  out_flags = elf_elfheader (obfd)->e_flags
6055	      & (~(E_NDS32_HAS_REDUCED_REGS | EF_NDS32_ELF_VERSION
6056		   | E_NDS32_HAS_NO_MAC_INST | E_NDS32_FPU_REG_CONF));
6057
6058  /* The following flags need special treatment.  */
6059  out_16regs = elf_elfheader (obfd)->e_flags & E_NDS32_HAS_REDUCED_REGS;
6060  out_no_mac = elf_elfheader (obfd)->e_flags & E_NDS32_HAS_NO_MAC_INST;
6061  out_fpu_config = elf_elfheader (obfd)->e_flags & E_NDS32_FPU_REG_CONF;
6062  out_version = elf_elfheader (obfd)->e_flags & EF_NDS32_ELF_VERSION;
6063  if (!elf_flags_init (obfd))
6064    {
6065      /* If the input is the default architecture then do not
6066	 bother setting the flags for the output architecture,
6067	 instead allow future merges to do this.  If no future
6068	 merges ever set these flags then they will retain their
6069	 unitialised values, which surprise surprise, correspond
6070	 to the default values.  */
6071      if (bfd_get_arch_info (ibfd)->the_default)
6072	return TRUE;
6073
6074      elf_flags_init (obfd) = TRUE;
6075      elf_elfheader (obfd)->e_flags = elf_elfheader (ibfd)->e_flags;
6076
6077      if (bfd_get_arch (obfd) == bfd_get_arch (ibfd)
6078	  && bfd_get_arch_info (obfd)->the_default)
6079	{
6080	  return bfd_set_arch_mach (obfd, bfd_get_arch (ibfd),
6081				    bfd_get_mach (ibfd));
6082	}
6083
6084      return TRUE;
6085    }
6086
6087  /* Check flag compatibility.  */
6088  if ((in_flags & EF_NDS_ABI) != (out_flags & EF_NDS_ABI))
6089    {
6090      (*_bfd_error_handler)
6091	(_("%B: error: ABI mismatch with previous modules."), ibfd);
6092
6093      bfd_set_error (bfd_error_bad_value);
6094      return FALSE;
6095    }
6096
6097  if ((in_flags & EF_NDS_ARCH) != (out_flags & EF_NDS_ARCH))
6098    {
6099      if (((in_flags & EF_NDS_ARCH) != E_N1_ARCH))
6100	{
6101	  (*_bfd_error_handler)
6102	    (_("%B: error: Instruction set mismatch with previous modules."), ibfd);
6103
6104	  bfd_set_error (bfd_error_bad_value);
6105	  return FALSE;
6106	}
6107    }
6108
6109  /* When linking with V1.2 and V1.3 objects together the output is V1.2.
6110     and perf ext1 and DIV are mergerd to perf ext1.  */
6111  if (in_version == E_NDS32_ELF_VER_1_2 || out_version == E_NDS32_ELF_VER_1_2)
6112    {
6113      elf_elfheader (obfd)->e_flags =
6114	(in_flags & (~(E_NDS32_HAS_EXT_INST | E_NDS32_HAS_DIV_INST)))
6115	| (out_flags & (~(E_NDS32_HAS_EXT_INST | E_NDS32_HAS_DIV_INST)))
6116	| (((in_flags & (E_NDS32_HAS_EXT_INST | E_NDS32_HAS_DIV_INST)))
6117	   ?  E_NDS32_HAS_EXT_INST : 0)
6118	| (((out_flags & (E_NDS32_HAS_EXT_INST | E_NDS32_HAS_DIV_INST)))
6119	   ?  E_NDS32_HAS_EXT_INST : 0)
6120	| (in_16regs & out_16regs) | (in_no_mac & out_no_mac)
6121	| ((in_version > out_version) ? out_version : in_version);
6122    }
6123  else
6124    {
6125      if (in_version != out_version)
6126	(*_bfd_error_handler) (_("%B: warning: Incompatible elf-versions %s and  %s."),
6127				 ibfd, nds32_elfver_strtab[out_version],
6128				 nds32_elfver_strtab[in_version]);
6129
6130      elf_elfheader (obfd)->e_flags = in_flags | out_flags
6131	| (in_16regs & out_16regs) | (in_no_mac & out_no_mac)
6132	| (in_fpu_config > out_fpu_config ? in_fpu_config : out_fpu_config)
6133	| (in_version > out_version ?  out_version : in_version);
6134    }
6135
6136  return TRUE;
6137}
6138
6139/* Display the flags field.  */
6140
6141static bfd_boolean
6142nds32_elf_print_private_bfd_data (bfd *abfd, void *ptr)
6143{
6144  FILE *file = (FILE *) ptr;
6145
6146  BFD_ASSERT (abfd != NULL && ptr != NULL);
6147
6148  _bfd_elf_print_private_bfd_data (abfd, ptr);
6149
6150  fprintf (file, _("private flags = %lx"), elf_elfheader (abfd)->e_flags);
6151
6152  switch (elf_elfheader (abfd)->e_flags & EF_NDS_ARCH)
6153    {
6154    default:
6155    case E_N1_ARCH:
6156      fprintf (file, _(": n1 instructions"));
6157      break;
6158    case E_N1H_ARCH:
6159      fprintf (file, _(": n1h instructions"));
6160      break;
6161    }
6162
6163  fputc ('\n', file);
6164
6165  return TRUE;
6166}
6167
6168static unsigned int
6169nds32_elf_action_discarded (asection *sec)
6170{
6171
6172  if (strncmp
6173      (".gcc_except_table", sec->name, sizeof (".gcc_except_table") - 1) == 0)
6174    return 0;
6175
6176  return _bfd_elf_default_action_discarded (sec);
6177}
6178
6179static asection *
6180nds32_elf_gc_mark_hook (asection *sec, struct bfd_link_info *info,
6181			Elf_Internal_Rela *rel, struct elf_link_hash_entry *h,
6182			Elf_Internal_Sym *sym)
6183{
6184  if (h != NULL)
6185    switch (ELF32_R_TYPE (rel->r_info))
6186      {
6187      case R_NDS32_GNU_VTINHERIT:
6188      case R_NDS32_GNU_VTENTRY:
6189      case R_NDS32_RELA_GNU_VTINHERIT:
6190      case R_NDS32_RELA_GNU_VTENTRY:
6191	return NULL;
6192      }
6193
6194  return _bfd_elf_gc_mark_hook (sec, info, rel, h, sym);
6195}
6196
6197static bfd_boolean
6198nds32_elf_gc_sweep_hook (bfd *abfd, struct bfd_link_info *info, asection *sec,
6199			 const Elf_Internal_Rela *relocs)
6200{
6201  /* Update the got entry reference counts for the section being removed.  */
6202  Elf_Internal_Shdr *symtab_hdr;
6203  struct elf_link_hash_entry **sym_hashes;
6204  bfd_signed_vma *local_got_refcounts;
6205  const Elf_Internal_Rela *rel, *relend;
6206
6207  elf_section_data (sec)->local_dynrel = NULL;
6208
6209  symtab_hdr = &elf_tdata (abfd)->symtab_hdr;
6210  sym_hashes = elf_sym_hashes (abfd);
6211  local_got_refcounts = elf_local_got_refcounts (abfd);
6212
6213  relend = relocs + sec->reloc_count;
6214  for (rel = relocs; rel < relend; rel++)
6215    {
6216      unsigned long r_symndx;
6217      struct elf_link_hash_entry *h = NULL;
6218
6219      r_symndx = ELF32_R_SYM (rel->r_info);
6220      if (r_symndx >= symtab_hdr->sh_info)
6221	{
6222	  /* External symbol.  */
6223	  h = sym_hashes[r_symndx - symtab_hdr->sh_info];
6224	  while (h->root.type == bfd_link_hash_indirect
6225		 || h->root.type == bfd_link_hash_warning)
6226	    h = (struct elf_link_hash_entry *) h->root.u.i.link;
6227	}
6228
6229      switch (ELF32_R_TYPE (rel->r_info))
6230	{
6231	case R_NDS32_GOT_HI20:
6232	case R_NDS32_GOT_LO12:
6233	case R_NDS32_GOT_LO15:
6234	case R_NDS32_GOT_LO19:
6235	case R_NDS32_GOT17S2_RELA:
6236	case R_NDS32_GOT15S2_RELA:
6237	case R_NDS32_GOTOFF:
6238	case R_NDS32_GOTOFF_HI20:
6239	case R_NDS32_GOTOFF_LO12:
6240	case R_NDS32_GOTOFF_LO15:
6241	case R_NDS32_GOTOFF_LO19:
6242	case R_NDS32_GOT20:
6243	case R_NDS32_GOTPC_HI20:
6244	case R_NDS32_GOTPC_LO12:
6245	case R_NDS32_GOTPC20:
6246	  if (h != NULL)
6247	    {
6248	      if (h->got.refcount > 0)
6249		h->got.refcount--;
6250	    }
6251	  else
6252	    {
6253	      if (local_got_refcounts && local_got_refcounts[r_symndx] > 0)
6254		local_got_refcounts[r_symndx]--;
6255	    }
6256	  break;
6257
6258	case R_NDS32_16_RELA:
6259	case R_NDS32_20_RELA:
6260	case R_NDS32_5_RELA:
6261	case R_NDS32_32_RELA:
6262	case R_NDS32_HI20_RELA:
6263	case R_NDS32_LO12S3_RELA:
6264	case R_NDS32_LO12S2_RELA:
6265	case R_NDS32_LO12S2_DP_RELA:
6266	case R_NDS32_LO12S2_SP_RELA:
6267	case R_NDS32_LO12S1_RELA:
6268	case R_NDS32_LO12S0_RELA:
6269	case R_NDS32_LO12S0_ORI_RELA:
6270	case R_NDS32_SDA16S3_RELA:
6271	case R_NDS32_SDA17S2_RELA:
6272	case R_NDS32_SDA18S1_RELA:
6273	case R_NDS32_SDA19S0_RELA:
6274	case R_NDS32_SDA15S3_RELA:
6275	case R_NDS32_SDA15S2_RELA:
6276	case R_NDS32_SDA12S2_DP_RELA:
6277	case R_NDS32_SDA12S2_SP_RELA:
6278	case R_NDS32_SDA15S1_RELA:
6279	case R_NDS32_SDA15S0_RELA:
6280	case R_NDS32_SDA_FP7U2_RELA:
6281	case R_NDS32_15_PCREL_RELA:
6282	case R_NDS32_17_PCREL_RELA:
6283	case R_NDS32_25_PCREL_RELA:
6284	  if (h != NULL)
6285	    {
6286	      struct elf_nds32_link_hash_entry *eh;
6287	      struct elf_nds32_dyn_relocs **pp;
6288	      struct elf_nds32_dyn_relocs *p;
6289
6290	      if (!info->shared && h->plt.refcount > 0)
6291		h->plt.refcount -= 1;
6292
6293	      eh = (struct elf_nds32_link_hash_entry *) h;
6294
6295	      for (pp = &eh->dyn_relocs; (p = *pp) != NULL; pp = &p->next)
6296		if (p->sec == sec)
6297		  {
6298		    if (ELF32_R_TYPE (rel->r_info) == R_NDS32_15_PCREL_RELA
6299			|| ELF32_R_TYPE (rel->r_info) == R_NDS32_17_PCREL_RELA
6300			|| ELF32_R_TYPE (rel->r_info) == R_NDS32_25_PCREL_RELA)
6301		      p->pc_count -= 1;
6302		    p->count -= 1;
6303		    if (p->count == 0)
6304		      *pp = p->next;
6305		    break;
6306		  }
6307	    }
6308	  break;
6309
6310	case R_NDS32_9_PLTREL:
6311	case R_NDS32_25_PLTREL:
6312	  if (h != NULL)
6313	    {
6314	      if (h->plt.refcount > 0)
6315		h->plt.refcount--;
6316	    }
6317	  break;
6318
6319	default:
6320	  break;
6321	}
6322    }
6323
6324  return TRUE;
6325}
6326
6327/* Look through the relocs for a section during the first phase.
6328   Since we don't do .gots or .plts, we just need to consider the
6329   virtual table relocs for gc.  */
6330
6331static bfd_boolean
6332nds32_elf_check_relocs (bfd *abfd, struct bfd_link_info *info,
6333			asection *sec, const Elf_Internal_Rela *relocs)
6334{
6335  Elf_Internal_Shdr *symtab_hdr;
6336  struct elf_link_hash_entry **sym_hashes, **sym_hashes_end;
6337  const Elf_Internal_Rela *rel;
6338  const Elf_Internal_Rela *rel_end;
6339  struct elf_nds32_link_hash_table *htab;
6340  bfd *dynobj;
6341  asection *sreloc = NULL;
6342
6343  if (info->relocatable)
6344    return TRUE;
6345
6346  symtab_hdr = &elf_tdata (abfd)->symtab_hdr;
6347  sym_hashes = elf_sym_hashes (abfd);
6348  sym_hashes_end =
6349    sym_hashes + symtab_hdr->sh_size / sizeof (Elf32_External_Sym);
6350  if (!elf_bad_symtab (abfd))
6351    sym_hashes_end -= symtab_hdr->sh_info;
6352
6353  htab = nds32_elf_hash_table (info);
6354  dynobj = htab->root.dynobj;
6355
6356  rel_end = relocs + sec->reloc_count;
6357  for (rel = relocs; rel < rel_end; rel++)
6358    {
6359      enum elf_nds32_reloc_type r_type;
6360      struct elf_link_hash_entry *h;
6361      unsigned long r_symndx;
6362      int tls_type, old_tls_type;
6363
6364      r_symndx = ELF32_R_SYM (rel->r_info);
6365      r_type = ELF32_R_TYPE (rel->r_info);
6366      if (r_symndx < symtab_hdr->sh_info)
6367	h = NULL;
6368      else
6369	{
6370	  h = sym_hashes[r_symndx - symtab_hdr->sh_info];
6371	  while (h->root.type == bfd_link_hash_indirect
6372		 || h->root.type == bfd_link_hash_warning)
6373	    h = (struct elf_link_hash_entry *) h->root.u.i.link;
6374	}
6375
6376      /* Some relocs require a global offset table.  We create
6377	 got section here, since these relocation need got section
6378	 and it is not created yet.  */
6379      if (htab->sgot == NULL)
6380	{
6381	  switch (r_type)
6382	    {
6383	    case R_NDS32_GOT_HI20:
6384	    case R_NDS32_GOT_LO12:
6385	    case R_NDS32_GOT_LO15:
6386	    case R_NDS32_GOT_LO19:
6387	    case R_NDS32_GOT17S2_RELA:
6388	    case R_NDS32_GOT15S2_RELA:
6389	    case R_NDS32_GOTOFF:
6390	    case R_NDS32_GOTOFF_HI20:
6391	    case R_NDS32_GOTOFF_LO12:
6392	    case R_NDS32_GOTOFF_LO15:
6393	    case R_NDS32_GOTOFF_LO19:
6394	    case R_NDS32_GOTPC20:
6395	    case R_NDS32_GOTPC_HI20:
6396	    case R_NDS32_GOTPC_LO12:
6397	    case R_NDS32_GOT20:
6398	    case R_NDS32_TLS_IE_HI20:
6399	    case R_NDS32_TLS_IE_LO12S2:
6400	      if (dynobj == NULL)
6401		htab->root.dynobj = dynobj = abfd;
6402	      if (!create_got_section (dynobj, info))
6403		return FALSE;
6404	      break;
6405
6406	    default:
6407	      break;
6408	    }
6409	}
6410
6411      switch ((int) r_type)
6412	{
6413	case R_NDS32_GOT_HI20:
6414	case R_NDS32_GOT_LO12:
6415	case R_NDS32_GOT_LO15:
6416	case R_NDS32_GOT_LO19:
6417	case R_NDS32_GOT20:
6418	case R_NDS32_TLS_IE_HI20:
6419	case R_NDS32_TLS_IE_LO12S2:
6420	  switch (r_type)
6421	    {
6422	    case R_NDS32_TLS_IE_HI20:
6423	    case R_NDS32_TLS_IE_LO12S2:
6424	      tls_type = GOT_TLS_IE;
6425	      break;
6426	    default:
6427	      tls_type = GOT_NORMAL;
6428	      break;
6429	    }
6430	  if (h != NULL)
6431	    {
6432	      old_tls_type = elf32_nds32_hash_entry (h)->tls_type;
6433	      h->got.refcount += 1;
6434	    }
6435	  else
6436	    {
6437	      bfd_signed_vma *local_got_refcounts;
6438
6439	      /* This is a global offset table entry for a local
6440		 symbol.  */
6441	      local_got_refcounts = elf_local_got_refcounts (abfd);
6442	      if (local_got_refcounts == NULL)
6443		{
6444		  bfd_size_type size;
6445
6446		  size = symtab_hdr->sh_info;
6447		  size *= sizeof (bfd_signed_vma);
6448		  local_got_refcounts = (bfd_signed_vma *) bfd_zalloc (abfd, size);
6449		  if (local_got_refcounts == NULL)
6450		    return FALSE;
6451		  elf_local_got_refcounts (abfd) = local_got_refcounts;
6452		}
6453	      local_got_refcounts[r_symndx] += 1;
6454	      old_tls_type = elf32_nds32_local_got_tls_type (abfd)[r_symndx];
6455	    }
6456
6457	  /* We will already have issued an error message if there
6458	     is a TLS/non-TLS mismatch, based on the symbol
6459	     type.  So just combine any TLS types needed.  */
6460	  if (old_tls_type != GOT_UNKNOWN && old_tls_type != GOT_NORMAL
6461	      && tls_type != GOT_NORMAL)
6462	    tls_type |= old_tls_type;
6463
6464	  if (old_tls_type != tls_type)
6465	    {
6466	      if (h != NULL)
6467		elf32_nds32_hash_entry (h)->tls_type = tls_type;
6468	      else
6469		elf32_nds32_local_got_tls_type (abfd)[r_symndx] = tls_type;
6470	    }
6471	  break;
6472	case R_NDS32_9_PLTREL:
6473	case R_NDS32_25_PLTREL:
6474	case R_NDS32_PLTREL_HI20:
6475	case R_NDS32_PLTREL_LO12:
6476	case R_NDS32_PLT_GOTREL_HI20:
6477	case R_NDS32_PLT_GOTREL_LO12:
6478	case R_NDS32_PLT_GOTREL_LO15:
6479	case R_NDS32_PLT_GOTREL_LO19:
6480	case R_NDS32_PLT_GOTREL_LO20:
6481
6482	  /* This symbol requires a procedure linkage table entry.  We
6483	     actually build the entry in adjust_dynamic_symbol,
6484	     because this might be a case of linking PIC code without
6485	     linking in any dynamic objects, in which case we don't
6486	     need to generate a procedure linkage table after all.  */
6487
6488	  /* If this is a local symbol, we resolve it directly without
6489	     creating a procedure linkage table entry.  */
6490	  if (h == NULL)
6491	    continue;
6492
6493	  if (h->forced_local)
6494	    break;
6495
6496	  elf32_nds32_hash_entry (h)->tls_type = GOT_NORMAL;
6497	  h->needs_plt = 1;
6498	  h->plt.refcount += 1;
6499	  break;
6500
6501	case R_NDS32_16_RELA:
6502	case R_NDS32_20_RELA:
6503	case R_NDS32_5_RELA:
6504	case R_NDS32_32_RELA:
6505	case R_NDS32_HI20_RELA:
6506	case R_NDS32_LO12S3_RELA:
6507	case R_NDS32_LO12S2_RELA:
6508	case R_NDS32_LO12S2_DP_RELA:
6509	case R_NDS32_LO12S2_SP_RELA:
6510	case R_NDS32_LO12S1_RELA:
6511	case R_NDS32_LO12S0_RELA:
6512	case R_NDS32_LO12S0_ORI_RELA:
6513	case R_NDS32_SDA16S3_RELA:
6514	case R_NDS32_SDA17S2_RELA:
6515	case R_NDS32_SDA18S1_RELA:
6516	case R_NDS32_SDA19S0_RELA:
6517	case R_NDS32_SDA15S3_RELA:
6518	case R_NDS32_SDA15S2_RELA:
6519	case R_NDS32_SDA12S2_DP_RELA:
6520	case R_NDS32_SDA12S2_SP_RELA:
6521	case R_NDS32_SDA15S1_RELA:
6522	case R_NDS32_SDA15S0_RELA:
6523	case R_NDS32_SDA_FP7U2_RELA:
6524	case R_NDS32_15_PCREL_RELA:
6525	case R_NDS32_17_PCREL_RELA:
6526	case R_NDS32_25_PCREL_RELA:
6527
6528	  if (h != NULL && !info->shared)
6529	    {
6530	      h->non_got_ref = 1;
6531	      h->plt.refcount += 1;
6532	    }
6533
6534	  /* If we are creating a shared library, and this is a reloc against
6535	     a global symbol, or a non PC relative reloc against a local
6536	     symbol, then we need to copy the reloc into the shared library.
6537	     However, if we are linking with -Bsymbolic, we do not need to
6538	     copy a reloc against a global symbol which is defined in an
6539	     object we are including in the link (i.e., DEF_REGULAR is set).
6540	     At this point we have not seen all the input files, so it is
6541	     possible that DEF_REGULAR is not set now but will be set later
6542	     (it is never cleared).  We account for that possibility below by
6543	     storing information in the dyn_relocs field of the hash table
6544	     entry.  A similar situation occurs when creating shared libraries
6545	     and symbol visibility changes render the symbol local.
6546
6547	     If on the other hand, we are creating an executable, we may need
6548	     to keep relocations for symbols satisfied by a dynamic library
6549	     if we manage to avoid copy relocs for the symbol.  */
6550	  if ((info->shared
6551	       && (sec->flags & SEC_ALLOC) != 0
6552	       && ((r_type != R_NDS32_25_PCREL_RELA
6553		    && r_type != R_NDS32_15_PCREL_RELA
6554		    && r_type != R_NDS32_17_PCREL_RELA
6555		    && !(r_type == R_NDS32_32_RELA
6556			 && strcmp (sec->name, ".eh_frame") == 0))
6557		   || (h != NULL
6558		       && (!info->symbolic
6559			   || h->root.type == bfd_link_hash_defweak
6560			   || !h->def_regular))))
6561	      || (!info->shared
6562		  && (sec->flags & SEC_ALLOC) != 0
6563		  && h != NULL
6564		  && (h->root.type == bfd_link_hash_defweak
6565		      || !h->def_regular)))
6566	    {
6567	      struct elf_nds32_dyn_relocs *p;
6568	      struct elf_nds32_dyn_relocs **head;
6569
6570	      if (dynobj == NULL)
6571		htab->root.dynobj = dynobj = abfd;
6572
6573	      /* When creating a shared object, we must copy these
6574		 relocs into the output file.  We create a reloc
6575		 section in dynobj and make room for the reloc.  */
6576	      if (sreloc == NULL)
6577		{
6578		  const char *name;
6579
6580		  name = bfd_elf_string_from_elf_section
6581		    (abfd, elf_elfheader (abfd)->e_shstrndx,
6582		     elf_section_data (sec)->rela.hdr->sh_name);
6583		  if (name == NULL)
6584		    return FALSE;
6585
6586		  BFD_ASSERT (strncmp (name, ".rela", 5) == 0
6587			      && strcmp (bfd_get_section_name (abfd, sec),
6588					 name + 5) == 0);
6589
6590		  sreloc = bfd_get_section_by_name (dynobj, name);
6591		  if (sreloc == NULL)
6592		    {
6593		      flagword flags;
6594
6595		      sreloc = bfd_make_section (dynobj, name);
6596		      flags = (SEC_HAS_CONTENTS | SEC_READONLY
6597			       | SEC_IN_MEMORY | SEC_LINKER_CREATED);
6598		      if ((sec->flags & SEC_ALLOC) != 0)
6599			flags |= SEC_ALLOC | SEC_LOAD;
6600		      if (sreloc == NULL
6601			  || !bfd_set_section_flags (dynobj, sreloc, flags)
6602			  || !bfd_set_section_alignment (dynobj, sreloc, 2))
6603			return FALSE;
6604
6605		      elf_section_type (sreloc) = SHT_RELA;
6606		    }
6607		  elf_section_data (sec)->sreloc = sreloc;
6608		}
6609
6610	      /* If this is a global symbol, we count the number of
6611		 relocations we need for this symbol.  */
6612	      if (h != NULL)
6613		head = &((struct elf_nds32_link_hash_entry *) h)->dyn_relocs;
6614	      else
6615		{
6616		  asection *s;
6617
6618		  Elf_Internal_Sym *isym;
6619		  isym = bfd_sym_from_r_symndx (&htab->sym_cache, abfd, r_symndx);
6620		  if (isym == NULL)
6621		    return FALSE;
6622
6623		  /* Track dynamic relocs needed for local syms too.  */
6624		  s = bfd_section_from_elf_index (abfd, isym->st_shndx);
6625		  if (s == NULL)
6626		    return FALSE;
6627
6628		  head = ((struct elf_nds32_dyn_relocs **)
6629			&elf_section_data (s)->local_dynrel);
6630		}
6631
6632	      p = *head;
6633	      if (p == NULL || p->sec != sec)
6634		{
6635		  bfd_size_type amt = sizeof (*p);
6636		  p = (struct elf_nds32_dyn_relocs *) bfd_alloc (dynobj, amt);
6637		  if (p == NULL)
6638		    return FALSE;
6639		  p->next = *head;
6640		  *head = p;
6641		  p->sec = sec;
6642		  p->count = 0;
6643		  p->pc_count = 0;
6644		}
6645
6646	      p->count += 1;
6647	      if (ELF32_R_TYPE (rel->r_info) == R_NDS32_25_PCREL_RELA
6648		  || ELF32_R_TYPE (rel->r_info) == R_NDS32_15_PCREL_RELA
6649		  || ELF32_R_TYPE (rel->r_info) == R_NDS32_17_PCREL_RELA)
6650		p->pc_count += 1;
6651	    }
6652	  break;
6653
6654	  /* This relocation describes the C++ object vtable hierarchy.
6655	     Reconstruct it for later use during GC.  */
6656	case R_NDS32_RELA_GNU_VTINHERIT:
6657	case R_NDS32_GNU_VTINHERIT:
6658	  if (!bfd_elf_gc_record_vtinherit (abfd, sec, h, rel->r_offset))
6659	    return FALSE;
6660	  break;
6661
6662	  /* This relocation describes which C++ vtable entries are actually
6663	     used.  Record for later use during GC.  */
6664	case R_NDS32_GNU_VTENTRY:
6665	  if (!bfd_elf_gc_record_vtentry (abfd, sec, h, rel->r_offset))
6666	    return FALSE;
6667	  break;
6668	case R_NDS32_RELA_GNU_VTENTRY:
6669	  if (!bfd_elf_gc_record_vtentry (abfd, sec, h, rel->r_addend))
6670	    return FALSE;
6671	  break;
6672	}
6673    }
6674
6675  return TRUE;
6676}
6677
6678/* Write VAL in uleb128 format to P, returning a pointer to the
6679   following byte.
6680   This code is copied from elf-attr.c.  */
6681
6682static bfd_byte *
6683write_uleb128 (bfd_byte *p, unsigned int val)
6684{
6685  bfd_byte c;
6686  do
6687    {
6688      c = val & 0x7f;
6689      val >>= 7;
6690      if (val)
6691	c |= 0x80;
6692      *(p++) = c;
6693    }
6694  while (val);
6695  return p;
6696}
6697
6698static bfd_signed_vma
6699calculate_offset (bfd *abfd, asection *sec, Elf_Internal_Rela *irel,
6700		  Elf_Internal_Sym *isymbuf, Elf_Internal_Shdr *symtab_hdr,
6701		  int *pic_ext_target)
6702{
6703  bfd_signed_vma foff;
6704  bfd_vma symval, addend;
6705  asection *sym_sec;
6706
6707  /* Get the value of the symbol referred to by the reloc.  */
6708  if (ELF32_R_SYM (irel->r_info) < symtab_hdr->sh_info)
6709    {
6710      Elf_Internal_Sym *isym;
6711
6712      /* A local symbol.  */
6713      isym = isymbuf + ELF32_R_SYM (irel->r_info);
6714
6715      if (isym->st_shndx == SHN_UNDEF)
6716	sym_sec = bfd_und_section_ptr;
6717      else if (isym->st_shndx == SHN_ABS)
6718	sym_sec = bfd_abs_section_ptr;
6719      else if (isym->st_shndx == SHN_COMMON)
6720	sym_sec = bfd_com_section_ptr;
6721      else
6722	sym_sec = bfd_section_from_elf_index (abfd, isym->st_shndx);
6723      symval = isym->st_value + sym_sec->output_section->vma
6724	       + sym_sec->output_offset;
6725    }
6726  else
6727    {
6728      unsigned long indx;
6729      struct elf_link_hash_entry *h;
6730      bfd *owner;
6731
6732      /* An external symbol.  */
6733      indx = ELF32_R_SYM (irel->r_info) - symtab_hdr->sh_info;
6734      h = elf_sym_hashes (abfd)[indx];
6735      BFD_ASSERT (h != NULL);
6736
6737      if (h->root.type != bfd_link_hash_defined
6738	  && h->root.type != bfd_link_hash_defweak)
6739	/* This appears to be a reference to an undefined
6740	   symbol.  Just ignore it--it will be caught by the
6741	   regular reloc processing.  */
6742	return 0;
6743      owner = h->root.u.def.section->owner;
6744      if (owner && (elf_elfheader (owner)->e_flags & E_NDS32_HAS_PIC))
6745	*pic_ext_target = 1;
6746
6747      if (h->root.u.def.section->flags & SEC_MERGE)
6748	{
6749	  sym_sec = h->root.u.def.section;
6750	  symval = _bfd_merged_section_offset (abfd, &sym_sec,
6751					       elf_section_data (sym_sec)->sec_info,
6752					       h->root.u.def.value);
6753	  symval = symval + sym_sec->output_section->vma
6754		   + sym_sec->output_offset;
6755	}
6756      else
6757	symval = (h->root.u.def.value
6758		  + h->root.u.def.section->output_section->vma
6759		  + h->root.u.def.section->output_offset);
6760    }
6761
6762  addend = irel->r_addend;
6763
6764  foff = (symval + addend
6765	  - (irel->r_offset + sec->output_section->vma + sec->output_offset));
6766  return foff;
6767}
6768
6769static bfd_vma
6770calculate_plt_memory_address (bfd *abfd, struct bfd_link_info *link_info,
6771			      Elf_Internal_Sym *isymbuf,
6772			      Elf_Internal_Rela *irel,
6773			      Elf_Internal_Shdr *symtab_hdr)
6774{
6775  bfd_vma symval;
6776
6777  if (ELF32_R_SYM (irel->r_info) < symtab_hdr->sh_info)
6778    {
6779      Elf_Internal_Sym *isym;
6780      asection *sym_sec;
6781      /* A local symbol.  */
6782      isym = isymbuf + ELF32_R_SYM (irel->r_info);
6783
6784      if (isym->st_shndx == SHN_UNDEF)
6785	sym_sec = bfd_und_section_ptr;
6786      else if (isym->st_shndx == SHN_ABS)
6787	sym_sec = bfd_abs_section_ptr;
6788      else if (isym->st_shndx == SHN_COMMON)
6789	sym_sec = bfd_com_section_ptr;
6790      else
6791	sym_sec = bfd_section_from_elf_index (abfd, isym->st_shndx);
6792      symval = isym->st_value + sym_sec->output_section->vma
6793	       + sym_sec->output_offset;
6794    }
6795  else
6796    {
6797      unsigned long indx;
6798      struct elf_link_hash_entry *h;
6799      struct elf_nds32_link_hash_table *htab;
6800      asection *splt;
6801
6802      /* An external symbol.  */
6803      indx = ELF32_R_SYM (irel->r_info) - symtab_hdr->sh_info;
6804      h = elf_sym_hashes (abfd)[indx];
6805      BFD_ASSERT (h != NULL);
6806      htab = nds32_elf_hash_table (link_info);
6807      splt = htab->splt;
6808
6809      while (h->root.type == bfd_link_hash_indirect
6810	     || h->root.type == bfd_link_hash_warning)
6811	h = (struct elf_link_hash_entry *) h->root.u.i.link;
6812
6813      if (h->plt.offset == (bfd_vma) - 1)
6814	{
6815	  if (h->root.type != bfd_link_hash_defined
6816	      && h->root.type != bfd_link_hash_defweak)
6817	    /* This appears to be a reference to an undefined
6818	     * symbol.  Just ignore it--it will be caught by the
6819	     * regular reloc processing.  */
6820	    return 0;
6821	  symval = (h->root.u.def.value
6822		    + h->root.u.def.section->output_section->vma
6823		    + h->root.u.def.section->output_offset);
6824	}
6825      else
6826	symval = splt->output_section->vma + h->plt.offset;
6827    }
6828
6829  return symval;
6830}
6831
6832static bfd_signed_vma
6833calculate_plt_offset (bfd *abfd, asection *sec, struct bfd_link_info *link_info,
6834		      Elf_Internal_Sym *isymbuf, Elf_Internal_Rela *irel,
6835		      Elf_Internal_Shdr *symtab_hdr)
6836{
6837  bfd_vma foff;
6838  if ((foff = calculate_plt_memory_address (abfd, link_info, isymbuf, irel,
6839					    symtab_hdr)) == 0)
6840    return 0;
6841  else
6842    return foff - (irel->r_offset
6843		   + sec->output_section->vma + sec->output_offset);
6844}
6845
6846/* Convert a 32-bit instruction to 16-bit one.
6847   INSN is the input 32-bit instruction, INSN16 is the output 16-bit
6848   instruction.  If INSN_TYPE is not NULL, it the CGEN instruction
6849   type of INSN16.  Return 1 if successful.  */
6850
6851static int
6852nds32_convert_32_to_16_alu1 (bfd *abfd, uint32_t insn, uint16_t *pinsn16,
6853			     int *pinsn_type)
6854{
6855  uint16_t insn16 = 0;
6856  int insn_type;
6857  unsigned long mach = bfd_get_mach (abfd);
6858
6859  if (N32_SH5 (insn) != 0)
6860    return 0;
6861
6862  switch (N32_SUB5 (insn))
6863    {
6864    case N32_ALU1_ADD_SLLI:
6865    case N32_ALU1_ADD_SRLI:
6866      if (N32_IS_RT3 (insn) && N32_IS_RA3 (insn) && N32_IS_RB3 (insn))
6867	{
6868	  insn16 = N16_TYPE333 (ADD333, N32_RT5 (insn), N32_RA5 (insn),
6869				N32_RB5 (insn));
6870	  insn_type = NDS32_INSN_ADD333;
6871	}
6872      else if (N32_IS_RT4 (insn))
6873	{
6874	  if (N32_RT5 (insn) == N32_RA5 (insn))
6875	    insn16 = N16_TYPE45 (ADD45, N32_RT54 (insn), N32_RB5 (insn));
6876	  else if (N32_RT5 (insn) == N32_RB5 (insn))
6877	    insn16 = N16_TYPE45 (ADD45, N32_RT54 (insn), N32_RA5 (insn));
6878	  insn_type = NDS32_INSN_ADD45;
6879	}
6880      break;
6881
6882    case N32_ALU1_SUB_SLLI:
6883    case N32_ALU1_SUB_SRLI:
6884      if (N32_IS_RT3 (insn) && N32_IS_RA3 (insn) && N32_IS_RB3 (insn))
6885	{
6886	  insn16 = N16_TYPE333 (SUB333, N32_RT5 (insn), N32_RA5 (insn),
6887				N32_RB5 (insn));
6888	  insn_type = NDS32_INSN_SUB333;
6889	}
6890      else if (N32_IS_RT4 (insn) && N32_RT5 (insn) == N32_RA5 (insn))
6891	{
6892	  insn16 = N16_TYPE45 (SUB45, N32_RT54 (insn), N32_RB5 (insn));
6893	  insn_type = NDS32_INSN_SUB45;
6894	}
6895      break;
6896
6897    case N32_ALU1_AND_SLLI:
6898    case N32_ALU1_AND_SRLI:
6899      /* and $rt, $rt, $rb -> and33 for v3, v3m.  */
6900      if (mach >= MACH_V3 && N32_IS_RT3 (insn) && N32_IS_RA3 (insn)
6901	  && N32_IS_RB3 (insn))
6902	{
6903	  if (N32_RT5 (insn) == N32_RA5 (insn))
6904	    insn16 = N16_MISC33 (AND33, N32_RT5 (insn), N32_RB5 (insn));
6905	  else if (N32_RT5 (insn) == N32_RB5 (insn))
6906	    insn16 = N16_MISC33 (AND33, N32_RT5 (insn), N32_RA5 (insn));
6907	  if (insn16)
6908	    insn_type = NDS32_INSN_AND33;
6909	}
6910      break;
6911
6912    case N32_ALU1_XOR_SLLI:
6913    case N32_ALU1_XOR_SRLI:
6914      /* xor $rt, $rt, $rb -> xor33 for v3, v3m.  */
6915      if (mach >= MACH_V3 && N32_IS_RT3 (insn) && N32_IS_RA3 (insn)
6916	  && N32_IS_RB3 (insn))
6917	{
6918	  if (N32_RT5 (insn) == N32_RA5 (insn))
6919	    insn16 = N16_MISC33 (XOR33, N32_RT5 (insn), N32_RB5 (insn));
6920	  else if (N32_RT5 (insn) == N32_RB5 (insn))
6921	    insn16 = N16_MISC33 (XOR33, N32_RT5 (insn), N32_RA5 (insn));
6922	  if (insn16)
6923	    insn_type = NDS32_INSN_XOR33;
6924	}
6925      break;
6926
6927    case N32_ALU1_OR_SLLI:
6928    case N32_ALU1_OR_SRLI:
6929      /* or $rt, $rt, $rb -> or33 for v3, v3m.  */
6930      if (mach >= MACH_V3 && N32_IS_RT3 (insn) && N32_IS_RA3 (insn)
6931	  && N32_IS_RB3 (insn))
6932	{
6933	  if (N32_RT5 (insn) == N32_RA5 (insn))
6934	    insn16 = N16_MISC33 (OR33, N32_RT5 (insn), N32_RB5 (insn));
6935	  else if (N32_RT5 (insn) == N32_RB5 (insn))
6936	    insn16 = N16_MISC33 (OR33, N32_RT5 (insn), N32_RA5 (insn));
6937	  if (insn16)
6938	    insn_type = NDS32_INSN_OR33;
6939	}
6940      break;
6941    case N32_ALU1_NOR:
6942      /* nor $rt, $ra, $ra -> not33 for v3, v3m.  */
6943      if (mach >= MACH_V3 && N32_IS_RT3 (insn) && N32_IS_RB3 (insn)
6944	  && N32_RA5 (insn) == N32_RB5 (insn))
6945	{
6946	  insn16 = N16_MISC33 (NOT33, N32_RT5 (insn), N32_RA5 (insn));
6947	  insn_type = NDS32_INSN_NOT33;
6948	}
6949      break;
6950    case N32_ALU1_SRAI:
6951      if (N32_IS_RT4 (insn) && N32_RT5 (insn) == N32_RA5 (insn))
6952	{
6953	  insn16 = N16_TYPE45 (SRAI45, N32_RT54 (insn), N32_UB5 (insn));
6954	  insn_type = NDS32_INSN_SRAI45;
6955	}
6956      break;
6957
6958    case N32_ALU1_SRLI:
6959      if (N32_IS_RT4 (insn) && N32_RT5 (insn) == N32_RA5 (insn))
6960	{
6961	  insn16 = N16_TYPE45 (SRLI45, N32_RT54 (insn), N32_UB5 (insn));
6962	  insn_type = NDS32_INSN_SRLI45;
6963	}
6964      break;
6965
6966    case N32_ALU1_SLLI:
6967      if (N32_IS_RT3 (insn) && N32_IS_RA3 (insn) && N32_UB5 (insn) < 8)
6968	{
6969	  insn16 = N16_TYPE333 (SLLI333, N32_RT5 (insn), N32_RA5 (insn),
6970				N32_UB5 (insn));
6971	  insn_type = NDS32_INSN_SLLI333;
6972	}
6973      break;
6974
6975    case N32_ALU1_ZEH:
6976      if (N32_IS_RT3 (insn) && N32_IS_RA3 (insn))
6977	{
6978	  insn16 = N16_BFMI333 (ZEH33, N32_RT5 (insn), N32_RA5 (insn));
6979	  insn_type = NDS32_INSN_ZEH33;
6980	}
6981      break;
6982
6983    case N32_ALU1_SEB:
6984      if (N32_IS_RT3 (insn) && N32_IS_RA3 (insn))
6985	{
6986	  insn16 = N16_BFMI333 (SEB33, N32_RT5 (insn), N32_RA5 (insn));
6987	  insn_type = NDS32_INSN_SEB33;
6988	}
6989      break;
6990
6991    case N32_ALU1_SEH:
6992      if (N32_IS_RT3 (insn) && N32_IS_RA3 (insn))
6993	{
6994	  insn16 = N16_BFMI333 (SEH33, N32_RT5 (insn), N32_RA5 (insn));
6995	  insn_type = NDS32_INSN_SEH33;
6996	}
6997      break;
6998
6999    case N32_ALU1_SLT:
7000      if (N32_RT5 (insn) == REG_R15 && N32_IS_RA4 (insn))
7001	{
7002	  /* Implicit r15.  */
7003	  insn16 = N16_TYPE45 (SLT45, N32_RA54 (insn), N32_RB5 (insn));
7004	  insn_type = NDS32_INSN_SLT45;
7005	}
7006      break;
7007
7008    case N32_ALU1_SLTS:
7009      if (N32_RT5 (insn) == REG_R15 && N32_IS_RA4 (insn))
7010	{
7011	  /* Implicit r15.  */
7012	  insn16 = N16_TYPE45 (SLTS45, N32_RA54 (insn), N32_RB5 (insn));
7013	  insn_type = NDS32_INSN_SLTS45;
7014	}
7015      break;
7016    }
7017
7018  if ((insn16 & 0x8000) == 0)
7019    return 0;
7020
7021  if (pinsn16)
7022    *pinsn16 = insn16;
7023  if (pinsn_type)
7024    *pinsn_type = insn_type;
7025  return 1;
7026}
7027
7028static int
7029nds32_convert_32_to_16_alu2 (bfd *abfd, uint32_t insn, uint16_t *pinsn16,
7030			     int *pinsn_type)
7031{
7032  uint16_t insn16 = 0;
7033  int insn_type;
7034  unsigned long mach = bfd_get_mach (abfd);
7035
7036  /* TODO: bset, bclr, btgl, btst.  */
7037  if (__GF (insn, 6, 4) != 0)
7038    return 0;
7039
7040  switch (N32_IMMU (insn, 6))
7041    {
7042    case N32_ALU2_MUL:
7043      if (mach >= MACH_V3 && N32_IS_RT3 (insn) && N32_IS_RA3 (insn)
7044	  && N32_IS_RB3 (insn))
7045	{
7046	  if (N32_RT5 (insn) == N32_RA5 (insn))
7047	    insn16 = N16_MISC33 (MUL33, N32_RT5 (insn), N32_RB5 (insn));
7048	  else if (N32_RT5 (insn) == N32_RB5 (insn))
7049	    insn16 = N16_MISC33 (MUL33, N32_RT5 (insn), N32_RA5 (insn));
7050	  if (insn16)
7051	    insn_type = NDS32_INSN_MUL33;
7052	}
7053    }
7054
7055  if ((insn16 & 0x8000) == 0)
7056    return 0;
7057
7058  if (pinsn16)
7059    *pinsn16 = insn16;
7060  if (pinsn_type)
7061    *pinsn_type = insn_type;
7062  return 1;
7063}
7064
7065int
7066nds32_convert_32_to_16 (bfd *abfd, uint32_t insn, uint16_t *pinsn16,
7067			int *pinsn_type)
7068{
7069  int op6;
7070  uint16_t insn16 = 0;
7071  int insn_type;
7072  unsigned long mach = bfd_get_mach (abfd);
7073
7074  /* Decode 32-bit instruction.  */
7075  if (insn & 0x80000000)
7076    {
7077      /* Not 32-bit insn.  */
7078      return 0;
7079    }
7080
7081  op6 = N32_OP6 (insn);
7082
7083  /* Convert it to 16-bit instruction.  */
7084  switch (op6)
7085    {
7086    case N32_OP6_MOVI:
7087      if (IS_WITHIN_S (N32_IMM20S (insn), 5))
7088	{
7089	  insn16 = N16_TYPE55 (MOVI55, N32_RT5 (insn), N32_IMM20S (insn));
7090	  insn_type = NDS32_INSN_MOVI55;
7091	}
7092      else if (mach >= MACH_V3 && N32_IMM20S (insn) >= 16
7093	       && N32_IMM20S (insn) < 48 && N32_IS_RT4 (insn))
7094	{
7095	  insn16 = N16_TYPE45 (MOVPI45, N32_RT54 (insn),
7096			       N32_IMM20S (insn) - 16);
7097	  insn_type = NDS32_INSN_MOVPI45;
7098	}
7099      break;
7100
7101    case N32_OP6_ADDI:
7102      if (N32_IMM15S (insn) == 0)
7103	{
7104	  /* Do not convert `addi $sp, $sp, 0' to `mov55 $sp, $sp',
7105	     because `mov55 $sp, $sp' is ifret16 in V3 ISA.  */
7106	  if (mach <= MACH_V2
7107	      || N32_RT5 (insn) != REG_SP || N32_RA5 (insn) != REG_SP)
7108	    {
7109	      insn16 = N16_TYPE55 (MOV55, N32_RT5 (insn), N32_RA5 (insn));
7110	      insn_type = NDS32_INSN_MOV55;
7111	    }
7112	}
7113      else if (N32_IMM15S (insn) > 0)
7114	{
7115	  if (N32_IS_RT3 (insn) && N32_IS_RA3 (insn) && N32_IMM15S (insn) < 8)
7116	    {
7117	      insn16 = N16_TYPE333 (ADDI333, N32_RT5 (insn), N32_RA5 (insn),
7118				    N32_IMM15S (insn));
7119	      insn_type = NDS32_INSN_ADDI333;
7120	    }
7121	  else if (N32_IS_RT4 (insn) && N32_RT5 (insn) == N32_RA5 (insn)
7122		   && N32_IMM15S (insn) < 32)
7123	    {
7124	      insn16 = N16_TYPE45 (ADDI45, N32_RT54 (insn), N32_IMM15S (insn));
7125	      insn_type = NDS32_INSN_ADDI45;
7126	    }
7127	  else if (mach >= MACH_V2 && N32_RT5 (insn) == REG_SP
7128		   && N32_RT5 (insn) == N32_RA5 (insn)
7129		   && N32_IMM15S (insn) < 512)
7130	    {
7131	      insn16 = N16_TYPE10 (ADDI10S, N32_IMM15S (insn));
7132	      insn_type = NDS32_INSN_ADDI10_SP;
7133	    }
7134	  else if (mach >= MACH_V3 && N32_IS_RT3 (insn)
7135		   && N32_RA5 (insn) == REG_SP && N32_IMM15S (insn) < 256
7136		   && (N32_IMM15S (insn) % 4 == 0))
7137	    {
7138	      insn16 = N16_TYPE36 (ADDRI36_SP, N32_RT5 (insn),
7139				   N32_IMM15S (insn) >> 2);
7140	      insn_type = NDS32_INSN_ADDRI36_SP;
7141	    }
7142	}
7143      else
7144	{
7145	  /* Less than 0.  */
7146	  if (N32_IS_RT3 (insn) && N32_IS_RA3 (insn) && N32_IMM15S (insn) > -8)
7147	    {
7148	      insn16 = N16_TYPE333 (SUBI333, N32_RT5 (insn), N32_RA5 (insn),
7149				    0 - N32_IMM15S (insn));
7150	      insn_type = NDS32_INSN_SUBI333;
7151	    }
7152	  else if (N32_IS_RT4 (insn) && N32_RT5 (insn) == N32_RA5 (insn)
7153		   && N32_IMM15S (insn) > -32)
7154	    {
7155	      insn16 = N16_TYPE45 (SUBI45, N32_RT54 (insn),
7156				   0 - N32_IMM15S (insn));
7157	      insn_type = NDS32_INSN_SUBI45;
7158	    }
7159	  else if (mach >= MACH_V2 && N32_RT5 (insn) == REG_SP
7160		   && N32_RT5 (insn) == N32_RA5 (insn)
7161		   && N32_IMM15S (insn) >= -512)
7162	    {
7163	      insn16 = N16_TYPE10 (ADDI10S, N32_IMM15S (insn));
7164	      insn_type = NDS32_INSN_ADDI10_SP;
7165	    }
7166	}
7167      break;
7168
7169    case N32_OP6_ORI:
7170      if (N32_IMM15S (insn) == 0)
7171	{
7172	  /* Do not convert `ori $sp, $sp, 0' to `mov55 $sp, $sp',
7173	     because `mov55 $sp, $sp' is ifret16 in V3 ISA.  */
7174	  if (mach <= MACH_V2
7175	      || N32_RT5 (insn) != REG_SP || N32_RA5 (insn) != REG_SP)
7176	    {
7177	      insn16 = N16_TYPE55 (MOV55, N32_RT5 (insn), N32_RA5 (insn));
7178	      insn_type = NDS32_INSN_MOV55;
7179	    }
7180	}
7181      break;
7182
7183    case N32_OP6_SUBRI:
7184      if (mach >= MACH_V3 && N32_IS_RT3 (insn)
7185	  && N32_IS_RA3 (insn) && N32_IMM15S (insn) == 0)
7186	{
7187	  insn16 = N16_MISC33 (NEG33, N32_RT5 (insn), N32_RA5 (insn));
7188	  insn_type = NDS32_INSN_NEG33;
7189	}
7190      break;
7191
7192    case N32_OP6_ANDI:
7193      if (N32_IS_RT3 (insn) && N32_IS_RA3 (insn))
7194	{
7195	  if (N32_IMM15U (insn) == 1)
7196	    {
7197	      insn16 = N16_BFMI333 (XLSB33, N32_RT5 (insn), N32_RA5 (insn));
7198	      insn_type = NDS32_INSN_XLSB33;
7199	    }
7200	  else if (N32_IMM15U (insn) == 0x7ff)
7201	    {
7202	      insn16 = N16_BFMI333 (X11B33, N32_RT5 (insn), N32_RA5 (insn));
7203	      insn_type = NDS32_INSN_X11B33;
7204	    }
7205	  else if (N32_IMM15U (insn) == 0xff)
7206	    {
7207	      insn16 = N16_BFMI333 (ZEB33, N32_RT5 (insn), N32_RA5 (insn));
7208	      insn_type = NDS32_INSN_ZEB33;
7209	    }
7210	  else if (mach >= MACH_V3 && N32_RT5 (insn) == N32_RA5 (insn)
7211		   && N32_IMM15U (insn) < 256)
7212	    {
7213	      int imm15u = N32_IMM15U (insn);
7214
7215	      if (__builtin_popcount (imm15u) == 1)
7216		{
7217		  /* BMSKI33 */
7218		  int imm3u = __builtin_ctz (imm15u);
7219
7220		  insn16 = N16_BFMI333 (BMSKI33, N32_RT5 (insn), imm3u);
7221		  insn_type = NDS32_INSN_BMSKI33;
7222		}
7223	      else if (imm15u != 0 && __builtin_popcount (imm15u + 1) == 1)
7224		{
7225		  /* FEXTI33 */
7226		  int imm3u = __builtin_ctz (imm15u + 1) - 1;
7227
7228		  insn16 = N16_BFMI333 (FEXTI33, N32_RT5 (insn), imm3u);
7229		  insn_type = NDS32_INSN_FEXTI33;
7230		}
7231	    }
7232	}
7233      break;
7234
7235    case N32_OP6_SLTI:
7236      if (N32_RT5 (insn) == REG_R15 && N32_IS_RA4 (insn)
7237	  && IS_WITHIN_U (N32_IMM15S (insn), 5))
7238	{
7239	  insn16 = N16_TYPE45 (SLTI45, N32_RA54 (insn), N32_IMM15S (insn));
7240	  insn_type = NDS32_INSN_SLTI45;
7241	}
7242      break;
7243
7244    case N32_OP6_SLTSI:
7245      if (N32_RT5 (insn) == REG_R15 && N32_IS_RA4 (insn)
7246	  && IS_WITHIN_U (N32_IMM15S (insn), 5))
7247	{
7248	  insn16 = N16_TYPE45 (SLTSI45, N32_RA54 (insn), N32_IMM15S (insn));
7249	  insn_type = NDS32_INSN_SLTSI45;
7250	}
7251      break;
7252
7253    case N32_OP6_LWI:
7254      if (N32_IS_RT4 (insn) && N32_IMM15S (insn) == 0)
7255	{
7256	  insn16 = N16_TYPE45 (LWI450, N32_RT54 (insn), N32_RA5 (insn));
7257	  insn_type = NDS32_INSN_LWI450;
7258	}
7259      else if (N32_IS_RT3 (insn) && N32_IS_RA3 (insn)
7260	       && IS_WITHIN_U (N32_IMM15S (insn), 3))
7261	{
7262	  insn16 = N16_TYPE333 (LWI333, N32_RT5 (insn), N32_RA5 (insn),
7263				N32_IMM15S (insn));
7264	  insn_type = NDS32_INSN_LWI333;
7265	}
7266      else if (N32_IS_RT3 (insn) && N32_RA5 (insn) == REG_FP
7267	       && IS_WITHIN_U (N32_IMM15S (insn), 7))
7268	{
7269	  insn16 = N16_TYPE37 (XWI37, N32_RT5 (insn), 0, N32_IMM15S (insn));
7270	  insn_type = NDS32_INSN_LWI37;
7271	}
7272      else if (mach >= MACH_V2 && N32_IS_RT3 (insn) && N32_RA5 (insn) == REG_SP
7273	       && IS_WITHIN_U (N32_IMM15S (insn), 7))
7274	{
7275	  insn16 = N16_TYPE37 (XWI37SP, N32_RT5 (insn), 0, N32_IMM15S (insn));
7276	  insn_type = NDS32_INSN_LWI37_SP;
7277	}
7278      else if (mach >= MACH_V2 && N32_IS_RT4 (insn) && N32_RA5 (insn) == REG_R8
7279	       && -32 <= N32_IMM15S (insn) && N32_IMM15S (insn) < 0)
7280	{
7281	  insn16 = N16_TYPE45 (LWI45_FE, N32_RT54 (insn),
7282			       N32_IMM15S (insn) + 32);
7283	  insn_type = NDS32_INSN_LWI45_FE;
7284	}
7285      break;
7286
7287    case N32_OP6_SWI:
7288      if (N32_IS_RT4 (insn) && N32_IMM15S (insn) == 0)
7289	{
7290	  insn16 = N16_TYPE45 (SWI450, N32_RT54 (insn), N32_RA5 (insn));
7291	  insn_type = NDS32_INSN_SWI450;
7292	}
7293      else if (N32_IS_RT3 (insn) && N32_IS_RA3 (insn)
7294	       && IS_WITHIN_U (N32_IMM15S (insn), 3))
7295	{
7296	  insn16 = N16_TYPE333 (SWI333, N32_RT5 (insn), N32_RA5 (insn),
7297				N32_IMM15S (insn));
7298	  insn_type = NDS32_INSN_SWI333;
7299	}
7300      else if (N32_IS_RT3 (insn) && N32_RA5 (insn) == REG_FP
7301	       && IS_WITHIN_U (N32_IMM15S (insn), 7))
7302	{
7303	  insn16 = N16_TYPE37 (XWI37, N32_RT5 (insn), 1, N32_IMM15S (insn));
7304	  insn_type = NDS32_INSN_SWI37;
7305	}
7306      else if (mach >= MACH_V2 && N32_IS_RT3 (insn) && N32_RA5 (insn) == REG_SP
7307	       && IS_WITHIN_U (N32_IMM15S (insn), 7))
7308	{
7309	  insn16 = N16_TYPE37 (XWI37SP, N32_RT5 (insn), 1, N32_IMM15S (insn));
7310	  insn_type = NDS32_INSN_SWI37_SP;
7311	}
7312      break;
7313
7314    case N32_OP6_LWI_BI:
7315      if (N32_IS_RT3 (insn) && N32_IS_RA3 (insn)
7316	  && IS_WITHIN_U (N32_IMM15S (insn), 3))
7317	{
7318	  insn16 = N16_TYPE333 (LWI333_BI, N32_RT5 (insn), N32_RA5 (insn),
7319				N32_IMM15S (insn));
7320	  insn_type = NDS32_INSN_LWI333_BI;
7321	}
7322      break;
7323
7324    case N32_OP6_SWI_BI:
7325      if (N32_IS_RT3 (insn) && N32_IS_RA3 (insn)
7326	  && IS_WITHIN_U (N32_IMM15S (insn), 3))
7327	{
7328	  insn16 = N16_TYPE333 (SWI333_BI, N32_RT5 (insn), N32_RA5 (insn),
7329				N32_IMM15S (insn));
7330	  insn_type = NDS32_INSN_SWI333_BI;
7331	}
7332      break;
7333
7334    case N32_OP6_LHI:
7335      if (N32_IS_RT3 (insn) && N32_IS_RA3 (insn)
7336	  && IS_WITHIN_U (N32_IMM15S (insn), 3))
7337	{
7338	  insn16 = N16_TYPE333 (LHI333, N32_RT5 (insn), N32_RA5 (insn),
7339				N32_IMM15S (insn));
7340	  insn_type = NDS32_INSN_LHI333;
7341	}
7342      break;
7343
7344    case N32_OP6_SHI:
7345      if (N32_IS_RT3 (insn) && N32_IS_RA3 (insn)
7346	  && IS_WITHIN_U (N32_IMM15S (insn), 3))
7347	{
7348	  insn16 = N16_TYPE333 (SHI333, N32_RT5 (insn), N32_RA5 (insn),
7349				N32_IMM15S (insn));
7350	  insn_type = NDS32_INSN_SHI333;
7351	}
7352      break;
7353
7354    case N32_OP6_LBI:
7355      if (N32_IS_RT3 (insn) && N32_IS_RA3 (insn)
7356	  && IS_WITHIN_U (N32_IMM15S (insn), 3))
7357	{
7358	  insn16 = N16_TYPE333 (LBI333, N32_RT5 (insn), N32_RA5 (insn),
7359				N32_IMM15S (insn));
7360	  insn_type = NDS32_INSN_LBI333;
7361	}
7362      break;
7363
7364    case N32_OP6_SBI:
7365      if (N32_IS_RT3 (insn) && N32_IS_RA3 (insn)
7366	  && IS_WITHIN_U (N32_IMM15S (insn), 3))
7367	{
7368	  insn16 = N16_TYPE333 (SBI333, N32_RT5 (insn), N32_RA5 (insn),
7369				N32_IMM15S (insn));
7370	  insn_type = NDS32_INSN_SBI333;
7371	}
7372      break;
7373
7374    case N32_OP6_ALU1:
7375      return nds32_convert_32_to_16_alu1 (abfd, insn, pinsn16, pinsn_type);
7376
7377    case N32_OP6_ALU2:
7378      return nds32_convert_32_to_16_alu2 (abfd, insn, pinsn16, pinsn_type);
7379
7380    case N32_OP6_BR1:
7381      if (!IS_WITHIN_S (N32_IMM14S (insn), 8))
7382	goto done;
7383
7384      if ((insn & __BIT (14)) == 0)
7385	{
7386	  /* N32_BR1_BEQ */
7387	  if (N32_IS_RT3 (insn) && N32_RA5 (insn) == REG_R5
7388	      && N32_RT5 (insn) != REG_R5)
7389	    insn16 = N16_TYPE38 (BEQS38, N32_RT5 (insn), N32_IMM14S (insn));
7390	  else if (N32_IS_RA3 (insn) && N32_RT5 (insn) == REG_R5
7391		   && N32_RA5 (insn) != REG_R5)
7392	    insn16 = N16_TYPE38 (BEQS38, N32_RA5 (insn), N32_IMM14S (insn));
7393	  insn_type = NDS32_INSN_BEQS38;
7394	  break;
7395	}
7396      else
7397	{
7398	  /* N32_BR1_BNE */
7399	  if (N32_IS_RT3 (insn) && N32_RA5 (insn) == REG_R5
7400	      && N32_RT5 (insn) != REG_R5)
7401	    insn16 = N16_TYPE38 (BNES38, N32_RT5 (insn), N32_IMM14S (insn));
7402	  else if (N32_IS_RA3 (insn) && N32_RT5 (insn) == REG_R5
7403		   && N32_RA5 (insn) != REG_R5)
7404	    insn16 = N16_TYPE38 (BNES38, N32_RA5 (insn), N32_IMM14S (insn));
7405	  insn_type = NDS32_INSN_BNES38;
7406	  break;
7407	}
7408      break;
7409
7410    case N32_OP6_BR2:
7411      switch (N32_BR2_SUB (insn))
7412	{
7413	case N32_BR2_BEQZ:
7414	  if (N32_IS_RT3 (insn) && IS_WITHIN_S (N32_IMM16S (insn), 8))
7415	    {
7416	      insn16 = N16_TYPE38 (BEQZ38, N32_RT5 (insn), N32_IMM16S (insn));
7417	      insn_type = NDS32_INSN_BEQZ38;
7418	    }
7419	  else if (N32_RT5 (insn) == REG_R15
7420		   && IS_WITHIN_S (N32_IMM16S (insn), 8))
7421	    {
7422	      insn16 = N16_TYPE8 (BEQZS8, N32_IMM16S (insn));
7423	      insn_type = NDS32_INSN_BEQZS8;
7424	    }
7425	  break;
7426
7427	case N32_BR2_BNEZ:
7428	  if (N32_IS_RT3 (insn) && IS_WITHIN_S (N32_IMM16S (insn), 8))
7429	    {
7430	      insn16 = N16_TYPE38 (BNEZ38, N32_RT5 (insn), N32_IMM16S (insn));
7431	      insn_type = NDS32_INSN_BNEZ38;
7432	    }
7433	  else if (N32_RT5 (insn) == REG_R15
7434		   && IS_WITHIN_S (N32_IMM16S (insn), 8))
7435	    {
7436	      insn16 = N16_TYPE8 (BNEZS8, N32_IMM16S (insn));
7437	      insn_type = NDS32_INSN_BNEZS8;
7438	    }
7439	  break;
7440
7441	case N32_BR2_IFCALL:
7442	  if (IS_WITHIN_U (N32_IMM16S (insn), 9))
7443	    {
7444	      insn16 = N16_TYPE9 (IFCALL9, N32_IMM16S (insn));
7445	      insn_type = NDS32_INSN_IFCALL9;
7446	    }
7447	  break;
7448	}
7449      break;
7450
7451    case N32_OP6_JI:
7452      if ((insn & __BIT (24)) == 0)
7453	{
7454	  /* N32_JI_J */
7455	  if (IS_WITHIN_S (N32_IMM24S (insn), 8))
7456	    {
7457	      insn16 = N16_TYPE8 (J8, N32_IMM24S (insn));
7458	      insn_type = NDS32_INSN_J8;
7459	    }
7460	}
7461      break;
7462
7463    case N32_OP6_JREG:
7464      if (__GF (insn, 8, 2) != 0)
7465	goto done;
7466
7467      switch (N32_IMMU (insn, 5))
7468	{
7469	case N32_JREG_JR:
7470	  if (N32_JREG_HINT (insn) == 0)
7471	    {
7472	      /* jr */
7473	      insn16 = N16_TYPE5 (JR5, N32_RB5 (insn));
7474	      insn_type = NDS32_INSN_JR5;
7475	    }
7476	  else if (N32_JREG_HINT (insn) == 1)
7477	    {
7478	      /* ret */
7479	      insn16 = N16_TYPE5 (RET5, N32_RB5 (insn));
7480	      insn_type = NDS32_INSN_RET5;
7481	    }
7482	  else if (N32_JREG_HINT (insn) == 3)
7483	    {
7484	      /* ifret = mov55 $sp, $sp */
7485	      insn16 = N16_TYPE55 (MOV55, REG_SP, REG_SP);
7486	      insn_type = NDS32_INSN_IFRET;
7487	    }
7488	  break;
7489
7490	case N32_JREG_JRAL:
7491	  /* It's convertible when return rt5 is $lp and address
7492	     translation is kept.  */
7493	  if (N32_RT5 (insn) == REG_LP && N32_JREG_HINT (insn) == 0)
7494	    {
7495	      insn16 = N16_TYPE5 (JRAL5, N32_RB5 (insn));
7496	      insn_type = NDS32_INSN_JRAL5;
7497	    }
7498	  break;
7499	}
7500      break;
7501
7502    case N32_OP6_MISC:
7503      if (N32_SUB5 (insn) == N32_MISC_BREAK && N32_SWID (insn) < 32)
7504	{
7505	  /* For v3, swid above 31 are used for ex9.it.  */
7506	  insn16 = N16_TYPE5 (BREAK16, N32_SWID (insn));
7507	  insn_type = NDS32_INSN_BREAK16;
7508	}
7509      break;
7510
7511    default:
7512      /* This instruction has no 16-bit variant.  */
7513      goto done;
7514    }
7515
7516done:
7517  /* Bit-15 of insn16 should be set for a valid instruction.  */
7518  if ((insn16 & 0x8000) == 0)
7519    return 0;
7520
7521  if (pinsn16)
7522    *pinsn16 = insn16;
7523  if (pinsn_type)
7524    *pinsn_type = insn_type;
7525  return 1;
7526}
7527
7528static int
7529special_convert_32_to_16 (unsigned long insn, uint16_t *pinsn16,
7530			  Elf_Internal_Rela *reloc)
7531{
7532  uint16_t insn16 = 0;
7533
7534  if ((reloc->r_addend & R_NDS32_INSN16_FP7U2_FLAG) == 0
7535      || (ELF32_R_TYPE (reloc->r_info) != R_NDS32_INSN16))
7536    return 0;
7537
7538  if (!N32_IS_RT3 (insn))
7539    return 0;
7540
7541  switch (N32_OP6 (insn))
7542    {
7543    case N32_OP6_LWI:
7544      if (N32_RA5 (insn) == REG_GP && IS_WITHIN_U (N32_IMM15S (insn), 7))
7545	insn16 = N16_TYPE37 (XWI37, N32_RT5 (insn), 0, N32_IMM15S (insn));
7546      break;
7547    case N32_OP6_SWI:
7548      if (N32_RA5 (insn) == REG_GP && IS_WITHIN_U (N32_IMM15S (insn), 7))
7549	insn16 = N16_TYPE37 (XWI37, N32_RT5 (insn), 1, N32_IMM15S (insn));
7550      break;
7551    case N32_OP6_HWGP:
7552      if (!IS_WITHIN_U (N32_IMM17S (insn), 7))
7553	break;
7554
7555      if (__GF (insn, 17, 3) == 6)
7556	insn16 = N16_TYPE37 (XWI37, N32_RT5 (insn), 0, N32_IMM17S (insn));
7557      else if (__GF (insn, 17, 3) == 7)
7558	insn16 = N16_TYPE37 (XWI37, N32_RT5 (insn), 1, N32_IMM17S (insn));
7559      break;
7560    }
7561
7562  if ((insn16 & 0x8000) == 0)
7563    return 0;
7564
7565  *pinsn16 = insn16;
7566  return 1;
7567}
7568
7569/* Convert a 16-bit instruction to 32-bit one.
7570   INSN16 it the input and PINSN it the point to output.
7571   Return non-zero on successful.  Otherwise 0 is returned.  */
7572
7573int
7574nds32_convert_16_to_32 (bfd *abfd, uint16_t insn16, uint32_t *pinsn)
7575{
7576  uint32_t insn = 0xffffffff;
7577  unsigned long mach = bfd_get_mach (abfd);
7578
7579  /* NOTE: push25, pop25 and movd44 do not have 32-bit variants.  */
7580
7581  switch (__GF (insn16, 9, 6))
7582    {
7583    case 0x4:			/* add45 */
7584      insn = N32_ALU1 (ADD, N16_RT4 (insn16), N16_RT4 (insn16),
7585		       N16_RA5 (insn16));
7586      goto done;
7587    case 0x5:			/* sub45 */
7588      insn = N32_ALU1 (SUB, N16_RT4 (insn16), N16_RT4 (insn16),
7589		       N16_RA5 (insn16));
7590      goto done;
7591    case 0x6:			/* addi45 */
7592      insn = N32_TYPE2 (ADDI, N16_RT4 (insn16), N16_RT4 (insn16),
7593			N16_IMM5U (insn16));
7594      goto done;
7595    case 0x7:			/* subi45 */
7596      insn = N32_TYPE2 (ADDI, N16_RT4 (insn16), N16_RT4 (insn16),
7597			-N16_IMM5U (insn16));
7598      goto done;
7599    case 0x8:			/* srai45 */
7600      insn = N32_ALU1 (SRAI, N16_RT4 (insn16), N16_RT4 (insn16),
7601		       N16_IMM5U (insn16));
7602      goto done;
7603    case 0x9:			/* srli45 */
7604      insn = N32_ALU1 (SRLI, N16_RT4 (insn16), N16_RT4 (insn16),
7605		       N16_IMM5U (insn16));
7606      goto done;
7607    case 0xa:			/* slli333 */
7608      insn = N32_ALU1 (SLLI, N16_RT3 (insn16), N16_RA3 (insn16),
7609		       N16_IMM3U (insn16));
7610      goto done;
7611    case 0xc:			/* add333 */
7612      insn = N32_ALU1 (ADD, N16_RT3 (insn16), N16_RA3 (insn16),
7613		       N16_RB3 (insn16));
7614      goto done;
7615    case 0xd:			/* sub333 */
7616      insn = N32_ALU1 (SUB, N16_RT3 (insn16), N16_RA3 (insn16),
7617		       N16_RB3 (insn16));
7618      goto done;
7619    case 0xe:			/* addi333 */
7620      insn = N32_TYPE2 (ADDI, N16_RT3 (insn16), N16_RA3 (insn16),
7621			N16_IMM3U (insn16));
7622      goto done;
7623    case 0xf:			/* subi333 */
7624      insn = N32_TYPE2 (ADDI, N16_RT3 (insn16), N16_RA3 (insn16),
7625			-N16_IMM3U (insn16));
7626      goto done;
7627    case 0x10:			/* lwi333 */
7628      insn = N32_TYPE2 (LWI, N16_RT3 (insn16), N16_RA3 (insn16),
7629			N16_IMM3U (insn16));
7630      goto done;
7631    case 0x12:			/* lhi333 */
7632      insn = N32_TYPE2 (LHI, N16_RT3 (insn16), N16_RA3 (insn16),
7633			N16_IMM3U (insn16));
7634      goto done;
7635    case 0x13:			/* lbi333 */
7636      insn = N32_TYPE2 (LBI, N16_RT3 (insn16), N16_RA3 (insn16),
7637			N16_IMM3U (insn16));
7638      goto done;
7639    case 0x11:			/* lwi333.bi */
7640      insn = N32_TYPE2 (LWI_BI, N16_RT3 (insn16), N16_RA3 (insn16),
7641			N16_IMM3U (insn16));
7642      goto done;
7643    case 0x14:			/* swi333 */
7644      insn = N32_TYPE2 (SWI, N16_RT3 (insn16), N16_RA3 (insn16),
7645			N16_IMM3U (insn16));
7646      goto done;
7647    case 0x16:			/* shi333 */
7648      insn = N32_TYPE2 (SHI, N16_RT3 (insn16), N16_RA3 (insn16),
7649			N16_IMM3U (insn16));
7650      goto done;
7651    case 0x17:			/* sbi333 */
7652      insn = N32_TYPE2 (SBI, N16_RT3 (insn16), N16_RA3 (insn16),
7653			N16_IMM3U (insn16));
7654      goto done;
7655    case 0x15:			/* swi333.bi */
7656      insn = N32_TYPE2 (SWI_BI, N16_RT3 (insn16), N16_RA3 (insn16),
7657			N16_IMM3U (insn16));
7658      goto done;
7659    case 0x18:			/* addri36.sp */
7660      insn = N32_TYPE2 (ADDI, N16_RT3 (insn16), REG_SP,
7661			N16_IMM6U (insn16) << 2);
7662      goto done;
7663    case 0x19:			/* lwi45.fe */
7664      insn = N32_TYPE2 (LWI, N16_RT4 (insn16), REG_R8,
7665			(N16_IMM5U (insn16) - 32));
7666      goto done;
7667    case 0x1a:			/* lwi450 */
7668      insn = N32_TYPE2 (LWI, N16_RT4 (insn16), N16_RA5 (insn16), 0);
7669      goto done;
7670    case 0x1b:			/* swi450 */
7671      insn = N32_TYPE2 (SWI, N16_RT4 (insn16), N16_RA5 (insn16), 0);
7672      goto done;
7673
7674      /* These are r15 implied instructions.  */
7675    case 0x30:			/* slts45 */
7676      insn = N32_ALU1 (SLTS, REG_TA, N16_RT4 (insn16), N16_RA5 (insn16));
7677      goto done;
7678    case 0x31:			/* slt45 */
7679      insn = N32_ALU1 (SLT, REG_TA, N16_RT4 (insn16), N16_RA5 (insn16));
7680      goto done;
7681    case 0x32:			/* sltsi45 */
7682      insn = N32_TYPE2 (SLTSI, REG_TA, N16_RT4 (insn16), N16_IMM5U (insn16));
7683      goto done;
7684    case 0x33:			/* slti45 */
7685      insn = N32_TYPE2 (SLTI, REG_TA, N16_RT4 (insn16), N16_IMM5U (insn16));
7686      goto done;
7687    case 0x34:			/* beqzs8, bnezs8 */
7688      if (insn16 & __BIT (8))
7689	insn = N32_BR2 (BNEZ, REG_TA, N16_IMM8S (insn16));
7690      else
7691	insn = N32_BR2 (BEQZ, REG_TA, N16_IMM8S (insn16));
7692      goto done;
7693
7694    case 0x35:			/* break16, ex9.it */
7695      /* Only consider range of v3 break16.  */
7696      insn = N32_TYPE0 (MISC, (N16_IMM5U (insn16) << 5) | N32_MISC_BREAK);
7697      goto done;
7698
7699    case 0x3c:			/* ifcall9 */
7700      insn = N32_BR2 (IFCALL, 0, N16_IMM9U (insn16));
7701      goto done;
7702    case 0x3d:			/* movpi45 */
7703      insn = N32_TYPE1 (MOVI, N16_RT4 (insn16), N16_IMM5U (insn16) + 16);
7704      goto done;
7705
7706    case 0x3f:			/* MISC33 */
7707      switch (insn16 & 0x7)
7708	{
7709	case 2:			/* neg33 */
7710	  insn = N32_TYPE2 (SUBRI, N16_RT3 (insn16), N16_RA3 (insn16), 0);
7711	  break;
7712	case 3:			/* not33 */
7713	  insn = N32_ALU1 (NOR, N16_RT3 (insn16), N16_RA3 (insn16),
7714			   N16_RA3 (insn16));
7715	  break;
7716	case 4:			/* mul33 */
7717	  insn = N32_ALU2 (MUL, N16_RT3 (insn16), N16_RT3 (insn16),
7718			   N16_RA3 (insn16));
7719	  break;
7720	case 5:			/* xor33 */
7721	  insn = N32_ALU1 (XOR, N16_RT3 (insn16), N16_RT3 (insn16),
7722			   N16_RA3 (insn16));
7723	  break;
7724	case 6:			/* and33 */
7725	  insn = N32_ALU1 (AND, N16_RT3 (insn16), N16_RT3 (insn16),
7726			   N16_RA3 (insn16));
7727	  break;
7728	case 7:			/* or33 */
7729	  insn = N32_ALU1 (OR, N16_RT3 (insn16), N16_RT3 (insn16),
7730			   N16_RA3 (insn16));
7731	  break;
7732	}
7733      goto done;
7734
7735    case 0xb:
7736      switch (insn16 & 0x7)
7737	{
7738	case 0:			/* zeb33 */
7739	  insn = N32_TYPE2 (ANDI, N16_RT3 (insn16), N16_RA3 (insn16), 0xff);
7740	  break;
7741	case 1:			/* zeh33 */
7742	  insn = N32_ALU1 (ZEH, N16_RT3 (insn16), N16_RA3 (insn16), 0);
7743	  break;
7744	case 2:			/* seb33 */
7745	  insn = N32_ALU1 (SEB, N16_RT3 (insn16), N16_RA3 (insn16), 0);
7746	  break;
7747	case 3:			/* seh33 */
7748	  insn = N32_ALU1 (SEH, N16_RT3 (insn16), N16_RA3 (insn16), 0);
7749	  break;
7750	case 4:			/* xlsb33 */
7751	  insn = N32_TYPE2 (ANDI, N16_RT3 (insn16), N16_RA3 (insn16), 1);
7752	  break;
7753	case 5:			/* x11b33 */
7754	  insn = N32_TYPE2 (ANDI, N16_RT3 (insn16), N16_RA3 (insn16), 0x7ff);
7755	  break;
7756	case 6:			/* bmski33 */
7757	  insn = N32_TYPE2 (ANDI, N16_RT3 (insn16), N16_RT3 (insn16),
7758			    1 << __GF (insn16, 3, 3));
7759	  break;
7760	case 7:			/* fexti33 */
7761	  insn = N32_TYPE2 (ANDI, N16_RT3 (insn16), N16_RT3 (insn16),
7762			    (1 << (__GF (insn16, 3, 3) + 1)) - 1);
7763	  break;
7764	}
7765      goto done;
7766    }
7767
7768  switch (__GF (insn16, 10, 5))
7769    {
7770    case 0x0:			/* mov55 or ifret16 */
7771      if (mach >= MACH_V3 && N16_RT5 (insn16) == REG_SP
7772	  && N16_RT5 (insn16) == N16_RA5 (insn16))
7773	insn = N32_JREG (JR, 0, 0, 0, 3);
7774      else
7775	insn = N32_TYPE2 (ADDI, N16_RT5 (insn16), N16_RA5 (insn16), 0);
7776      goto done;
7777    case 0x1:			/* movi55 */
7778      insn = N32_TYPE1 (MOVI, N16_RT5 (insn16), N16_IMM5S (insn16));
7779      goto done;
7780    case 0x1b:			/* addi10s (V2) */
7781      insn = N32_TYPE2 (ADDI, REG_SP, REG_SP, N16_IMM10S (insn16));
7782      goto done;
7783    }
7784
7785  switch (__GF (insn16, 11, 4))
7786    {
7787    case 0x7:			/* lwi37.fp/swi37.fp */
7788      if (insn16 & __BIT (7))	/* swi37.fp */
7789	insn = N32_TYPE2 (SWI, N16_RT38 (insn16), REG_FP, N16_IMM7U (insn16));
7790      else			/* lwi37.fp */
7791	insn = N32_TYPE2 (LWI, N16_RT38 (insn16), REG_FP, N16_IMM7U (insn16));
7792      goto done;
7793    case 0x8:			/* beqz38 */
7794      insn = N32_BR2 (BEQZ, N16_RT38 (insn16), N16_IMM8S (insn16));
7795      goto done;
7796    case 0x9:			/* bnez38 */
7797      insn = N32_BR2 (BNEZ, N16_RT38 (insn16), N16_IMM8S (insn16));
7798      goto done;
7799    case 0xa:			/* beqs38/j8, implied r5 */
7800      if (N16_RT38 (insn16) == 5)
7801	insn = N32_JI (J, N16_IMM8S (insn16));
7802      else
7803	insn = N32_BR1 (BEQ, N16_RT38 (insn16), REG_R5, N16_IMM8S (insn16));
7804      goto done;
7805    case 0xb:			/* bnes38 and others */
7806      if (N16_RT38 (insn16) == 5)
7807	{
7808	  switch (__GF (insn16, 5, 3))
7809	    {
7810	    case 0:		/* jr5 */
7811	      insn = N32_JREG (JR, 0, N16_RA5 (insn16), 0, 0);
7812	      break;
7813	    case 4:		/* ret5 */
7814	      insn = N32_JREG (JR, 0, N16_RA5 (insn16), 0, 1);
7815	      break;
7816	    case 1:		/* jral5 */
7817	      insn = N32_JREG (JRAL, REG_LP, N16_RA5 (insn16), 0, 0);
7818	      break;
7819	    case 2:		/* ex9.it imm5 */
7820	      /* ex9.it had no 32-bit variantl.  */
7821	      break;
7822	    case 5:		/* add5.pc */
7823	      /* add5.pc had no 32-bit variantl.  */
7824	      break;
7825	    }
7826	}
7827      else			/* bnes38 */
7828	insn = N32_BR1 (BNE, N16_RT38 (insn16), REG_R5, N16_IMM8S (insn16));
7829      goto done;
7830    case 0xe:			/* lwi37/swi37 */
7831      if (insn16 & (1 << 7))	/* swi37.sp */
7832	insn = N32_TYPE2 (SWI, N16_RT38 (insn16), REG_SP, N16_IMM7U (insn16));
7833      else			/* lwi37.sp */
7834	insn = N32_TYPE2 (LWI, N16_RT38 (insn16), REG_SP, N16_IMM7U (insn16));
7835      goto done;
7836    }
7837
7838done:
7839  if (insn & 0x80000000)
7840    return 0;
7841
7842  if (pinsn)
7843    *pinsn = insn;
7844  return 1;
7845}
7846
7847static bfd_boolean
7848is_sda_access_insn (unsigned long insn)
7849{
7850  switch (N32_OP6 (insn))
7851    {
7852    case N32_OP6_LWI:
7853    case N32_OP6_LHI:
7854    case N32_OP6_LHSI:
7855    case N32_OP6_LBI:
7856    case N32_OP6_LBSI:
7857    case N32_OP6_SWI:
7858    case N32_OP6_SHI:
7859    case N32_OP6_SBI:
7860    case N32_OP6_LWC:
7861    case N32_OP6_LDC:
7862    case N32_OP6_SWC:
7863    case N32_OP6_SDC:
7864      return TRUE;
7865    default:
7866      ;
7867    }
7868  return FALSE;
7869}
7870
7871static unsigned long
7872turn_insn_to_sda_access (uint32_t insn, bfd_signed_vma type, uint32_t *pinsn)
7873{
7874  uint32_t oinsn = 0;
7875
7876  switch (type)
7877    {
7878    case R_NDS32_GOT_LO12:
7879    case R_NDS32_GOTOFF_LO12:
7880    case R_NDS32_PLTREL_LO12:
7881    case R_NDS32_PLT_GOTREL_LO12:
7882    case R_NDS32_LO12S0_RELA:
7883      switch (N32_OP6 (insn))
7884	{
7885	case N32_OP6_LBI:
7886	  /* lbi.gp */
7887	  oinsn = N32_TYPE1 (LBGP, N32_RT5 (insn), 0);
7888	  break;
7889	case N32_OP6_LBSI:
7890	  /* lbsi.gp */
7891	  oinsn = N32_TYPE1 (LBGP, N32_RT5 (insn), __BIT (19));
7892	  break;
7893	case N32_OP6_SBI:
7894	  /* sbi.gp */
7895	  oinsn = N32_TYPE1 (SBGP, N32_RT5 (insn), 0);
7896	  break;
7897	case N32_OP6_ORI:
7898	  /* addi.gp */
7899	  oinsn = N32_TYPE1 (SBGP, N32_RT5 (insn), __BIT (19));
7900	  break;
7901	}
7902      break;
7903
7904    case R_NDS32_LO12S1_RELA:
7905      switch (N32_OP6 (insn))
7906	{
7907	case N32_OP6_LHI:
7908	  /* lhi.gp */
7909	  oinsn = N32_TYPE1 (HWGP, N32_RT5 (insn), 0);
7910	  break;
7911	case N32_OP6_LHSI:
7912	  /* lhsi.gp */
7913	  oinsn = N32_TYPE1 (HWGP, N32_RT5 (insn), __BIT (18));
7914	  break;
7915	case N32_OP6_SHI:
7916	  /* shi.gp */
7917	  oinsn = N32_TYPE1 (HWGP, N32_RT5 (insn), __BIT (19));
7918	  break;
7919	}
7920      break;
7921
7922    case R_NDS32_LO12S2_RELA:
7923      switch (N32_OP6 (insn))
7924	{
7925	case N32_OP6_LWI:
7926	  /* lwi.gp */
7927	  oinsn = N32_TYPE1 (HWGP, N32_RT5 (insn), __MF (6, 17, 3));
7928	  break;
7929	case N32_OP6_SWI:
7930	  /* swi.gp */
7931	  oinsn = N32_TYPE1 (HWGP, N32_RT5 (insn), __MF (7, 17, 3));
7932	  break;
7933	}
7934      break;
7935
7936    case R_NDS32_LO12S2_DP_RELA:
7937    case R_NDS32_LO12S2_SP_RELA:
7938      oinsn = (insn & 0x7ff07000) | (REG_GP << 15);
7939      break;
7940    }
7941
7942  if (oinsn)
7943    *pinsn = oinsn;
7944
7945  return oinsn != 0;
7946}
7947
7948/* Linker hasn't found the correct merge section for non-section symbol
7949   in relax time, this work is left to the function elf_link_input_bfd().
7950   So for non-section symbol, _bfd_merged_section_offset is also needed
7951   to find the correct symbol address.  */
7952
7953static bfd_vma
7954nds32_elf_rela_local_sym (bfd *abfd, Elf_Internal_Sym *sym,
7955			  asection **psec, Elf_Internal_Rela *rel)
7956{
7957  asection *sec = *psec;
7958  bfd_vma relocation;
7959
7960  relocation = (sec->output_section->vma
7961		+ sec->output_offset + sym->st_value);
7962  if ((sec->flags & SEC_MERGE) && sec->sec_info_type == SEC_INFO_TYPE_MERGE)
7963    {
7964      if (ELF_ST_TYPE (sym->st_info) == STT_SECTION)
7965	rel->r_addend =
7966	  _bfd_merged_section_offset (abfd, psec,
7967				      elf_section_data (sec)->sec_info,
7968				      sym->st_value + rel->r_addend);
7969      else
7970	rel->r_addend =
7971	  _bfd_merged_section_offset (abfd, psec,
7972				      elf_section_data (sec)->sec_info,
7973				      sym->st_value) + rel->r_addend;
7974
7975      if (sec != *psec)
7976	{
7977	  /* If we have changed the section, and our original section is
7978	     marked with SEC_EXCLUDE, it means that the original
7979	     SEC_MERGE section has been completely subsumed in some
7980	     other SEC_MERGE section.  In this case, we need to leave
7981	     some info around for --emit-relocs.  */
7982	  if ((sec->flags & SEC_EXCLUDE) != 0)
7983	    sec->kept_section = *psec;
7984	  sec = *psec;
7985	}
7986      rel->r_addend -= relocation;
7987      rel->r_addend += sec->output_section->vma + sec->output_offset;
7988    }
7989  return relocation;
7990}
7991
7992static bfd_vma
7993calculate_memory_address (bfd *abfd, Elf_Internal_Rela *irel,
7994			  Elf_Internal_Sym *isymbuf,
7995			  Elf_Internal_Shdr *symtab_hdr)
7996{
7997  bfd_signed_vma foff;
7998  bfd_vma symval, addend;
7999  Elf_Internal_Rela irel_fn;
8000  Elf_Internal_Sym *isym;
8001  asection *sym_sec;
8002
8003  /* Get the value of the symbol referred to by the reloc.  */
8004  if (ELF32_R_SYM (irel->r_info) < symtab_hdr->sh_info)
8005    {
8006      /* A local symbol.  */
8007      isym = isymbuf + ELF32_R_SYM (irel->r_info);
8008
8009      if (isym->st_shndx == SHN_UNDEF)
8010	sym_sec = bfd_und_section_ptr;
8011      else if (isym->st_shndx == SHN_ABS)
8012	sym_sec = bfd_abs_section_ptr;
8013      else if (isym->st_shndx == SHN_COMMON)
8014	sym_sec = bfd_com_section_ptr;
8015      else
8016	sym_sec = bfd_section_from_elf_index (abfd, isym->st_shndx);
8017      memcpy (&irel_fn, irel, sizeof (Elf_Internal_Rela));
8018      symval = nds32_elf_rela_local_sym (abfd, isym, &sym_sec, &irel_fn);
8019      addend = irel_fn.r_addend;
8020    }
8021  else
8022    {
8023      unsigned long indx;
8024      struct elf_link_hash_entry *h;
8025
8026      /* An external symbol.  */
8027      indx = ELF32_R_SYM (irel->r_info) - symtab_hdr->sh_info;
8028      h = elf_sym_hashes (abfd)[indx];
8029      BFD_ASSERT (h != NULL);
8030
8031      while (h->root.type == bfd_link_hash_indirect
8032	     || h->root.type == bfd_link_hash_warning)
8033	h = (struct elf_link_hash_entry *) h->root.u.i.link;
8034
8035      if (h->root.type != bfd_link_hash_defined
8036	  && h->root.type != bfd_link_hash_defweak)
8037	/* This appears to be a reference to an undefined
8038	   symbol.  Just ignore it--it will be caught by the
8039	   regular reloc processing.  */
8040	return 0;
8041
8042      if (h->root.u.def.section->flags & SEC_MERGE)
8043	{
8044	  sym_sec = h->root.u.def.section;
8045	  symval = _bfd_merged_section_offset (abfd, &sym_sec, elf_section_data
8046					       (sym_sec)->sec_info, h->root.u.def.value);
8047	  symval = symval + sym_sec->output_section->vma
8048		   + sym_sec->output_offset;
8049	}
8050      else
8051	symval = (h->root.u.def.value
8052		  + h->root.u.def.section->output_section->vma
8053		  + h->root.u.def.section->output_offset);
8054      addend = irel->r_addend;
8055    }
8056
8057  foff = symval + addend;
8058
8059  return foff;
8060}
8061
8062static bfd_vma
8063calculate_got_memory_address (bfd *abfd, struct bfd_link_info *link_info,
8064			      Elf_Internal_Rela *irel,
8065			      Elf_Internal_Shdr *symtab_hdr)
8066{
8067  int symndx;
8068  bfd_vma *local_got_offsets;
8069  /* Get the value of the symbol referred to by the reloc.  */
8070  struct elf_link_hash_entry *h;
8071  struct elf_nds32_link_hash_table *htab = nds32_elf_hash_table (link_info);
8072
8073  /* An external symbol.  */
8074  symndx = ELF32_R_SYM (irel->r_info) - symtab_hdr->sh_info;
8075  h = elf_sym_hashes (abfd)[symndx];
8076  while (h->root.type == bfd_link_hash_indirect
8077	 || h->root.type == bfd_link_hash_warning)
8078    h = (struct elf_link_hash_entry *) h->root.u.i.link;
8079
8080  if (symndx >= 0)
8081    {
8082      BFD_ASSERT (h != NULL);
8083      return htab->sgot->output_section->vma + htab->sgot->output_offset
8084	     + h->got.offset;
8085    }
8086  else
8087    {
8088      local_got_offsets = elf_local_got_offsets (abfd);
8089      BFD_ASSERT (local_got_offsets != NULL);
8090      return htab->sgot->output_section->vma + htab->sgot->output_offset
8091	     + local_got_offsets[ELF32_R_SYM (irel->r_info)];
8092    }
8093
8094  /* The _GLOBAL_OFFSET_TABLE_ may be undefweak(or should be?).  */
8095  /* The check of h->root.type is passed.  */
8096}
8097
8098static int
8099is_16bit_NOP (bfd *abfd ATTRIBUTE_UNUSED,
8100	      asection *sec, Elf_Internal_Rela *rel)
8101{
8102  bfd_byte *contents;
8103  unsigned short insn16;
8104
8105  if (!(rel->r_addend & R_NDS32_INSN16_CONVERT_FLAG))
8106    return FALSE;
8107  contents = elf_section_data (sec)->this_hdr.contents;
8108  insn16 = bfd_getb16 (contents + rel->r_offset);
8109  if (insn16 == NDS32_NOP16)
8110    return TRUE;
8111  return FALSE;
8112}
8113
8114/* It checks whether the instruction could be converted to
8115   16-bit form and returns the converted one.
8116
8117   `internal_relocs' is supposed to be sorted.  */
8118
8119static int
8120is_convert_32_to_16 (bfd *abfd, asection *sec,
8121		     Elf_Internal_Rela *reloc,
8122		     Elf_Internal_Rela *internal_relocs,
8123		     Elf_Internal_Rela *irelend,
8124		     uint16_t *insn16)
8125{
8126#define NORMAL_32_TO_16 (1 << 0)
8127#define SPECIAL_32_TO_16 (1 << 1)
8128  bfd_byte *contents = NULL;
8129  bfd_signed_vma off;
8130  bfd_vma mem_addr;
8131  uint32_t insn = 0;
8132  Elf_Internal_Rela *pc_rel;
8133  int pic_ext_target = 0;
8134  Elf_Internal_Shdr *symtab_hdr;
8135  Elf_Internal_Sym *isymbuf = NULL;
8136  int convert_type;
8137  bfd_vma offset;
8138
8139  if (reloc->r_offset + 4 > sec->size)
8140    return FALSE;
8141
8142  offset = reloc->r_offset;
8143
8144  if (!nds32_get_section_contents (abfd, sec, &contents))
8145    return FALSE;
8146  insn = bfd_getb32 (contents + offset);
8147
8148  if (nds32_convert_32_to_16 (abfd, insn, insn16, NULL))
8149    convert_type = NORMAL_32_TO_16;
8150  else if (special_convert_32_to_16 (insn, insn16, reloc))
8151    convert_type = SPECIAL_32_TO_16;
8152  else
8153    return FALSE;
8154
8155  symtab_hdr = &elf_tdata (abfd)->symtab_hdr;
8156  if (!nds32_get_local_syms (abfd, sec, &isymbuf))
8157    return FALSE;
8158
8159  /* Find the first relocation of the same relocation-type,
8160     so we iteratie them forward.  */
8161  pc_rel = reloc;
8162  while ((pc_rel - 1) >= internal_relocs && pc_rel[-1].r_offset == offset)
8163    pc_rel--;
8164
8165  for (; pc_rel < irelend && pc_rel->r_offset == offset; pc_rel++)
8166    {
8167      if (ELF32_R_TYPE (pc_rel->r_info) == R_NDS32_15_PCREL_RELA
8168	  || ELF32_R_TYPE (pc_rel->r_info) == R_NDS32_17_PCREL_RELA
8169	  || ELF32_R_TYPE (pc_rel->r_info) == R_NDS32_25_PCREL_RELA
8170	  || ELF32_R_TYPE (pc_rel->r_info) == R_NDS32_25_PLTREL)
8171	{
8172	  off = calculate_offset (abfd, sec, pc_rel, isymbuf, symtab_hdr,
8173				  &pic_ext_target);
8174	  if (off >= ACCURATE_8BIT_S1 || off < -ACCURATE_8BIT_S1
8175	      || off == 0)
8176	    return FALSE;
8177	  break;
8178	}
8179      else if (ELF32_R_TYPE (pc_rel->r_info) == R_NDS32_20_RELA)
8180	{
8181	  /* movi => movi55  */
8182	  mem_addr = calculate_memory_address (abfd, pc_rel, isymbuf,
8183					       symtab_hdr);
8184	  /* mem_addr is unsigned, but the value should
8185	     be between [-16, 15].  */
8186	  if ((mem_addr + 0x10) >> 5)
8187	    return FALSE;
8188	  break;
8189	}
8190      else if ((ELF32_R_TYPE (pc_rel->r_info) == R_NDS32_TLS_LE_20)
8191	       || (ELF32_R_TYPE (pc_rel->r_info) == R_NDS32_TLS_LE_LO12))
8192	{
8193	  /* It never happen movi to movi55 for R_NDS32_TLS_LE_20,
8194	     because it can be relaxed to addi for TLS_LE_ADD.  */
8195	  return FALSE;
8196	}
8197      else if ((ELF32_R_TYPE (pc_rel->r_info) == R_NDS32_SDA15S2_RELA
8198		|| ELF32_R_TYPE (pc_rel->r_info) == R_NDS32_SDA17S2_RELA)
8199	       && (reloc->r_addend & R_NDS32_INSN16_FP7U2_FLAG)
8200	       && convert_type == SPECIAL_32_TO_16)
8201	{
8202	  /* fp-as-gp
8203	     We've selected a best fp-base for this access, so we can
8204	     always resolve it anyway.  Do nothing.  */
8205	  break;
8206	}
8207      else if ((ELF32_R_TYPE (pc_rel->r_info) > R_NDS32_NONE
8208		&& (ELF32_R_TYPE (pc_rel->r_info) < R_NDS32_RELA_GNU_VTINHERIT))
8209	       || ((ELF32_R_TYPE (pc_rel->r_info) > R_NDS32_RELA_GNU_VTENTRY)
8210		   && (ELF32_R_TYPE (pc_rel->r_info) < R_NDS32_INSN16))
8211	       || ((ELF32_R_TYPE (pc_rel->r_info) > R_NDS32_LOADSTORE)
8212		   && (ELF32_R_TYPE (pc_rel->r_info) < R_NDS32_DWARF2_OP1_RELA)))
8213	{
8214	  /* Prevent unresolved addi instruction translate
8215	     to addi45 or addi333.  */
8216	  return FALSE;
8217	}
8218      else if ((ELF32_R_TYPE (pc_rel->r_info) == R_NDS32_17IFC_PCREL_RELA))
8219	{
8220	  off = calculate_offset (abfd, sec, pc_rel, isymbuf, symtab_hdr,
8221				  &pic_ext_target);
8222	  if (off >= ACCURATE_U9BIT_S1 || off <= 0)
8223	    return FALSE;
8224	  break;
8225	}
8226    }
8227
8228  return TRUE;
8229}
8230
8231static void
8232nds32_elf_write_16 (bfd *abfd ATTRIBUTE_UNUSED, bfd_byte *contents,
8233		    Elf_Internal_Rela *reloc,
8234		    Elf_Internal_Rela *internal_relocs,
8235		    Elf_Internal_Rela *irelend,
8236		    unsigned short insn16)
8237{
8238  Elf_Internal_Rela *pc_rel;
8239  bfd_vma offset;
8240
8241  offset = reloc->r_offset;
8242  bfd_putb16 (insn16, contents + offset);
8243  /* Find the first relocation of the same relocation-type,
8244     so we iteratie them forward.  */
8245  pc_rel = reloc;
8246  while ((pc_rel - 1) > internal_relocs && pc_rel[-1].r_offset == offset)
8247    pc_rel--;
8248
8249  for (; pc_rel < irelend && pc_rel->r_offset == offset; pc_rel++)
8250    {
8251      if (ELF32_R_TYPE (pc_rel->r_info) == R_NDS32_15_PCREL_RELA
8252	  || ELF32_R_TYPE (pc_rel->r_info) == R_NDS32_17_PCREL_RELA
8253	  || ELF32_R_TYPE (pc_rel->r_info) == R_NDS32_25_PCREL_RELA)
8254	{
8255	  pc_rel->r_info =
8256	    ELF32_R_INFO (ELF32_R_SYM (pc_rel->r_info), R_NDS32_9_PCREL_RELA);
8257	}
8258      else if (ELF32_R_TYPE (pc_rel->r_info) == R_NDS32_25_PLTREL)
8259	pc_rel->r_info =
8260	  ELF32_R_INFO (ELF32_R_SYM (pc_rel->r_info), R_NDS32_9_PLTREL);
8261      else if (ELF32_R_TYPE (pc_rel->r_info) == R_NDS32_20_RELA)
8262	pc_rel->r_info =
8263	  ELF32_R_INFO (ELF32_R_SYM (pc_rel->r_info), R_NDS32_5_RELA);
8264      else if (ELF32_R_TYPE (pc_rel->r_info) == R_NDS32_SDA15S2_RELA
8265	       || ELF32_R_TYPE (pc_rel->r_info) == R_NDS32_SDA17S2_RELA)
8266	pc_rel->r_info =
8267	  ELF32_R_INFO (ELF32_R_SYM (pc_rel->r_info), R_NDS32_SDA_FP7U2_RELA);
8268      else if ((ELF32_R_TYPE (pc_rel->r_info) == R_NDS32_17IFC_PCREL_RELA))
8269	pc_rel->r_info =
8270	  ELF32_R_INFO (ELF32_R_SYM (pc_rel->r_info), R_NDS32_10IFCU_PCREL_RELA);
8271    }
8272}
8273
8274/* Find a relocation of type specified by `reloc_type'
8275   of the same r_offset with reloc.
8276   If not found, return irelend.
8277
8278   Assuming relocations are sorted by r_offset,
8279   we find the relocation from `reloc' backward untill relocs,
8280   or find it from `reloc' forward untill irelend.  */
8281
8282static Elf_Internal_Rela *
8283find_relocs_at_address (Elf_Internal_Rela *reloc,
8284			Elf_Internal_Rela *relocs,
8285			Elf_Internal_Rela *irelend,
8286			enum elf_nds32_reloc_type reloc_type)
8287{
8288  Elf_Internal_Rela *rel_t;
8289
8290  /* Find backward.  */
8291  for (rel_t = reloc;
8292       rel_t >= relocs && rel_t->r_offset == reloc->r_offset;
8293       rel_t--)
8294    if (ELF32_R_TYPE (rel_t->r_info) == reloc_type)
8295      return rel_t;
8296
8297  /* We didn't find it backward.  Try find it forward.  */
8298  for (rel_t = reloc;
8299       rel_t < irelend && rel_t->r_offset == reloc->r_offset;
8300       rel_t++)
8301    if (ELF32_R_TYPE (rel_t->r_info) == reloc_type)
8302      return rel_t;
8303
8304  return irelend;
8305}
8306
8307/* Find a relocation of specified type and offset.
8308   `reloc' is just a refence point to find a relocation at specified offset.
8309   If not found, return irelend.
8310
8311   Assuming relocations are sorted by r_offset,
8312   we find the relocation from `reloc' backward untill relocs,
8313   or find it from `reloc' forward untill irelend.  */
8314
8315static Elf_Internal_Rela *
8316find_relocs_at_address_addr (Elf_Internal_Rela *reloc,
8317			     Elf_Internal_Rela *relocs,
8318			     Elf_Internal_Rela *irelend,
8319			     unsigned char reloc_type,
8320			     bfd_vma offset_p)
8321{
8322  Elf_Internal_Rela *rel_t = NULL;
8323
8324  /* First, we try to find a relocation of offset `offset_p',
8325     and then we use find_relocs_at_address to find specific type.  */
8326
8327  if (reloc->r_offset > offset_p)
8328    {
8329      /* Find backward.  */
8330      for (rel_t = reloc;
8331	   rel_t >= relocs && rel_t->r_offset > offset_p; rel_t--)
8332	/* Do nothing.  */;
8333    }
8334  else if (reloc->r_offset < offset_p)
8335    {
8336      /* Find forward.  */
8337      for (rel_t = reloc;
8338	   rel_t < irelend && rel_t->r_offset < offset_p; rel_t++)
8339	/* Do nothing.  */;
8340    }
8341  else
8342    rel_t = reloc;
8343
8344  /* Not found?  */
8345  if (rel_t < relocs || rel_t == irelend || rel_t->r_offset != offset_p)
8346    return irelend;
8347
8348  return find_relocs_at_address (rel_t, relocs, irelend, reloc_type);
8349}
8350
8351static bfd_boolean
8352nds32_elf_check_dup_relocs (Elf_Internal_Rela *reloc,
8353			    Elf_Internal_Rela *internal_relocs,
8354			    Elf_Internal_Rela *irelend,
8355			    unsigned char reloc_type)
8356{
8357  Elf_Internal_Rela *rel_t;
8358
8359  for (rel_t = reloc;
8360       rel_t >= internal_relocs && rel_t->r_offset == reloc->r_offset;
8361       rel_t--)
8362    if (ELF32_R_TYPE (rel_t->r_info) == reloc_type)
8363      {
8364	if (ELF32_R_SYM (rel_t->r_info) == ELF32_R_SYM (reloc->r_info)
8365	    && rel_t->r_addend == reloc->r_addend)
8366	  continue;
8367	return TRUE;
8368      }
8369
8370  for (rel_t = reloc; rel_t < irelend && rel_t->r_offset == reloc->r_offset;
8371       rel_t++)
8372    if (ELF32_R_TYPE (rel_t->r_info) == reloc_type)
8373      {
8374	if (ELF32_R_SYM (rel_t->r_info) == ELF32_R_SYM (reloc->r_info)
8375	    && rel_t->r_addend == reloc->r_addend)
8376	  continue;
8377	return TRUE;
8378      }
8379
8380  return FALSE;
8381}
8382
8383typedef struct nds32_elf_blank nds32_elf_blank_t;
8384struct nds32_elf_blank
8385{
8386  /* Where the blank begins.  */
8387  bfd_vma offset;
8388  /* The size of the blank.  */
8389  bfd_vma size;
8390  /* The accumulative size before this blank.  */
8391  bfd_vma total_size;
8392  nds32_elf_blank_t *next;
8393  nds32_elf_blank_t *prev;
8394};
8395
8396static nds32_elf_blank_t *blank_free_list = NULL;
8397
8398static nds32_elf_blank_t *
8399create_nds32_elf_blank (bfd_vma offset_p, bfd_vma size_p)
8400{
8401  nds32_elf_blank_t *blank_t;
8402
8403  if (blank_free_list)
8404    {
8405      blank_t = blank_free_list;
8406      blank_free_list = blank_free_list->next;
8407    }
8408  else
8409    blank_t = bfd_malloc (sizeof (nds32_elf_blank_t));
8410
8411  if (blank_t == NULL)
8412    return NULL;
8413
8414  blank_t->offset = offset_p;
8415  blank_t->size = size_p;
8416  blank_t->total_size = 0;
8417  blank_t->next = NULL;
8418  blank_t->prev = NULL;
8419
8420  return blank_t;
8421}
8422
8423static void
8424remove_nds32_elf_blank (nds32_elf_blank_t *blank_p)
8425{
8426  if (blank_free_list)
8427    {
8428      blank_free_list->prev = blank_p;
8429      blank_p->next = blank_free_list;
8430    }
8431  else
8432    blank_p->next = NULL;
8433
8434  blank_p->prev = NULL;
8435  blank_free_list = blank_p;
8436}
8437
8438static void
8439clean_nds32_elf_blank (void)
8440{
8441  nds32_elf_blank_t *blank_t;
8442
8443  while (blank_free_list)
8444    {
8445      blank_t = blank_free_list;
8446      blank_free_list = blank_free_list->next;
8447      free (blank_t);
8448    }
8449}
8450
8451static nds32_elf_blank_t *
8452search_nds32_elf_blank (nds32_elf_blank_t *blank_p, bfd_vma addr)
8453{
8454  nds32_elf_blank_t *blank_t;
8455
8456  if (!blank_p)
8457    return NULL;
8458  blank_t = blank_p;
8459
8460  while (blank_t && addr < blank_t->offset)
8461    blank_t = blank_t->prev;
8462  while (blank_t && blank_t->next && addr >= blank_t->next->offset)
8463    blank_t = blank_t->next;
8464
8465  return blank_t;
8466}
8467
8468static bfd_vma
8469get_nds32_elf_blank_total (nds32_elf_blank_t **blank_p, bfd_vma addr,
8470			   int overwrite)
8471{
8472  nds32_elf_blank_t *blank_t;
8473
8474  blank_t = search_nds32_elf_blank (*blank_p, addr);
8475  if (!blank_t)
8476    return 0;
8477
8478  if (overwrite)
8479    *blank_p = blank_t;
8480
8481  if (addr < blank_t->offset + blank_t->size)
8482    return blank_t->total_size + (addr - blank_t->offset);
8483  else
8484    return blank_t->total_size + blank_t->size;
8485}
8486
8487static bfd_boolean
8488insert_nds32_elf_blank (nds32_elf_blank_t **blank_p, bfd_vma addr, bfd_vma len)
8489{
8490  nds32_elf_blank_t *blank_t, *blank_t2;
8491
8492  if (!*blank_p)
8493    {
8494      *blank_p = create_nds32_elf_blank (addr, len);
8495      return *blank_p ? TRUE : FALSE;
8496    }
8497
8498  blank_t = search_nds32_elf_blank (*blank_p, addr);
8499
8500  if (blank_t == NULL)
8501    {
8502      blank_t = create_nds32_elf_blank (addr, len);
8503      if (!blank_t)
8504	return FALSE;
8505      while ((*blank_p)->prev != NULL)
8506	*blank_p = (*blank_p)->prev;
8507      blank_t->next = *blank_p;
8508      (*blank_p)->prev = blank_t;
8509      (*blank_p) = blank_t;
8510      return TRUE;
8511    }
8512
8513  if (addr < blank_t->offset + blank_t->size)
8514    {
8515      if (addr > blank_t->offset + blank_t->size)
8516	blank_t->size = addr - blank_t->offset;
8517    }
8518  else
8519    {
8520      blank_t2 = create_nds32_elf_blank (addr, len);
8521      if (!blank_t2)
8522	return FALSE;
8523      if (blank_t->next)
8524	{
8525	  blank_t->next->prev = blank_t2;
8526	  blank_t2->next = blank_t->next;
8527	}
8528      blank_t2->prev = blank_t;
8529      blank_t->next = blank_t2;
8530      *blank_p = blank_t2;
8531    }
8532
8533  return TRUE;
8534}
8535
8536static bfd_boolean
8537insert_nds32_elf_blank_recalc_total (nds32_elf_blank_t **blank_p, bfd_vma addr,
8538				     bfd_vma len)
8539{
8540  nds32_elf_blank_t *blank_t;
8541
8542  if (!insert_nds32_elf_blank (blank_p, addr, len))
8543    return FALSE;
8544
8545  blank_t = *blank_p;
8546
8547  if (!blank_t->prev)
8548    {
8549      blank_t->total_size = 0;
8550      blank_t = blank_t->next;
8551    }
8552
8553  while (blank_t)
8554    {
8555      blank_t->total_size = blank_t->prev->total_size + blank_t->prev->size;
8556      blank_t = blank_t->next;
8557    }
8558
8559  return TRUE;
8560}
8561
8562static void
8563calc_nds32_blank_total (nds32_elf_blank_t *blank_p)
8564{
8565  nds32_elf_blank_t *blank_t;
8566  bfd_vma total_size = 0;
8567
8568  if (!blank_p)
8569    return;
8570
8571  blank_t = blank_p;
8572  while (blank_t->prev)
8573    blank_t = blank_t->prev;
8574  while (blank_t)
8575    {
8576      blank_t->total_size = total_size;
8577      total_size += blank_t->size;
8578      blank_t = blank_t->next;
8579    }
8580}
8581
8582static bfd_boolean
8583nds32_elf_relax_delete_blanks (bfd *abfd, asection *sec,
8584			       nds32_elf_blank_t *blank_p)
8585{
8586  Elf_Internal_Shdr *symtab_hdr;	/* Symbol table header of this bfd.  */
8587  Elf_Internal_Sym *isym = NULL;	/* Symbol table of this bfd.  */
8588  Elf_Internal_Sym *isymend;		/* Symbol entry iterator.  */
8589  unsigned int sec_shndx;		/* The section the be relaxed.  */
8590  bfd_byte *contents;			/* Contents data of iterating section.  */
8591  Elf_Internal_Rela *internal_relocs;
8592  Elf_Internal_Rela *irel;
8593  Elf_Internal_Rela *irelend;
8594  struct elf_link_hash_entry **sym_hashes;
8595  struct elf_link_hash_entry **end_hashes;
8596  unsigned int symcount;
8597  asection *sect;
8598  nds32_elf_blank_t *blank_t;
8599  nds32_elf_blank_t *blank_t2;
8600  nds32_elf_blank_t *blank_head;
8601
8602  blank_head = blank_t = blank_p;
8603  while (blank_head->prev != NULL)
8604    blank_head = blank_head->prev;
8605  while (blank_t->next != NULL)
8606    blank_t = blank_t->next;
8607
8608  if (blank_t->offset + blank_t->size <= sec->size)
8609    {
8610      blank_t->next = create_nds32_elf_blank (sec->size + 4, 0);
8611      blank_t->next->prev = blank_t;
8612    }
8613  if (blank_head->offset > 0)
8614    {
8615      blank_head->prev = create_nds32_elf_blank (0, 0);
8616      blank_head->prev->next = blank_head;
8617      blank_head = blank_head->prev;
8618    }
8619
8620  sec_shndx = _bfd_elf_section_from_bfd_section (abfd, sec);
8621
8622  /* The deletion must stop at the next ALIGN reloc for an alignment
8623     power larger than the number of bytes we are deleting.  */
8624
8625  symtab_hdr = &elf_tdata (abfd)->symtab_hdr;
8626  if (!nds32_get_local_syms (abfd, sec, &isym))
8627    return FALSE;
8628
8629  if (isym == NULL)
8630    {
8631      isym = bfd_elf_get_elf_syms (abfd, symtab_hdr,
8632				   symtab_hdr->sh_info, 0, NULL, NULL, NULL);
8633      symtab_hdr->contents = (bfd_byte *) isym;
8634    }
8635
8636  if (isym == NULL || symtab_hdr->sh_info == 0)
8637    return FALSE;
8638
8639  blank_t = blank_head;
8640  calc_nds32_blank_total (blank_head);
8641
8642  for (sect = abfd->sections; sect != NULL; sect = sect->next)
8643    {
8644      /* Adjust all the relocs.  */
8645
8646      /* Relocations MUST be kept in memory, because relaxation adjust them.  */
8647      internal_relocs = _bfd_elf_link_read_relocs (abfd, sect, NULL, NULL,
8648						   TRUE /* keep_memory */);
8649      irelend = internal_relocs + sect->reloc_count;
8650
8651      blank_t = blank_head;
8652      blank_t2 = blank_head;
8653
8654      if (!(sect->flags & SEC_RELOC))
8655	continue;
8656
8657      nds32_get_section_contents (abfd, sect, &contents);
8658
8659      for (irel = internal_relocs; irel < irelend; irel++)
8660	{
8661	  bfd_vma raddr;
8662
8663	  if (ELF32_R_TYPE (irel->r_info) >= R_NDS32_DIFF8
8664	      && ELF32_R_TYPE (irel->r_info) <= R_NDS32_DIFF32
8665	      && isym[ELF32_R_SYM (irel->r_info)].st_shndx == sec_shndx)
8666	    {
8667	      unsigned long val = 0;
8668	      unsigned long mask;
8669	      long before, between;
8670	      long offset;
8671
8672	      switch (ELF32_R_TYPE (irel->r_info))
8673		{
8674		case R_NDS32_DIFF8:
8675		  offset = bfd_get_8 (abfd, contents + irel->r_offset);
8676		  break;
8677		case R_NDS32_DIFF16:
8678		  offset = bfd_get_16 (abfd, contents + irel->r_offset);
8679		  break;
8680		case R_NDS32_DIFF32:
8681		  val = bfd_get_32 (abfd, contents + irel->r_offset);
8682		  /* Get the signed bit and mask for the high part.  The
8683		     gcc will alarm when right shift 32-bit since the
8684		     type size of long may be 32-bit.  */
8685		  mask = 0 - (val >> 31);
8686		  if (mask)
8687		    offset = (val | (mask - 0xffffffff));
8688		  else
8689		    offset = val;
8690		  break;
8691		default:
8692		  BFD_ASSERT (0);
8693		}
8694
8695	      /*		  DIFF value
8696		0	     |encoded in location|
8697		|------------|-------------------|---------
8698			    sym+off(addend)
8699		-- before ---| *****************
8700		--------------------- between ---|
8701
8702		We only care how much data are relax between DIFF,
8703		marked as ***.  */
8704
8705	      before = get_nds32_elf_blank_total (&blank_t, irel->r_addend, 0);
8706	      between = get_nds32_elf_blank_total (&blank_t,
8707						   irel->r_addend + offset, 0);
8708	      if (between == before)
8709		goto done_adjust_diff;
8710
8711	      switch (ELF32_R_TYPE (irel->r_info))
8712		{
8713		case R_NDS32_DIFF8:
8714		  bfd_put_8 (abfd, offset - (between - before),
8715			     contents + irel->r_offset);
8716		  break;
8717		case R_NDS32_DIFF16:
8718		  bfd_put_16 (abfd, offset - (between - before),
8719			      contents + irel->r_offset);
8720		  break;
8721		case R_NDS32_DIFF32:
8722		  bfd_put_32 (abfd, offset - (between - before),
8723			      contents + irel->r_offset);
8724		  break;
8725		}
8726	    }
8727	  else if (ELF32_R_TYPE (irel->r_info) == R_NDS32_DIFF_ULEB128
8728	      && isym[ELF32_R_SYM (irel->r_info)].st_shndx == sec_shndx)
8729	    {
8730	      bfd_vma val = 0;
8731	      unsigned int len = 0;
8732	      unsigned long before, between;
8733	      bfd_byte *endp, *p;
8734
8735	      val = read_unsigned_leb128 (abfd, contents + irel->r_offset,
8736					  &len);
8737
8738	      before = get_nds32_elf_blank_total (&blank_t, irel->r_addend, 0);
8739	      between = get_nds32_elf_blank_total (&blank_t,
8740						   irel->r_addend + val, 0);
8741	      if (between == before)
8742		goto done_adjust_diff;
8743
8744	      p = contents + irel->r_offset;
8745	      endp = p + len -1;
8746	      memset (p, 0x80, len);
8747	      *(endp) = 0;
8748	      p = write_uleb128 (p, val - (between - before)) - 1;
8749	      if (p < endp)
8750		*p |= 0x80;
8751	    }
8752done_adjust_diff:
8753
8754	  if (sec == sect)
8755	    {
8756	      raddr = irel->r_offset;
8757	      irel->r_offset -= get_nds32_elf_blank_total (&blank_t2,
8758							   irel->r_offset, 1);
8759
8760	      if (ELF32_R_TYPE (irel->r_info) == R_NDS32_NONE)
8761		continue;
8762	      if (blank_t2 && blank_t2->next
8763		  && (blank_t2->offset > raddr
8764		      || blank_t2->next->offset <= raddr))
8765		(*_bfd_error_handler)
8766		  (_("%B: %s\n"), abfd,
8767		   "Error: search_nds32_elf_blank reports wrong node");
8768
8769	      /* Mark reloc in deleted portion as NONE.
8770		 For some relocs like R_NDS32_LABEL that doesn't modify the
8771		 content in the section.  R_NDS32_LABEL doesn't belong to the
8772		 instruction in the section, so we should preserve it.  */
8773	      if (raddr >= blank_t2->offset
8774		  && raddr < blank_t2->offset + blank_t2->size
8775		  && ELF32_R_TYPE (irel->r_info) != R_NDS32_LABEL
8776		  && ELF32_R_TYPE (irel->r_info) != R_NDS32_RELAX_REGION_BEGIN
8777		  && ELF32_R_TYPE (irel->r_info) != R_NDS32_RELAX_REGION_END
8778		  && ELF32_R_TYPE (irel->r_info) != R_NDS32_RELAX_ENTRY
8779		  && ELF32_R_TYPE (irel->r_info) != R_NDS32_SUBTRAHEND
8780		  && ELF32_R_TYPE (irel->r_info) != R_NDS32_MINUEND)
8781		{
8782		  irel->r_info = ELF32_R_INFO (ELF32_R_SYM (irel->r_info),
8783					       R_NDS32_NONE);
8784		  continue;
8785		}
8786	    }
8787
8788	  if (ELF32_R_TYPE (irel->r_info) == R_NDS32_NONE
8789	      || ELF32_R_TYPE (irel->r_info) == R_NDS32_LABEL
8790	      || ELF32_R_TYPE (irel->r_info) == R_NDS32_RELAX_ENTRY)
8791	    continue;
8792
8793	  if (ELF32_R_SYM (irel->r_info) < symtab_hdr->sh_info
8794	      && isym[ELF32_R_SYM (irel->r_info)].st_shndx == sec_shndx
8795	      && ELF_ST_TYPE (isym[ELF32_R_SYM (irel->r_info)].st_info) == STT_SECTION)
8796	    {
8797	      if (irel->r_addend <= sec->size)
8798		irel->r_addend -=
8799		  get_nds32_elf_blank_total (&blank_t, irel->r_addend, 1);
8800	    }
8801	}
8802    }
8803
8804  /* Adjust the local symbols defined in this section.  */
8805  blank_t = blank_head;
8806  for (isymend = isym + symtab_hdr->sh_info; isym < isymend; isym++)
8807    {
8808      if (isym->st_shndx == sec_shndx)
8809	{
8810	  if (isym->st_value <= sec->size)
8811	    {
8812	      bfd_vma ahead;
8813	      bfd_vma orig_addr = isym->st_value;
8814
8815	      ahead = get_nds32_elf_blank_total (&blank_t, isym->st_value, 1);
8816	      isym->st_value -= ahead;
8817
8818	      /* Adjust function size.  */
8819	      if (ELF32_ST_TYPE (isym->st_info) == STT_FUNC
8820		  && isym->st_size > 0)
8821		isym->st_size -=
8822		  get_nds32_elf_blank_total
8823		  (&blank_t, orig_addr + isym->st_size, 0) - ahead;
8824	    }
8825	}
8826    }
8827
8828  /* Now adjust the global symbols defined in this section.  */
8829  symcount = (symtab_hdr->sh_size / sizeof (Elf32_External_Sym)
8830	      - symtab_hdr->sh_info);
8831  sym_hashes = elf_sym_hashes (abfd);
8832  end_hashes = sym_hashes + symcount;
8833  blank_t = blank_head;
8834  for (; sym_hashes < end_hashes; sym_hashes++)
8835    {
8836      struct elf_link_hash_entry *sym_hash = *sym_hashes;
8837
8838      if ((sym_hash->root.type == bfd_link_hash_defined
8839	   || sym_hash->root.type == bfd_link_hash_defweak)
8840	  && sym_hash->root.u.def.section == sec)
8841	{
8842	  if (sym_hash->root.u.def.value <= sec->size)
8843	    {
8844	      bfd_vma ahead;
8845	      bfd_vma orig_addr = sym_hash->root.u.def.value;
8846
8847	      ahead = get_nds32_elf_blank_total (&blank_t, sym_hash->root.u.def.value, 1);
8848	      sym_hash->root.u.def.value -= ahead;
8849
8850	      /* Adjust function size.  */
8851	      if (sym_hash->type == STT_FUNC)
8852		sym_hash->size -=
8853		  get_nds32_elf_blank_total
8854		  (&blank_t, orig_addr + sym_hash->size, 0) - ahead;
8855
8856	    }
8857	}
8858    }
8859
8860  contents = elf_section_data (sec)->this_hdr.contents;
8861  blank_t = blank_head;
8862  while (blank_t->next)
8863    {
8864      /* Actually delete the bytes.  */
8865
8866      /* If current blank is the last blank overlap with current section,
8867	 go to finish process.  */
8868      if (sec->size <= (blank_t->next->offset))
8869	break;
8870
8871      memmove (contents + blank_t->offset - blank_t->total_size,
8872	       contents + blank_t->offset + blank_t->size,
8873	       blank_t->next->offset - (blank_t->offset + blank_t->size));
8874
8875      blank_t = blank_t->next;
8876    }
8877
8878  if (sec->size > (blank_t->offset + blank_t->size))
8879    {
8880      /* There are remaining code between blank and section boundary.
8881	 Move the remaining code to appropriate location.  */
8882      memmove (contents + blank_t->offset - blank_t->total_size,
8883	       contents + blank_t->offset + blank_t->size,
8884	       sec->size - (blank_t->offset + blank_t->size));
8885      sec->size -= blank_t->total_size + blank_t->size;
8886    }
8887  else
8888    /* This blank is not entirely included in the section,
8889       reduce the section size by only part of the blank size.  */
8890    sec->size -= blank_t->total_size + (sec->size - blank_t->offset);
8891
8892  while (blank_head)
8893    {
8894      blank_t = blank_head;
8895      blank_head = blank_head->next;
8896      remove_nds32_elf_blank (blank_t);
8897    }
8898
8899  return TRUE;
8900}
8901
8902/* Get the contents of a section.  */
8903
8904static int
8905nds32_get_section_contents (bfd *abfd, asection *sec, bfd_byte **contents_p)
8906{
8907  /* Get the section contents.  */
8908  if (elf_section_data (sec)->this_hdr.contents != NULL)
8909    *contents_p = elf_section_data (sec)->this_hdr.contents;
8910  else
8911    {
8912      if (!bfd_malloc_and_get_section (abfd, sec, contents_p))
8913	return FALSE;
8914      elf_section_data (sec)->this_hdr.contents = *contents_p;
8915    }
8916
8917  return TRUE;
8918}
8919
8920/* Get the contents of the internal symbol of abfd.  */
8921
8922static int
8923nds32_get_local_syms (bfd *abfd, asection *sec ATTRIBUTE_UNUSED,
8924		      Elf_Internal_Sym **isymbuf_p)
8925{
8926  Elf_Internal_Shdr *symtab_hdr;
8927  symtab_hdr = &elf_tdata (abfd)->symtab_hdr;
8928
8929  /* Read this BFD's local symbols if we haven't done so already.  */
8930  if (*isymbuf_p == NULL && symtab_hdr->sh_info != 0)
8931    {
8932      *isymbuf_p = (Elf_Internal_Sym *) symtab_hdr->contents;
8933      if (*isymbuf_p == NULL)
8934	{
8935	  *isymbuf_p = bfd_elf_get_elf_syms (abfd, symtab_hdr,
8936					     symtab_hdr->sh_info, 0,
8937					     NULL, NULL, NULL);
8938	  if (*isymbuf_p == NULL)
8939	    return FALSE;
8940	}
8941    }
8942  symtab_hdr->contents = (bfd_byte *) (*isymbuf_p);
8943
8944  return TRUE;
8945}
8946
8947/* Range of small data.  */
8948static bfd_vma sdata_range[2][2];
8949static bfd_vma const sdata_init_range[2] =
8950{ ACCURATE_12BIT_S1, ACCURATE_19BIT };
8951
8952static int
8953nds32_elf_insn_size (bfd *abfd ATTRIBUTE_UNUSED,
8954		     bfd_byte *contents, bfd_vma addr)
8955{
8956  unsigned long insn = bfd_getb32 (contents + addr);
8957
8958  if (insn & 0x80000000)
8959    return 2;
8960
8961  return 4;
8962}
8963
8964/* Set the gp relax range.  We have to measure the safe range
8965   to do gp relaxation.  */
8966
8967static void
8968relax_range_measurement (bfd *abfd)
8969{
8970  asection *sec_f, *sec_b;
8971  /* For upper bound.   */
8972  bfd_vma maxpgsz = get_elf_backend_data (abfd)->maxpagesize;
8973  bfd_vma align;
8974  static int decide_relax_range = 0;
8975  int i;
8976  int range_number = sizeof (sdata_init_range) / sizeof (sdata_init_range[0]);
8977
8978  if (decide_relax_range)
8979    return;
8980  decide_relax_range = 1;
8981
8982  if (sda_rela_sec == NULL)
8983    {
8984      /* Since there is no data sections, we assume the range is page size.  */
8985      for (i = 0; i < range_number; i++)
8986	{
8987	  sdata_range[i][0] = sdata_init_range[i] - 0x1000;
8988	  sdata_range[i][1] = sdata_init_range[i] - 0x1000;
8989	}
8990      return;
8991    }
8992
8993  /* Get the biggest alignment power after the gp located section.  */
8994  sec_f = sda_rela_sec->output_section;
8995  sec_b = sec_f->next;
8996  align = 0;
8997  while (sec_b != NULL)
8998    {
8999      if ((unsigned)(1 << sec_b->alignment_power) > align)
9000	align = (1 << sec_b->alignment_power);
9001      sec_b = sec_b->next;
9002    }
9003
9004  /* I guess we can not determine the section before
9005     gp located section, so we assume the align is max page size.  */
9006  for (i = 0; i < range_number; i++)
9007    {
9008      sdata_range[i][1] = sdata_init_range[i] - align;
9009      BFD_ASSERT (sdata_range[i][1] <= sdata_init_range[i]);
9010      sdata_range[i][0] = sdata_init_range[i] - maxpgsz;
9011      BFD_ASSERT (sdata_range[i][0] <= sdata_init_range[i]);
9012    }
9013}
9014
9015/* These are macros used to check flags encoded in r_addend.
9016   They are only used by nds32_elf_relax_section ().  */
9017#define GET_SEQ_LEN(addend)     ((addend) & 0x000000ff)
9018#define IS_1ST_CONVERT(addend)  ((addend) & 0x80000000)
9019#define IS_OPTIMIZE(addend)     ((addend) & 0x40000000)
9020#define IS_16BIT_ON(addend)     ((addend) & 0x20000000)
9021
9022/* Relax LONGCALL1 relocation for nds32_elf_relax_section.  */
9023
9024static bfd_boolean
9025nds32_elf_relax_longcall1 (bfd *abfd, asection *sec, Elf_Internal_Rela *irel,
9026			   Elf_Internal_Rela *internal_relocs, int *insn_len,
9027			   bfd_byte *contents, Elf_Internal_Sym *isymbuf,
9028			   Elf_Internal_Shdr *symtab_hdr)
9029{
9030  /* There are 3 variations for LONGCALL1
9031     case 4-4-2; 16-bit on, optimize off or optimize for space
9032     sethi ta, hi20(symbol)     ; LONGCALL1/HI20
9033     ori   ta, ta, lo12(symbol) ; LO12S0
9034     jral5 ta                   ;
9035
9036     case 4-4-4; 16-bit off, optimize don't care
9037     sethi ta, hi20(symbol)     ; LONGCALL1/HI20
9038     ori   ta, ta, lo12(symbol) ; LO12S0
9039     jral  ta                   ;
9040
9041     case 4-4-4; 16-bit on, optimize for speed
9042     sethi ta, hi20(symbol)     ; LONGCALL1/HI20
9043     ori   ta, ta, lo12(symbol) ; LO12S0
9044     jral  ta                   ;
9045     Check code for -mlong-calls output.  */
9046
9047  /* Get the reloc for the address from which the register is
9048     being loaded.  This reloc will tell us which function is
9049     actually being called.  */
9050
9051  bfd_vma laddr;
9052  int seq_len;	/* Original length of instruction sequence.  */
9053  uint32_t insn;
9054  Elf_Internal_Rela *hi_irelfn, *lo_irelfn, *irelend;
9055  int pic_ext_target = 0;
9056  bfd_signed_vma foff;
9057  uint16_t insn16;
9058
9059  irelend = internal_relocs + sec->reloc_count;
9060  seq_len = GET_SEQ_LEN (irel->r_addend);
9061  laddr = irel->r_offset;
9062  *insn_len = seq_len;
9063
9064  hi_irelfn = find_relocs_at_address_addr (irel, internal_relocs, irelend,
9065					   R_NDS32_HI20_RELA, laddr);
9066  lo_irelfn = find_relocs_at_address_addr (irel, internal_relocs, irelend,
9067					   R_NDS32_LO12S0_ORI_RELA,
9068					   laddr + 4);
9069
9070  if (hi_irelfn == irelend || lo_irelfn == irelend)
9071    {
9072      (*_bfd_error_handler)
9073	("%B: warning: R_NDS32_LONGCALL1 points to unrecognized"
9074	 "reloc at 0x%lx.", abfd, (long) irel->r_offset);
9075      return FALSE;
9076    }
9077
9078  /* Get the value of the symbol referred to by the reloc.  */
9079  foff = calculate_offset (abfd, sec, hi_irelfn, isymbuf, symtab_hdr,
9080			   &pic_ext_target);
9081
9082  /* This condition only happened when symbol is undefined.  */
9083  if (pic_ext_target || foff == 0 || foff < -CONSERVATIVE_24BIT_S1
9084      || foff >= CONSERVATIVE_24BIT_S1)
9085    return FALSE;
9086
9087  /* Relax to: jal symbol; 25_PCREL */
9088  /* For simplicity of coding, we are going to modify the section
9089     contents, the section relocs, and the BFD symbol table.  We
9090     must tell the rest of the code not to free up this
9091     information.  It would be possible to instead create a table
9092     of changes which have to be made, as is done in coff-mips.c;
9093     that would be more work, but would require less memory when
9094     the linker is run.  */
9095
9096  /* Replace the long call with a jal.  */
9097  irel->r_info = ELF32_R_INFO (ELF32_R_SYM (hi_irelfn->r_info),
9098			       R_NDS32_25_PCREL_RELA);
9099  irel->r_addend = hi_irelfn->r_addend;
9100
9101  /* We don't resolve this here but resolve it in relocate_section.  */
9102  insn = INSN_JAL;
9103  bfd_putb32 (insn, contents + irel->r_offset);
9104
9105  hi_irelfn->r_info =
9106    ELF32_R_INFO (ELF32_R_SYM (hi_irelfn->r_info), R_NDS32_NONE);
9107  lo_irelfn->r_info =
9108    ELF32_R_INFO (ELF32_R_SYM (lo_irelfn->r_info), R_NDS32_NONE);
9109  *insn_len = 4;
9110
9111  if (seq_len & 0x2)
9112    {
9113      insn16 = NDS32_NOP16;
9114      bfd_putb16 (insn16, contents + irel->r_offset + *insn_len);
9115      lo_irelfn->r_info =
9116	ELF32_R_INFO (ELF32_R_SYM (lo_irelfn->r_info), R_NDS32_INSN16);
9117      lo_irelfn->r_addend = R_NDS32_INSN16_CONVERT_FLAG;
9118      *insn_len += 2;
9119    }
9120  return TRUE;
9121}
9122
9123#define CONVERT_CONDITION_CALL(insn) (((insn) & 0xffff0000) ^ 0x90000)
9124/* Relax LONGCALL2 relocation for nds32_elf_relax_section.  */
9125
9126static bfd_boolean
9127nds32_elf_relax_longcall2 (bfd *abfd, asection *sec, Elf_Internal_Rela *irel,
9128			   Elf_Internal_Rela *internal_relocs, int *insn_len,
9129			   bfd_byte *contents, Elf_Internal_Sym *isymbuf,
9130			   Elf_Internal_Shdr *symtab_hdr)
9131{
9132  /* bltz  rt, .L1   ; LONGCALL2
9133     jal   symbol   ; 25_PCREL
9134     .L1: */
9135
9136  /* Get the reloc for the address from which the register is
9137     being loaded.  This reloc will tell us which function is
9138     actually being called.  */
9139
9140  bfd_vma laddr;
9141  uint32_t insn;
9142  Elf_Internal_Rela *i1_irelfn, *cond_irelfn, *irelend;
9143  int pic_ext_target = 0;
9144  bfd_signed_vma foff;
9145
9146  irelend = internal_relocs + sec->reloc_count;
9147  laddr = irel->r_offset;
9148  i1_irelfn =
9149    find_relocs_at_address_addr (irel, internal_relocs, irelend,
9150				 R_NDS32_25_PCREL_RELA, laddr + 4);
9151
9152  if (i1_irelfn == irelend)
9153    {
9154      (*_bfd_error_handler)
9155	("%B: warning: R_NDS32_LONGCALL2 points to unrecognized"
9156	 "reloc at 0x%lx.", abfd, (long) irel->r_offset);
9157      return FALSE;
9158    }
9159
9160  insn = bfd_getb32 (contents + laddr);
9161
9162  /* Get the value of the symbol referred to by the reloc.  */
9163  foff = calculate_offset (abfd, sec, i1_irelfn, isymbuf, symtab_hdr,
9164			   &pic_ext_target);
9165
9166  if (foff == 0 || foff < -CONSERVATIVE_16BIT_S1
9167      || foff >= CONSERVATIVE_16BIT_S1)
9168    return FALSE;
9169
9170  /* Relax to	bgezal   rt, label ; 17_PCREL
9171     or		bltzal   rt, label ; 17_PCREL */
9172
9173  /* Convert to complimentary conditional call.  */
9174  insn = CONVERT_CONDITION_CALL (insn);
9175
9176  /* For simplicity of coding, we are going to modify the section
9177     contents, the section relocs, and the BFD symbol table.  We
9178     must tell the rest of the code not to free up this
9179     information.  It would be possible to instead create a table
9180     of changes which have to be made, as is done in coff-mips.c;
9181     that would be more work, but would require less memory when
9182     the linker is run.  */
9183
9184  /* Clean unnessary relocations.  */
9185  i1_irelfn->r_info =
9186    ELF32_R_INFO (ELF32_R_SYM (i1_irelfn->r_info), R_NDS32_NONE);
9187  cond_irelfn =
9188    find_relocs_at_address_addr (irel, internal_relocs, irelend,
9189				 R_NDS32_17_PCREL_RELA, laddr);
9190  if (cond_irelfn != irelend)
9191    cond_irelfn->r_info =
9192      ELF32_R_INFO (ELF32_R_SYM (cond_irelfn->r_info), R_NDS32_NONE);
9193
9194  /* Replace the long call with a bgezal.  */
9195  irel->r_info = ELF32_R_INFO (ELF32_R_SYM (i1_irelfn->r_info),
9196			       R_NDS32_17_PCREL_RELA);
9197  irel->r_addend = i1_irelfn->r_addend;
9198
9199  bfd_putb32 (insn, contents + irel->r_offset);
9200
9201  *insn_len = 4;
9202  return TRUE;
9203}
9204
9205/* Relax LONGCALL3 relocation for nds32_elf_relax_section.  */
9206
9207static bfd_boolean
9208nds32_elf_relax_longcall3 (bfd *abfd, asection *sec, Elf_Internal_Rela *irel,
9209			   Elf_Internal_Rela *internal_relocs, int *insn_len,
9210			   bfd_byte *contents, Elf_Internal_Sym *isymbuf,
9211			   Elf_Internal_Shdr *symtab_hdr)
9212{
9213  /* There are 3 variations for LONGCALL3
9214     case 4-4-4-2; 16-bit on, optimize off or optimize for space
9215     bltz  rt,   $1                ; LONGCALL3
9216     sethi ta,   hi20(symbol)      ; HI20
9217     ori   ta, ta,  lo12(symbol)   ; LO12S0
9218     jral5 ta                      ;
9219     $1
9220
9221     case 4-4-4-4; 16-bit off, optimize don't care
9222     bltz  rt,   $1                ; LONGCALL3
9223     sethi ta,   hi20(symbol)      ; HI20
9224     ori   ta, ta,  lo12(symbol)   ; LO12S0
9225     jral  ta                      ;
9226     $1
9227
9228     case 4-4-4-4; 16-bit on, optimize for speed
9229     bltz  rt,   $1                ; LONGCALL3
9230     sethi ta,   hi20(symbol)      ; HI20
9231     ori   ta, ta,  lo12(symbol)   ; LO12S0
9232     jral  ta                      ;
9233     $1 */
9234
9235  /* Get the reloc for the address from which the register is
9236     being loaded.  This reloc will tell us which function is
9237     actually being called.  */
9238
9239  bfd_vma laddr;
9240  int seq_len;	/* Original length of instruction sequence.  */
9241  uint32_t insn;
9242  Elf_Internal_Rela *hi_irelfn, *lo_irelfn, *cond_irelfn, *irelend;
9243  int pic_ext_target = 0;
9244  bfd_signed_vma foff;
9245  uint16_t insn16;
9246
9247  irelend = internal_relocs + sec->reloc_count;
9248  seq_len = GET_SEQ_LEN (irel->r_addend);
9249  laddr = irel->r_offset;
9250  *insn_len = seq_len;
9251
9252  hi_irelfn =
9253    find_relocs_at_address_addr (irel, internal_relocs, irelend,
9254				 R_NDS32_HI20_RELA, laddr + 4);
9255  lo_irelfn =
9256    find_relocs_at_address_addr (irel, internal_relocs, irelend,
9257				 R_NDS32_LO12S0_ORI_RELA, laddr + 8);
9258
9259  if (hi_irelfn == irelend || lo_irelfn == irelend)
9260    {
9261      (*_bfd_error_handler)
9262	("%B: warning: R_NDS32_LONGCALL3 points to unrecognized"
9263	 "reloc at 0x%lx.", abfd, (long) irel->r_offset);
9264      return FALSE;
9265    }
9266
9267  /* Get the value of the symbol referred to by the reloc.  */
9268  foff = calculate_offset (abfd, sec, hi_irelfn, isymbuf, symtab_hdr,
9269			   &pic_ext_target);
9270
9271  if (pic_ext_target || foff == 0 || foff < -CONSERVATIVE_24BIT_S1
9272      || foff >= CONSERVATIVE_24BIT_S1)
9273    return FALSE;
9274
9275  insn = bfd_getb32 (contents + laddr);
9276  if (foff >= -CONSERVATIVE_16BIT_S1 && foff < CONSERVATIVE_16BIT_S1)
9277    {
9278      /* Relax to  bgezal   rt, label ; 17_PCREL
9279	 or	   bltzal   rt, label ; 17_PCREL */
9280
9281      /* Convert to complimentary conditional call.  */
9282      insn = CONVERT_CONDITION_CALL (insn);
9283      bfd_putb32 (insn, contents + irel->r_offset);
9284
9285      *insn_len = 4;
9286      irel->r_info =
9287	ELF32_R_INFO (ELF32_R_SYM (hi_irelfn->r_info), R_NDS32_NONE);
9288      hi_irelfn->r_info =
9289	ELF32_R_INFO (ELF32_R_SYM (hi_irelfn->r_info), R_NDS32_NONE);
9290      lo_irelfn->r_info =
9291	ELF32_R_INFO (ELF32_R_SYM (lo_irelfn->r_info), R_NDS32_NONE);
9292
9293      cond_irelfn =
9294	find_relocs_at_address_addr (irel, internal_relocs, irelend,
9295				     R_NDS32_17_PCREL_RELA, laddr);
9296      if (cond_irelfn != irelend)
9297	{
9298	  cond_irelfn->r_info = ELF32_R_INFO (ELF32_R_SYM (hi_irelfn->r_info),
9299					      R_NDS32_17_PCREL_RELA);
9300	  cond_irelfn->r_addend = hi_irelfn->r_addend;
9301	}
9302
9303      if (seq_len & 0x2)
9304	{
9305	  insn16 = NDS32_NOP16;
9306	  bfd_putb16 (insn16, contents + irel->r_offset + *insn_len);
9307	  hi_irelfn->r_info = ELF32_R_INFO (ELF32_R_SYM (hi_irelfn->r_info),
9308					    R_NDS32_INSN16);
9309	  hi_irelfn->r_addend = R_NDS32_INSN16_CONVERT_FLAG;
9310	  insn_len += 2;
9311	}
9312    }
9313  else if (foff >= -CONSERVATIVE_24BIT_S1 && foff < CONSERVATIVE_24BIT_S1)
9314    {
9315      /* Relax to the following instruction sequence
9316	 bltz  rt,   $1 ; LONGCALL2
9317	 jal   symbol   ; 25_PCREL
9318	 $1	*/
9319      *insn_len = 8;
9320      insn = INSN_JAL;
9321      bfd_putb32 (insn, contents + hi_irelfn->r_offset);
9322
9323      hi_irelfn->r_info = ELF32_R_INFO (ELF32_R_SYM (hi_irelfn->r_info),
9324					R_NDS32_25_PCREL_RELA);
9325      irel->r_info =
9326	ELF32_R_INFO (ELF32_R_SYM (irel->r_info), R_NDS32_LONGCALL2);
9327
9328      lo_irelfn->r_info =
9329	ELF32_R_INFO (ELF32_R_SYM (lo_irelfn->r_info), R_NDS32_NONE);
9330
9331      if (seq_len & 0x2)
9332	{
9333	  insn16 = NDS32_NOP16;
9334	  bfd_putb16 (insn16, contents + irel->r_offset + *insn_len);
9335	  lo_irelfn->r_info =
9336	    ELF32_R_INFO (ELF32_R_SYM (lo_irelfn->r_info), R_NDS32_INSN16);
9337	  lo_irelfn->r_addend = R_NDS32_INSN16_CONVERT_FLAG;
9338	  insn_len += 2;
9339	}
9340    }
9341  return TRUE;
9342}
9343
9344/* Relax LONGJUMP1 relocation for nds32_elf_relax_section.  */
9345
9346static bfd_boolean
9347nds32_elf_relax_longjump1 (bfd *abfd, asection *sec, Elf_Internal_Rela *irel,
9348			   Elf_Internal_Rela *internal_relocs, int *insn_len,
9349			   bfd_byte *contents, Elf_Internal_Sym *isymbuf,
9350			   Elf_Internal_Shdr *symtab_hdr)
9351{
9352  /* There are 3 variations for LONGJUMP1
9353     case 4-4-2; 16-bit bit on, optimize off or optimize for space
9354     sethi ta, hi20(symbol)      ; LONGJUMP1/HI20
9355     ori   ta, ta, lo12(symbol)  ; LO12S0
9356     jr5   ta                    ;
9357
9358     case 4-4-4; 16-bit off, optimize don't care
9359     sethi ta, hi20(symbol)      ; LONGJUMP1/HI20
9360     ori   ta, ta, lo12(symbol)  ; LO12S0
9361     jr    ta                    ;
9362
9363     case 4-4-4; 16-bit on, optimize for speed
9364     sethi ta, hi20(symbol)      ; LONGJUMP1/HI20
9365     ori   ta, ta, lo12(symbol)  ; LO12S0
9366     jr    ta                    ;	*/
9367
9368  /* Get the reloc for the address from which the register is
9369     being loaded.  This reloc will tell us which function is
9370     actually being called.  */
9371
9372  bfd_vma laddr;
9373  int seq_len;	/* Original length of instruction sequence.  */
9374  int insn16_on;	/* 16-bit on/off.  */
9375  uint32_t insn;
9376  Elf_Internal_Rela *hi_irelfn, *lo_irelfn, *irelend;
9377  int pic_ext_target = 0;
9378  bfd_signed_vma foff;
9379  uint16_t insn16;
9380  unsigned long reloc;
9381
9382  irelend = internal_relocs + sec->reloc_count;
9383  seq_len = GET_SEQ_LEN (irel->r_addend);
9384  laddr = irel->r_offset;
9385  *insn_len = seq_len;
9386  insn16_on = IS_16BIT_ON (irel->r_addend);
9387
9388  hi_irelfn =
9389    find_relocs_at_address_addr (irel, internal_relocs, irelend,
9390				 R_NDS32_HI20_RELA, laddr);
9391  lo_irelfn =
9392    find_relocs_at_address_addr (irel, internal_relocs, irelend,
9393				 R_NDS32_LO12S0_ORI_RELA, laddr + 4);
9394  if (hi_irelfn == irelend || lo_irelfn == irelend)
9395    {
9396      (*_bfd_error_handler)
9397	("%B: warning: R_NDS32_LONGJUMP1 points to unrecognized"
9398	 "reloc at 0x%lx.", abfd, (long) irel->r_offset);
9399      return FALSE;
9400    }
9401
9402  /* Get the value of the symbol referred to by the reloc.  */
9403  foff = calculate_offset (abfd, sec, hi_irelfn, isymbuf, symtab_hdr,
9404			   &pic_ext_target);
9405
9406  if (pic_ext_target || foff == 0 || foff >= CONSERVATIVE_24BIT_S1
9407      || foff < -CONSERVATIVE_24BIT_S1)
9408    return FALSE;
9409
9410  if (insn16_on && foff >= -ACCURATE_8BIT_S1
9411      && foff < ACCURATE_8BIT_S1 && (seq_len & 0x2))
9412    {
9413      /* j8	label */
9414      /* 16-bit on, but not optimized for speed.  */
9415      reloc = R_NDS32_9_PCREL_RELA;
9416      insn16 = INSN_J8;
9417      bfd_putb16 (insn16, contents + irel->r_offset);
9418      *insn_len = 2;
9419      irel->r_info =
9420	ELF32_R_INFO (ELF32_R_SYM (irel->r_info), R_NDS32_NONE);
9421    }
9422  else
9423    {
9424      /* j     label */
9425      reloc = R_NDS32_25_PCREL_RELA;
9426      insn = INSN_J;
9427      bfd_putb32 (insn, contents + irel->r_offset);
9428      *insn_len = 4;
9429      irel->r_info =
9430	ELF32_R_INFO (ELF32_R_SYM (irel->r_info), R_NDS32_INSN16);
9431      irel->r_addend = 0;
9432    }
9433
9434  hi_irelfn->r_info =
9435    ELF32_R_INFO (ELF32_R_SYM (hi_irelfn->r_info), reloc);
9436  lo_irelfn->r_info =
9437    ELF32_R_INFO (ELF32_R_SYM (lo_irelfn->r_info), R_NDS32_NONE);
9438
9439  if ((seq_len & 0x2) && ((*insn_len & 2) == 0))
9440    {
9441      insn16 = NDS32_NOP16;
9442      bfd_putb16 (insn16, contents + irel->r_offset + *insn_len);
9443      lo_irelfn->r_info =
9444	ELF32_R_INFO (ELF32_R_SYM (lo_irelfn->r_info),
9445		      R_NDS32_INSN16);
9446      lo_irelfn->r_addend = R_NDS32_INSN16_CONVERT_FLAG;
9447      *insn_len += 2;
9448    }
9449  return TRUE;
9450}
9451
9452/* Revert condition branch.  This function does not check if the input
9453   instruction is condition branch or not.  */
9454
9455static void
9456nds32_elf_convert_branch (uint16_t insn16, uint32_t insn,
9457			   uint16_t *re_insn16, uint32_t *re_insn)
9458{
9459  uint32_t comp_insn = 0;
9460  uint16_t comp_insn16 = 0;
9461
9462  if (insn)
9463    {
9464      if (N32_OP6 (insn) == N32_OP6_BR1)
9465	{
9466	  /* beqs label.  */
9467	  comp_insn = (insn ^ 0x4000) & 0xffffc000;
9468	  if (N32_IS_RT3 (insn) && N32_RA5 (insn) == REG_R5)
9469	    {
9470	      /* Insn can be contracted to 16-bit implied r5.  */
9471	      comp_insn16 =
9472		(comp_insn & 0x4000) ? INSN_BNES38 : INSN_BEQS38;
9473	      comp_insn16 |= (N32_RT5 (insn) & 0x7) << 8;
9474	    }
9475	}
9476      else if (N32_OP6 (insn) == N32_OP6_BR3)
9477	{
9478	  /* bnec $ta, imm11, label.  */
9479	  comp_insn = (insn ^ 0x80000) & 0xffffff00;
9480	}
9481      else
9482	{
9483	  comp_insn = (insn ^ 0x10000) & 0xffffc000;
9484	  if (N32_BR2_SUB (insn) == N32_BR2_BEQZ
9485	      || N32_BR2_SUB (insn) == N32_BR2_BNEZ)
9486	    {
9487	      if (N32_IS_RT3 (insn))
9488		{
9489		  /* Insn can be contracted to 16-bit.  */
9490		  comp_insn16 =
9491		    (comp_insn & 0x10000) ? INSN_BNEZ38 : INSN_BEQZ38;
9492		  comp_insn16 |= (N32_RT5 (insn) & 0x7) << 8;
9493		}
9494	      else if (N32_RT5 (insn) == REG_R15)
9495		{
9496		  /* Insn can be contracted to 16-bit.  */
9497		  comp_insn16 =
9498		    (comp_insn & 0x10000) ? INSN_BNES38 : INSN_BEQS38;
9499		}
9500	    }
9501	}
9502    }
9503  else
9504    {
9505      switch ((insn16 & 0xf000) >> 12)
9506	{
9507	case 0xc:
9508	  /* beqz38 or bnez38 */
9509	  comp_insn16 = (insn16 ^ 0x0800) & 0xff00;
9510	  comp_insn = (comp_insn16 & 0x0800) ? INSN_BNEZ : INSN_BEQZ;
9511	  comp_insn |= ((comp_insn16 & 0x0700) >> 8) << 20;
9512	  break;
9513
9514	case 0xd:
9515	  /* beqs38 or bnes38 */
9516	  comp_insn16 = (insn16 ^ 0x0800) & 0xff00;
9517	  comp_insn = (comp_insn16 & 0x0800) ? INSN_BNE : INSN_BEQ;
9518	  comp_insn |= (((comp_insn16 & 0x0700) >> 8) << 20)
9519	    | (REG_R5 << 15);
9520	  break;
9521
9522	case 0xe:
9523	  /* beqzS8 or bnezS8 */
9524	  comp_insn16 = (insn16 ^ 0x0100) & 0xff00;
9525	  comp_insn = (comp_insn16 & 0x0100) ? INSN_BNEZ : INSN_BEQZ;
9526	  comp_insn |= REG_R15 << 20;
9527	  break;
9528
9529	default:
9530	  break;
9531	}
9532    }
9533  if (comp_insn && re_insn)
9534    *re_insn = comp_insn;
9535  if (comp_insn16 && re_insn16)
9536    *re_insn16 = comp_insn16;
9537}
9538
9539/* Relax LONGJUMP2 relocation for nds32_elf_relax_section.  */
9540
9541static bfd_boolean
9542nds32_elf_relax_longjump2 (bfd *abfd, asection *sec, Elf_Internal_Rela *irel,
9543			   Elf_Internal_Rela *internal_relocs, int *insn_len,
9544			   bfd_byte *contents, Elf_Internal_Sym *isymbuf,
9545			   Elf_Internal_Shdr *symtab_hdr)
9546{
9547  /* There are 3 variations for LONGJUMP2
9548     case 2-4;  1st insn convertible, 16-bit on,
9549     optimize off or optimize for space
9550     bnes38  rt, ra, $1 ; LONGJUMP2
9551     j       label      ; 25_PCREL
9552     $1:
9553
9554     case 4-4; 1st insn not convertible
9555     bne  rt, ra, $1 ; LONGJUMP2
9556     j    label      ; 25_PCREL
9557     $1:
9558
9559     case 4-4; 1st insn convertible, 16-bit on, optimize for speed
9560     bne  rt, ra, $1 ; LONGJUMP2
9561     j    label      ; 25_PCREL
9562     $1: */
9563
9564  /* Get the reloc for the address from which the register is
9565     being loaded.  This reloc will tell us which function is
9566     actually being called.  */
9567
9568  bfd_vma laddr;
9569  int seq_len;	/* Original length of instruction sequence.  */
9570  Elf_Internal_Rela *i2_irelfn, *cond_irelfn, *irelend;
9571  int pic_ext_target = 0, first_size;
9572  unsigned int i;
9573  bfd_signed_vma foff;
9574  uint32_t insn, re_insn = 0;
9575  uint16_t insn16, re_insn16 = 0;
9576  unsigned long reloc, cond_reloc;
9577
9578  enum elf_nds32_reloc_type checked_types[] =
9579    { R_NDS32_15_PCREL_RELA, R_NDS32_9_PCREL_RELA };
9580
9581  irelend = internal_relocs + sec->reloc_count;
9582  seq_len = GET_SEQ_LEN (irel->r_addend);
9583  laddr = irel->r_offset;
9584  *insn_len = seq_len;
9585  first_size = (seq_len == 6) ? 2 : 4;
9586
9587  i2_irelfn =
9588    find_relocs_at_address_addr (irel, internal_relocs,
9589				 irelend, R_NDS32_25_PCREL_RELA,
9590				 laddr + first_size);
9591
9592  for (i = 0; i < sizeof (checked_types) / sizeof(checked_types[0]); i++)
9593    {
9594      cond_irelfn =
9595	find_relocs_at_address_addr (irel, internal_relocs, irelend,
9596				     checked_types[i], laddr);
9597      if (cond_irelfn != irelend)
9598	break;
9599    }
9600
9601  if (i2_irelfn == irelend || cond_irelfn == irelend)
9602    {
9603      (*_bfd_error_handler)
9604	("%B: warning: R_NDS32_LONGJUMP2 points to unrecognized"
9605	 "reloc at 0x%lx.", abfd, (long) irel->r_offset);
9606      return FALSE;
9607    }
9608
9609  /* Get the value of the symbol referred to by the reloc.  */
9610  foff =
9611    calculate_offset (abfd, sec, i2_irelfn, isymbuf, symtab_hdr,
9612		      &pic_ext_target);
9613  if (pic_ext_target || foff == 0 || foff < -CONSERVATIVE_16BIT_S1
9614      || foff >= CONSERVATIVE_16BIT_S1)
9615    return FALSE;
9616
9617  /* Get the all corresponding instructions.  */
9618  if (first_size == 4)
9619    {
9620      insn = bfd_getb32 (contents + laddr);
9621      nds32_elf_convert_branch (0, insn, &re_insn16, &re_insn);
9622    }
9623  else
9624    {
9625      insn16 = bfd_getb16 (contents + laddr);
9626      nds32_elf_convert_branch (insn16, 0, &re_insn16, &re_insn);
9627    }
9628
9629  if (re_insn16 && foff >= -(ACCURATE_8BIT_S1 - first_size)
9630      && foff < ACCURATE_8BIT_S1 - first_size)
9631    {
9632      if (first_size == 4)
9633	{
9634	  /* Don't convert it to 16-bit now, keep this as relaxable for
9635	     ``label reloc; INSN16''.  */
9636
9637	  /* Save comp_insn32 to buffer.  */
9638	  bfd_putb32 (re_insn, contents + irel->r_offset);
9639	  *insn_len = 4;
9640	  reloc = (N32_OP6 (re_insn) == N32_OP6_BR1) ?
9641	    R_NDS32_15_PCREL_RELA : R_NDS32_17_PCREL_RELA;
9642	  cond_reloc = R_NDS32_INSN16;
9643	}
9644      else
9645	{
9646	  bfd_putb16 (re_insn16, contents + irel->r_offset);
9647	  *insn_len = 2;
9648	  reloc = R_NDS32_9_PCREL_RELA;
9649	  cond_reloc = R_NDS32_NONE;
9650	}
9651    }
9652  else if (N32_OP6 (re_insn) == N32_OP6_BR1
9653	   && (foff >= -(ACCURATE_14BIT_S1 - first_size)
9654	       && foff < ACCURATE_14BIT_S1 - first_size))
9655    {
9656      /* beqs     label    ; 15_PCREL */
9657      bfd_putb32 (re_insn, contents + irel->r_offset);
9658      *insn_len = 4;
9659      reloc = R_NDS32_15_PCREL_RELA;
9660      cond_reloc = R_NDS32_NONE;
9661    }
9662  else if (N32_OP6 (re_insn) == N32_OP6_BR2
9663	   && foff >= -CONSERVATIVE_16BIT_S1
9664	   && foff < CONSERVATIVE_16BIT_S1)
9665    {
9666      /* beqz     label ; 17_PCREL */
9667      bfd_putb32 (re_insn, contents + irel->r_offset);
9668      *insn_len = 4;
9669      reloc = R_NDS32_17_PCREL_RELA;
9670      cond_reloc = R_NDS32_NONE;
9671    }
9672  else
9673    return FALSE;
9674
9675  /* Set all relocations.  */
9676  irel->r_info = ELF32_R_INFO (ELF32_R_SYM (i2_irelfn->r_info), reloc);
9677  irel->r_addend = i2_irelfn->r_addend;
9678
9679  cond_irelfn->r_info = ELF32_R_INFO (ELF32_R_SYM (cond_irelfn->r_info),
9680				      cond_reloc);
9681  cond_irelfn->r_addend = 0;
9682
9683  if ((seq_len ^ *insn_len ) & 0x2)
9684    {
9685      insn16 = NDS32_NOP16;
9686      bfd_putb16 (insn16, contents + irel->r_offset + 4);
9687      i2_irelfn->r_offset = 4;
9688      i2_irelfn->r_info = ELF32_R_INFO (ELF32_R_SYM (i2_irelfn->r_info),
9689					R_NDS32_INSN16);
9690      i2_irelfn->r_addend = R_NDS32_INSN16_CONVERT_FLAG;
9691      *insn_len += 2;
9692    }
9693  else
9694    i2_irelfn->r_info = ELF32_R_INFO (ELF32_R_SYM (i2_irelfn->r_info),
9695				      R_NDS32_NONE);
9696  return TRUE;
9697}
9698
9699/* Relax LONGJUMP3 relocation for nds32_elf_relax_section.  */
9700
9701static bfd_boolean
9702nds32_elf_relax_longjump3 (bfd *abfd, asection *sec, Elf_Internal_Rela *irel,
9703			   Elf_Internal_Rela *internal_relocs, int *insn_len,
9704			   bfd_byte *contents, Elf_Internal_Sym *isymbuf,
9705			   Elf_Internal_Shdr *symtab_hdr)
9706{
9707  /* There are 5 variations for LONGJUMP3
9708     case 1: 2-4-4-2; 1st insn convertible, 16-bit on,
9709     optimize off or optimize for space
9710     bnes38   rt, ra, $1            ; LONGJUMP3
9711     sethi    ta, hi20(symbol)      ; HI20
9712     ori      ta, ta, lo12(symbol)  ; LO12S0
9713     jr5      ta                    ;
9714     $1:                            ;
9715
9716     case 2: 2-4-4-2; 1st insn convertible, 16-bit on, optimize for speed
9717     bnes38   rt, ra, $1           ; LONGJUMP3
9718     sethi    ta, hi20(symbol)     ; HI20
9719     ori      ta, ta, lo12(symbol) ; LO12S0
9720     jr5      ta                   ;
9721     $1:                           ; LABEL
9722
9723     case 3: 4-4-4-2; 1st insn not convertible, 16-bit on,
9724     optimize off or optimize for space
9725     bne   rt, ra, $1           ; LONGJUMP3
9726     sethi ta, hi20(symbol)     ; HI20
9727     ori   ta, ta, lo12(symbol) ; LO12S0
9728     jr5   ta                   ;
9729     $1:                        ;
9730
9731     case 4: 4-4-4-4; 1st insn don't care, 16-bit off, optimize don't care
9732     16-bit off if no INSN16
9733     bne   rt, ra, $1           ; LONGJUMP3
9734     sethi ta, hi20(symbol)     ; HI20
9735     ori   ta, ta, lo12(symbol) ; LO12S0
9736     jr    ta                   ;
9737     $1:                        ;
9738
9739     case 5: 4-4-4-4; 1st insn not convertible, 16-bit on, optimize for speed
9740     16-bit off if no INSN16
9741     bne   rt, ra, $1           ; LONGJUMP3
9742     sethi ta, hi20(symbol)     ; HI20
9743     ori   ta, ta, lo12(symbol) ; LO12S0
9744     jr    ta                   ;
9745     $1:                        ; LABEL */
9746
9747  /* Get the reloc for the address from which the register is
9748     being loaded.  This reloc will tell us which function is
9749     actually being called.  */
9750  enum elf_nds32_reloc_type checked_types[] =
9751    { R_NDS32_15_PCREL_RELA, R_NDS32_9_PCREL_RELA };
9752
9753  int reloc_off = 0, cond_removed = 0, convertible;
9754  bfd_vma laddr;
9755  int seq_len;	/* Original length of instruction sequence.  */
9756  Elf_Internal_Rela *hi_irelfn, *lo_irelfn, *cond_irelfn, *irelend;
9757  int pic_ext_target = 0, first_size;
9758  unsigned int i;
9759  bfd_signed_vma foff;
9760  uint32_t insn, re_insn = 0;
9761  uint16_t insn16, re_insn16 = 0;
9762  unsigned long reloc, cond_reloc;
9763
9764  irelend = internal_relocs + sec->reloc_count;
9765  seq_len = GET_SEQ_LEN (irel->r_addend);
9766  laddr = irel->r_offset;
9767  *insn_len = seq_len;
9768
9769  convertible = IS_1ST_CONVERT (irel->r_addend);
9770
9771  if (convertible)
9772    first_size = 2;
9773  else
9774    first_size = 4;
9775
9776  /* Get all needed relocations.  */
9777  hi_irelfn =
9778    find_relocs_at_address_addr (irel, internal_relocs, irelend,
9779				 R_NDS32_HI20_RELA, laddr + first_size);
9780  lo_irelfn =
9781    find_relocs_at_address_addr (irel, internal_relocs, irelend,
9782				 R_NDS32_LO12S0_ORI_RELA,
9783				 laddr + first_size + 4);
9784
9785  for (i = 0; i < sizeof (checked_types) / sizeof (checked_types[0]); i++)
9786    {
9787      cond_irelfn =
9788	find_relocs_at_address_addr (irel, internal_relocs, irelend,
9789				     checked_types[i], laddr);
9790      if (cond_irelfn != irelend)
9791	break;
9792    }
9793
9794  if (hi_irelfn == irelend || lo_irelfn == irelend || cond_irelfn == irelend)
9795    {
9796      (*_bfd_error_handler)
9797	("%B: warning: R_NDS32_LONGJUMP3 points to unrecognized"
9798	 "reloc at 0x%lx.", abfd, (long) irel->r_offset);
9799      return FALSE;
9800    }
9801
9802  /* Get the value of the symbol referred to by the reloc.  */
9803  foff = calculate_offset (abfd, sec, hi_irelfn, isymbuf, symtab_hdr,
9804			   &pic_ext_target);
9805
9806  if (pic_ext_target || foff == 0 || foff < -CONSERVATIVE_24BIT_S1
9807      || foff >= CONSERVATIVE_24BIT_S1)
9808    return FALSE;
9809
9810  /* Get the all corresponding instructions.  */
9811  if (first_size == 4)
9812    {
9813      insn = bfd_getb32 (contents + laddr);
9814      nds32_elf_convert_branch (0, insn, &re_insn16, &re_insn);
9815    }
9816  else
9817    {
9818      insn16 = bfd_getb16 (contents + laddr);
9819      nds32_elf_convert_branch (insn16, 0, &re_insn16, &re_insn);
9820    }
9821
9822  /* For simplicity of coding, we are going to modify the section
9823     contents, the section relocs, and the BFD symbol table.  We
9824     must tell the rest of the code not to free up this
9825     information.  It would be possible to instead create a table
9826     of changes which have to be made, as is done in coff-mips.c;
9827     that would be more work, but would require less memory when
9828     the linker is run.  */
9829
9830  if (re_insn16 && foff >= -ACCURATE_8BIT_S1 - first_size
9831      && foff < ACCURATE_8BIT_S1 - first_size)
9832    {
9833      if (!(seq_len & 0x2))
9834	{
9835	  /* Don't convert it to 16-bit now, keep this as relaxable
9836	     for ``label reloc; INSN1a''6.  */
9837	  /* Save comp_insn32 to buffer.  */
9838	  bfd_putb32 (re_insn, contents + irel->r_offset);
9839	  *insn_len = 4;
9840	  reloc = (N32_OP6 (re_insn) == N32_OP6_BR1) ?
9841	    R_NDS32_15_PCREL_RELA : R_NDS32_17_PCREL_RELA;
9842	  cond_reloc = R_NDS32_INSN16;
9843	}
9844      else
9845	{
9846	  /* Not optimize for speed; convert sequence to 16-bit.  */
9847	  /* Save comp_insn16 to buffer.  */
9848	  bfd_putb16 (re_insn16, contents + irel->r_offset);
9849	  *insn_len = 2;
9850	  reloc = R_NDS32_9_PCREL_RELA;
9851	  cond_reloc = R_NDS32_NONE;
9852	}
9853      cond_removed = 1;
9854    }
9855  else if (N32_OP6 (re_insn) == N32_OP6_BR1
9856	   && (foff >= -(ACCURATE_14BIT_S1 - first_size)
9857	       && foff < ACCURATE_14BIT_S1 - first_size))
9858    {
9859      /* beqs     label    ; 15_PCREL */
9860      bfd_putb32 (re_insn, contents + irel->r_offset);
9861      *insn_len = 4;
9862      reloc = R_NDS32_15_PCREL_RELA;
9863      cond_reloc = R_NDS32_NONE;
9864      cond_removed = 1;
9865    }
9866  else if (N32_OP6 (re_insn) == N32_OP6_BR2
9867	   && foff >= -CONSERVATIVE_16BIT_S1
9868	   && foff < CONSERVATIVE_16BIT_S1)
9869    {
9870      /* beqz     label ; 17_PCREL */
9871      bfd_putb32 (re_insn, contents + irel->r_offset);
9872      *insn_len = 4;
9873      reloc = R_NDS32_17_PCREL_RELA;
9874      cond_reloc = R_NDS32_NONE;
9875      cond_removed = 1;
9876    }
9877  else if (foff >= -CONSERVATIVE_24BIT_S1 - reloc_off
9878	   && foff < CONSERVATIVE_24BIT_S1 - reloc_off)
9879    {
9880      /* Relax to one of the following 3 variations
9881
9882	 case 2-4; 1st insn convertible, 16-bit on, optimize off or optimize
9883	 for space
9884	 bnes38  rt, $1 ; LONGJUMP2
9885	 j       label  ; 25_PCREL
9886	 $1
9887
9888	 case 4-4; 1st insn not convertible, others don't care
9889	 bne   rt, ra, $1 ; LONGJUMP2
9890	 j     label      ; 25_PCREL
9891	 $1
9892
9893	 case 4-4; 1st insn convertible, 16-bit on, optimize for speed
9894	 bne   rt, ra, $1 ; LONGJUMP2
9895	 j     label      ; 25_PCREL
9896	 $1 */
9897
9898      /* Offset for first instruction.  */
9899
9900      /* Use j label as second instruction.  */
9901      *insn_len = 4 + first_size;
9902      insn = INSN_J;
9903      bfd_putb32 (insn, contents + hi_irelfn->r_offset);
9904      reloc = R_NDS32_LONGJUMP2;
9905      cond_reloc = R_NDS32_25_PLTREL;
9906    }
9907    else
9908      return FALSE;
9909
9910    if (cond_removed == 1)
9911      {
9912	/* Set all relocations.  */
9913	irel->r_info = ELF32_R_INFO (ELF32_R_SYM (hi_irelfn->r_info), reloc);
9914	irel->r_addend = hi_irelfn->r_addend;
9915
9916	cond_irelfn->r_info = ELF32_R_INFO (ELF32_R_SYM (cond_irelfn->r_info),
9917					    cond_reloc);
9918	cond_irelfn->r_addend = 0;
9919	hi_irelfn->r_info = ELF32_R_INFO (ELF32_R_SYM (hi_irelfn->r_info),
9920					  R_NDS32_NONE);
9921      }
9922    else
9923      {
9924	irel->r_info = ELF32_R_INFO (ELF32_R_SYM (irel->r_info), reloc);
9925	irel->r_addend = irel->r_addend;
9926	hi_irelfn->r_info = ELF32_R_INFO (ELF32_R_SYM (hi_irelfn->r_info),
9927					  cond_reloc);
9928      }
9929
9930  if ((seq_len ^ *insn_len ) & 0x2)
9931    {
9932      insn16 = NDS32_NOP16;
9933      bfd_putb16 (insn16, contents + irel->r_offset + *insn_len);
9934      lo_irelfn->r_offset = *insn_len;
9935      lo_irelfn->r_info = ELF32_R_INFO (ELF32_R_SYM (lo_irelfn->r_info),
9936					R_NDS32_INSN16);
9937      lo_irelfn->r_addend = R_NDS32_INSN16_CONVERT_FLAG;
9938      *insn_len += 2;
9939    }
9940  else
9941    lo_irelfn->r_info = ELF32_R_INFO (ELF32_R_SYM (lo_irelfn->r_info),
9942				      R_NDS32_NONE);
9943  return TRUE;
9944}
9945
9946/* Relax LONGCALL4 relocation for nds32_elf_relax_section.  */
9947
9948static bfd_boolean
9949nds32_elf_relax_longcall4 (bfd *abfd, asection *sec, Elf_Internal_Rela *irel,
9950			   Elf_Internal_Rela *internal_relocs, int *insn_len,
9951			   bfd_byte *contents, Elf_Internal_Sym *isymbuf,
9952			   Elf_Internal_Shdr *symtab_hdr)
9953{
9954  /* The pattern for LONGCALL4.  Support for function cse.
9955     sethi ta, hi20(symbol)	; LONGCALL4/HI20
9956     ori   ta, ta, lo12(symbol)	; LO12S0_ORI/PTR
9957     jral  ta			; PTR_RES/EMPTY/INSN16  */
9958
9959  bfd_vma laddr;
9960  uint32_t insn;
9961  Elf_Internal_Rela *hi_irel, *ptr_irel, *insn_irel, *em_irel, *call_irel;
9962  Elf_Internal_Rela *irelend;
9963  int pic_ext_target = 0;
9964  bfd_signed_vma foff;
9965
9966  irelend = internal_relocs + sec->reloc_count;
9967  laddr = irel->r_offset;
9968
9969  /* Get the reloc for the address from which the register is
9970     being loaded.  This reloc will tell us which function is
9971     actually being called.  */
9972  hi_irel = find_relocs_at_address_addr (irel, internal_relocs, irelend,
9973					 R_NDS32_HI20_RELA, laddr);
9974
9975  if (hi_irel == irelend)
9976    {
9977      (*_bfd_error_handler)
9978	("%B: warning: R_NDS32_LONGCALL4 points to unrecognized"
9979	 "reloc at 0x%lx.", abfd, (long) irel->r_offset);
9980      return FALSE;
9981    }
9982
9983  /* Get the value of the symbol referred to by the reloc.  */
9984  foff = calculate_offset (abfd, sec, hi_irel, isymbuf, symtab_hdr,
9985			   &pic_ext_target);
9986
9987  /* This condition only happened when symbol is undefined.  */
9988  if (pic_ext_target || foff == 0 || foff < -CONSERVATIVE_24BIT_S1
9989      || foff >= CONSERVATIVE_24BIT_S1)
9990    return FALSE;
9991
9992  /* Relax to: jal symbol; 25_PCREL */
9993  /* For simplicity of coding, we are going to modify the section
9994     contents, the section relocs, and the BFD symbol table.  We
9995     must tell the rest of the code not to free up this
9996     information.  It would be possible to instead create a table
9997     of changes which have to be made, as is done in coff-mips.c;
9998     that would be more work, but would require less memory when
9999     the linker is run.  */
10000
10001  ptr_irel = find_relocs_at_address_addr (irel, internal_relocs, irelend,
10002					  R_NDS32_PTR_RESOLVED, irel->r_addend);
10003  em_irel = find_relocs_at_address_addr (irel, internal_relocs, irelend,
10004					  R_NDS32_EMPTY, irel->r_addend);
10005
10006  if (ptr_irel == irelend || em_irel == irelend)
10007    {
10008      (*_bfd_error_handler)
10009	("%B: warning: R_NDS32_LONGCALL4 points to unrecognized"
10010	 "reloc at 0x%lx.", abfd, (long) irel->r_offset);
10011      return FALSE;
10012    }
10013  /* Check these is enough space to insert jal in R_NDS32_EMPTY.  */
10014  insn = bfd_getb32 (contents + irel->r_addend);
10015  if (insn & 0x80000000)
10016    return FALSE;
10017
10018  /* Replace the long call with a jal.  */
10019  em_irel->r_info = ELF32_R_INFO (ELF32_R_SYM (em_irel->r_info),
10020				  R_NDS32_25_PCREL_RELA);
10021  ptr_irel->r_addend = 1;
10022
10023  /* We don't resolve this here but resolve it in relocate_section.  */
10024  insn = INSN_JAL;
10025  bfd_putb32 (insn, contents + em_irel->r_offset);
10026
10027  irel->r_info =
10028    ELF32_R_INFO (ELF32_R_SYM (irel->r_info), R_NDS32_NONE);
10029
10030  /* If there is function cse, HI20 can not remove now.  */
10031  call_irel = find_relocs_at_address_addr (irel, internal_relocs, irelend,
10032					   R_NDS32_LONGCALL4, laddr);
10033  if (call_irel == irelend)
10034    {
10035      *insn_len = 0;
10036      hi_irel->r_info =
10037	ELF32_R_INFO (ELF32_R_SYM (hi_irel->r_info), R_NDS32_NONE);
10038    }
10039
10040  insn_irel = find_relocs_at_address_addr (irel, internal_relocs, irelend,
10041					  R_NDS32_INSN16, irel->r_addend);
10042  if (insn_irel != irelend)
10043    insn_irel->r_info =
10044      ELF32_R_INFO (ELF32_R_SYM (irel->r_info), R_NDS32_NONE);
10045
10046  return TRUE;
10047}
10048
10049/* Relax LONGCALL5 relocation for nds32_elf_relax_section.  */
10050
10051static bfd_boolean
10052nds32_elf_relax_longcall5 (bfd *abfd, asection *sec, Elf_Internal_Rela *irel,
10053			   Elf_Internal_Rela *internal_relocs, int *insn_len,
10054			   bfd_byte *contents, Elf_Internal_Sym *isymbuf,
10055			   Elf_Internal_Shdr *symtab_hdr)
10056{
10057  /* The pattern for LONGCALL5.
10058     bltz  rt, .L1	; LONGCALL5/17_PCREL
10059     jal   symbol	; 25_PCREL
10060     .L1:  */
10061
10062  bfd_vma laddr;
10063  uint32_t insn;
10064  Elf_Internal_Rela *cond_irel, *irelend;
10065  int pic_ext_target = 0;
10066  bfd_signed_vma foff;
10067
10068  irelend = internal_relocs + sec->reloc_count;
10069  laddr = irel->r_offset;
10070  insn = bfd_getb32 (contents + laddr);
10071
10072  /* Get the reloc for the address from which the register is
10073     being loaded.  This reloc will tell us which function is
10074     actually being called.  */
10075  cond_irel =
10076    find_relocs_at_address_addr (irel, internal_relocs, irelend,
10077				 R_NDS32_25_PCREL_RELA, irel->r_addend);
10078  if (cond_irel == irelend)
10079    {
10080      (*_bfd_error_handler)
10081	("%B: warning: R_NDS32_LONGCALL5 points to unrecognized"
10082	 "reloc at 0x%lx.", abfd, (long) irel->r_offset);
10083      return FALSE;
10084    }
10085
10086  /* Get the value of the symbol referred to by the reloc.  */
10087  foff = calculate_offset (abfd, sec, cond_irel, isymbuf, symtab_hdr,
10088			   &pic_ext_target);
10089
10090  if (foff == 0 || foff < -CONSERVATIVE_16BIT_S1
10091      || foff >= CONSERVATIVE_16BIT_S1)
10092    return FALSE;
10093
10094  /* Relax to	bgezal   rt, label ; 17_PCREL
10095     or		bltzal   rt, label ; 17_PCREL */
10096
10097  /* Convert to complimentary conditional call.  */
10098  insn = CONVERT_CONDITION_CALL (insn);
10099
10100  /* For simplicity of coding, we are going to modify the section
10101     contents, the section relocs, and the BFD symbol table.  We
10102     must tell the rest of the code not to free up this
10103     information.  It would be possible to instead create a table
10104     of changes which have to be made, as is done in coff-mips.c;
10105     that would be more work, but would require less memory when
10106     the linker is run.  */
10107
10108  /* Modify relocation and contents.  */
10109  cond_irel->r_info =
10110    ELF32_R_INFO (ELF32_R_SYM (cond_irel->r_info), R_NDS32_17_PCREL_RELA);
10111
10112  /* Replace the long call with a bgezal.  */
10113  bfd_putb32 (insn, contents + cond_irel->r_offset);
10114  *insn_len = 0;
10115
10116  /* Clean unnessary relocations.  */
10117  irel->r_info = ELF32_R_INFO (ELF32_R_SYM (irel->r_info), R_NDS32_NONE);
10118
10119  cond_irel = find_relocs_at_address_addr (irel, internal_relocs, irelend,
10120					   R_NDS32_17_PCREL_RELA, laddr);
10121  cond_irel->r_info =
10122    ELF32_R_INFO (ELF32_R_SYM (cond_irel->r_info), R_NDS32_NONE);
10123
10124  return TRUE;
10125}
10126
10127/* Relax LONGCALL6 relocation for nds32_elf_relax_section.  */
10128
10129static bfd_boolean
10130nds32_elf_relax_longcall6 (bfd *abfd, asection *sec, Elf_Internal_Rela *irel,
10131			   Elf_Internal_Rela *internal_relocs, int *insn_len,
10132			   bfd_byte *contents, Elf_Internal_Sym *isymbuf,
10133			   Elf_Internal_Shdr *symtab_hdr)
10134{
10135  /* The pattern for LONGCALL6.
10136     bltz  rt,   .L1			; LONGCALL6/17_PCREL
10137     sethi ta,   hi20(symbol)		; HI20/PTR
10138     ori   ta, ta,  lo12(symbol)	; LO12S0_ORI/PTR
10139     jral  ta				; PTR_RES/EMPTY/INSN16
10140     .L1  */
10141
10142  bfd_vma laddr;
10143  uint32_t insn;
10144  Elf_Internal_Rela *em_irel, *cond_irel, *irelend;
10145  int pic_ext_target = 0;
10146  bfd_signed_vma foff;
10147
10148  irelend = internal_relocs + sec->reloc_count;
10149  laddr = irel->r_offset;
10150
10151  /* Get the reloc for the address from which the register is
10152     being loaded.  This reloc will tell us which function is
10153     actually being called.  */
10154  em_irel = find_relocs_at_address_addr (irel, internal_relocs, irelend,
10155					 R_NDS32_EMPTY, irel->r_addend);
10156
10157  if (em_irel == irelend)
10158    {
10159      (*_bfd_error_handler)
10160	("%B: warning: R_NDS32_LONGCALL6 points to unrecognized"
10161	 "reloc at 0x%lx.", abfd, (long) irel->r_offset);
10162      return FALSE;
10163    }
10164
10165  /* Get the value of the symbol referred to by the reloc.  */
10166  foff = calculate_offset (abfd, sec, em_irel, isymbuf, symtab_hdr,
10167			   &pic_ext_target);
10168
10169  if (pic_ext_target || foff == 0 || foff < -CONSERVATIVE_24BIT_S1
10170      || foff >= CONSERVATIVE_24BIT_S1)
10171    return FALSE;
10172
10173  /* Check these is enough space to insert jal in R_NDS32_EMPTY.  */
10174  insn = bfd_getb32 (contents + irel->r_addend);
10175  if (insn & 0x80000000)
10176    return FALSE;
10177
10178  insn = bfd_getb32 (contents + laddr);
10179  if (foff >= -CONSERVATIVE_16BIT_S1 && foff < CONSERVATIVE_16BIT_S1)
10180    {
10181      /* Relax to  bgezal   rt, label ; 17_PCREL
10182	 or	   bltzal   rt, label ; 17_PCREL */
10183
10184      /* Convert to complimentary conditional call.  */
10185      *insn_len = 0;
10186      insn = CONVERT_CONDITION_CALL (insn);
10187      bfd_putb32 (insn, contents + em_irel->r_offset);
10188
10189      em_irel->r_info =
10190	ELF32_R_INFO (ELF32_R_SYM (em_irel->r_info), R_NDS32_17_PCREL_RELA);
10191
10192      /* Set resolved relocation.  */
10193      cond_irel =
10194	find_relocs_at_address_addr (irel, internal_relocs, irelend,
10195				     R_NDS32_PTR_RESOLVED, irel->r_addend);
10196      if (cond_irel == irelend)
10197	{
10198	  (*_bfd_error_handler)
10199	    ("%B: warning: R_NDS32_LONGCALL6 points to unrecognized"
10200	     "reloc at 0x%lx.", abfd, (long) irel->r_offset);
10201	  return FALSE;
10202	}
10203      cond_irel->r_addend = 1;
10204
10205      /* Clear relocations.  */
10206
10207      irel->r_info =
10208	ELF32_R_INFO (ELF32_R_SYM (irel->r_info), R_NDS32_NONE);
10209
10210      cond_irel =
10211	find_relocs_at_address_addr (irel, internal_relocs, irelend,
10212				     R_NDS32_17_PCREL_RELA, laddr);
10213      if (cond_irel != irelend)
10214	cond_irel->r_info =
10215	  ELF32_R_INFO (ELF32_R_SYM (cond_irel->r_info), R_NDS32_NONE);
10216
10217      cond_irel =
10218	find_relocs_at_address_addr (irel, internal_relocs, irelend,
10219				     R_NDS32_INSN16, irel->r_addend);
10220      if (cond_irel != irelend)
10221	cond_irel->r_info =
10222	  ELF32_R_INFO (ELF32_R_SYM (cond_irel->r_info), R_NDS32_NONE);
10223
10224    }
10225  else if (foff >= -CONSERVATIVE_24BIT_S1 && foff < CONSERVATIVE_24BIT_S1)
10226    {
10227      /* Relax to the following instruction sequence
10228	 bltz  rt, .L1	; LONGCALL2/17_PCREL
10229	 jal   symbol	; 25_PCREL/PTR_RES
10230	 .L1  */
10231      *insn_len = 4;
10232      /* Convert instruction.  */
10233      insn = INSN_JAL;
10234      bfd_putb32 (insn, contents + em_irel->r_offset);
10235
10236      /* Convert relocations.  */
10237      em_irel->r_info = ELF32_R_INFO (ELF32_R_SYM (em_irel->r_info),
10238				      R_NDS32_25_PCREL_RELA);
10239      irel->r_info =
10240	ELF32_R_INFO (ELF32_R_SYM (irel->r_info), R_NDS32_LONGCALL5);
10241
10242      /* Set resolved relocation.  */
10243      cond_irel =
10244	find_relocs_at_address_addr (irel, internal_relocs, irelend,
10245				     R_NDS32_PTR_RESOLVED, irel->r_addend);
10246      if (cond_irel == irelend)
10247	{
10248	  (*_bfd_error_handler)
10249	    ("%B: warning: R_NDS32_LONGCALL6 points to unrecognized"
10250	     "reloc at 0x%lx.", abfd, (long) irel->r_offset);
10251	  return FALSE;
10252	}
10253      cond_irel->r_addend = 1;
10254
10255      cond_irel =
10256	find_relocs_at_address_addr (irel, internal_relocs, irelend,
10257				     R_NDS32_INSN16, irel->r_addend);
10258      if (cond_irel != irelend)
10259	cond_irel->r_info =
10260	  ELF32_R_INFO (ELF32_R_SYM (cond_irel->r_info), R_NDS32_NONE);
10261    }
10262  return TRUE;
10263}
10264
10265/* Relax LONGJUMP4 relocation for nds32_elf_relax_section.  */
10266
10267static bfd_boolean
10268nds32_elf_relax_longjump4 (bfd *abfd, asection *sec, Elf_Internal_Rela *irel,
10269			   Elf_Internal_Rela *internal_relocs, int *insn_len,
10270			   bfd_byte *contents, Elf_Internal_Sym *isymbuf,
10271			   Elf_Internal_Shdr *symtab_hdr)
10272{
10273  /* The pattern for LONGJUMP4.
10274     sethi ta, hi20(symbol)	; LONGJUMP4/HI20
10275     ori   ta, ta, lo12(symbol)	; LO12S0_ORI/PTR
10276     jr    ta			; PTR_RES/INSN16/EMPTY  */
10277
10278  bfd_vma laddr;
10279  int seq_len;	/* Original length of instruction sequence.  */
10280  uint32_t insn;
10281  Elf_Internal_Rela *hi_irel, *ptr_irel, *em_irel, *call_irel, *irelend;
10282  int pic_ext_target = 0;
10283  bfd_signed_vma foff;
10284
10285  irelend = internal_relocs + sec->reloc_count;
10286  seq_len = GET_SEQ_LEN (irel->r_addend);
10287  laddr = irel->r_offset;
10288  *insn_len = seq_len;
10289
10290  /* Get the reloc for the address from which the register is
10291     being loaded.  This reloc will tell us which function is
10292     actually being called.  */
10293
10294  hi_irel = find_relocs_at_address_addr (irel, internal_relocs, irelend,
10295					 R_NDS32_HI20_RELA, laddr);
10296
10297  if (hi_irel == irelend)
10298    {
10299      (*_bfd_error_handler)
10300	("%B: warning: R_NDS32_LONGJUMP4 points to unrecognized"
10301	 "reloc at 0x%lx.", abfd, (long) irel->r_offset);
10302      return FALSE;
10303    }
10304
10305  /* Get the value of the symbol referred to by the reloc.  */
10306  foff = calculate_offset (abfd, sec, hi_irel, isymbuf, symtab_hdr,
10307			   &pic_ext_target);
10308
10309  if (pic_ext_target || foff == 0 || foff >= CONSERVATIVE_24BIT_S1
10310      || foff < -CONSERVATIVE_24BIT_S1)
10311    return FALSE;
10312
10313  /* Convert it to "j label", it may be converted to j8 in the final
10314     pass of relaxation.  Therefore, we do not consider this currently.  */
10315  ptr_irel = find_relocs_at_address_addr (irel, internal_relocs, irelend,
10316					  R_NDS32_PTR_RESOLVED, irel->r_addend);
10317  em_irel = find_relocs_at_address_addr (irel, internal_relocs, irelend,
10318					 R_NDS32_EMPTY, irel->r_addend);
10319
10320  if (ptr_irel == irelend || em_irel == irelend)
10321    {
10322      (*_bfd_error_handler)
10323	("%B: warning: R_NDS32_LONGJUMP4 points to unrecognized"
10324	 "reloc at 0x%lx.", abfd, (long) irel->r_offset);
10325      return FALSE;
10326    }
10327
10328  em_irel->r_info =
10329    ELF32_R_INFO (ELF32_R_SYM (em_irel->r_info), R_NDS32_25_PCREL_RELA);
10330  ptr_irel->r_addend = 1;
10331
10332  /* Write instruction.  */
10333  insn = INSN_J;
10334  bfd_putb32 (insn, contents + em_irel->r_offset);
10335
10336  /* Clear relocations.  */
10337  irel->r_info = ELF32_R_INFO (ELF32_R_SYM (irel->r_info), R_NDS32_NONE);
10338
10339  /* If there is function cse, HI20 can not remove now.  */
10340  call_irel = find_relocs_at_address_addr (irel, internal_relocs, irelend,
10341					   R_NDS32_LONGJUMP4, laddr);
10342  if (call_irel == irelend)
10343    {
10344      *insn_len = 0;
10345      hi_irel->r_info =
10346	ELF32_R_INFO (ELF32_R_SYM (hi_irel->r_info), R_NDS32_NONE);
10347    }
10348
10349  return TRUE;
10350}
10351
10352/* Relax LONGJUMP5 relocation for nds32_elf_relax_section.  */
10353
10354static bfd_boolean
10355nds32_elf_relax_longjump5 (bfd *abfd, asection *sec, Elf_Internal_Rela *irel,
10356			   Elf_Internal_Rela *internal_relocs, int *insn_len,
10357			   int *seq_len, bfd_byte *contents,
10358			   Elf_Internal_Sym *isymbuf,
10359			   Elf_Internal_Shdr *symtab_hdr)
10360{
10361  /* There are 2 variations for LONGJUMP5
10362     case 2-4;  1st insn convertible, 16-bit on.
10363     bnes38  rt, ra, .L1	; LONGJUMP5/9_PCREL/INSN16
10364     j       label		; 25_PCREL/INSN16
10365     $1:
10366
10367     case 4-4; 1st insn not convertible
10368     bne  rt, ra, .L1	; LONGJUMP5/15_PCREL/INSN16
10369     j    label		; 25_PCREL/INSN16
10370     .L1:  */
10371
10372  bfd_vma laddr;
10373  Elf_Internal_Rela *cond_irel,  *irelend;
10374  int pic_ext_target = 0;
10375  unsigned int i;
10376  bfd_signed_vma foff;
10377  uint32_t insn, re_insn = 0;
10378  uint16_t insn16, re_insn16 = 0;
10379  unsigned long reloc;
10380
10381  enum elf_nds32_reloc_type checked_types[] =
10382    { R_NDS32_17_PCREL_RELA, R_NDS32_15_PCREL_RELA,
10383      R_NDS32_9_PCREL_RELA, R_NDS32_INSN16 };
10384
10385  irelend = internal_relocs + sec->reloc_count;
10386  laddr = irel->r_offset;
10387
10388  /* Get the reloc for the address from which the register is
10389     being loaded.  This reloc will tell us which function is
10390     actually being called.  */
10391
10392  cond_irel =
10393    find_relocs_at_address_addr (irel, internal_relocs, irelend,
10394				 R_NDS32_25_PCREL_RELA, irel->r_addend);
10395  if (cond_irel == irelend)
10396    {
10397      (*_bfd_error_handler)
10398	("%B: warning: R_NDS32_LONGJUMP5 points to unrecognized"
10399	 "reloc at 0x%lx.", abfd, (long) irel->r_offset);
10400      return FALSE;
10401    }
10402
10403  /* Get the value of the symbol referred to by the reloc.  */
10404  foff = calculate_offset (abfd, sec, cond_irel, isymbuf, symtab_hdr,
10405			   &pic_ext_target);
10406
10407  if (pic_ext_target || foff == 0 || foff < -CONSERVATIVE_16BIT_S1
10408      || foff >= CONSERVATIVE_16BIT_S1)
10409    return FALSE;
10410
10411  /* Get the all corresponding instructions.  */
10412  insn = bfd_getb32 (contents + laddr);
10413  /* Check instruction size.  */
10414  if (insn & 0x80000000)
10415    {
10416      *seq_len = 0;
10417      insn16 = insn >> 16;
10418      nds32_elf_convert_branch (insn16, 0, &re_insn16, &re_insn);
10419    }
10420  else
10421    nds32_elf_convert_branch (0, insn, &re_insn16, &re_insn);
10422
10423  if (N32_OP6 (re_insn) == N32_OP6_BR1
10424      && (foff >= -CONSERVATIVE_14BIT_S1 && foff < CONSERVATIVE_14BIT_S1))
10425    {
10426      /* beqs label ; 15_PCREL.  */
10427      bfd_putb32 (re_insn, contents + cond_irel->r_offset);
10428      reloc = R_NDS32_15_PCREL_RELA;
10429    }
10430  else if (N32_OP6 (re_insn) == N32_OP6_BR2
10431	   && foff >= -CONSERVATIVE_16BIT_S1 && foff < CONSERVATIVE_16BIT_S1)
10432    {
10433      /* beqz label ; 17_PCREL.  */
10434      bfd_putb32 (re_insn, contents + cond_irel->r_offset);
10435      reloc = R_NDS32_17_PCREL_RELA;
10436    }
10437  else if ( N32_OP6 (re_insn) == N32_OP6_BR3
10438	   && foff >= -CONSERVATIVE_8BIT_S1 && foff < CONSERVATIVE_8BIT_S1)
10439    {
10440      /* beqc label ; 9_PCREL.  */
10441      bfd_putb32 (re_insn, contents + cond_irel->r_offset);
10442      reloc = R_NDS32_WORD_9_PCREL_RELA;
10443    }
10444  else
10445    return FALSE;
10446
10447  /* Set all relocations.  */
10448  cond_irel->r_info = ELF32_R_INFO (ELF32_R_SYM (cond_irel->r_info), reloc);
10449
10450  /* Clean relocations.  */
10451  irel->r_info = ELF32_R_INFO (ELF32_R_SYM (irel->r_info), R_NDS32_NONE);
10452  for (i = 0; i < sizeof (checked_types) / sizeof (checked_types[0]); i++)
10453    {
10454      cond_irel = find_relocs_at_address_addr (irel, internal_relocs, irelend,
10455					       checked_types[i], laddr);
10456      if (cond_irel != irelend)
10457	{
10458	  if (*seq_len == 0
10459	      && (ELF32_R_TYPE (cond_irel->r_info) == R_NDS32_INSN16))
10460	    {
10461	      /* If the branch instruction is 2 byte, it cannot remove
10462		 directly.  Only convert it to nop16 and remove it after
10463		 checking alignment issue.  */
10464	      insn16 = NDS32_NOP16;
10465	      bfd_putb16 (insn16, contents + laddr);
10466	      cond_irel->r_addend = R_NDS32_INSN16_CONVERT_FLAG;
10467	    }
10468	  else
10469	    cond_irel->r_info = ELF32_R_INFO (ELF32_R_SYM (cond_irel->r_info),
10470					      R_NDS32_NONE);
10471	}
10472    }
10473  *insn_len = 0;
10474
10475  return TRUE;
10476}
10477
10478/* Relax LONGJUMP6 relocation for nds32_elf_relax_section.  */
10479
10480static bfd_boolean
10481nds32_elf_relax_longjump6 (bfd *abfd, asection *sec, Elf_Internal_Rela *irel,
10482			   Elf_Internal_Rela *internal_relocs, int *insn_len,
10483			   int *seq_len, bfd_byte *contents,
10484			   Elf_Internal_Sym *isymbuf,
10485			   Elf_Internal_Shdr *symtab_hdr)
10486{
10487  /* There are 5 variations for LONGJUMP6
10488     case : 2-4-4-4; 1st insn convertible, 16-bit on.
10489     bnes38   rt, ra, .L1		; LONGJUMP6/15_PCREL/INSN16
10490     sethi    ta, hi20(symbol)		; HI20/PTR
10491     ori      ta, ta, lo12(symbol)	; LO12S0_ORI/PTR
10492     jr       ta			; PTR_RES/INSN16/EMPTY
10493     .L1:
10494
10495     case : 4-4-4-4; 1st insn not convertible, 16-bit on.
10496     bne   rt, ra, .L1		; LONGJUMP6/15_PCREL/INSN16
10497     sethi ta, hi20(symbol)	; HI20/PTR
10498     ori   ta, ta, lo12(symbol)	; LO12S0_ORI/PTR
10499     jr    ta			; PTR_RES/INSN16/EMPTY
10500     .L1:  */
10501
10502  enum elf_nds32_reloc_type checked_types[] =
10503    { R_NDS32_17_PCREL_RELA, R_NDS32_15_PCREL_RELA,
10504      R_NDS32_9_PCREL_RELA, R_NDS32_INSN16 };
10505
10506  int reloc_off = 0, cond_removed = 0;
10507  bfd_vma laddr;
10508  Elf_Internal_Rela *cond_irel, *em_irel, *irelend, *insn_irel;
10509  int pic_ext_target = 0;
10510  unsigned int i;
10511  bfd_signed_vma foff;
10512  uint32_t insn, re_insn = 0;
10513  uint16_t insn16, re_insn16 = 0;
10514  unsigned long reloc;
10515
10516  irelend = internal_relocs + sec->reloc_count;
10517  laddr = irel->r_offset;
10518
10519  /* Get the reloc for the address from which the register is
10520     being loaded.  This reloc will tell us which function is
10521     actually being called.  */
10522  em_irel = find_relocs_at_address_addr (irel, internal_relocs, irelend,
10523					 R_NDS32_EMPTY, irel->r_addend);
10524
10525  if (em_irel == irelend)
10526    {
10527      (*_bfd_error_handler)
10528	("%B: warning: R_NDS32_LONGJUMP6 points to unrecognized"
10529	 "reloc at 0x%lx.", abfd, (long) irel->r_offset);
10530      return FALSE;
10531    }
10532
10533  /* Get the value of the symbol referred to by the reloc.  */
10534  foff = calculate_offset (abfd, sec, em_irel, isymbuf, symtab_hdr,
10535			   &pic_ext_target);
10536
10537  if (pic_ext_target || foff == 0 || foff < -CONSERVATIVE_24BIT_S1
10538      || foff >= CONSERVATIVE_24BIT_S1)
10539    return FALSE;
10540
10541  insn = bfd_getb32 (contents + laddr);
10542  /* Check instruction size.  */
10543  if (insn & 0x80000000)
10544    {
10545      *seq_len = 0;
10546      insn16 = insn >> 16;
10547      nds32_elf_convert_branch (insn16, 0, &re_insn16, &re_insn);
10548    }
10549  else
10550    nds32_elf_convert_branch (0, insn, &re_insn16, &re_insn);
10551
10552  /* For simplicity of coding, we are going to modify the section
10553     contents, the section relocs, and the BFD symbol table.  We
10554     must tell the rest of the code not to free up this
10555     information.  It would be possible to instead create a table
10556     of changes which have to be made, as is done in coff-mips.c;
10557     that would be more work, but would require less memory when
10558     the linker is run.  */
10559
10560  if (N32_OP6 (re_insn) == N32_OP6_BR1
10561      && (foff >= -CONSERVATIVE_14BIT_S1 && foff < CONSERVATIVE_14BIT_S1))
10562    {
10563      /* beqs     label    ; 15_PCREL */
10564      bfd_putb32 (re_insn, contents + em_irel->r_offset);
10565      reloc = R_NDS32_15_PCREL_RELA;
10566      cond_removed = 1;
10567    }
10568  else if (N32_OP6 (re_insn) == N32_OP6_BR2
10569	   && foff >= -CONSERVATIVE_16BIT_S1 && foff < CONSERVATIVE_16BIT_S1)
10570    {
10571      /* beqz     label ; 17_PCREL */
10572      bfd_putb32 (re_insn, contents + em_irel->r_offset);
10573      reloc = R_NDS32_17_PCREL_RELA;
10574      cond_removed = 1;
10575    }
10576  else if (foff >= -CONSERVATIVE_24BIT_S1 - reloc_off
10577	   && foff < CONSERVATIVE_24BIT_S1 - reloc_off)
10578    {
10579      /* Relax to one of the following 2 variations
10580
10581	 case 2-4;  1st insn convertible, 16-bit on.
10582	 bnes38  rt, ra, .L1	; LONGJUMP5/9_PCREL/INSN16
10583	 j       label		; 25_PCREL/INSN16
10584	 $1:
10585
10586	 case 4-4; 1st insn not convertible
10587	 bne  rt, ra, .L1	; LONGJUMP5/15_PCREL/INSN16
10588	 j    label		; 25_PCREL/INSN16
10589	 .L1:  */
10590
10591      /* Use j label as second instruction.  */
10592      insn = INSN_J;
10593      reloc = R_NDS32_25_PCREL_RELA;
10594      bfd_putb32 (insn, contents + em_irel->r_offset);
10595    }
10596  else
10597    return FALSE;
10598
10599  /* Set all relocations.  */
10600  em_irel->r_info = ELF32_R_INFO (ELF32_R_SYM (em_irel->r_info), reloc);
10601
10602  cond_irel =
10603    find_relocs_at_address_addr (irel, internal_relocs, irelend,
10604				 R_NDS32_PTR_RESOLVED, em_irel->r_offset);
10605  cond_irel->r_addend = 1;
10606
10607  /* Use INSN16 of first branch instruction to distinguish if keeping
10608     INSN16 of final instruction or not.  */
10609  insn_irel = find_relocs_at_address_addr (irel, internal_relocs, irelend,
10610					   R_NDS32_INSN16, irel->r_offset);
10611  if (insn_irel == irelend)
10612    {
10613      /* Clean the final INSN16.  */
10614      insn_irel =
10615	find_relocs_at_address_addr (irel, internal_relocs, irelend,
10616				     R_NDS32_INSN16, em_irel->r_offset);
10617      insn_irel->r_info = ELF32_R_INFO (ELF32_R_SYM (cond_irel->r_info),
10618					R_NDS32_NONE);
10619    }
10620
10621  if (cond_removed == 1)
10622    {
10623      *insn_len = 0;
10624
10625      /* Clear relocations.  */
10626      irel->r_info = ELF32_R_INFO (ELF32_R_SYM (irel->r_info), R_NDS32_NONE);
10627
10628      for (i = 0; i < sizeof (checked_types) / sizeof (checked_types[0]); i++)
10629	{
10630	  cond_irel =
10631	    find_relocs_at_address_addr (irel, internal_relocs, irelend,
10632					 checked_types[i], laddr);
10633	  if (cond_irel != irelend)
10634	    {
10635	      if (*seq_len == 0
10636		  && (ELF32_R_TYPE (cond_irel->r_info) == R_NDS32_INSN16))
10637		{
10638		  /* If the branch instruction is 2 byte, it cannot remove
10639		     directly.  Only convert it to nop16 and remove it after
10640		     checking alignment issue.  */
10641		  insn16 = NDS32_NOP16;
10642		  bfd_putb16 (insn16, contents + laddr);
10643		  cond_irel->r_addend = R_NDS32_INSN16_CONVERT_FLAG;
10644		}
10645	      else
10646		cond_irel->r_info =
10647		  ELF32_R_INFO (ELF32_R_SYM (cond_irel->r_info), R_NDS32_NONE);
10648	    }
10649	}
10650    }
10651  else
10652    {
10653      irel->r_info = ELF32_R_INFO (ELF32_R_SYM (irel->r_info),
10654				   R_NDS32_LONGJUMP5);
10655    }
10656
10657  return TRUE;
10658}
10659
10660/* Relax LONGJUMP7 relocation for nds32_elf_relax_section.  */
10661
10662static bfd_boolean
10663nds32_elf_relax_longjump7 (bfd *abfd, asection *sec, Elf_Internal_Rela *irel,
10664			   Elf_Internal_Rela *internal_relocs, int *insn_len,
10665			   int *seq_len, bfd_byte *contents,
10666			   Elf_Internal_Sym *isymbuf,
10667			   Elf_Internal_Shdr *symtab_hdr)
10668{
10669  /* There are 2 variations for LONGJUMP5
10670     case 2-4;  1st insn convertible, 16-bit on.
10671     movi55  ta, imm11		; LONGJUMP7/INSN16
10672     beq     rt, ta, label	; 15_PCREL
10673
10674     case 4-4; 1st insn not convertible
10675     movi55  ta, imm11		; LONGJUMP7/INSN16
10676     beq     rt, ta, label	; 15_PCREL  */
10677
10678  bfd_vma laddr;
10679  Elf_Internal_Rela *cond_irel,  *irelend, *insn_irel;
10680  int pic_ext_target = 0;
10681  bfd_signed_vma foff;
10682  uint32_t insn, re_insn = 0;
10683  uint16_t insn16;
10684  uint32_t imm11;
10685
10686  irelend = internal_relocs + sec->reloc_count;
10687  laddr = irel->r_offset;
10688
10689  /* Get the reloc for the address from which the register is
10690     being loaded.  This reloc will tell us which function is
10691     actually being called.  */
10692
10693  cond_irel =
10694    find_relocs_at_address_addr (irel, internal_relocs, irelend,
10695				 R_NDS32_15_PCREL_RELA, irel->r_addend);
10696  if (cond_irel == irelend)
10697    {
10698      (*_bfd_error_handler)
10699	("%B: warning: R_NDS32_LONGJUMP7 points to unrecognized"
10700	 "reloc at 0x%lx.", abfd, (long) irel->r_offset);
10701      return FALSE;
10702    }
10703
10704  /* Get the value of the symbol referred to by the reloc.  */
10705  foff = calculate_offset (abfd, sec, cond_irel, isymbuf, symtab_hdr,
10706			   &pic_ext_target);
10707
10708  if (pic_ext_target || foff == 0 || foff < -CONSERVATIVE_8BIT_S1
10709      || foff >= CONSERVATIVE_8BIT_S1)
10710    return FALSE;
10711
10712  /* Get the first instruction for its size.  */
10713  insn = bfd_getb32 (contents + laddr);
10714  if (insn & 0x80000000)
10715    {
10716      *seq_len = 0;
10717      /* Get the immediate from movi55.  */
10718      imm11 = N16_IMM5S (insn >> 16);
10719    }
10720  else
10721    {
10722      /* Get the immediate from movi.  */
10723      imm11 = N32_IMM20S (insn);
10724    }
10725
10726  /* Get the branch instruction.  */
10727  insn = bfd_getb32 (contents + irel->r_addend);
10728  /* Convert instruction to BR3.  */
10729  if ((insn >> 14) & 0x1)
10730    re_insn = N32_BR3 (BNEC, N32_RT5 (insn), imm11, 0);
10731  else
10732    re_insn = N32_BR3 (BEQC, N32_RT5 (insn), imm11, 0);
10733
10734  bfd_putb32 (re_insn, contents + cond_irel->r_offset);
10735
10736  /* Set all relocations.  */
10737  cond_irel->r_info = ELF32_R_INFO (ELF32_R_SYM (cond_irel->r_info),
10738				    R_NDS32_WORD_9_PCREL_RELA);
10739
10740  /* Clean relocations.  */
10741  irel->r_info = ELF32_R_INFO (ELF32_R_SYM (irel->r_info), R_NDS32_NONE);
10742  insn_irel = find_relocs_at_address_addr (irel, internal_relocs, irelend,
10743					   R_NDS32_INSN16, irel->r_offset);
10744  if (insn_irel != irelend)
10745    {
10746      if (*seq_len == 0)
10747	{
10748	  /* If the first insntruction is 16bit, convert it to nop16.  */
10749	  insn16 = NDS32_NOP16;
10750	  bfd_putb16 (insn16, contents + laddr);
10751	  insn_irel->r_addend = R_NDS32_INSN16_CONVERT_FLAG;
10752	}
10753      else
10754	cond_irel->r_info = ELF32_R_INFO (ELF32_R_SYM (cond_irel->r_info),
10755					  R_NDS32_NONE);
10756    }
10757  *insn_len = 0;
10758
10759  return TRUE;
10760}
10761
10762#define GET_LOADSTORE_RANGE(addend) (((addend) >> 8) & 0x3f)
10763
10764/* Relax LOADSTORE relocation for nds32_elf_relax_section.  */
10765
10766static bfd_boolean
10767nds32_elf_relax_loadstore (struct bfd_link_info *link_info, bfd *abfd,
10768			   asection *sec, Elf_Internal_Rela *irel,
10769			   Elf_Internal_Rela *internal_relocs, int *insn_len,
10770			   bfd_byte *contents, Elf_Internal_Sym *isymbuf,
10771			   Elf_Internal_Shdr *symtab_hdr, int load_store_relax)
10772{
10773  int eliminate_sethi = 0, range_type, i;
10774  bfd_vma local_sda, laddr;
10775  int seq_len;	/* Original length of instruction sequence.  */
10776  uint32_t insn;
10777  Elf_Internal_Rela *hi_irelfn = NULL, *irelend;
10778  bfd_vma access_addr = 0;
10779  bfd_vma range_l = 0, range_h = 0;	/* Upper/lower bound.  */
10780  enum elf_nds32_reloc_type checked_types[] =
10781    { R_NDS32_HI20_RELA, R_NDS32_GOT_HI20,
10782      R_NDS32_GOTPC_HI20, R_NDS32_GOTOFF_HI20,
10783      R_NDS32_PLTREL_HI20, R_NDS32_PLT_GOTREL_HI20,
10784      R_NDS32_TLS_LE_HI20
10785    };
10786
10787  irelend = internal_relocs + sec->reloc_count;
10788  seq_len = GET_SEQ_LEN (irel->r_addend);
10789  laddr = irel->r_offset;
10790  *insn_len = seq_len;
10791
10792  /* Get the high part relocation.  */
10793  for (i = 0; (unsigned) i < sizeof (checked_types); i++)
10794    {
10795      hi_irelfn = find_relocs_at_address_addr (irel, internal_relocs, irelend,
10796					       checked_types[i], laddr);
10797      if (hi_irelfn != irelend)
10798	break;
10799    }
10800
10801  if (hi_irelfn == irelend)
10802    {
10803      (*_bfd_error_handler)
10804	("%B: warning: R_NDS32_LOADSTORE points to unrecognized"
10805	 "reloc at 0x%lx.", abfd, (long) irel->r_offset);
10806	return FALSE;
10807    }
10808
10809  range_type = GET_LOADSTORE_RANGE (irel->r_addend);
10810  nds32_elf_final_sda_base (sec->output_section->owner,
10811			    link_info, &local_sda, FALSE);
10812
10813  switch (ELF32_R_TYPE (hi_irelfn->r_info))
10814    {
10815    case R_NDS32_HI20_RELA:
10816      insn = bfd_getb32 (contents + laddr);
10817      access_addr =
10818	calculate_memory_address (abfd, hi_irelfn, isymbuf, symtab_hdr);
10819
10820      if (range_type == NDS32_LOADSTORE_IMM)
10821	{
10822	  struct elf_link_hash_entry *h = NULL;
10823	  int indx;
10824
10825	  if (ELF32_R_SYM (hi_irelfn->r_info) >= symtab_hdr->sh_info)
10826	    {
10827	      indx = ELF32_R_SYM (hi_irelfn->r_info) - symtab_hdr->sh_info;
10828	      h = elf_sym_hashes (abfd)[indx];
10829	    }
10830
10831	  if ((access_addr < CONSERVATIVE_20BIT)
10832	      && (!h || (h && strcmp (h->root.root.string, FP_BASE_NAME) != 0)))
10833	    {
10834	      eliminate_sethi = 1;
10835	      break;
10836	    }
10837
10838	  /* This is avoid to relax symbol address which is fixed
10839	     relocations.  Ex: _stack.  */
10840	  if (h && bfd_is_abs_section (h->root.u.def.section))
10841	    return FALSE;
10842	}
10843
10844      if (!load_store_relax)
10845	return FALSE;
10846
10847      /* Case for set gp register.  */
10848      if (N32_RT5 (insn) == REG_GP)
10849	break;
10850
10851      if (range_type == NDS32_LOADSTORE_FLOAT_S
10852	  || range_type == NDS32_LOADSTORE_FLOAT_S)
10853	{
10854	  range_l = sdata_range[0][0];
10855	  range_h = sdata_range[0][1];
10856	}
10857      else
10858	{
10859	  range_l = sdata_range[1][0];
10860	  range_h = sdata_range[1][1];
10861	}
10862      break;
10863
10864    case R_NDS32_GOT_HI20:
10865      access_addr =
10866	calculate_got_memory_address (abfd, link_info, hi_irelfn, symtab_hdr);
10867
10868      /* If this symbol is not in .got, the return value will be -1.
10869	 Since the gp value is set to SDA_BASE but not GLOBAL_OFFSET_TABLE,
10870	 a negative offset is allowed.  */
10871      if ((bfd_signed_vma) (access_addr - local_sda) < CONSERVATIVE_20BIT
10872	  && (bfd_signed_vma) (access_addr - local_sda) >= -CONSERVATIVE_20BIT)
10873	eliminate_sethi = 1;
10874      break;
10875
10876    case R_NDS32_PLT_GOTREL_HI20:
10877      access_addr = calculate_plt_memory_address (abfd, link_info, isymbuf,
10878						  hi_irelfn, symtab_hdr);
10879
10880      if ((bfd_signed_vma) (access_addr - local_sda) < CONSERVATIVE_20BIT
10881	  && (bfd_signed_vma) (access_addr - local_sda) >= -CONSERVATIVE_20BIT)
10882	eliminate_sethi = 1;
10883      break;
10884
10885    case R_NDS32_GOTOFF_HI20:
10886      access_addr =
10887	calculate_memory_address (abfd, hi_irelfn, isymbuf, symtab_hdr);
10888
10889      if ((bfd_signed_vma) (access_addr - local_sda) < CONSERVATIVE_20BIT
10890	  && (bfd_signed_vma) (access_addr - local_sda) >= -CONSERVATIVE_20BIT)
10891	eliminate_sethi = 1;
10892      break;
10893
10894    case R_NDS32_GOTPC_HI20:
10895      /* The access_addr must consider r_addend of hi_irel.  */
10896      access_addr = sec->output_section->vma + sec->output_offset
10897	+ irel->r_offset + hi_irelfn->r_addend;
10898
10899      if ((bfd_signed_vma) (local_sda - access_addr) < CONSERVATIVE_20BIT
10900	  && (bfd_signed_vma) (local_sda - access_addr) >= -CONSERVATIVE_20BIT)
10901	eliminate_sethi = 1;
10902      break;
10903
10904    case R_NDS32_TLS_LE_HI20:
10905      access_addr =
10906	calculate_memory_address (abfd, hi_irelfn, isymbuf, symtab_hdr);
10907      BFD_ASSERT (elf_hash_table (link_info)->tls_sec != NULL);
10908      access_addr -= (elf_hash_table (link_info)->tls_sec->vma + TP_OFFSET);
10909      if ((range_type == NDS32_LOADSTORE_IMM)
10910	  && (bfd_signed_vma) (access_addr) < CONSERVATIVE_20BIT
10911	  && (bfd_signed_vma) (access_addr) >= -CONSERVATIVE_20BIT)
10912	eliminate_sethi = 1;
10913      break;
10914
10915    default:
10916      return FALSE;
10917    }
10918
10919  /* Delete sethi instruction.  */
10920  if (eliminate_sethi == 1
10921      || (local_sda <= access_addr && (access_addr - local_sda) < range_h)
10922      || (local_sda > access_addr && (local_sda - access_addr) <= range_l))
10923    {
10924      hi_irelfn->r_info =
10925	ELF32_R_INFO (ELF32_R_SYM (hi_irelfn->r_info), R_NDS32_NONE);
10926      irel->r_info =
10927	ELF32_R_INFO (ELF32_R_SYM (irel->r_info), R_NDS32_NONE);
10928      *insn_len = 0;
10929    }
10930  return TRUE;
10931}
10932
10933/* Relax LO12 relocation for nds32_elf_relax_section.  */
10934
10935static void
10936nds32_elf_relax_lo12 (struct bfd_link_info *link_info, bfd *abfd,
10937		      asection *sec, Elf_Internal_Rela *irel,
10938		      Elf_Internal_Rela *internal_relocs, bfd_byte *contents,
10939		      Elf_Internal_Sym *isymbuf, Elf_Internal_Shdr *symtab_hdr)
10940{
10941  uint32_t insn;
10942  bfd_vma local_sda, laddr;
10943  unsigned long reloc;
10944  bfd_vma access_addr;
10945  bfd_vma range_l = 0, range_h = 0;	/* Upper/lower bound.  */
10946  Elf_Internal_Rela *irelfn = NULL, *irelend;
10947  struct elf_link_hash_entry *h = NULL;
10948  int indx;
10949
10950  /* For SDA base relative relaxation.  */
10951  nds32_elf_final_sda_base (sec->output_section->owner, link_info,
10952			    &local_sda, FALSE);
10953
10954  irelend = internal_relocs + sec->reloc_count;
10955  laddr = irel->r_offset;
10956  insn = bfd_getb32 (contents + laddr);
10957
10958  if (!is_sda_access_insn (insn) && N32_OP6 (insn) != N32_OP6_ORI)
10959    return;
10960
10961  access_addr = calculate_memory_address (abfd, irel, isymbuf, symtab_hdr);
10962
10963  if (ELF32_R_SYM (irel->r_info) >= symtab_hdr->sh_info)
10964    {
10965      indx = ELF32_R_SYM (irel->r_info) - symtab_hdr->sh_info;
10966      h = elf_sym_hashes (abfd)[indx];
10967    }
10968
10969  if (N32_OP6 (insn) == N32_OP6_ORI && access_addr < CONSERVATIVE_20BIT
10970      && (!h || (h && strcmp (h->root.root.string, FP_BASE_NAME) != 0)))
10971    {
10972      reloc = R_NDS32_20_RELA;
10973      irel->r_info = ELF32_R_INFO (ELF32_R_SYM (irel->r_info), reloc);
10974      insn = N32_TYPE1 (MOVI, N32_RT5 (insn), 0);
10975      bfd_putb32 (insn, contents + laddr);
10976    }
10977  /* This is avoid to relax symbol address which is fixed
10978     relocations.  Ex: _stack.  */
10979  else if (N32_OP6 (insn) == N32_OP6_ORI
10980	   && h && bfd_is_abs_section (h->root.u.def.section))
10981    return;
10982  else
10983    {
10984      range_l = sdata_range[1][0];
10985      range_h = sdata_range[1][1];
10986      switch (ELF32_R_TYPE (irel->r_info))
10987	{
10988	case R_NDS32_LO12S0_RELA:
10989	  reloc = R_NDS32_SDA19S0_RELA;
10990	  break;
10991	case R_NDS32_LO12S1_RELA:
10992	  reloc = R_NDS32_SDA18S1_RELA;
10993	  break;
10994	case R_NDS32_LO12S2_RELA:
10995	  reloc = R_NDS32_SDA17S2_RELA;
10996	  break;
10997	case R_NDS32_LO12S2_DP_RELA:
10998	  range_l = sdata_range[0][0];
10999	  range_h = sdata_range[0][1];
11000	  reloc = R_NDS32_SDA12S2_DP_RELA;
11001	  break;
11002	case R_NDS32_LO12S2_SP_RELA:
11003	  range_l = sdata_range[0][0];
11004	  range_h = sdata_range[0][1];
11005	  reloc = R_NDS32_SDA12S2_SP_RELA;
11006	  break;
11007	default:
11008	  return;
11009	}
11010
11011      /* There are range_h and range_l because linker has to promise
11012	 all sections move cross one page together.  */
11013      if ((local_sda <= access_addr && (access_addr - local_sda) < range_h)
11014	  || (local_sda > access_addr && (local_sda - access_addr) <= range_l))
11015	{
11016	  if (N32_OP6 (insn) == N32_OP6_ORI && N32_RT5 (insn) == REG_GP)
11017	    {
11018	      /* Maybe we should add R_NDS32_INSN16 reloc type here
11019		 or manually do some optimization.  sethi can't be
11020		 eliminated when updating $gp so the relative ori
11021		 needs to be preserved.  */
11022	      return;
11023	    }
11024	  if (!turn_insn_to_sda_access (insn, ELF32_R_TYPE (irel->r_info),
11025					&insn))
11026	    return;
11027	  irel->r_info = ELF32_R_INFO (ELF32_R_SYM (irel->r_info), reloc);
11028	  bfd_putb32 (insn, contents + laddr);
11029
11030	  irelfn = find_relocs_at_address (irel, internal_relocs, irelend,
11031					   R_NDS32_INSN16);
11032	  /* SDA17 must keep INSN16 for converting fp_as_gp.  */
11033	  if (irelfn != irelend && reloc != R_NDS32_SDA17S2_RELA)
11034	    irelfn->r_info =
11035	      ELF32_R_INFO (ELF32_R_SYM (irelfn->r_info), R_NDS32_NONE);
11036
11037	}
11038    }
11039  return;
11040}
11041
11042/* Relax low part of PIC instruction pattern.  */
11043
11044static void
11045nds32_elf_relax_piclo12 (struct bfd_link_info *link_info, bfd *abfd,
11046			 asection *sec, Elf_Internal_Rela *irel,
11047			 bfd_byte *contents, Elf_Internal_Sym *isymbuf,
11048			 Elf_Internal_Shdr *symtab_hdr)
11049{
11050  uint32_t insn;
11051  bfd_vma local_sda, laddr;
11052  bfd_signed_vma foff;
11053  unsigned long reloc;
11054
11055  nds32_elf_final_sda_base (sec->output_section->owner, link_info,
11056			    &local_sda, FALSE);
11057  laddr = irel->r_offset;
11058  insn = bfd_getb32 (contents + laddr);
11059
11060  if (N32_OP6 (insn) != N32_OP6_ORI)
11061    return;
11062
11063  if (ELF32_R_TYPE (irel->r_info) == R_NDS32_GOT_LO12)
11064    {
11065      foff = calculate_got_memory_address (abfd, link_info, irel,
11066					   symtab_hdr) - local_sda;
11067      reloc = R_NDS32_GOT20;
11068    }
11069  else if (ELF32_R_TYPE (irel->r_info) == R_NDS32_PLT_GOTREL_LO12)
11070    {
11071      foff = calculate_plt_memory_address (abfd, link_info, isymbuf, irel,
11072					   symtab_hdr) - local_sda;
11073      reloc = R_NDS32_PLT_GOTREL_LO20;
11074    }
11075  else if (ELF32_R_TYPE (irel->r_info) == R_NDS32_GOTOFF_LO12)
11076    {
11077      foff = calculate_memory_address (abfd, irel, isymbuf,
11078				       symtab_hdr) - local_sda;
11079      reloc = R_NDS32_GOTOFF;
11080    }
11081  else if (ELF32_R_TYPE (irel->r_info) == R_NDS32_GOTPC_LO12)
11082    {
11083      foff = local_sda - sec->output_section->vma + sec->output_offset
11084	+ irel->r_offset + irel->r_addend;
11085      reloc = R_NDS32_GOTPC20;
11086    }
11087  else
11088    return;
11089
11090  if ((foff < CONSERVATIVE_20BIT) && (foff >= -CONSERVATIVE_20BIT))
11091    {
11092      /* Turn into MOVI.  */
11093      irel->r_info = ELF32_R_INFO (ELF32_R_SYM (irel->r_info), reloc);
11094      insn = N32_TYPE1 (MOVI, N32_RT5 (insn), 0);
11095      bfd_putb32 (insn, contents + laddr);
11096    }
11097}
11098
11099/* Relax low part of LE TLS instruction pattern.  */
11100
11101static void
11102nds32_elf_relax_letlslo12 (struct bfd_link_info *link_info, bfd *abfd,
11103			   Elf_Internal_Rela *irel,
11104			   bfd_byte *contents, Elf_Internal_Sym *isymbuf,
11105			   Elf_Internal_Shdr *symtab_hdr)
11106{
11107  uint32_t insn;
11108  bfd_vma laddr;
11109  bfd_signed_vma foff;
11110  unsigned long reloc;
11111
11112  laddr = irel->r_offset;
11113  foff = calculate_memory_address (abfd, irel, isymbuf, symtab_hdr);
11114  BFD_ASSERT (elf_hash_table (link_info)->tls_sec != NULL);
11115  foff -= (elf_hash_table (link_info)->tls_sec->vma + TP_OFFSET);
11116  insn = bfd_getb32 (contents + laddr);
11117
11118  if ( (bfd_signed_vma) (foff) < CONSERVATIVE_20BIT
11119      && (bfd_signed_vma) (foff) >= -CONSERVATIVE_20BIT)
11120    {
11121      /* Pattern sethi-ori transform to movi.  */
11122      reloc = R_NDS32_TLS_LE_20;
11123      irel->r_info = ELF32_R_INFO (ELF32_R_SYM (irel->r_info), reloc);
11124      insn = N32_TYPE1 (MOVI, N32_RT5 (insn), 0);
11125      bfd_putb32 (insn, contents + laddr);
11126    }
11127}
11128
11129/* Relax LE TLS calculate address instruction pattern.  */
11130
11131static void
11132nds32_elf_relax_letlsadd (struct bfd_link_info *link_info, bfd *abfd,
11133			  asection *sec, Elf_Internal_Rela *irel,
11134			  Elf_Internal_Rela *internal_relocs,
11135			  bfd_byte *contents, Elf_Internal_Sym *isymbuf,
11136			  Elf_Internal_Shdr *symtab_hdr, bfd_boolean *again)
11137{
11138  /* Local TLS non-pic
11139     sethi    ta, hi20(symbol@tpoff)      ; TLS_LE_HI20
11140     ori      ta, ta, lo12(symbol@tpoff)  ; TLS_LE_LO12
11141     add      ra, ta, tp                  ; TLS_LE_ADD */
11142
11143  uint32_t insn;
11144  bfd_vma laddr;
11145  bfd_signed_vma foff;
11146  Elf_Internal_Rela *i1_irelfn, *irelend;
11147
11148  irelend = internal_relocs + sec->reloc_count;
11149  laddr = irel->r_offset;
11150  insn = bfd_getb32 (contents + laddr);
11151  i1_irelfn = find_relocs_at_address (irel, internal_relocs, irelend,
11152				      R_NDS32_PTR_RESOLVED);
11153  foff = calculate_memory_address (abfd, irel, isymbuf, symtab_hdr);
11154  BFD_ASSERT (elf_hash_table (link_info)->tls_sec != NULL);
11155  foff -= (elf_hash_table (link_info)->tls_sec->vma + TP_OFFSET);
11156
11157  /* The range is +/-16k.  */
11158  if ((bfd_signed_vma) (foff) < CONSERVATIVE_15BIT
11159      && (bfd_signed_vma) (foff) >= -CONSERVATIVE_15BIT)
11160    {
11161      /* Transform add to addi.  */
11162      insn = N32_TYPE2 (ADDI, N32_RT5 (insn), N32_RB5 (insn), 0);
11163      irel->r_info =
11164	ELF32_R_INFO (ELF32_R_SYM (irel->r_info), R_NDS32_TLS_LE_15S0);
11165
11166      bfd_putb32 (insn, contents + laddr);
11167      if (i1_irelfn != irelend)
11168	{
11169	  i1_irelfn->r_addend |= 1;
11170	  *again = TRUE;
11171	}
11172    }
11173}
11174
11175/* Relax LE TLS load store instruction pattern.  */
11176
11177static void
11178nds32_elf_relax_letlsls (struct bfd_link_info *link_info, bfd *abfd,
11179			 asection *sec, Elf_Internal_Rela *irel,
11180			 Elf_Internal_Rela *internal_relocs,
11181			 bfd_byte *contents, Elf_Internal_Sym *isymbuf,
11182			 Elf_Internal_Shdr *symtab_hdr, bfd_boolean *again)
11183{
11184
11185  uint32_t insn;
11186  bfd_vma laddr;
11187  bfd_signed_vma foff;
11188  Elf_Internal_Rela *i1_irelfn, *irelend;
11189  int success = 0;
11190
11191  irelend = internal_relocs + sec->reloc_count;
11192  laddr = irel->r_offset;
11193  insn = bfd_getb32 (contents + laddr);
11194  i1_irelfn = find_relocs_at_address (irel, internal_relocs, irelend,
11195				      R_NDS32_PTR_RESOLVED);
11196  foff = calculate_memory_address (abfd, irel, isymbuf, symtab_hdr);
11197  BFD_ASSERT (elf_hash_table (link_info)->tls_sec != NULL);
11198  foff -= (elf_hash_table (link_info)->tls_sec->vma + TP_OFFSET);
11199
11200  switch ((N32_OP6 (insn) << 8) | (insn & 0xff))
11201    {
11202    case (N32_OP6_MEM << 8) | N32_MEM_LB:
11203    case (N32_OP6_MEM << 8) | N32_MEM_SB:
11204    case (N32_OP6_MEM << 8) | N32_MEM_LBS:
11205      /* The range is +/-16k.  */
11206      if ((bfd_signed_vma) (foff) < CONSERVATIVE_15BIT
11207	  && (bfd_signed_vma) (foff) >= -CONSERVATIVE_15BIT)
11208	{
11209	  insn =
11210	    ((insn & 0xff) << 25) | (insn & 0x1f00000) | ((insn & 0x7c00) << 5);
11211	  irel->r_info =
11212	    ELF32_R_INFO (ELF32_R_SYM (irel->r_info), R_NDS32_TLS_LE_15S0);
11213	  success = 1;
11214	  break;
11215	}
11216    case (N32_OP6_MEM << 8) | N32_MEM_LH:
11217    case (N32_OP6_MEM << 8) | N32_MEM_SH:
11218    case (N32_OP6_MEM << 8) | N32_MEM_LHS:
11219      /* The range is +/-32k.  */
11220      if ((bfd_signed_vma) (foff) < CONSERVATIVE_15BIT_S1
11221	  && (bfd_signed_vma) (foff) >= -CONSERVATIVE_15BIT_S1)
11222	{
11223	  insn =
11224	    ((insn & 0xff) << 25) | (insn & 0x1f00000) | ((insn & 0x7c00) << 5);
11225	  irel->r_info =
11226	    ELF32_R_INFO (ELF32_R_SYM (irel->r_info), R_NDS32_TLS_LE_15S1);
11227	  success = 1;
11228	  break;
11229	}
11230    case (N32_OP6_MEM << 8) | N32_MEM_LW:
11231    case (N32_OP6_MEM << 8) | N32_MEM_SW:
11232      /* The range is +/-64k.  */
11233      if ((bfd_signed_vma) (foff) < CONSERVATIVE_15BIT_S2
11234	  && (bfd_signed_vma) (foff) >= -CONSERVATIVE_15BIT_S2)
11235	{
11236	  insn =
11237	    ((insn & 0xff) << 25) | (insn & 0x1f00000) | ((insn & 0x7c00) << 5);
11238	  irel->r_info =
11239	    ELF32_R_INFO (ELF32_R_SYM (irel->r_info), R_NDS32_TLS_LE_15S2);
11240	  success = 1;
11241	  break;
11242	}
11243    default:
11244      break;
11245    }
11246
11247  if (success)
11248    {
11249      bfd_putb32 (insn, contents + laddr);
11250      if (i1_irelfn != irelend)
11251	{
11252	  i1_irelfn->r_addend |= 1;
11253	  *again = TRUE;
11254	}
11255    }
11256}
11257
11258/* Relax PTR relocation for nds32_elf_relax_section.  */
11259
11260static bfd_boolean
11261nds32_elf_relax_ptr (bfd *abfd, asection *sec, Elf_Internal_Rela *irel,
11262		     Elf_Internal_Rela *internal_relocs, int *insn_len,
11263		     int *seq_len, bfd_byte *contents)
11264{
11265  Elf_Internal_Rela *ptr_irel, *irelend, *count_irel, *re_irel;
11266
11267  irelend = internal_relocs + sec->reloc_count;
11268
11269  re_irel =
11270    find_relocs_at_address_addr (irel, internal_relocs, irelend,
11271				 R_NDS32_PTR_RESOLVED, irel->r_addend);
11272
11273  if (re_irel == irelend)
11274    {
11275      (*_bfd_error_handler)
11276	("%B: warning: R_NDS32_PTR points to unrecognized reloc at 0x%lx.",
11277	 abfd, (long) irel->r_offset);
11278      return FALSE;
11279    }
11280
11281  if (re_irel->r_addend != 1)
11282    return FALSE;
11283
11284  /* Pointed target is relaxed and no longer needs this void *,
11285     change the type to NONE.  */
11286  irel->r_info = ELF32_R_INFO (ELF32_R_SYM (irel->r_info), R_NDS32_NONE);
11287
11288  /* Find PTR_COUNT to decide remove it or not.  If PTR_COUNT does
11289     not exist, it means only count 1 and remove it directly.  */
11290  /* TODO: I hope we can obsolate R_NDS32_COUNT in the future.  */
11291  count_irel = find_relocs_at_address (irel, internal_relocs, irelend,
11292				       R_NDS32_PTR_COUNT);
11293  ptr_irel = find_relocs_at_address (irel, internal_relocs, irelend,
11294				     R_NDS32_PTR);
11295  if (count_irel != irelend)
11296    {
11297      if (--count_irel->r_addend > 0)
11298	return FALSE;
11299    }
11300
11301  if (ptr_irel != irelend)
11302    return FALSE;
11303
11304  /* If the PTR_COUNT is already 0, remove current instruction.  */
11305  *seq_len = nds32_elf_insn_size (abfd, contents, irel->r_offset);
11306  *insn_len = 0;
11307  return TRUE;
11308}
11309
11310/* Relax PLT_GOT_SUFF relocation for nds32_elf_relax_section.  */
11311
11312static void
11313nds32_elf_relax_pltgot_suff (struct bfd_link_info *link_info, bfd *abfd,
11314			     asection *sec, Elf_Internal_Rela *irel,
11315			     Elf_Internal_Rela *internal_relocs,
11316			     bfd_byte *contents, Elf_Internal_Sym *isymbuf,
11317			     Elf_Internal_Shdr *symtab_hdr, bfd_boolean *again)
11318{
11319  uint32_t insn;
11320  bfd_signed_vma foff;
11321  Elf_Internal_Rela *i1_irelfn, *irelend;
11322  bfd_vma local_sda, laddr;
11323
11324  irelend = internal_relocs + sec->reloc_count;
11325  laddr = irel->r_offset;
11326  insn = bfd_getb32 (contents + laddr);
11327
11328  /* FIXME: It's a little trouble to turn JRAL5 to JAL since
11329     we need additional space.  It might be help if we could
11330     borrow some space from instructions to be eliminated
11331     such as sethi, ori, add.  */
11332  if (insn & 0x80000000)
11333    return;
11334
11335  if (nds32_elf_check_dup_relocs
11336      (irel, internal_relocs, irelend, R_NDS32_PLT_GOT_SUFF))
11337    return;
11338
11339  i1_irelfn =
11340    find_relocs_at_address (irel, internal_relocs, irelend,
11341			    R_NDS32_PTR_RESOLVED);
11342
11343  /* FIXIT 090606
11344     The boundary should be reduced since the .plt section hasn't
11345     been created and the address of specific entry is still unknown
11346     Maybe the range between the function call and the begin of the
11347     .text section can be used to decide if the .plt is in the range
11348     of function call.  */
11349
11350  if (N32_OP6 (insn) == N32_OP6_ALU1
11351      && N32_SUB5 (insn) == N32_ALU1_ADD)
11352    {
11353      /* Get the value of the symbol referred to by the reloc.  */
11354      nds32_elf_final_sda_base (sec->output_section->owner, link_info,
11355				&local_sda, FALSE);
11356      foff = (bfd_signed_vma) (calculate_plt_memory_address
11357			       (abfd, link_info, isymbuf, irel,
11358				symtab_hdr) - local_sda);
11359      /* This condition only happened when symbol is undefined.  */
11360      if (foff == 0)
11361	return;
11362
11363      if (foff < -CONSERVATIVE_19BIT || foff >= CONSERVATIVE_19BIT)
11364	return;
11365      irel->r_info = ELF32_R_INFO (ELF32_R_SYM (irel->r_info),
11366				   R_NDS32_PLT_GOTREL_LO19);
11367      /* addi.gp */
11368      insn = N32_TYPE1 (SBGP, N32_RT5 (insn), __BIT (19));
11369    }
11370  else if (N32_OP6 (insn) == N32_OP6_JREG
11371	   && N32_SUB5 (insn) == N32_JREG_JRAL)
11372    {
11373      /* Get the value of the symbol referred to by the reloc.  */
11374      foff =
11375	calculate_plt_offset (abfd, sec, link_info, isymbuf, irel, symtab_hdr);
11376      /* This condition only happened when symbol is undefined.  */
11377      if (foff == 0)
11378	return;
11379      if (foff < -CONSERVATIVE_24BIT_S1 || foff >= CONSERVATIVE_24BIT_S1)
11380	return;
11381      irel->r_info = ELF32_R_INFO (ELF32_R_SYM (irel->r_info), R_NDS32_25_PLTREL);
11382      insn = INSN_JAL;
11383    }
11384  else
11385    return;
11386
11387  bfd_putb32 (insn, contents + laddr);
11388  if (i1_irelfn != irelend)
11389    {
11390      i1_irelfn->r_addend |= 1;
11391      *again = TRUE;
11392    }
11393}
11394
11395/* Relax GOT_SUFF relocation for nds32_elf_relax_section.  */
11396
11397static void
11398nds32_elf_relax_got_suff (struct bfd_link_info *link_info, bfd *abfd,
11399			  asection *sec, Elf_Internal_Rela *irel,
11400			  Elf_Internal_Rela *internal_relocs,
11401			  bfd_byte *contents, Elf_Internal_Shdr *symtab_hdr,
11402			  bfd_boolean *again)
11403{
11404  uint32_t insn;
11405  bfd_signed_vma foff;
11406  Elf_Internal_Rela *i1_irelfn, *irelend;
11407  bfd_vma local_sda, laddr;
11408
11409  irelend = internal_relocs + sec->reloc_count;
11410  laddr = irel->r_offset;
11411  insn = bfd_getb32 (contents + laddr);
11412  if (insn & 0x80000000)
11413    return;
11414
11415  if (nds32_elf_check_dup_relocs
11416      (irel, internal_relocs, irelend, R_NDS32_GOT_SUFF))
11417    return;
11418
11419  i1_irelfn = find_relocs_at_address (irel, internal_relocs, irelend,
11420				      R_NDS32_PTR_RESOLVED);
11421
11422  nds32_elf_final_sda_base (sec->output_section->owner, link_info,
11423			    &local_sda, FALSE);
11424  foff = calculate_got_memory_address (abfd, link_info, irel,
11425				       symtab_hdr) - local_sda;
11426
11427  if (foff < CONSERVATIVE_19BIT && foff >= -CONSERVATIVE_19BIT)
11428    {
11429      /* Turn LW to LWI.GP.  Change relocation type to R_NDS32_GOT_REL.  */
11430      insn = N32_TYPE1 (HWGP, N32_RT5 (insn), __MF (6, 17, 3));
11431      irel->r_info =
11432	ELF32_R_INFO (ELF32_R_SYM (irel->r_info), R_NDS32_GOT17S2_RELA);
11433      bfd_putb32 (insn, contents + laddr);
11434      if (i1_irelfn != irelend)
11435	{
11436	  i1_irelfn->r_addend |= 1;
11437	  *again = TRUE;
11438	}
11439    }
11440}
11441
11442/* Relax PLT_GOT_SUFF relocation for nds32_elf_relax_section.  */
11443
11444static void
11445nds32_elf_relax_gotoff_suff (struct bfd_link_info *link_info, bfd *abfd,
11446			     asection *sec, Elf_Internal_Rela *irel,
11447			     Elf_Internal_Rela *internal_relocs,
11448			     bfd_byte *contents, Elf_Internal_Sym *isymbuf,
11449			     Elf_Internal_Shdr *symtab_hdr, bfd_boolean *again)
11450{
11451  int opc_insn_gotoff;
11452  uint32_t insn;
11453  bfd_signed_vma foff;
11454  Elf_Internal_Rela *i1_irelfn, *i2_irelfn, *irelend;
11455  bfd_vma local_sda, laddr;
11456
11457  irelend = internal_relocs + sec->reloc_count;
11458  laddr = irel->r_offset;
11459  insn = bfd_getb32 (contents + laddr);
11460
11461  if (insn & 0x80000000)
11462    return;
11463
11464  if (nds32_elf_check_dup_relocs
11465      (irel, internal_relocs, irelend, R_NDS32_GOTOFF_SUFF))
11466    return;
11467
11468  i1_irelfn = find_relocs_at_address (irel, internal_relocs, irelend,
11469				      R_NDS32_PTR_RESOLVED);
11470  nds32_elf_final_sda_base (sec->output_section->owner, link_info,
11471			    &local_sda, FALSE);
11472  foff = calculate_memory_address (abfd, irel, isymbuf, symtab_hdr);
11473  foff = foff - local_sda;
11474
11475  if (foff >= CONSERVATIVE_19BIT || foff < -CONSERVATIVE_19BIT)
11476    return;
11477
11478  /* Concatenate opcode and sub-opcode for switch case.
11479     It may be MEM or ALU1.  */
11480  opc_insn_gotoff = (N32_OP6 (insn) << 8) | (insn & 0xff);
11481  switch (opc_insn_gotoff)
11482    {
11483    case (N32_OP6_MEM << 8) | N32_MEM_LW:
11484      /* 4-byte aligned.  */
11485      insn = N32_TYPE1 (HWGP, N32_RT5 (insn), __MF (6, 17, 3));
11486      irel->r_info =
11487	ELF32_R_INFO (ELF32_R_SYM (irel->r_info), R_NDS32_SDA17S2_RELA);
11488      break;
11489    case (N32_OP6_MEM << 8) | N32_MEM_SW:
11490      insn = N32_TYPE1 (HWGP, N32_RT5 (insn), __MF (7, 17, 3));
11491      irel->r_info =
11492	ELF32_R_INFO (ELF32_R_SYM (irel->r_info), R_NDS32_SDA17S2_RELA);
11493      break;
11494    case (N32_OP6_MEM << 8) | N32_MEM_LH:
11495      /* 2-byte aligned.  */
11496      insn = N32_TYPE1 (HWGP, N32_RT5 (insn), 0);
11497      irel->r_info =
11498	ELF32_R_INFO (ELF32_R_SYM (irel->r_info), R_NDS32_SDA18S1_RELA);
11499      break;
11500    case (N32_OP6_MEM << 8) | N32_MEM_LHS:
11501      insn = N32_TYPE1 (HWGP, N32_RT5 (insn), __BIT (18));
11502      irel->r_info =
11503	ELF32_R_INFO (ELF32_R_SYM (irel->r_info), R_NDS32_SDA18S1_RELA);
11504      break;
11505    case (N32_OP6_MEM << 8) | N32_MEM_SH:
11506      insn = N32_TYPE1 (HWGP, N32_RT5 (insn), __BIT (19));
11507      irel->r_info =
11508	ELF32_R_INFO (ELF32_R_SYM (irel->r_info), R_NDS32_SDA18S1_RELA);
11509      break;
11510    case (N32_OP6_MEM << 8) | N32_MEM_LB:
11511      /* 1-byte aligned.  */
11512      insn = N32_TYPE1 (LBGP, N32_RT5 (insn), 0);
11513      irel->r_info =
11514	ELF32_R_INFO (ELF32_R_SYM (irel->r_info), R_NDS32_SDA19S0_RELA);
11515      break;
11516    case (N32_OP6_MEM << 8) | N32_MEM_LBS:
11517      insn = N32_TYPE1 (LBGP, N32_RT5 (insn), __BIT (19));
11518      irel->r_info =
11519	ELF32_R_INFO (ELF32_R_SYM (irel->r_info), R_NDS32_SDA19S0_RELA);
11520      break;
11521    case (N32_OP6_MEM << 8) | N32_MEM_SB:
11522      insn = N32_TYPE1 (SBGP, N32_RT5 (insn), 0);
11523      irel->r_info =
11524	ELF32_R_INFO (ELF32_R_SYM (irel->r_info), R_NDS32_SDA19S0_RELA);
11525      break;
11526    case (N32_OP6_ALU1 << 8) | N32_ALU1_ADD:
11527      insn = N32_TYPE1 (SBGP, N32_RT5 (insn), __BIT (19));
11528      irel->r_info =
11529	ELF32_R_INFO (ELF32_R_SYM (irel->r_info), R_NDS32_SDA19S0_RELA);
11530      break;
11531    default:
11532      return;
11533    }
11534
11535  bfd_putb32 (insn, contents + laddr);
11536  if (i1_irelfn != irelend)
11537    {
11538      i1_irelfn->r_addend |= 1;
11539      *again = TRUE;
11540    }
11541  if ((i2_irelfn = find_relocs_at_address (irel, internal_relocs, irelend,
11542					   R_NDS32_INSN16)) != irelend)
11543    i2_irelfn->r_info = ELF32_R_INFO (ELF32_R_SYM (irel->r_info), R_NDS32_NONE);
11544
11545}
11546
11547static bfd_boolean
11548nds32_relax_adjust_label (bfd *abfd, asection *sec,
11549			  Elf_Internal_Rela *internal_relocs,
11550			  bfd_byte *contents,
11551			  nds32_elf_blank_t **relax_blank_list,
11552			  int optimize, int opt_size)
11553{
11554  /* This code block is used to adjust 4-byte alignment by relax a pair
11555     of instruction a time.
11556
11557     It recognizes three types of relocations.
11558     1. R_NDS32_LABEL - a aligment.
11559     2. R_NDS32_INSN16 - relax a 32-bit instruction to 16-bit.
11560     3. is_16bit_NOP () - remove a 16-bit instruction.  */
11561
11562  /* TODO: It seems currently implementation only support 4-byte aligment.
11563     We should handle any-aligment.  */
11564
11565  Elf_Internal_Rela *insn_rel = NULL, *label_rel = NULL, *irel;
11566  Elf_Internal_Rela *tmp_rel, *tmp2_rel = NULL;
11567  Elf_Internal_Rela rel_temp;
11568  Elf_Internal_Rela *irelend;
11569  bfd_vma address;
11570  uint16_t insn16;
11571
11572  /* Checking for branch relaxation relies on the relocations to
11573     be sorted on 'r_offset'.  This is not guaranteed so we must sort.  */
11574  nds32_insertion_sort (internal_relocs, sec->reloc_count,
11575			sizeof (Elf_Internal_Rela), compar_reloc);
11576
11577  irelend = internal_relocs + sec->reloc_count;
11578
11579  /* Force R_NDS32_LABEL before R_NDS32_INSN16.  */
11580  /* FIXME: Can we generate the right order in assembler?
11581     So we don't have to swapping them here.  */
11582
11583  for (label_rel = internal_relocs, insn_rel = internal_relocs;
11584       label_rel < irelend; label_rel++)
11585    {
11586      if (ELF32_R_TYPE (label_rel->r_info) != R_NDS32_LABEL)
11587	continue;
11588
11589      /* Find the first reloc has the same offset with label_rel.  */
11590      while (insn_rel < irelend && insn_rel->r_offset < label_rel->r_offset)
11591	insn_rel++;
11592
11593      for (;insn_rel < irelend && insn_rel->r_offset == label_rel->r_offset;
11594	   insn_rel++)
11595	/* Check if there were R_NDS32_INSN16 and R_NDS32_LABEL at the same
11596	   address.  */
11597	if (ELF32_R_TYPE (insn_rel->r_info) == R_NDS32_INSN16)
11598	  break;
11599
11600      if (insn_rel < irelend && insn_rel->r_offset == label_rel->r_offset
11601	  && insn_rel < label_rel)
11602	{
11603	  /* Swap the two reloc if the R_NDS32_INSN16 is
11604	     before R_NDS32_LABEL.  */
11605	  memcpy (&rel_temp, insn_rel, sizeof (Elf_Internal_Rela));
11606	  memcpy (insn_rel, label_rel, sizeof (Elf_Internal_Rela));
11607	  memcpy (label_rel, &rel_temp, sizeof (Elf_Internal_Rela));
11608	}
11609    }
11610
11611  label_rel = NULL;
11612  insn_rel = NULL;
11613  /* If there were a sequence of R_NDS32_LABEL end up with .align 2
11614     or higher, remove other R_NDS32_LABEL with lower alignment.
11615     If an R_NDS32_INSN16 in between R_NDS32_LABELs must be converted,
11616     then the R_NDS32_LABEL sequence is broke.  */
11617  for (tmp_rel = internal_relocs; tmp_rel < irelend; tmp_rel++)
11618    {
11619      if (ELF32_R_TYPE (tmp_rel->r_info) == R_NDS32_LABEL)
11620	{
11621	  if (label_rel == NULL)
11622	    {
11623	      if (tmp_rel->r_addend < 2)
11624		label_rel = tmp_rel;
11625	      continue;
11626	    }
11627	  else if (tmp_rel->r_addend > 1)
11628	    {
11629	      /* Remove all LABEL relocation from label_rel to tmp_rel
11630		 including relocations with same offset as tmp_rel.  */
11631	      for (tmp2_rel = label_rel; tmp2_rel < tmp_rel
11632		   || tmp2_rel->r_offset == tmp_rel->r_offset; tmp2_rel++)
11633		{
11634		  if (ELF32_R_TYPE (tmp2_rel->r_info) == R_NDS32_LABEL
11635		      && tmp2_rel->r_addend < 2)
11636		    tmp2_rel->r_info =
11637		      ELF32_R_INFO (ELF32_R_SYM (tmp2_rel->r_info),
11638				    R_NDS32_NONE);
11639		}
11640	      label_rel = NULL;
11641	    }
11642	}
11643      else if (ELF32_R_TYPE (tmp_rel->r_info) == R_NDS32_INSN16 && label_rel)
11644	{
11645	  /* A new INSN16 which can be converted, so clear label_rel.  */
11646	  if (is_convert_32_to_16 (abfd, sec, tmp_rel, internal_relocs,
11647				   irelend, &insn16)
11648	      || is_16bit_NOP (abfd, sec, tmp_rel))
11649	    label_rel = NULL;
11650	}
11651    }
11652
11653  label_rel = NULL;
11654  insn_rel = NULL;
11655  /* Optimized for speed and nothing has not been relaxed.
11656     It's time to align labels.
11657     We may convert a 16-bit instruction right before a label to
11658     32-bit, in order to align the label if necessary
11659     all reloc entries has been sorted by r_offset.  */
11660  for (irel = internal_relocs; irel < irelend; irel++)
11661    {
11662      if (ELF32_R_TYPE (irel->r_info) != R_NDS32_INSN16
11663	  && ELF32_R_TYPE (irel->r_info) != R_NDS32_LABEL)
11664	continue;
11665
11666      if (ELF32_R_TYPE (irel->r_info) == R_NDS32_INSN16)
11667	{
11668	  /* A new INSN16 found, resize the old one.  */
11669	  if (is_convert_32_to_16
11670	      (abfd, sec, irel, internal_relocs, irelend, &insn16)
11671	      || is_16bit_NOP (abfd, sec, irel))
11672	    {
11673	      if (insn_rel)
11674		{
11675		  /* Previous INSN16 reloc exists, reduce its
11676		     size to 16-bit.  */
11677		  if (is_convert_32_to_16 (abfd, sec, insn_rel, internal_relocs,
11678					   irelend, &insn16))
11679		    {
11680		      nds32_elf_write_16 (abfd, contents, insn_rel,
11681					  internal_relocs, irelend, insn16);
11682
11683		      if (!insert_nds32_elf_blank_recalc_total
11684			  (relax_blank_list, insn_rel->r_offset + 2, 2))
11685			return FALSE;
11686		    }
11687		  else if (is_16bit_NOP (abfd, sec, insn_rel))
11688		    {
11689		      if (!insert_nds32_elf_blank_recalc_total
11690			  (relax_blank_list, insn_rel->r_offset, 2))
11691			return FALSE;
11692		    }
11693		  insn_rel->r_info =
11694		    ELF32_R_INFO (ELF32_R_SYM (insn_rel->r_info), R_NDS32_NONE);
11695		}
11696	      /* Save the new one for later use.  */
11697	      insn_rel = irel;
11698	    }
11699	  else
11700	    irel->r_info = ELF32_R_INFO (ELF32_R_SYM (irel->r_info),
11701					 R_NDS32_NONE);
11702	}
11703      else if (ELF32_R_TYPE (irel->r_info) == R_NDS32_LABEL)
11704	{
11705	  /* Search for label.  */
11706	  int force_relax = 0;
11707
11708	  /* Label on 16-bit instruction or optimization
11709	     needless, just reset this reloc.  */
11710	  insn16 = bfd_getb16 (contents + irel->r_offset);
11711	  if ((irel->r_addend & 0x1f) < 2 && (!optimize || (insn16 & 0x8000)))
11712	    {
11713	      irel->r_info =
11714		ELF32_R_INFO (ELF32_R_SYM (irel->r_info), R_NDS32_NONE);
11715	      continue;
11716	    }
11717
11718	  address =
11719	    irel->r_offset - get_nds32_elf_blank_total (relax_blank_list,
11720							irel->r_offset, 1);
11721
11722	  if (!insn_rel)
11723	    {
11724	      /* Check if there is case which can not be aligned.  */
11725	      if (irel->r_addend == 2 && address & 0x2)
11726		return FALSE;
11727	      continue;
11728	    }
11729
11730	  /* Try to align this label.  */
11731
11732	  if ((irel->r_addend & 0x1f) < 2)
11733	    {
11734	      /* Check if there is a INSN16 at the same address.
11735		 Label_rel always seats before insn_rel after
11736		 our sort.  */
11737
11738	      /* Search for INSN16 at LABEL location.  If INSN16 is at
11739		 same location and this LABEL alignment is lower than 2,
11740		 the INSN16 can be converted to 2-byte.  */
11741	      for (tmp_rel = irel;
11742		   tmp_rel < irelend && tmp_rel->r_offset == irel->r_offset;
11743		   tmp_rel++)
11744		{
11745		  if (ELF32_R_TYPE (tmp_rel->r_info) == R_NDS32_INSN16
11746		      && (is_convert_32_to_16
11747			  (abfd, sec, tmp_rel, internal_relocs,
11748			   irelend, &insn16)
11749			  || is_16bit_NOP (abfd, sec, tmp_rel)))
11750		    {
11751		      force_relax = 1;
11752		      break;
11753		    }
11754		}
11755	    }
11756
11757	  if (force_relax || irel->r_addend == 1 || address & 0x2)
11758	    {
11759	      /* Label not aligned.  */
11760	      /* Previous reloc exists, reduce its size to 16-bit.  */
11761	      if (is_convert_32_to_16 (abfd, sec, insn_rel,
11762				       internal_relocs, irelend, &insn16))
11763		{
11764		  nds32_elf_write_16 (abfd, contents, insn_rel,
11765				      internal_relocs, irelend, insn16);
11766
11767		  if (!insert_nds32_elf_blank_recalc_total
11768		      (relax_blank_list, insn_rel->r_offset + 2, 2))
11769		    return FALSE;
11770		}
11771	      else if (is_16bit_NOP (abfd, sec, insn_rel))
11772		{
11773		  if (!insert_nds32_elf_blank_recalc_total
11774		      (relax_blank_list, insn_rel->r_offset, 2))
11775		    return FALSE;
11776		}
11777
11778	    }
11779	  /* INSN16 reloc is used.  */
11780	  insn_rel = NULL;
11781	}
11782    }
11783
11784  address =
11785    sec->size - get_nds32_elf_blank_total (relax_blank_list, sec->size, 0);
11786  if (insn_rel && (address & 0x2 || opt_size))
11787    {
11788      if (is_convert_32_to_16 (abfd, sec, insn_rel, internal_relocs,
11789			       irelend, &insn16))
11790	{
11791	  nds32_elf_write_16 (abfd, contents, insn_rel, internal_relocs,
11792			      irelend, insn16);
11793	  if (!insert_nds32_elf_blank_recalc_total
11794	      (relax_blank_list, insn_rel->r_offset + 2, 2))
11795	    return FALSE;
11796	  insn_rel->r_info = ELF32_R_INFO (ELF32_R_SYM (insn_rel->r_info),
11797					   R_NDS32_NONE);
11798	}
11799      else if (is_16bit_NOP (abfd, sec, insn_rel))
11800	{
11801	  if (!insert_nds32_elf_blank_recalc_total
11802	      (relax_blank_list, insn_rel->r_offset, 2))
11803	    return FALSE;
11804	  insn_rel->r_info = ELF32_R_INFO (ELF32_R_SYM (insn_rel->r_info),
11805					   R_NDS32_NONE);
11806	}
11807    }
11808  insn_rel = NULL;
11809  return TRUE;
11810}
11811
11812/* Pick relaxation round.  */
11813
11814static int
11815nds32_elf_pick_relax (bfd_boolean init, asection *sec, bfd_boolean *again,
11816		      struct elf_nds32_link_hash_table *table,
11817		      struct bfd_link_info *link_info)
11818{
11819  static asection *final_sec;
11820  static bfd_boolean set = FALSE;
11821  static bfd_boolean first = TRUE;
11822  int round_table[] = {
11823      NDS32_RELAX_NORMAL_ROUND,
11824      NDS32_RELAX_JUMP_IFC_ROUND,
11825      NDS32_RELAX_EX9_BUILD_ROUND,
11826      NDS32_RELAX_EX9_REPLACE_ROUND,
11827  };
11828  static int pass = 0;
11829  static int relax_round;
11830
11831  if (first)
11832    {
11833      /* Run an empty run to get the final section.  */
11834      relax_round = NDS32_RELAX_EMPTY_ROUND;
11835
11836      /* It has to enter relax again because we can
11837	 not make sure what the final turn is.  */
11838      *again = TRUE;
11839      first = FALSE;
11840    }
11841
11842  if (!set && *again)
11843    {
11844      /* It is reentered when again is FALSE.  */
11845      final_sec = sec;
11846      return relax_round;
11847    }
11848
11849  /* The second round begins.  */
11850  set = TRUE;
11851
11852  relax_round = round_table[pass];
11853
11854  if (!init && final_sec == sec)
11855    {
11856      switch (relax_round)
11857	{
11858	case NDS32_RELAX_NORMAL_ROUND:
11859	  if (!*again)
11860	    {
11861	      /* Normal relaxation done.  */
11862	      if (table->target_optimize & NDS32_RELAX_JUMP_IFC_ON)
11863		{
11864		  pass++;
11865		  *again = TRUE;
11866		}
11867	      else if (table->target_optimize & NDS32_RELAX_EX9_ON)
11868		{
11869		  pass += 2;	/* NDS32_RELAX_EX9_BUILD_ROUND */
11870		  *again = TRUE;
11871		}
11872	      else if (table->ex9_import_file)
11873		{
11874		  /* Import ex9 table.  */
11875		  if (table->update_ex9_table)
11876		    pass += 2;	/* NDS32_RELAX_EX9_BUILD_ROUND */
11877		  else
11878		    pass += 3;	/* NDS32_RELAX_EX9_REPLACE_ROUND */
11879		  nds32_elf_ex9_import_table (link_info);
11880		  *again = TRUE;
11881		}
11882	    }
11883	  break;
11884	case NDS32_RELAX_JUMP_IFC_ROUND:
11885	  if (!nds32_elf_ifc_finish (link_info))
11886	    (*_bfd_error_handler) (_("error: Jump IFC Fail."));
11887	  if (table->target_optimize & NDS32_RELAX_EX9_ON)
11888	    {
11889	      pass++;
11890	      *again = TRUE;
11891	    }
11892	  break;
11893	case NDS32_RELAX_EX9_BUILD_ROUND:
11894	  nds32_elf_ex9_finish (link_info);
11895	  pass++;
11896	  *again = TRUE;
11897	  break;
11898	case NDS32_RELAX_EX9_REPLACE_ROUND:
11899	  if (table->target_optimize & NDS32_RELAX_JUMP_IFC_ON)
11900	    {
11901	      /* Do jump IFC optimization again.  */
11902	      if (!nds32_elf_ifc_finish (link_info))
11903		(*_bfd_error_handler) (_("error: Jump IFC Fail."));
11904	    }
11905	  break;
11906	default:
11907	  break;
11908	}
11909    }
11910
11911  return relax_round;
11912}
11913
11914static bfd_boolean
11915nds32_elf_relax_section (bfd *abfd, asection *sec,
11916			 struct bfd_link_info *link_info, bfd_boolean *again)
11917{
11918  nds32_elf_blank_t *relax_blank_list = NULL;
11919  Elf_Internal_Shdr *symtab_hdr;
11920  Elf_Internal_Rela *internal_relocs;
11921  Elf_Internal_Rela *irel;
11922  Elf_Internal_Rela *irelend;
11923  Elf_Internal_Sym *isymbuf = NULL;
11924  bfd_byte *contents = NULL;
11925  bfd_boolean result = TRUE;
11926  int optimize = 0;
11927  int opt_size = 0;
11928  uint32_t insn;
11929  uint16_t insn16;
11930
11931  /* Target dependnet option.  */
11932  struct elf_nds32_link_hash_table *table;
11933  int load_store_relax;
11934  int relax_round;
11935
11936  relax_blank_list = NULL;
11937
11938  *again = FALSE;
11939
11940  /* Nothing to do for
11941   * relocatable link or
11942   * non-relocatable section or
11943   * non-code section or
11944   * empty content or
11945   * no reloc entry.  */
11946  if (link_info->relocatable
11947      || (sec->flags & SEC_RELOC) == 0
11948      || (sec->flags & SEC_EXCLUDE) == 1
11949      || (sec->flags & SEC_CODE) == 0
11950      || sec->size == 0)
11951    return TRUE;
11952
11953  /* 09.12.11 Workaround.  */
11954  /*  We have to adjust align for R_NDS32_LABEL if needed.
11955      The adjust approach only can fix 2-byte align once.  */
11956  if (sec->alignment_power > 2)
11957    return TRUE;
11958
11959  /* The optimization type to do.  */
11960
11961  table = nds32_elf_hash_table (link_info);
11962  relax_round = nds32_elf_pick_relax (TRUE, sec, again, table, link_info);
11963  switch (relax_round)
11964    {
11965    case NDS32_RELAX_JUMP_IFC_ROUND:
11966      /* Here is the entrance of ifc jump relaxation.  */
11967      if (!nds32_elf_ifc_calc (link_info, abfd, sec))
11968	return FALSE;
11969      nds32_elf_pick_relax (FALSE, sec, again, table, link_info);
11970      return TRUE;
11971
11972    case NDS32_RELAX_EX9_BUILD_ROUND:
11973      /* Here is the entrance of ex9 relaxation.  There are two pass of
11974	 ex9 relaxation.  The one is to traverse all instructions and build
11975	 the hash table.  The other one is to compare instructions and replace
11976	 it by ex9.it.  */
11977      if (!nds32_elf_ex9_build_hash_table (abfd, sec, link_info))
11978	return FALSE;
11979      nds32_elf_pick_relax (FALSE, sec, again, table, link_info);
11980      return TRUE;
11981
11982    case NDS32_RELAX_EX9_REPLACE_ROUND:
11983      if (!nds32_elf_ex9_replace_instruction (link_info, abfd, sec))
11984	return FALSE;
11985      return TRUE;
11986
11987    case NDS32_RELAX_EMPTY_ROUND:
11988      nds32_elf_pick_relax (FALSE, sec, again, table, link_info);
11989      return TRUE;
11990
11991    case NDS32_RELAX_NORMAL_ROUND:
11992    default:
11993      if (sec->reloc_count == 0)
11994	return TRUE;
11995      break;
11996    }
11997
11998  /* The begining of general relaxation.  */
11999
12000  if (is_SDA_BASE_set == 0)
12001    {
12002      bfd_vma gp;
12003      is_SDA_BASE_set = 1;
12004      nds32_elf_final_sda_base (sec->output_section->owner, link_info,
12005				&gp, FALSE);
12006      relax_range_measurement (abfd);
12007    }
12008
12009  if (is_ITB_BASE_set == 0)
12010    {
12011      /* Set the _ITB_BASE_.  */
12012      if (!nds32_elf_ex9_itb_base (link_info))
12013	{
12014	  (*_bfd_error_handler) (_("%B: error: Cannot set _ITB_BASE_"), abfd);
12015	  bfd_set_error (bfd_error_bad_value);
12016	}
12017    }
12018
12019  symtab_hdr = &elf_tdata (abfd)->symtab_hdr;
12020  /* Relocations MUST be kept in memory, because relaxation adjust them.  */
12021  internal_relocs = _bfd_elf_link_read_relocs (abfd, sec, NULL, NULL,
12022					       TRUE /* keep_memory */);
12023  if (internal_relocs == NULL)
12024    goto error_return;
12025
12026  irelend = internal_relocs + sec->reloc_count;
12027  irel = find_relocs_at_address (internal_relocs, internal_relocs,
12028				 irelend, R_NDS32_RELAX_ENTRY);
12029
12030  if (irel == irelend)
12031    return TRUE;
12032
12033  if (ELF32_R_TYPE (irel->r_info) == R_NDS32_RELAX_ENTRY)
12034    {
12035      if (irel->r_addend & R_NDS32_RELAX_ENTRY_DISABLE_RELAX_FLAG)
12036	return TRUE;
12037
12038      if (irel->r_addend & R_NDS32_RELAX_ENTRY_OPTIMIZE_FLAG)
12039	optimize = 1;
12040
12041      if (irel->r_addend & R_NDS32_RELAX_ENTRY_OPTIMIZE_FOR_SPACE_FLAG)
12042	opt_size = 1;
12043    }
12044
12045  load_store_relax = table->load_store_relax;
12046
12047  /* Get symbol table and section content.  */
12048  if (!nds32_get_section_contents (abfd, sec, &contents)
12049      || !nds32_get_local_syms (abfd, sec, &isymbuf))
12050    goto error_return;
12051
12052  /* Do relax loop only when finalize is not done.
12053     Take care of relaxable relocs except INSN16.  */
12054  for (irel = internal_relocs; irel < irelend; irel++)
12055    {
12056      int seq_len;		/* Original length of instruction sequence.  */
12057      int insn_len = 0;		/* Final length of instruction sequence.  */
12058      bfd_boolean removed;
12059
12060      insn = 0;
12061      if (ELF32_R_TYPE (irel->r_info) == R_NDS32_LABEL
12062	  && (irel->r_addend & 0x1f) >= 2)
12063	optimize = 1;
12064
12065      /* Relocation Types
12066	 R_NDS32_LONGCALL1	53
12067	 R_NDS32_LONGCALL2	54
12068	 R_NDS32_LONGCALL3	55
12069	 R_NDS32_LONGJUMP1	56
12070	 R_NDS32_LONGJUMP2	57
12071	 R_NDS32_LONGJUMP3	58
12072	 R_NDS32_LOADSTORE	59  */
12073      if (ELF32_R_TYPE (irel->r_info) >= R_NDS32_LONGCALL1
12074	  && ELF32_R_TYPE (irel->r_info) <= R_NDS32_LOADSTORE)
12075	seq_len = GET_SEQ_LEN (irel->r_addend);
12076
12077      /* Relocation Types
12078	 R_NDS32_LONGCALL4	107
12079	 R_NDS32_LONGCALL5	108
12080	 R_NDS32_LONGCALL6	109
12081	 R_NDS32_LONGJUMP4	110
12082	 R_NDS32_LONGJUMP5	111
12083	 R_NDS32_LONGJUMP6	112
12084	 R_NDS32_LONGJUMP7	113  */
12085      else if (ELF32_R_TYPE (irel->r_info) >= R_NDS32_LONGCALL4
12086	       && ELF32_R_TYPE (irel->r_info) <= R_NDS32_LONGJUMP7)
12087	seq_len = 4;
12088
12089	/* Relocation Types
12090	 R_NDS32_LO12S0_RELA		30
12091	 R_NDS32_LO12S1_RELA		29
12092	 R_NDS32_LO12S2_RELA		28
12093	 R_NDS32_LO12S2_SP_RELA		71
12094	 R_NDS32_LO12S2_DP_RELA		70
12095	 R_NDS32_GOT_LO12		46
12096	 R_NDS32_GOTOFF_LO12		50
12097	 R_NDS32_PLTREL_LO12		65
12098	 R_NDS32_PLT_GOTREL_LO12	67
12099	 R_NDS32_17IFC_PCREL_RELA	96
12100	 R_NDS32_GOT_SUFF		193
12101	 R_NDS32_GOTOFF_SUFF		194
12102	 R_NDS32_PLT_GOT_SUFF		195
12103	 R_NDS32_MULCALL_SUFF		196
12104	 R_NDS32_PTR			197  */
12105      else if ((ELF32_R_TYPE (irel->r_info) <= R_NDS32_LO12S0_RELA
12106		&& ELF32_R_TYPE (irel->r_info) >= R_NDS32_LO12S2_RELA)
12107	       || ELF32_R_TYPE (irel->r_info) == R_NDS32_LO12S2_SP_RELA
12108	       || ELF32_R_TYPE (irel->r_info) == R_NDS32_LO12S2_DP_RELA
12109	       || ELF32_R_TYPE (irel->r_info) == R_NDS32_GOT_LO12
12110	       || ELF32_R_TYPE (irel->r_info) == R_NDS32_GOTOFF_LO12
12111	       || ELF32_R_TYPE (irel->r_info) == R_NDS32_GOTPC_LO12
12112	       || ELF32_R_TYPE (irel->r_info) == R_NDS32_PLTREL_LO12
12113	       || ELF32_R_TYPE (irel->r_info) == R_NDS32_PLT_GOTREL_LO12
12114	       || (ELF32_R_TYPE (irel->r_info) >= R_NDS32_GOT_SUFF
12115		   && ELF32_R_TYPE (irel->r_info) <= R_NDS32_PTR)
12116	       || ELF32_R_TYPE (irel->r_info) == R_NDS32_17IFC_PCREL_RELA
12117	       || ELF32_R_TYPE (irel->r_info) == R_NDS32_TLS_LE_LO12
12118	       || ELF32_R_TYPE (irel->r_info) == R_NDS32_TLS_LE_ADD
12119	       || ELF32_R_TYPE (irel->r_info) == R_NDS32_TLS_LE_LS)
12120	seq_len = 0;
12121      else
12122	continue;
12123
12124      insn_len = seq_len;
12125      removed = FALSE;
12126
12127      switch (ELF32_R_TYPE (irel->r_info))
12128	{
12129	case R_NDS32_LONGCALL1:
12130	  removed = nds32_elf_relax_longcall1 (abfd, sec, irel, internal_relocs,
12131					       &insn_len, contents, isymbuf,
12132					       symtab_hdr);
12133	  break;
12134	case R_NDS32_LONGCALL2:
12135	  removed = nds32_elf_relax_longcall2 (abfd, sec, irel, internal_relocs,
12136					       &insn_len, contents, isymbuf,
12137					       symtab_hdr);
12138	  break;
12139	case R_NDS32_LONGCALL3:
12140	  removed = nds32_elf_relax_longcall3 (abfd, sec, irel, internal_relocs,
12141					       &insn_len, contents, isymbuf,
12142					       symtab_hdr);
12143	  break;
12144	case R_NDS32_LONGJUMP1:
12145	  removed = nds32_elf_relax_longjump1 (abfd, sec, irel, internal_relocs,
12146					       &insn_len, contents, isymbuf,
12147					       symtab_hdr);
12148	  break;
12149	case R_NDS32_LONGJUMP2:
12150	  removed = nds32_elf_relax_longjump2 (abfd, sec, irel, internal_relocs,
12151					       &insn_len, contents, isymbuf,
12152					       symtab_hdr);
12153	  break;
12154	case R_NDS32_LONGJUMP3:
12155	  removed = nds32_elf_relax_longjump3 (abfd, sec, irel, internal_relocs,
12156					       &insn_len, contents, isymbuf,
12157					       symtab_hdr);
12158	  break;
12159	case R_NDS32_LONGCALL4:
12160	  removed = nds32_elf_relax_longcall4 (abfd, sec, irel, internal_relocs,
12161					       &insn_len, contents, isymbuf,
12162					       symtab_hdr);
12163	  break;
12164	case R_NDS32_LONGCALL5:
12165	  removed = nds32_elf_relax_longcall5 (abfd, sec, irel, internal_relocs,
12166					       &insn_len, contents, isymbuf,
12167					       symtab_hdr);
12168	  break;
12169	case R_NDS32_LONGCALL6:
12170	  removed = nds32_elf_relax_longcall6 (abfd, sec, irel, internal_relocs,
12171					       &insn_len, contents, isymbuf,
12172					       symtab_hdr);
12173	  break;
12174	case R_NDS32_LONGJUMP4:
12175	  removed = nds32_elf_relax_longjump4 (abfd, sec, irel, internal_relocs,
12176					       &insn_len, contents, isymbuf,
12177					       symtab_hdr);
12178	  break;
12179	case R_NDS32_LONGJUMP5:
12180	  removed = nds32_elf_relax_longjump5 (abfd, sec, irel, internal_relocs,
12181					       &insn_len, &seq_len, contents,
12182					       isymbuf, symtab_hdr);
12183	  break;
12184	case R_NDS32_LONGJUMP6:
12185	  removed = nds32_elf_relax_longjump6 (abfd, sec, irel, internal_relocs,
12186					       &insn_len, &seq_len, contents,
12187					       isymbuf, symtab_hdr);
12188	  break;
12189	case R_NDS32_LONGJUMP7:
12190	  removed = nds32_elf_relax_longjump7 (abfd, sec, irel, internal_relocs,
12191					       &insn_len, &seq_len, contents,
12192					       isymbuf, symtab_hdr);
12193	  break;
12194	case R_NDS32_LOADSTORE:
12195	  removed = nds32_elf_relax_loadstore (link_info, abfd, sec, irel,
12196					       internal_relocs, &insn_len,
12197					       contents, isymbuf, symtab_hdr,
12198					       load_store_relax);
12199	  break;
12200	case R_NDS32_LO12S0_RELA:
12201	case R_NDS32_LO12S1_RELA:
12202	case R_NDS32_LO12S2_DP_RELA:
12203	case R_NDS32_LO12S2_SP_RELA:
12204	case R_NDS32_LO12S2_RELA:
12205	  /* Relax for low part.  */
12206	  nds32_elf_relax_lo12 (link_info, abfd, sec, irel, internal_relocs,
12207				contents, isymbuf, symtab_hdr);
12208
12209	  /* It is impossible to delete blank, so just continue.  */
12210	  continue;
12211	case R_NDS32_GOT_LO12:
12212	case R_NDS32_GOTOFF_LO12:
12213	case R_NDS32_PLTREL_LO12:
12214	case R_NDS32_PLT_GOTREL_LO12:
12215	case R_NDS32_GOTPC_LO12:
12216	  /* Relax for PIC gp-relative low part.  */
12217	  nds32_elf_relax_piclo12 (link_info, abfd, sec, irel, contents,
12218				   isymbuf, symtab_hdr);
12219
12220	  /* It is impossible to delete blank, so just continue.  */
12221	  continue;
12222	case R_NDS32_TLS_LE_LO12:
12223	  /* Relax for LE TLS low part.  */
12224	  nds32_elf_relax_letlslo12 (link_info, abfd, irel, contents,
12225				     isymbuf, symtab_hdr);
12226
12227	  /* It is impossible to delete blank, so just continue.  */
12228	  continue;
12229	case R_NDS32_TLS_LE_ADD:
12230	  nds32_elf_relax_letlsadd (link_info, abfd, sec, irel, internal_relocs,
12231				    contents, isymbuf, symtab_hdr, again);
12232	  /* It is impossible to delete blank, so just continue.  */
12233	  continue;
12234	case R_NDS32_TLS_LE_LS:
12235	  nds32_elf_relax_letlsls (link_info, abfd, sec, irel, internal_relocs,
12236				   contents, isymbuf, symtab_hdr, again);
12237	  continue;
12238	case R_NDS32_PTR:
12239	  removed = nds32_elf_relax_ptr (abfd, sec, irel, internal_relocs,
12240					 &insn_len, &seq_len, contents);
12241	  break;
12242	case R_NDS32_PLT_GOT_SUFF:
12243	  nds32_elf_relax_pltgot_suff (link_info, abfd, sec, irel,
12244				       internal_relocs, contents,
12245				       isymbuf, symtab_hdr, again);
12246	  /* It is impossible to delete blank, so just continue.  */
12247	  continue;
12248	case R_NDS32_GOT_SUFF:
12249	  nds32_elf_relax_got_suff (link_info, abfd, sec, irel,
12250				    internal_relocs, contents,
12251				    symtab_hdr, again);
12252	  /* It is impossible to delete blank, so just continue.  */
12253	  continue;
12254	case R_NDS32_GOTOFF_SUFF:
12255	  nds32_elf_relax_gotoff_suff (link_info, abfd, sec, irel,
12256				       internal_relocs, contents,
12257				       isymbuf, symtab_hdr, again);
12258	  /* It is impossible to delete blank, so just continue.  */
12259	  continue;
12260	default:
12261	  continue;
12262
12263	}
12264      if (removed && seq_len - insn_len > 0)
12265	{
12266	  if (!insert_nds32_elf_blank
12267	      (&relax_blank_list, irel->r_offset + insn_len,
12268	       seq_len - insn_len))
12269	    goto error_return;
12270	  *again = TRUE;
12271	}
12272    }
12273
12274  calc_nds32_blank_total (relax_blank_list);
12275
12276  if (table->relax_fp_as_gp)
12277    {
12278      if (!nds32_relax_fp_as_gp (link_info, abfd, sec, internal_relocs,
12279				 irelend, isymbuf))
12280	goto error_return;
12281
12282      if (*again == FALSE)
12283	{
12284	  if (!nds32_fag_remove_unused_fpbase (abfd, sec, internal_relocs,
12285					       irelend))
12286	    goto error_return;
12287	}
12288    }
12289
12290  nds32_elf_pick_relax (FALSE, sec, again, table, link_info);
12291
12292  if (*again == FALSE)
12293    {
12294      if (!nds32_relax_adjust_label (abfd, sec, internal_relocs, contents,
12295				     &relax_blank_list, optimize, opt_size))
12296	goto error_return;
12297    }
12298
12299  /* It doesn't matter optimize_for_space_no_align anymore.
12300       If object file is assembled with flag '-Os',
12301       the we don't adjust jump-destination on 4-byte boundary.  */
12302
12303  if (relax_blank_list)
12304    {
12305      nds32_elf_relax_delete_blanks (abfd, sec, relax_blank_list);
12306      relax_blank_list = NULL;
12307    }
12308
12309  if (*again == FALSE)
12310    {
12311      /* Closing the section, so we don't relax it anymore.  */
12312      bfd_vma sec_size_align;
12313      Elf_Internal_Rela *tmp_rel;
12314
12315      /* Pad to alignment boundary.  Only handle current section alignment.  */
12316      sec_size_align = (sec->size + (~((-1) << sec->alignment_power)))
12317		       & ((-1) << sec->alignment_power);
12318      if ((sec_size_align - sec->size) & 0x2)
12319	{
12320	  insn16 = NDS32_NOP16;
12321	  bfd_putb16 (insn16, contents + sec->size);
12322	  sec->size += 2;
12323	}
12324
12325      while (sec_size_align != sec->size)
12326	{
12327	  insn = NDS32_NOP32;
12328	  bfd_putb32 (insn, contents + sec->size);
12329	  sec->size += 4;
12330	}
12331
12332      tmp_rel = find_relocs_at_address (internal_relocs, internal_relocs,
12333					irelend, R_NDS32_RELAX_ENTRY);
12334      if (tmp_rel != irelend)
12335	tmp_rel->r_addend |= R_NDS32_RELAX_ENTRY_DISABLE_RELAX_FLAG;
12336
12337      clean_nds32_elf_blank ();
12338    }
12339
12340finish:
12341  if (internal_relocs != NULL
12342      && elf_section_data (sec)->relocs != internal_relocs)
12343    free (internal_relocs);
12344
12345  if (contents != NULL
12346      && elf_section_data (sec)->this_hdr.contents != contents)
12347    free (contents);
12348
12349  if (isymbuf != NULL && symtab_hdr->contents != (bfd_byte *) isymbuf)
12350    free (isymbuf);
12351
12352  return result;
12353
12354error_return:
12355  result = FALSE;
12356  goto finish;
12357}
12358
12359static struct bfd_elf_special_section const nds32_elf_special_sections[] =
12360{
12361  {".sdata", 6, -2, SHT_PROGBITS, SHF_ALLOC + SHF_WRITE},
12362  {".sbss", 5, -2, SHT_NOBITS, SHF_ALLOC + SHF_WRITE},
12363  {NULL, 0, 0, 0, 0}
12364};
12365
12366static bfd_boolean
12367nds32_elf_output_arch_syms (bfd *output_bfd ATTRIBUTE_UNUSED,
12368			    struct bfd_link_info *info,
12369			    void *finfo ATTRIBUTE_UNUSED,
12370			    bfd_boolean (*func) (void *, const char *,
12371						 Elf_Internal_Sym *,
12372						 asection *,
12373						 struct elf_link_hash_entry *)
12374			    ATTRIBUTE_UNUSED)
12375{
12376  FILE *sym_ld_script = NULL;
12377  struct elf_nds32_link_hash_table *table;
12378
12379  table = nds32_elf_hash_table (info);
12380  sym_ld_script = table->sym_ld_script;
12381
12382  if (check_start_export_sym)
12383    fprintf (sym_ld_script, "}\n");
12384
12385  return TRUE;
12386}
12387
12388static enum elf_reloc_type_class
12389nds32_elf_reloc_type_class (const struct bfd_link_info *info ATTRIBUTE_UNUSED,
12390			    const asection *rel_sec ATTRIBUTE_UNUSED,
12391			    const Elf_Internal_Rela *rela)
12392{
12393  switch ((int) ELF32_R_TYPE (rela->r_info))
12394    {
12395    case R_NDS32_RELATIVE:
12396      return reloc_class_relative;
12397    case R_NDS32_JMP_SLOT:
12398      return reloc_class_plt;
12399    case R_NDS32_COPY:
12400      return reloc_class_copy;
12401    default:
12402      return reloc_class_normal;
12403    }
12404}
12405
12406/* Put target dependent option into info hash table.  */
12407void
12408bfd_elf32_nds32_set_target_option (struct bfd_link_info *link_info,
12409				   int relax_fp_as_gp,
12410				   int eliminate_gc_relocs,
12411				   FILE * sym_ld_script, int load_store_relax,
12412				   int target_optimize, int relax_status,
12413				   int relax_round, FILE * ex9_export_file,
12414				   FILE * ex9_import_file,
12415				   int update_ex9_table, int ex9_limit,
12416				   bfd_boolean ex9_loop_aware,
12417				   bfd_boolean ifc_loop_aware)
12418{
12419  struct elf_nds32_link_hash_table *table;
12420
12421  table = nds32_elf_hash_table (link_info);
12422  if (table == NULL)
12423    return;
12424
12425  table->relax_fp_as_gp = relax_fp_as_gp;
12426  table->eliminate_gc_relocs = eliminate_gc_relocs;
12427  table->sym_ld_script = sym_ld_script;
12428  table ->load_store_relax = load_store_relax;
12429  table->target_optimize = target_optimize;
12430  table->relax_status = relax_status;
12431  table->relax_round = relax_round;
12432  table->ex9_export_file = ex9_export_file;
12433  table->ex9_import_file = ex9_import_file;
12434  table->update_ex9_table = update_ex9_table;
12435  table->ex9_limit = ex9_limit;
12436  table->ex9_loop_aware = ex9_loop_aware;
12437  table->ifc_loop_aware = ifc_loop_aware;
12438}
12439
12440/* These functions and data-structures are used for fp-as-gp
12441   optimization.  */
12442
12443#define FAG_THRESHOLD	3	/* At least 3 gp-access.  */
12444/* lwi37.fp covers 508 bytes, but there may be 32-byte padding between
12445   the read-only section and read-write section.  */
12446#define FAG_WINDOW	(508 - 32)
12447
12448/* An nds32_fag represent a gp-relative access.
12449   We find best fp-base by using a sliding window
12450   to find a base address which can cover most gp-access.  */
12451struct nds32_fag
12452{
12453  struct nds32_fag *next;	/* NULL-teminated linked list.  */
12454  bfd_vma addr;			/* The address of this fag.  */
12455  Elf_Internal_Rela **relas;	/* The relocations associated with this fag.
12456				   It is used for applying FP7U2_FLAG.  */
12457  int count;			/* How many times this address is referred.
12458				   There should be exactly `count' relocations
12459				   in relas.  */
12460  int relas_capcity;		/* The buffer size of relas.
12461				   We use an array instead of linked-list,
12462				   and realloc is used to adjust buffer size.  */
12463};
12464
12465static void
12466nds32_fag_init (struct nds32_fag *head)
12467{
12468  memset (head, 0, sizeof (struct nds32_fag));
12469}
12470
12471static void
12472nds32_fag_verify (struct nds32_fag *head)
12473{
12474  struct nds32_fag *iter;
12475  struct nds32_fag *prev;
12476
12477  prev = NULL;
12478  iter = head->next;
12479  while (iter)
12480    {
12481      if (prev && prev->addr >= iter->addr)
12482	puts ("Bug in fp-as-gp insertion.");
12483      prev = iter;
12484      iter = iter->next;
12485    }
12486}
12487
12488/* Insert a fag in ascending order.
12489   If a fag of the same address already exists,
12490   they are chained by relas array.  */
12491
12492static void
12493nds32_fag_insert (struct nds32_fag *head, bfd_vma addr,
12494		  Elf_Internal_Rela * rel)
12495{
12496  struct nds32_fag *iter;
12497  struct nds32_fag *new_fag;
12498  const int INIT_RELAS_CAP = 4;
12499
12500  for (iter = head;
12501       iter->next && iter->next->addr <= addr;
12502       iter = iter->next)
12503    /* Find somewhere to insert.  */ ;
12504
12505  /* `iter' will be equal to `head' if the list is empty.  */
12506  if (iter != head && iter->addr == addr)
12507    {
12508      /* The address exists in the list.
12509	 Insert `rel' into relocation list, relas.  */
12510
12511      /* Check whether relas is big enough.  */
12512      if (iter->count >= iter->relas_capcity)
12513	{
12514	  iter->relas_capcity *= 2;
12515	  iter->relas = bfd_realloc
12516	    (iter->relas, iter->relas_capcity * sizeof (void *));
12517	}
12518      iter->relas[iter->count++] = rel;
12519      return;
12520    }
12521
12522  /* This is a new address.  Create a fag node for it.  */
12523  new_fag = bfd_malloc (sizeof (struct nds32_fag));
12524  memset (new_fag, 0, sizeof (*new_fag));
12525  new_fag->addr = addr;
12526  new_fag->count = 1;
12527  new_fag->next = iter->next;
12528  new_fag->relas_capcity = INIT_RELAS_CAP;
12529  new_fag->relas = (Elf_Internal_Rela **)
12530    bfd_malloc (new_fag->relas_capcity * sizeof (void *));
12531  new_fag->relas[0] = rel;
12532  iter->next = new_fag;
12533
12534  nds32_fag_verify (head);
12535}
12536
12537static void
12538nds32_fag_free_list (struct nds32_fag *head)
12539{
12540  struct nds32_fag *iter;
12541
12542  iter = head->next;
12543  while (iter)
12544    {
12545      struct nds32_fag *tmp = iter;
12546      iter = iter->next;
12547      free (tmp->relas);
12548      tmp->relas = NULL;
12549      free (tmp);
12550    }
12551}
12552
12553/* Find the best fp-base address.
12554   The relocation associated with that address is returned,
12555   so we can track the symbol instead of a fixed address.
12556
12557   When relaxation, the address of an datum may change,
12558   because a text section is shrinked, so the data section
12559   moves forward.  If the aligments of text and data section
12560   are different, their distance may change too.
12561   Therefore, tracking a fixed address is not appriate.  */
12562
12563static int
12564nds32_fag_find_base (struct nds32_fag *head, struct nds32_fag **bestpp)
12565{
12566  struct nds32_fag *base;	/* First fag in the window.  */
12567  struct nds32_fag *last;	/* First fag outside the window.  */
12568  int accu = 0;			/* Usage accumulation.  */
12569  struct nds32_fag *best;	/* Best fag.  */
12570  int baccu = 0;		/* Best accumulation.  */
12571
12572  /* Use first fag for initial, and find the last fag in the window.
12573
12574     In each iteration, we could simply subtract previous fag
12575     and accumulate following fags which are inside the window,
12576     untill we each the end.  */
12577
12578  if (head->next == NULL)
12579    {
12580      *bestpp = NULL;
12581      return 0;
12582    }
12583
12584  /* Initialize base.  */
12585  base = head->next;
12586  best = base;
12587  for (last = base;
12588       last && last->addr < base->addr + FAG_WINDOW;
12589       last = last->next)
12590    accu += last->count;
12591
12592  baccu = accu;
12593
12594  /* Record the best base in each iteration.  */
12595  while (base->next)
12596    {
12597      accu -= base->count;
12598      base = base->next;
12599      /* Account fags in window.  */
12600      for (/* Nothing.  */;
12601	   last && last->addr < base->addr + FAG_WINDOW;
12602	   last = last->next)
12603	accu += last->count;
12604
12605      /* A better fp-base?  */
12606      if (accu > baccu)
12607	{
12608	  best = base;
12609	  baccu = accu;
12610	}
12611    }
12612
12613  if (bestpp)
12614    *bestpp = best;
12615  return baccu;
12616}
12617
12618/* Apply R_NDS32_INSN16_FP7U2_FLAG on gp-relative accesses,
12619   so we can convert it fo fp-relative access later.
12620   `best_fag' is the best fp-base.  Only those inside the window
12621   of best_fag is applied the flag.  */
12622
12623static bfd_boolean
12624nds32_fag_mark_relax (struct bfd_link_info *link_info,
12625		      bfd *abfd, struct nds32_fag *best_fag,
12626		      Elf_Internal_Rela *internal_relocs,
12627		      Elf_Internal_Rela *irelend)
12628{
12629  struct nds32_fag *ifag;
12630  bfd_vma best_fpbase, gp;
12631  bfd *output_bfd;
12632
12633  output_bfd = abfd->sections->output_section->owner;
12634  nds32_elf_final_sda_base (output_bfd, link_info, &gp, FALSE);
12635  best_fpbase = best_fag->addr;
12636
12637  if (best_fpbase > gp + sdata_range[1][1]
12638      || best_fpbase < gp - sdata_range[1][0])
12639    return FALSE;
12640
12641  /* Mark these inside the window R_NDS32_INSN16_FP7U2_FLAG flag,
12642     so we know they can be converted to lwi37.fp.   */
12643  for (ifag = best_fag;
12644       ifag && ifag->addr < best_fpbase + FAG_WINDOW; ifag = ifag->next)
12645    {
12646      int i;
12647
12648      for (i = 0; i < ifag->count; i++)
12649	{
12650	  Elf_Internal_Rela *insn16_rel;
12651	  Elf_Internal_Rela *fag_rel;
12652
12653	  fag_rel = ifag->relas[i];
12654
12655	  /* Only if this is within the WINDOWS, FP7U2_FLAG
12656	     is applied.  */
12657
12658	  insn16_rel = find_relocs_at_address
12659	    (fag_rel, internal_relocs, irelend, R_NDS32_INSN16);
12660
12661	  if (insn16_rel != irelend)
12662	    insn16_rel->r_addend = R_NDS32_INSN16_FP7U2_FLAG;
12663	}
12664    }
12665  return TRUE;
12666}
12667
12668/* Reset INSN16 to clean fp as gp.  */
12669
12670static void
12671nds32_fag_unmark_relax (struct nds32_fag *fag,
12672			Elf_Internal_Rela *internal_relocs,
12673			Elf_Internal_Rela *irelend)
12674{
12675  struct nds32_fag *ifag;
12676  int i;
12677  Elf_Internal_Rela *insn16_rel;
12678  Elf_Internal_Rela *fag_rel;
12679
12680  for (ifag = fag; ifag; ifag = ifag->next)
12681    {
12682      for (i = 0; i < ifag->count; i++)
12683	{
12684	  fag_rel = ifag->relas[i];
12685
12686	  /* Restore the INSN16 relocation.  */
12687	  insn16_rel = find_relocs_at_address
12688	    (fag_rel, internal_relocs, irelend, R_NDS32_INSN16);
12689
12690	  if (insn16_rel != irelend)
12691	    insn16_rel->r_addend &= ~R_NDS32_INSN16_FP7U2_FLAG;
12692	}
12693    }
12694}
12695
12696/* This is the main function of fp-as-gp optimization.
12697   It should be called by relax_section.  */
12698
12699static bfd_boolean
12700nds32_relax_fp_as_gp (struct bfd_link_info *link_info,
12701		      bfd *abfd, asection *sec,
12702		      Elf_Internal_Rela *internal_relocs,
12703		      Elf_Internal_Rela *irelend,
12704		      Elf_Internal_Sym *isymbuf)
12705{
12706  Elf_Internal_Rela *begin_rel = NULL;
12707  Elf_Internal_Rela *irel;
12708  struct nds32_fag fag_head;
12709  Elf_Internal_Shdr *symtab_hdr;
12710  bfd_byte *contents;
12711  bfd_boolean ifc_inside = FALSE;
12712
12713  /* FIXME: Can we bfd_elf_link_read_relocs for the relocs?  */
12714
12715  /* Per-function fp-base selection.
12716     1. Create a list for all the gp-relative access.
12717     2. Base on those gp-relative address,
12718	find a fp-base which can cover most access.
12719     3. Use the fp-base for fp-as-gp relaxation.
12720
12721     NOTE: If fp-as-gp is not worth to do, (e.g., less than 3 times),
12722     we should
12723     1. delete the `la $fp, _FP_BASE_' instruction and
12724     2. not convert lwi.gp to lwi37.fp.
12725
12726     To delete the _FP_BASE_ instruction, we simply apply
12727     R_NDS32_RELAX_REGION_NOT_OMIT_FP_FLAG flag in the r_addend to disable it.
12728
12729     To suppress the conversion, we simply NOT to apply
12730     R_NDS32_INSN16_FP7U2_FLAG flag.  */
12731
12732  symtab_hdr = &elf_tdata (abfd)->symtab_hdr;
12733
12734  if (!nds32_get_section_contents (abfd, sec, &contents)
12735      || !nds32_get_local_syms (abfd, sec, &isymbuf))
12736    return FALSE;
12737
12738  /* Check whether it is worth for fp-as-gp optimization,
12739     i.e., at least 3 gp-load.
12740
12741     Set R_NDS32_RELAX_REGION_NOT_OMIT_FP_FLAG if we should NOT
12742     apply this optimization.  */
12743
12744  for (irel = internal_relocs; irel < irelend; irel++)
12745    {
12746      /* We recognize R_NDS32_RELAX_REGION_BEGIN/_END for the region.
12747	 One we enter the begin of the region, we track all the LW/ST
12748	 instructions, so when we leave the region, we try to find
12749	 the best fp-base address for those LW/ST instructions.  */
12750
12751      if (ELF32_R_TYPE (irel->r_info) == R_NDS32_RELAX_REGION_BEGIN
12752	  && (irel->r_addend & R_NDS32_RELAX_REGION_OMIT_FP_FLAG))
12753	{
12754	  /* Begin of the region.  */
12755	  if (begin_rel)
12756	    (*_bfd_error_handler) (_("%B: Nested OMIT_FP in %A."), abfd, sec);
12757
12758	  begin_rel = irel;
12759	  nds32_fag_init (&fag_head);
12760	  ifc_inside = FALSE;
12761	}
12762      else if (ELF32_R_TYPE (irel->r_info) == R_NDS32_RELAX_REGION_END
12763	       && (irel->r_addend & R_NDS32_RELAX_REGION_OMIT_FP_FLAG))
12764	{
12765	  int accu;
12766	  struct nds32_fag *best_fag, *tmp_fag;
12767	  int dist;
12768
12769	  /* End of the region.
12770	     Check whether it is worth to do fp-as-gp.  */
12771
12772	  if (begin_rel == NULL)
12773	    {
12774	      (*_bfd_error_handler) (_("%B: Unmatched OMIT_FP in %A."), abfd, sec);
12775	      continue;
12776	    }
12777
12778	  accu = nds32_fag_find_base (&fag_head, &best_fag);
12779
12780	  /* Clean FP7U2_FLAG because they may set ever.  */
12781	  tmp_fag = fag_head.next;
12782	  nds32_fag_unmark_relax (tmp_fag, internal_relocs, irelend);
12783
12784	  /* Check if it is worth, and FP_BASE is near enough to SDA_BASE.  */
12785	  if (accu < FAG_THRESHOLD
12786	      || !nds32_fag_mark_relax (link_info, abfd, best_fag,
12787					internal_relocs, irelend))
12788	    {
12789	      /* Not worth to do fp-as-gp.  */
12790	      begin_rel->r_addend |= R_NDS32_RELAX_REGION_NOT_OMIT_FP_FLAG;
12791	      begin_rel->r_addend &= ~R_NDS32_RELAX_REGION_OMIT_FP_FLAG;
12792	      irel->r_addend |= R_NDS32_RELAX_REGION_NOT_OMIT_FP_FLAG;
12793	      irel->r_addend &= ~R_NDS32_RELAX_REGION_OMIT_FP_FLAG;
12794	      nds32_fag_free_list (&fag_head);
12795	      begin_rel = NULL;
12796	      continue;
12797	    }
12798
12799	  /* R_SYM of R_NDS32_RELAX_REGION_BEGIN is not used by assembler,
12800	     so we use it to record the distance to the reloction of best
12801	     fp-base.  */
12802	  dist = best_fag->relas[0] - begin_rel;
12803	  BFD_ASSERT (dist > 0 && dist < 0xffffff);
12804	  /* Use high 16 bits of addend to record the _FP_BASE_ matched
12805	     relocation.  And get the base value when relocating.  */
12806	  begin_rel->r_addend &= (0x1 << 16) - 1;
12807	  begin_rel->r_addend |= dist << 16;
12808
12809	  nds32_fag_free_list (&fag_head);
12810	  begin_rel = NULL;
12811	}
12812
12813      if (begin_rel == NULL || ifc_inside)
12814	/* Skip if we are not in the region of fp-as-gp.  */
12815	continue;
12816
12817      if (ELF32_R_TYPE (irel->r_info) == R_NDS32_SDA15S2_RELA
12818	  || ELF32_R_TYPE (irel->r_info) == R_NDS32_SDA17S2_RELA)
12819	{
12820	  bfd_vma addr;
12821	  uint32_t insn;
12822
12823	  /* A gp-relative access is found.  Insert it to the fag-list.  */
12824
12825	  /* Rt is necessary an RT3, so it can be converted to lwi37.fp.  */
12826	  insn = bfd_getb32 (contents + irel->r_offset);
12827	  if (!N32_IS_RT3 (insn))
12828	    continue;
12829
12830	  addr = calculate_memory_address (abfd, irel, isymbuf, symtab_hdr);
12831	  nds32_fag_insert (&fag_head, addr, irel);
12832	}
12833      else if (ELF32_R_TYPE (irel->r_info) == R_NDS32_SDA_FP7U2_RELA)
12834	{
12835	  begin_rel = NULL;
12836	}
12837      else if (ELF32_R_TYPE (irel->r_info) == R_NDS32_17IFC_PCREL_RELA
12838	       || ELF32_R_TYPE (irel->r_info) == R_NDS32_10IFCU_PCREL_RELA)
12839	{
12840	  /* Suppress fp as gp when encounter ifc.  */
12841	  ifc_inside = TRUE;
12842	}
12843    }
12844
12845  return TRUE;
12846}
12847
12848/* Remove unused `la $fp, _FD_BASE_' instruction.  */
12849
12850static bfd_boolean
12851nds32_fag_remove_unused_fpbase (bfd *abfd, asection *sec,
12852				Elf_Internal_Rela *internal_relocs,
12853				Elf_Internal_Rela *irelend)
12854{
12855  Elf_Internal_Rela *irel;
12856  Elf_Internal_Shdr *symtab_hdr;
12857  bfd_byte *contents = NULL;
12858  nds32_elf_blank_t *relax_blank_list = NULL;
12859  bfd_boolean result = TRUE;
12860  bfd_boolean unused_region = FALSE;
12861
12862  /*
12863     NOTE: Disable fp-as-gp if we encounter ifcall relocations.
12864     * R_NDS32_17IFC_PCREL_RELA
12865     * R_NDS32_10IFCU_PCREL_RELA
12866
12867     CASE??????????????
12868  */
12869
12870  symtab_hdr = &elf_tdata (abfd)->symtab_hdr;
12871  nds32_get_section_contents (abfd, sec, &contents);
12872
12873  for (irel = internal_relocs; irel < irelend; irel++)
12874    {
12875      /* To remove unused fp-base, we simply find the REGION_NOT_OMIT_FP
12876	 we marked to in previous pass.
12877	 DO NOT scan relocations again, since we've alreadly decided it
12878	 and set the flag.  */
12879      const char *syname;
12880      int syndx;
12881      uint32_t insn;
12882
12883      if (ELF32_R_TYPE (irel->r_info) == R_NDS32_RELAX_REGION_BEGIN
12884	  && (irel->r_addend & R_NDS32_RELAX_REGION_NOT_OMIT_FP_FLAG))
12885	unused_region = TRUE;
12886      else if (ELF32_R_TYPE (irel->r_info) == R_NDS32_RELAX_REGION_END
12887	       && (irel->r_addend & R_NDS32_RELAX_REGION_NOT_OMIT_FP_FLAG))
12888	unused_region = FALSE;
12889
12890      /* We're not in the region.  */
12891      if (!unused_region)
12892	continue;
12893
12894      /* _FP_BASE_ must be a GLOBAL symbol.  */
12895      syndx = ELF32_R_SYM (irel->r_info) - symtab_hdr->sh_info;
12896      if (ELF32_R_SYM (irel->r_info) < symtab_hdr->sh_info)
12897	continue;
12898
12899      /* The symbol name must be _FP_BASE_.  */
12900      syname = elf_sym_hashes (abfd)[syndx]->root.root.string;
12901      if (strcmp (syname, FP_BASE_NAME) != 0)
12902	continue;
12903
12904      if (ELF32_R_TYPE (irel->r_info) == R_NDS32_SDA19S0_RELA)
12905	{
12906	  /* addi.gp  $fp, -256  */
12907	  insn = bfd_getb32 (contents + irel->r_offset);
12908	  if (insn != INSN_ADDIGP_TO_FP)
12909	    continue;
12910	}
12911      else if (ELF32_R_TYPE (irel->r_info) == R_NDS32_SDA15S0_RELA)
12912	{
12913	  /* addi  $fp, $gp, -256  */
12914	  insn = bfd_getb32 (contents + irel->r_offset);
12915	  if (insn != INSN_ADDI_GP_TO_FP)
12916	    continue;
12917	}
12918      else if (ELF32_R_TYPE (irel->r_info) == R_NDS32_20_RELA)
12919	{
12920	  /* movi  $fp, FP_BASE  */
12921	  insn = bfd_getb32 (contents + irel->r_offset);
12922	  if (insn != INSN_MOVI_TO_FP)
12923	    continue;
12924	}
12925      else
12926	continue;
12927
12928      /* We got here because a FP_BASE instruction is found.  */
12929      if (!insert_nds32_elf_blank_recalc_total
12930	  (&relax_blank_list, irel->r_offset, 4))
12931	goto error_return;
12932    }
12933
12934finish:
12935  if (relax_blank_list)
12936    {
12937      nds32_elf_relax_delete_blanks (abfd, sec, relax_blank_list);
12938      relax_blank_list = NULL;
12939    }
12940  return result;
12941
12942error_return:
12943  result = FALSE;
12944  goto finish;
12945}
12946
12947/* This is a version of bfd_generic_get_relocated_section_contents.
12948   We need this variety because relaxation will modify the dwarf
12949   infomation.  When there is undefined symbol reference error mesage,
12950   linker need to dump line number where the symbol be used.  However
12951   the address is be relaxed, it can not get the original dwarf contents.
12952   The variety only modify function call for reading in the section.  */
12953
12954static bfd_byte *
12955nds32_elf_get_relocated_section_contents (bfd *abfd,
12956					  struct bfd_link_info *link_info,
12957					  struct bfd_link_order *link_order,
12958					  bfd_byte *data,
12959					  bfd_boolean relocatable,
12960					  asymbol **symbols)
12961{
12962  bfd *input_bfd = link_order->u.indirect.section->owner;
12963  asection *input_section = link_order->u.indirect.section;
12964  long reloc_size;
12965  arelent **reloc_vector;
12966  long reloc_count;
12967
12968  reloc_size = bfd_get_reloc_upper_bound (input_bfd, input_section);
12969  if (reloc_size < 0)
12970    return NULL;
12971
12972  /* Read in the section.  */
12973  if (!nds32_get_section_contents (input_bfd, input_section, &data))
12974    return NULL;
12975
12976  if (reloc_size == 0)
12977    return data;
12978
12979  reloc_vector = (arelent **) bfd_malloc (reloc_size);
12980  if (reloc_vector == NULL)
12981    return NULL;
12982
12983  reloc_count = bfd_canonicalize_reloc (input_bfd, input_section,
12984					reloc_vector, symbols);
12985  if (reloc_count < 0)
12986    goto error_return;
12987
12988  if (reloc_count > 0)
12989    {
12990      arelent **parent;
12991      for (parent = reloc_vector; *parent != NULL; parent++)
12992	{
12993	  char *error_message = NULL;
12994	  asymbol *symbol;
12995	  bfd_reloc_status_type r;
12996
12997	  symbol = *(*parent)->sym_ptr_ptr;
12998	  if (symbol->section && discarded_section (symbol->section))
12999	    {
13000	      bfd_byte *p;
13001	      static reloc_howto_type none_howto
13002		= HOWTO (0, 0, 0, 0, FALSE, 0, complain_overflow_dont, NULL,
13003			 "unused", FALSE, 0, 0, FALSE);
13004
13005	      p = data + (*parent)->address * bfd_octets_per_byte (input_bfd);
13006	      _bfd_clear_contents ((*parent)->howto, input_bfd, input_section,
13007				   p);
13008	      (*parent)->sym_ptr_ptr = bfd_abs_section_ptr->symbol_ptr_ptr;
13009	      (*parent)->addend = 0;
13010	      (*parent)->howto = &none_howto;
13011	      r = bfd_reloc_ok;
13012	    }
13013	  else
13014	    r = bfd_perform_relocation (input_bfd, *parent, data,
13015					input_section,
13016					relocatable ? abfd : NULL,
13017					&error_message);
13018
13019	  if (relocatable)
13020	    {
13021	      asection *os = input_section->output_section;
13022
13023	      /* A partial link, so keep the relocs.  */
13024	      os->orelocation[os->reloc_count] = *parent;
13025	      os->reloc_count++;
13026	    }
13027
13028	  if (r != bfd_reloc_ok)
13029	    {
13030	      switch (r)
13031		{
13032		case bfd_reloc_undefined:
13033		  if (!((*link_info->callbacks->undefined_symbol)
13034			(link_info, bfd_asymbol_name (*(*parent)->sym_ptr_ptr),
13035			 input_bfd, input_section, (*parent)->address, TRUE)))
13036		    goto error_return;
13037		  break;
13038		case bfd_reloc_dangerous:
13039		  BFD_ASSERT (error_message != NULL);
13040		  if (!((*link_info->callbacks->reloc_dangerous)
13041			(link_info, error_message, input_bfd, input_section,
13042			 (*parent)->address)))
13043		    goto error_return;
13044		  break;
13045		case bfd_reloc_overflow:
13046		  if (!((*link_info->callbacks->reloc_overflow)
13047			(link_info, NULL,
13048			 bfd_asymbol_name (*(*parent)->sym_ptr_ptr),
13049			 (*parent)->howto->name, (*parent)->addend,
13050			 input_bfd, input_section, (*parent)->address)))
13051		    goto error_return;
13052		  break;
13053		case bfd_reloc_outofrange:
13054		  /* PR ld/13730:
13055		     This error can result when processing some partially
13056		     complete binaries.  Do not abort, but issue an error
13057		     message instead.  */
13058		  link_info->callbacks->einfo
13059		    (_("%X%P: %B(%A): relocation \"%R\" goes out of range\n"),
13060		     abfd, input_section, * parent);
13061		  goto error_return;
13062
13063		default:
13064		  abort ();
13065		  break;
13066		}
13067	    }
13068	}
13069    }
13070
13071  free (reloc_vector);
13072  return data;
13073
13074error_return:
13075  free (reloc_vector);
13076  return NULL;
13077}
13078
13079/* Link-time IFC relaxation.
13080   In this optimization, we chains jump instructions
13081   of the same destination with ifcall.  */
13082
13083
13084/* List to save jal and j relocation.  */
13085struct elf_nds32_ifc_symbol_entry
13086{
13087  asection *sec;
13088  struct elf_link_hash_entry *h;
13089  struct elf_nds32_ifc_irel_list *irel_head;
13090  unsigned long insn;
13091  int times;
13092  int enable;		/* Apply ifc.  */
13093  int ex9_enable;	/* Apply ifc after ex9.  */
13094  struct elf_nds32_ifc_symbol_entry *next;
13095};
13096
13097struct elf_nds32_ifc_irel_list
13098{
13099  Elf_Internal_Rela *irel;
13100  asection *sec;
13101  bfd_vma addr;
13102  /* If this is set, then it is the last instruction for
13103     ifc-chain, so it must be keep for the actual branching.  */
13104  int keep;
13105  struct elf_nds32_ifc_irel_list *next;
13106};
13107
13108static struct elf_nds32_ifc_symbol_entry *ifc_symbol_head = NULL;
13109
13110/* Insert symbol of jal and j for ifc.  */
13111
13112static void
13113nds32_elf_ifc_insert_symbol (asection *sec,
13114			     struct elf_link_hash_entry *h,
13115			     Elf_Internal_Rela *irel,
13116			     unsigned long insn)
13117{
13118  struct elf_nds32_ifc_symbol_entry *ptr = ifc_symbol_head;
13119
13120  /* Check there is target of existing entry the same as the new one.  */
13121  while (ptr != NULL)
13122    {
13123      if (((h == NULL && ptr->sec == sec
13124	    && ELF32_R_SYM (ptr->irel_head->irel->r_info) == ELF32_R_SYM (irel->r_info)
13125	    && ptr->irel_head->irel->r_addend == irel->r_addend)
13126	   || h != NULL)
13127	  && ptr->h == h
13128	  && ptr->insn == insn)
13129	{
13130	  /* The same target exist, so insert into list.  */
13131	  struct elf_nds32_ifc_irel_list *irel_list = ptr->irel_head;
13132
13133	  while (irel_list->next != NULL)
13134	    irel_list = irel_list->next;
13135	  irel_list->next = bfd_malloc (sizeof (struct elf_nds32_ifc_irel_list));
13136	  irel_list = irel_list->next;
13137	  irel_list->irel = irel;
13138	  irel_list->keep = 1;
13139
13140	  if (h == NULL)
13141	    irel_list->sec = NULL;
13142	  else
13143	    irel_list->sec = sec;
13144	  irel_list->next = NULL;
13145	  return;
13146	}
13147      if (ptr->next == NULL)
13148	break;
13149      ptr = ptr->next;
13150    }
13151
13152  /* There is no same target entry, so build a new one.  */
13153  if (ifc_symbol_head == NULL)
13154    {
13155      ifc_symbol_head = bfd_malloc (sizeof (struct elf_nds32_ifc_symbol_entry));
13156      ptr = ifc_symbol_head;
13157    }
13158  else
13159    {
13160      ptr->next = bfd_malloc (sizeof (struct elf_nds32_ifc_symbol_entry));
13161      ptr = ptr->next;
13162    }
13163
13164  ptr->h = h;
13165  ptr->irel_head = bfd_malloc (sizeof (struct elf_nds32_ifc_irel_list));
13166  ptr->irel_head->irel = irel;
13167  ptr->insn = insn;
13168  ptr->irel_head->keep = 1;
13169
13170  if (h == NULL)
13171    {
13172      /* Local symbols.  */
13173      ptr->sec = sec;
13174      ptr->irel_head->sec = NULL;
13175    }
13176  else
13177    {
13178      /* Global symbol.  */
13179      ptr->sec = NULL;
13180      ptr->irel_head->sec = sec;
13181    }
13182
13183  ptr->irel_head->next = NULL;
13184  ptr->times = 0;
13185  ptr->enable = 0;
13186  ptr->ex9_enable = 0;
13187  ptr->next = NULL;
13188}
13189
13190/* Gather all jal and j instructions.  */
13191
13192static bfd_boolean
13193nds32_elf_ifc_calc (struct bfd_link_info *info,
13194		    bfd *abfd, asection *sec)
13195{
13196  Elf_Internal_Rela *internal_relocs;
13197  Elf_Internal_Rela *irelend;
13198  Elf_Internal_Rela *irel;
13199  Elf_Internal_Shdr *symtab_hdr;
13200  bfd_byte *contents = NULL;
13201  uint32_t insn, insn_with_reg;
13202  unsigned long r_symndx;
13203  struct elf_link_hash_entry *h;
13204  struct elf_link_hash_entry **sym_hashes = elf_sym_hashes (abfd);
13205  struct elf_nds32_link_hash_table *table;
13206  bfd_boolean ifc_loop_aware;
13207
13208  internal_relocs = _bfd_elf_link_read_relocs (abfd, sec, NULL, NULL,
13209					       TRUE /* keep_memory */);
13210  irelend = internal_relocs + sec->reloc_count;
13211  symtab_hdr = &elf_tdata (abfd)->symtab_hdr;
13212
13213  /* Check if the object enable ifc.  */
13214  irel = find_relocs_at_address (internal_relocs, internal_relocs, irelend,
13215				 R_NDS32_RELAX_ENTRY);
13216
13217  if (irel == NULL
13218      || irel >= irelend
13219      || ELF32_R_TYPE (irel->r_info) != R_NDS32_RELAX_ENTRY
13220      || (ELF32_R_TYPE (irel->r_info) == R_NDS32_RELAX_ENTRY
13221	  && !(irel->r_addend & R_NDS32_RELAX_ENTRY_IFC_FLAG)))
13222    return TRUE;
13223
13224  if (!nds32_get_section_contents (abfd, sec, &contents))
13225    return FALSE;
13226
13227  table = nds32_elf_hash_table (info);
13228  ifc_loop_aware = table->ifc_loop_aware;
13229  while (irel != NULL && irel < irelend)
13230    {
13231      /* Traverse all relocation and gather all of them to build the list.  */
13232
13233      if (ELF32_R_TYPE (irel->r_info) == R_NDS32_RELAX_REGION_BEGIN)
13234	{
13235	  if (ifc_loop_aware == 1
13236	      && (irel->r_addend & R_NDS32_RELAX_REGION_INNERMOST_LOOP_FLAG) != 0)
13237	    {
13238	      /* Check the region if loop or not.  If it is true and
13239		 ifc-loop-aware is true, ignore the region till region end.  */
13240	      while (irel != NULL
13241		     && irel < irelend
13242		     && (ELF32_R_TYPE (irel->r_info) != R_NDS32_RELAX_REGION_END
13243			 || (irel->r_addend & R_NDS32_RELAX_REGION_INNERMOST_LOOP_FLAG) != 0))
13244		irel++;
13245	    }
13246	}
13247
13248      if (ELF32_R_TYPE (irel->r_info) == R_NDS32_25_PCREL_RELA)
13249	{
13250	  insn = bfd_getb32 (contents + irel->r_offset);
13251	  nds32_elf_get_insn_with_reg (irel, insn, &insn_with_reg);
13252	  r_symndx = ELF32_R_SYM (irel->r_info);
13253	  if (r_symndx < symtab_hdr->sh_info)
13254	    {
13255	      /* Local symbol.  */
13256	      nds32_elf_ifc_insert_symbol (sec, NULL, irel, insn_with_reg);
13257	    }
13258	  else
13259	    {
13260	      /* External symbol.  */
13261	      h = sym_hashes[r_symndx - symtab_hdr->sh_info];
13262	      nds32_elf_ifc_insert_symbol (sec, h, irel, insn_with_reg);
13263	    }
13264	}
13265      irel++;
13266    }
13267  return TRUE;
13268}
13269
13270/* Determine whether j and jal should be substituted.  */
13271
13272static void
13273nds32_elf_ifc_filter (struct bfd_link_info *info)
13274{
13275  struct elf_nds32_ifc_symbol_entry *ptr = ifc_symbol_head;
13276  struct elf_nds32_ifc_irel_list *irel_ptr = NULL;
13277  struct elf_nds32_ifc_irel_list *irel_keeper = NULL;
13278  struct elf_nds32_link_hash_table *table;
13279  int target_optimize;
13280  bfd_vma address;
13281
13282  table = nds32_elf_hash_table (info);
13283  target_optimize = table->target_optimize;
13284  while (ptr)
13285    {
13286      irel_ptr = ptr->irel_head;
13287      if (ptr->h == NULL)
13288	{
13289	  /* Local symbol.  */
13290	  irel_keeper = irel_ptr;
13291	  while (irel_ptr && irel_ptr->next)
13292	    {
13293	      /* Check there is jump target can be used.  */
13294	      if ((irel_ptr->next->irel->r_offset
13295		   - irel_keeper->irel->r_offset) > 1022)
13296		irel_keeper = irel_ptr->next;
13297	      else
13298		{
13299		  ptr->enable = 1;
13300		  irel_ptr->keep = 0;
13301		}
13302	      irel_ptr = irel_ptr->next;
13303	    }
13304	}
13305      else
13306	{
13307	  /* Global symbol.  */
13308	  /* We have to get the absolute address and decide
13309	     whether to keep it or not.  */
13310	  while (irel_ptr)
13311	    {
13312	      address = (irel_ptr->irel->r_offset
13313			 + irel_ptr->sec->output_section->vma
13314			 + irel_ptr->sec->output_offset);
13315	      irel_ptr->addr = address;
13316	      irel_ptr = irel_ptr->next;
13317	    }
13318
13319	  irel_ptr = ptr->irel_head;
13320	  while (irel_ptr)
13321	    {
13322	      /* Sort by address.  */
13323	      struct elf_nds32_ifc_irel_list *irel_dest = irel_ptr;
13324	      struct elf_nds32_ifc_irel_list *irel_temp = irel_ptr;
13325	      struct elf_nds32_ifc_irel_list *irel_ptr_prev = NULL;
13326	      struct elf_nds32_ifc_irel_list *irel_dest_prev = NULL;
13327
13328	      /* Get the smallest one.  */
13329	      while (irel_temp->next)
13330		{
13331		  if (irel_temp->next->addr < irel_dest->addr)
13332		    {
13333		      irel_dest_prev = irel_temp;
13334		      irel_dest = irel_temp->next;
13335		    }
13336		  irel_temp = irel_temp->next;
13337		}
13338
13339	      if (irel_dest != irel_ptr)
13340		{
13341		  if (irel_ptr_prev)
13342		    irel_ptr_prev->next = irel_dest;
13343		  if (irel_dest_prev)
13344		    irel_dest_prev->next = irel_ptr;
13345		  irel_temp = irel_ptr->next;
13346		  irel_ptr->next = irel_dest->next;
13347		  irel_dest->next = irel_temp;
13348		}
13349	      irel_ptr_prev = irel_ptr;
13350	      irel_ptr = irel_ptr->next;
13351	    }
13352
13353	  irel_ptr = ptr->irel_head;
13354	  irel_keeper = irel_ptr;
13355	  while (irel_ptr && irel_ptr->next)
13356	    {
13357	      if ((irel_ptr->next->addr - irel_keeper->addr) > 1022)
13358		irel_keeper = irel_ptr->next;
13359	      else
13360		{
13361		  ptr->enable = 1;
13362		  irel_ptr->keep = 0;
13363		}
13364	      irel_ptr = irel_ptr->next;
13365	    }
13366	}
13367
13368	/* Ex9 enable.  Reserve it for ex9.  */
13369      if ((target_optimize & NDS32_RELAX_EX9_ON)
13370	  && ptr->irel_head != irel_keeper)
13371	ptr->enable = 0;
13372      ptr = ptr->next;
13373    }
13374}
13375
13376/* Determine whether j and jal should be substituted after ex9 done.  */
13377
13378static void
13379nds32_elf_ifc_filter_after_ex9 (void)
13380{
13381  struct elf_nds32_ifc_symbol_entry *ptr = ifc_symbol_head;
13382  struct elf_nds32_ifc_irel_list *irel_ptr = NULL;
13383
13384  while (ptr)
13385    {
13386      if (ptr->enable == 0)
13387	{
13388	  /* Check whether ifc is applied or not.  */
13389	  irel_ptr = ptr->irel_head;
13390	  ptr->ex9_enable = 1;
13391	  while (irel_ptr)
13392	    {
13393	      if (ELF32_R_TYPE (irel_ptr->irel->r_info) == R_NDS32_TRAN)
13394		{
13395		  /* Ex9 already.  */
13396		  ptr->ex9_enable = 0;
13397		  break;
13398		}
13399	      irel_ptr = irel_ptr->next;
13400	    }
13401	}
13402      ptr = ptr->next;
13403    }
13404}
13405
13406/* Wrapper to do ifc relaxation.  */
13407
13408bfd_boolean
13409nds32_elf_ifc_finish (struct bfd_link_info *info)
13410{
13411  int relax_status;
13412  struct elf_nds32_link_hash_table *table;
13413
13414  table = nds32_elf_hash_table (info);
13415  relax_status = table->relax_status;
13416
13417  if (!(relax_status & NDS32_RELAX_JUMP_IFC_DONE))
13418    nds32_elf_ifc_filter (info);
13419  else
13420    nds32_elf_ifc_filter_after_ex9 ();
13421
13422  if (!nds32_elf_ifc_replace (info))
13423    return FALSE;
13424
13425  if (table)
13426    table->relax_status |= NDS32_RELAX_JUMP_IFC_DONE;
13427  return TRUE;
13428}
13429
13430/* Traverse the result of ifc filter and replace it with ifcall9.  */
13431
13432static bfd_boolean
13433nds32_elf_ifc_replace (struct bfd_link_info *info)
13434{
13435  struct elf_nds32_ifc_symbol_entry *ptr = ifc_symbol_head;
13436  struct elf_nds32_ifc_irel_list *irel_ptr = NULL;
13437  nds32_elf_blank_t *relax_blank_list = NULL;
13438  bfd_byte *contents = NULL;
13439  Elf_Internal_Rela *internal_relocs;
13440  Elf_Internal_Rela *irel;
13441  Elf_Internal_Rela *irelend;
13442  unsigned short insn16 = INSN_IFCALL9;
13443  struct elf_nds32_link_hash_table *table;
13444  int relax_status;
13445
13446  table = nds32_elf_hash_table (info);
13447  relax_status = table->relax_status;
13448
13449  while (ptr)
13450    {
13451      /* Traverse the ifc gather list, and replace the
13452	 filter entries by ifcall9.  */
13453      if ((!(relax_status & NDS32_RELAX_JUMP_IFC_DONE) && ptr->enable == 1)
13454	  || ((relax_status & NDS32_RELAX_JUMP_IFC_DONE)
13455	      && ptr->ex9_enable == 1))
13456	{
13457	  irel_ptr = ptr->irel_head;
13458	  if (ptr->h == NULL)
13459	    {
13460	      /* Local symbol.  */
13461	      internal_relocs = _bfd_elf_link_read_relocs
13462		(ptr->sec->owner, ptr->sec, NULL, NULL, TRUE /* keep_memory */);
13463	      irelend = internal_relocs + ptr->sec->reloc_count;
13464
13465	      if (!nds32_get_section_contents (ptr->sec->owner, ptr->sec,
13466					       &contents))
13467		return FALSE;
13468
13469	      while (irel_ptr)
13470		{
13471		  if (irel_ptr->keep == 0 && irel_ptr->next)
13472		    {
13473		      /* The one can be replaced.  We have to check whether
13474			 there is any alignment point in the region.  */
13475		      irel = irel_ptr->irel;
13476		      while (((irel_ptr->next->keep == 0
13477			       && irel < irel_ptr->next->irel)
13478			      || (irel_ptr->next->keep == 1 && irel < irelend))
13479			     && !(ELF32_R_TYPE (irel->r_info) == R_NDS32_LABEL
13480				  && (irel->r_addend & 0x1f) == 2))
13481			irel++;
13482		      if (irel >= irelend
13483			  || !(ELF32_R_TYPE (irel->r_info) == R_NDS32_LABEL
13484			       && (irel->r_addend & 0x1f) == 2
13485			       && ((irel->r_offset - get_nds32_elf_blank_total
13486				    (&relax_blank_list, irel->r_offset, 1))
13487				   & 0x02) == 0))
13488			{
13489			  /* Replace by ifcall9.  */
13490			  bfd_putb16 (insn16, contents + irel_ptr->irel->r_offset);
13491			  if (!insert_nds32_elf_blank_recalc_total
13492			      (&relax_blank_list, irel_ptr->irel->r_offset + 2, 2))
13493			    return FALSE;
13494			  irel_ptr->irel->r_info =
13495			    ELF32_R_INFO (ELF32_R_SYM (irel_ptr->irel->r_info),
13496					  R_NDS32_10IFCU_PCREL_RELA);
13497			}
13498		    }
13499		  irel_ptr = irel_ptr->next;
13500		}
13501
13502	      /* Delete the redundant code.  */
13503	      if (relax_blank_list)
13504		{
13505		  nds32_elf_relax_delete_blanks (ptr->sec->owner, ptr->sec,
13506						 relax_blank_list);
13507		  relax_blank_list = NULL;
13508		}
13509	    }
13510	  else
13511	    {
13512	      /* Global symbol.  */
13513	      while (irel_ptr)
13514		{
13515		  if (irel_ptr->keep == 0 && irel_ptr->next)
13516		    {
13517		      /* The one can be replaced, and we have to check
13518			 whether there is any alignment point in the region.  */
13519		      internal_relocs = _bfd_elf_link_read_relocs
13520			(irel_ptr->sec->owner, irel_ptr->sec, NULL, NULL,
13521			 TRUE /* keep_memory */);
13522		      irelend = internal_relocs + irel_ptr->sec->reloc_count;
13523		      if (!nds32_get_section_contents
13524			     (irel_ptr->sec->owner, irel_ptr->sec, &contents))
13525			return FALSE;
13526
13527		      irel = irel_ptr->irel;
13528		      while (((irel_ptr->sec == irel_ptr->next->sec
13529			       && irel_ptr->next->keep == 0
13530			       && irel < irel_ptr->next->irel)
13531			      || ((irel_ptr->sec != irel_ptr->next->sec
13532				   || irel_ptr->next->keep == 1)
13533				  && irel < irelend))
13534			     && !(ELF32_R_TYPE (irel->r_info) == R_NDS32_LABEL
13535				  && (irel->r_addend & 0x1f) == 2))
13536			irel++;
13537		      if (irel >= irelend
13538			  || !(ELF32_R_TYPE (irel->r_info) == R_NDS32_LABEL
13539			       && (irel->r_addend & 0x1f) == 2
13540			       && ((irel->r_offset
13541				    - get_nds32_elf_blank_total (&relax_blank_list,
13542							    irel->r_offset, 1)) & 0x02) == 0))
13543			{
13544			  /* Replace by ifcall9.  */
13545			  bfd_putb16 (insn16, contents + irel_ptr->irel->r_offset);
13546			  if (!insert_nds32_elf_blank_recalc_total
13547			      (&relax_blank_list, irel_ptr->irel->r_offset + 2, 2))
13548			    return FALSE;
13549
13550			  /* Delete the redundant code, and clear the relocation.  */
13551			  nds32_elf_relax_delete_blanks (irel_ptr->sec->owner,
13552							 irel_ptr->sec,
13553							 relax_blank_list);
13554			  irel_ptr->irel->r_info =
13555			    ELF32_R_INFO (ELF32_R_SYM (irel_ptr->irel->r_info),
13556					  R_NDS32_10IFCU_PCREL_RELA);
13557			  relax_blank_list = NULL;
13558			}
13559		    }
13560
13561		  irel_ptr = irel_ptr->next;
13562		}
13563	    }
13564	}
13565      ptr = ptr->next;
13566    }
13567
13568  return TRUE;
13569}
13570
13571/* Relocate ifcall.  */
13572
13573static bfd_boolean
13574nds32_elf_ifc_reloc (void)
13575{
13576  struct elf_nds32_ifc_symbol_entry *ptr = ifc_symbol_head;
13577  struct elf_nds32_ifc_irel_list *irel_ptr = NULL;
13578  struct elf_nds32_ifc_irel_list *irel_keeper = NULL;
13579  bfd_vma relocation, address;
13580  unsigned short insn16;
13581  bfd_byte *contents = NULL;
13582  static bfd_boolean done = FALSE;
13583
13584  if (done)
13585    return TRUE;
13586
13587  done = TRUE;
13588
13589  while (ptr)
13590    {
13591      /* Check the entry is enable ifcall.  */
13592      if (ptr->enable == 1 || ptr->ex9_enable == 1)
13593	{
13594	  /* Get the reserve jump.  */
13595	  irel_ptr = ptr->irel_head;
13596	  while (irel_ptr)
13597	    {
13598	      if (irel_ptr->keep == 1)
13599		{
13600		  irel_keeper = irel_ptr;
13601		  break;
13602		}
13603	      irel_ptr = irel_ptr->next;
13604	    }
13605
13606	  irel_ptr = ptr->irel_head;
13607	  if (ptr->h == NULL)
13608	    {
13609	      /* Local symbol.  */
13610	      if (!nds32_get_section_contents (ptr->sec->owner, ptr->sec, &contents))
13611		return FALSE;
13612
13613	      while (irel_ptr)
13614		{
13615		  if (irel_ptr->keep == 0
13616		      && ELF32_R_TYPE (irel_ptr->irel->r_info) == R_NDS32_10IFCU_PCREL_RELA)
13617		    {
13618		      relocation = irel_keeper->irel->r_offset;
13619		      relocation = relocation - irel_ptr->irel->r_offset;
13620		      while (irel_keeper && relocation > 1022)
13621			{
13622			  irel_keeper = irel_keeper->next;
13623			  if (irel_keeper && irel_keeper->keep == 1)
13624			    {
13625			      relocation = irel_keeper->irel->r_offset;
13626			      relocation = relocation - irel_ptr->irel->r_offset;
13627			    }
13628			}
13629		      if (relocation > 1022)
13630			{
13631			  /* Double check.  */
13632			  irel_keeper = ptr->irel_head;
13633			  while (irel_keeper)
13634			    {
13635			      if (irel_keeper->keep == 1)
13636				{
13637				  relocation = irel_keeper->irel->r_offset;
13638				  relocation = relocation - irel_ptr->irel->r_offset;
13639				}
13640			      if (relocation <= 1022)
13641				break;
13642			      irel_keeper = irel_keeper->next;
13643			    }
13644			  if (!irel_keeper)
13645			    return FALSE;
13646			}
13647		      irel_ptr->irel->r_info =
13648			ELF32_R_INFO (ELF32_R_SYM (irel_ptr->irel->r_info),
13649				      R_NDS32_NONE);
13650		      insn16 = INSN_IFCALL9 | (relocation >> 1);
13651		      bfd_putb16 (insn16, contents + irel_ptr->irel->r_offset);
13652		    }
13653		  irel_ptr = irel_ptr->next;
13654		}
13655	    }
13656	  else
13657	    {
13658	      /* Global symbol.  */
13659	      while (irel_ptr)
13660		{
13661		  if (irel_ptr->keep == 0
13662		      && ELF32_R_TYPE (irel_ptr->irel->r_info) == R_NDS32_10IFCU_PCREL_RELA)
13663		    {
13664		      /* Get the distance between ifcall and jump.  */
13665		      relocation = (irel_keeper->irel->r_offset
13666				    + irel_keeper->sec->output_section->vma
13667				    + irel_keeper->sec->output_offset);
13668		      address = (irel_ptr->irel->r_offset
13669				 + irel_ptr->sec->output_section->vma
13670				 + irel_ptr->sec->output_offset);
13671		      relocation = relocation - address;
13672
13673		      /* The distance is over ragne, find callee again.  */
13674		      while (irel_keeper && relocation > 1022)
13675			{
13676			  irel_keeper = irel_keeper->next;
13677			  if (irel_keeper && irel_keeper->keep ==1)
13678			    {
13679			      relocation = (irel_keeper->irel->r_offset
13680					    + irel_keeper->sec->output_section->vma
13681					    + irel_keeper->sec->output_offset);
13682			      relocation = relocation - address;
13683			    }
13684			}
13685
13686		      if (relocation > 1022)
13687			{
13688			  /* Double check.  */
13689			  irel_keeper = ptr->irel_head;
13690			  while (irel_keeper)
13691			    {
13692			      if (irel_keeper->keep == 1)
13693				{
13694
13695				  relocation = (irel_keeper->irel->r_offset
13696						+ irel_keeper->sec->output_section->vma
13697						+ irel_keeper->sec->output_offset);
13698				  relocation = relocation - address;
13699				}
13700			      if (relocation <= 1022)
13701				break;
13702			      irel_keeper = irel_keeper->next;
13703			    }
13704			  if (!irel_keeper)
13705			    return FALSE;
13706			}
13707		      if (!nds32_get_section_contents
13708			  (irel_ptr->sec->owner, irel_ptr->sec, &contents))
13709			return FALSE;
13710		      insn16 = INSN_IFCALL9 | (relocation >> 1);
13711		      bfd_putb16 (insn16, contents + irel_ptr->irel->r_offset);
13712		      irel_ptr->irel->r_info =
13713			ELF32_R_INFO (ELF32_R_SYM (irel_ptr->irel->r_info),
13714				      R_NDS32_NONE);
13715		    }
13716		  irel_ptr =irel_ptr->next;
13717		}
13718	    }
13719	}
13720      ptr = ptr->next;
13721    }
13722
13723  return TRUE;
13724}
13725
13726/* End of IFC relaxation.  */
13727
13728/* EX9 Instruction Table Relaxation.  */
13729
13730/* Global hash list.  */
13731struct elf_link_hash_entry_list
13732{
13733  struct elf_link_hash_entry *h;
13734  struct elf_link_hash_entry_list *next;
13735};
13736
13737/* Save different destination but same insn.  */
13738struct elf_link_hash_entry_mul_list
13739{
13740  /* Global symbol times.  */
13741  int times;
13742  /* Save relocation for each global symbol but useful??  */
13743  Elf_Internal_Rela *irel;
13744  /* For sethi, two sethi may have the same high-part but different low-parts.  */
13745  Elf_Internal_Rela rel_backup;
13746  struct elf_link_hash_entry_list *h_list;
13747  struct elf_link_hash_entry_mul_list *next;
13748};
13749
13750/* Instruction hash table.  */
13751struct elf_nds32_code_hash_entry
13752{
13753  struct bfd_hash_entry root;
13754  int times;
13755  /* For insn that can use relocation or constant ex: sethi.  */
13756  int const_insn;
13757  asection *sec;
13758  struct elf_link_hash_entry_mul_list *m_list;
13759  /* Using r_addend.  */
13760  Elf_Internal_Rela *irel;
13761  /* Using r_info.  */
13762  Elf_Internal_Rela rel_backup;
13763};
13764
13765/* Instruction count list.  */
13766struct elf_nds32_insn_times_entry
13767{
13768  const char *string;
13769  int times;
13770  int order;
13771  asection *sec;
13772  struct elf_link_hash_entry_mul_list *m_list;
13773  Elf_Internal_Rela *irel;
13774  Elf_Internal_Rela rel_backup;
13775  struct elf_nds32_insn_times_entry *next;
13776};
13777
13778/* J and JAL symbol list.  */
13779struct elf_nds32_symbol_entry
13780{
13781  char *string;
13782  unsigned long insn;
13783  struct elf_nds32_symbol_entry *next;
13784};
13785
13786/* Relocation list.  */
13787struct elf_nds32_irel_entry
13788{
13789  Elf_Internal_Rela *irel;
13790  struct elf_nds32_irel_entry *next;
13791};
13792
13793/* ex9.it insn need to be fixed.  */
13794struct elf_nds32_ex9_refix
13795{
13796  Elf_Internal_Rela *irel;
13797  asection *sec;
13798  struct elf_link_hash_entry *h;
13799  int order;
13800  struct elf_nds32_ex9_refix *next;
13801};
13802
13803static struct bfd_hash_table ex9_code_table;
13804static struct elf_nds32_insn_times_entry *ex9_insn_head = NULL;
13805static struct elf_nds32_ex9_refix *ex9_refix_head = NULL;
13806
13807/* EX9 hash function.  */
13808
13809static struct bfd_hash_entry *
13810nds32_elf_code_hash_newfunc (struct bfd_hash_entry *entry,
13811			     struct bfd_hash_table *table,
13812			     const char *string)
13813{
13814  struct elf_nds32_code_hash_entry *ret;
13815
13816  /* Allocate the structure if it has not already been allocated by a
13817     subclass.  */
13818  if (entry == NULL)
13819    {
13820      entry = (struct bfd_hash_entry *)
13821	bfd_hash_allocate (table, sizeof (*ret));
13822      if (entry == NULL)
13823	return entry;
13824    }
13825
13826  /* Call the allocation method of the superclass.  */
13827  entry = bfd_hash_newfunc (entry, table, string);
13828  if (entry == NULL)
13829    return entry;
13830
13831  ret = (struct elf_nds32_code_hash_entry*) entry;
13832  ret->times = 0;
13833  ret->const_insn = 0;
13834  ret->m_list = NULL;
13835  ret->sec = NULL;
13836  ret->irel = NULL;
13837  return &ret->root;
13838}
13839
13840/* Insert ex9 entry
13841   this insert must be stable sorted by times.  */
13842
13843static void
13844nds32_elf_ex9_insert_entry (struct elf_nds32_insn_times_entry *ptr)
13845{
13846  struct elf_nds32_insn_times_entry *temp;
13847  struct elf_nds32_insn_times_entry *temp2;
13848
13849  if (ex9_insn_head == NULL)
13850    {
13851      ex9_insn_head = ptr;
13852      ptr->next = NULL;
13853    }
13854  else
13855    {
13856      temp = ex9_insn_head;
13857      temp2 = ex9_insn_head;
13858      while (temp->next &&
13859	     (temp->next->times >= ptr->times
13860	      || temp->times == -1))
13861	{
13862	  if (temp->times == -1)
13863	    temp2 = temp;
13864	  temp = temp->next;
13865	}
13866      if (ptr->times > temp->times && temp->times != -1)
13867	{
13868	  ptr->next = temp;
13869	  if (temp2->times == -1)
13870	    temp2->next = ptr;
13871	  else
13872	    ex9_insn_head = ptr;
13873	}
13874      else if (temp->next == NULL)
13875	{
13876	  temp->next = ptr;
13877	  ptr->next = NULL;
13878	}
13879      else
13880	{
13881	  ptr->next = temp->next;
13882	  temp->next = ptr;
13883	}
13884    }
13885}
13886
13887/* Examine each insn times in hash table.
13888   Handle multi-link hash entry.
13889
13890   TODO: This function doesn't assign so much info since it is fake.  */
13891
13892static int
13893nds32_elf_examine_insn_times (struct elf_nds32_code_hash_entry *h)
13894{
13895  struct elf_nds32_insn_times_entry *ptr;
13896  int times;
13897
13898  if (h->m_list == NULL)
13899    {
13900      /* Local symbol insn or insn without relocation.  */
13901      if (h->times < 3)
13902	return TRUE;
13903
13904      ptr = (struct elf_nds32_insn_times_entry *)
13905	bfd_malloc (sizeof (struct elf_nds32_insn_times_entry));
13906      ptr->times = h->times;
13907      ptr->string = h->root.string;
13908      ptr->m_list = NULL;
13909      ptr->sec = h->sec;
13910      ptr->irel = h->irel;
13911      ptr->rel_backup = h->rel_backup;
13912      nds32_elf_ex9_insert_entry (ptr);
13913    }
13914  else
13915    {
13916      /* Global symbol insn.  */
13917      /* Only sethi insn has multiple m_list.  */
13918      struct elf_link_hash_entry_mul_list *m_list = h->m_list;
13919
13920      times = 0;
13921      while (m_list)
13922	{
13923	  times += m_list->times;
13924	  m_list = m_list->next;
13925	}
13926      if (times >= 3)
13927	{
13928	  m_list = h->m_list;
13929	  ptr = (struct elf_nds32_insn_times_entry *)
13930	    bfd_malloc (sizeof (struct elf_nds32_insn_times_entry));
13931	  ptr->times = times; /* Use the total times.  */
13932	  ptr->string = h->root.string;
13933	  ptr->m_list = m_list;
13934	  ptr->sec = h->sec;
13935	  ptr->irel = m_list->irel;
13936	  ptr->rel_backup = m_list->rel_backup;
13937	  nds32_elf_ex9_insert_entry (ptr);
13938	}
13939      if (h->const_insn == 1)
13940	{
13941	  /* sethi with constant value.  */
13942	  if (h->times < 3)
13943	    return TRUE;
13944
13945	  ptr = (struct elf_nds32_insn_times_entry *)
13946	    bfd_malloc (sizeof (struct elf_nds32_insn_times_entry));
13947	  ptr->times = h->times;
13948	  ptr->string = h->root.string;
13949	  ptr->m_list = NULL;
13950	  ptr->sec = NULL;
13951	  ptr->irel = NULL;
13952	  ptr->rel_backup = h->rel_backup;
13953	  nds32_elf_ex9_insert_entry (ptr);
13954	}
13955    }
13956  return TRUE;
13957}
13958
13959/* Count each insn times in hash table.
13960   Handle multi-link hash entry.  */
13961
13962static int
13963nds32_elf_count_insn_times (struct elf_nds32_code_hash_entry *h)
13964{
13965  int reservation, times;
13966  unsigned long relocation, min_relocation;
13967  struct elf_nds32_insn_times_entry *ptr;
13968
13969  if (h->m_list == NULL)
13970    {
13971      /* Local symbol insn or insn without relocation.  */
13972      if (h->times < 3)
13973	return TRUE;
13974      ptr = (struct elf_nds32_insn_times_entry *)
13975	bfd_malloc (sizeof (struct elf_nds32_insn_times_entry));
13976      ptr->times = h->times;
13977      ptr->string = h->root.string;
13978      ptr->m_list = NULL;
13979      ptr->sec = h->sec;
13980      ptr->irel = h->irel;
13981      ptr->rel_backup = h->rel_backup;
13982      nds32_elf_ex9_insert_entry (ptr);
13983    }
13984  else
13985    {
13986      /* Global symbol insn.  */
13987      /* Only sethi insn has multiple m_list.  */
13988      struct elf_link_hash_entry_mul_list *m_list = h->m_list;
13989
13990      if (ELF32_R_TYPE (m_list->rel_backup.r_info) == R_NDS32_HI20_RELA
13991	  && m_list->next != NULL)
13992	{
13993	  /* Sethi insn has different symbol or addend but has same hi20.  */
13994	  times = 0;
13995	  reservation = 1;
13996	  relocation = 0;
13997	  min_relocation = 0xffffffff;
13998	  while (m_list)
13999	    {
14000	      /* Get the minimum sethi address
14001		 and calculate how many entry the sethi-list have to use.  */
14002	      if ((m_list->h_list->h->root.type == bfd_link_hash_defined
14003		   || m_list->h_list->h->root.type == bfd_link_hash_defweak)
14004		  && (m_list->h_list->h->root.u.def.section != NULL
14005		      && m_list->h_list->h->root.u.def.section->output_section != NULL))
14006		{
14007		  relocation = (m_list->h_list->h->root.u.def.value +
14008				m_list->h_list->h->root.u.def.section->output_section->vma +
14009				m_list->h_list->h->root.u.def.section->output_offset);
14010		  relocation += m_list->irel->r_addend;
14011		}
14012	      else
14013		relocation = 0;
14014	      if (relocation < min_relocation)
14015		min_relocation = relocation;
14016	      times += m_list->times;
14017	      m_list = m_list->next;
14018	    }
14019	  if (min_relocation < ex9_relax_size)
14020	    reservation = (min_relocation >> 12) + 1;
14021	  else
14022	    reservation = (min_relocation >> 12)
14023			  - ((min_relocation - ex9_relax_size) >> 12) + 1;
14024	  if (reservation < (times / 3))
14025	    {
14026	      /* Efficient enough to use ex9.  */
14027	      int i;
14028
14029	      for (i = reservation ; i > 0; i--)
14030		{
14031		  /* Allocate number of reservation ex9 entry.  */
14032		  ptr = (struct elf_nds32_insn_times_entry *)
14033		    bfd_malloc (sizeof (struct elf_nds32_insn_times_entry));
14034		  ptr->times = h->m_list->times / reservation;
14035		  ptr->string = h->root.string;
14036		  ptr->m_list = h->m_list;
14037		  ptr->sec = h->sec;
14038		  ptr->irel = h->m_list->irel;
14039		  ptr->rel_backup = h->m_list->rel_backup;
14040		  nds32_elf_ex9_insert_entry (ptr);
14041		}
14042	    }
14043	}
14044      else
14045	{
14046	  /* Normal global symbol that means no different address symbol
14047	     using same ex9 entry.  */
14048	  if (m_list->times >= 3)
14049	    {
14050	      ptr = (struct elf_nds32_insn_times_entry *)
14051		bfd_malloc (sizeof (struct elf_nds32_insn_times_entry));
14052	      ptr->times = m_list->times;
14053	      ptr->string = h->root.string;
14054	      ptr->m_list = h->m_list;
14055	      ptr->sec = h->sec;
14056	      ptr->irel = h->m_list->irel;
14057	      ptr->rel_backup = h->m_list->rel_backup;
14058	      nds32_elf_ex9_insert_entry (ptr);
14059	    }
14060	}
14061
14062      if (h->const_insn == 1)
14063	{
14064	  /* sethi with constant value.  */
14065	  if (h->times < 3)
14066	    return TRUE;
14067
14068	  ptr = (struct elf_nds32_insn_times_entry *)
14069	    bfd_malloc (sizeof (struct elf_nds32_insn_times_entry));
14070	  ptr->times = h->times;
14071	  ptr->string = h->root.string;
14072	  ptr->m_list = NULL;
14073	  ptr->sec = NULL;
14074	  ptr->irel = NULL;
14075	  ptr->rel_backup = h->rel_backup;
14076	  nds32_elf_ex9_insert_entry (ptr);
14077	}
14078    }
14079
14080  return TRUE;
14081}
14082
14083/* Hash table traverse function.  */
14084
14085static void
14086nds32_elf_code_hash_traverse (int (*func) (struct elf_nds32_code_hash_entry*))
14087{
14088  unsigned int i;
14089
14090  ex9_code_table.frozen = 1;
14091  for (i = 0; i < ex9_code_table.size; i++)
14092    {
14093      struct bfd_hash_entry *p;
14094
14095      for (p = ex9_code_table.table[i]; p != NULL; p = p->next)
14096	if (!func ((struct elf_nds32_code_hash_entry *) p))
14097	  goto out;
14098    }
14099out:
14100  ex9_code_table.frozen = 0;
14101}
14102
14103
14104/* Give order number to insn list.  */
14105
14106static void
14107nds32_elf_order_insn_times (struct bfd_link_info *info)
14108{
14109  struct elf_nds32_insn_times_entry *ex9_insn;
14110  struct elf_nds32_insn_times_entry *temp = NULL;
14111  struct elf_nds32_link_hash_table *table;
14112  int ex9_limit;
14113  int number = 0;
14114
14115  if (ex9_insn_head == NULL)
14116    return;
14117
14118/* The max number of entries is 512.  */
14119  ex9_insn = ex9_insn_head;
14120  table = nds32_elf_hash_table (info);
14121  ex9_limit = table->ex9_limit;
14122
14123  ex9_insn = ex9_insn_head;
14124
14125  while (ex9_insn != NULL && number < ex9_limit)
14126    {
14127      ex9_insn->order = number;
14128      number++;
14129      temp = ex9_insn;
14130      ex9_insn = ex9_insn->next;
14131    }
14132
14133  if (ex9_insn && temp)
14134    temp->next = NULL;
14135
14136  while (ex9_insn != NULL)
14137    {
14138      /* Free useless entry.  */
14139      temp = ex9_insn;
14140      ex9_insn = ex9_insn->next;
14141      free (temp);
14142    }
14143}
14144
14145/* Build .ex9.itable section.  */
14146
14147static void
14148nds32_elf_ex9_build_itable (struct bfd_link_info *link_info)
14149{
14150  asection *table_sec;
14151  struct elf_nds32_insn_times_entry *ptr;
14152  bfd *it_abfd;
14153  int number = 0;
14154  bfd_byte *contents = NULL;
14155
14156  for (it_abfd = link_info->input_bfds; it_abfd != NULL;
14157       it_abfd = it_abfd->link.next)
14158    {
14159      /* Find the section .ex9.itable, and put all entries into it.  */
14160      table_sec = bfd_get_section_by_name (it_abfd, ".ex9.itable");
14161      if (table_sec != NULL)
14162	{
14163	  if (!nds32_get_section_contents (it_abfd, table_sec, &contents))
14164	    return;
14165
14166	  for (ptr = ex9_insn_head; ptr !=NULL ; ptr = ptr->next)
14167	    number++;
14168
14169	  table_sec->size = number * 4;
14170
14171	  if (number == 0)
14172	    return;
14173
14174	  elf_elfheader (link_info->output_bfd)->e_flags |= E_NDS32_HAS_EX9_INST;
14175	  number = 0;
14176	  for (ptr = ex9_insn_head; ptr !=NULL ; ptr = ptr->next)
14177	    {
14178	      long val;
14179
14180	      val = strtol (ptr->string, NULL, 16);
14181	      bfd_putb32 ((bfd_vma) val, (char *) contents + (number * 4));
14182	      number++;
14183	    }
14184	  break;
14185	}
14186    }
14187}
14188
14189/* Get insn with regs according to relocation type.  */
14190
14191static void
14192nds32_elf_get_insn_with_reg (Elf_Internal_Rela *irel,
14193			     uint32_t insn, uint32_t *insn_with_reg)
14194{
14195  reloc_howto_type *howto = NULL;
14196
14197  if (irel == NULL
14198      || (ELF32_R_TYPE (irel->r_info) >= (int) ARRAY_SIZE (nds32_elf_howto_table)
14199	  && (ELF32_R_TYPE (irel->r_info) - R_NDS32_RELAX_ENTRY)
14200	     >= (int) ARRAY_SIZE (nds32_elf_relax_howto_table)))
14201    {
14202      *insn_with_reg = insn;
14203      return;
14204    }
14205
14206  howto = bfd_elf32_bfd_reloc_type_table_lookup (ELF32_R_TYPE (irel->r_info));
14207  *insn_with_reg = insn & (0xffffffff ^ howto->dst_mask);
14208}
14209
14210/* Mask number of address bits according to relocation.  */
14211
14212static unsigned long
14213nds32_elf_irel_mask (Elf_Internal_Rela *irel)
14214{
14215  reloc_howto_type *howto = NULL;
14216
14217  if (irel == NULL
14218      || (ELF32_R_TYPE (irel->r_info) >= (int) ARRAY_SIZE (nds32_elf_howto_table)
14219	  && (ELF32_R_TYPE (irel->r_info) - R_NDS32_RELAX_ENTRY)
14220	     >= (int) ARRAY_SIZE (nds32_elf_relax_howto_table)))
14221    return 0;
14222
14223  howto = bfd_elf32_bfd_reloc_type_table_lookup (ELF32_R_TYPE (irel->r_info));
14224  return howto->dst_mask;
14225}
14226
14227static void
14228nds32_elf_insert_irel_entry (struct elf_nds32_irel_entry **irel_list,
14229			     struct elf_nds32_irel_entry *irel_ptr)
14230{
14231  if (*irel_list == NULL)
14232    {
14233      *irel_list = irel_ptr;
14234      irel_ptr->next = NULL;
14235    }
14236  else
14237    {
14238      irel_ptr->next = *irel_list;
14239      *irel_list = irel_ptr;
14240    }
14241}
14242
14243static void
14244nds32_elf_ex9_insert_fix (asection * sec, Elf_Internal_Rela * irel,
14245			  struct elf_link_hash_entry *h, int order)
14246{
14247  struct elf_nds32_ex9_refix *ptr;
14248
14249  ptr = bfd_malloc (sizeof (struct elf_nds32_ex9_refix));
14250  ptr->sec = sec;
14251  ptr->irel = irel;
14252  ptr->h = h;
14253  ptr->order = order;
14254  ptr->next = NULL;
14255
14256  if (ex9_refix_head == NULL)
14257    ex9_refix_head = ptr;
14258  else
14259    {
14260      struct elf_nds32_ex9_refix *temp = ex9_refix_head;
14261
14262      while (temp->next != NULL)
14263	temp = temp->next;
14264      temp->next = ptr;
14265    }
14266}
14267
14268enum
14269{
14270  DATA_EXIST = 1,
14271  CLEAN_PRE = 1 << 1,
14272  PUSH_PRE = 1 << 2
14273};
14274
14275/* Check relocation type if supporting for ex9.  */
14276
14277static int
14278nds32_elf_ex9_relocation_check (struct bfd_link_info *info,
14279				Elf_Internal_Rela **irel,
14280				Elf_Internal_Rela *irelend,
14281				nds32_elf_blank_t *relax_blank_list,
14282				asection *sec,bfd_vma *off,
14283				bfd_byte *contents)
14284{
14285  /* Suppress ex9 if `.no_relax ex9' or inner loop.  */
14286  bfd_boolean nested_ex9, nested_loop;
14287  bfd_boolean ex9_loop_aware;
14288  /* We use the highest 1 byte of result to record
14289     how many bytes location counter has to move.  */
14290  int result = 0;
14291  Elf_Internal_Rela *irel_save = NULL;
14292  struct elf_nds32_link_hash_table *table;
14293
14294  table = nds32_elf_hash_table (info);
14295  ex9_loop_aware = table->ex9_loop_aware;
14296
14297  while ((*irel) != NULL && (*irel) < irelend && *off == (*irel)->r_offset)
14298    {
14299      switch (ELF32_R_TYPE ((*irel)->r_info))
14300	{
14301	case R_NDS32_RELAX_REGION_BEGIN:
14302	  /* Ignore code block.  */
14303	  nested_ex9 = FALSE;
14304	  nested_loop = FALSE;
14305	  if (((*irel)->r_addend & R_NDS32_RELAX_REGION_NO_EX9_FLAG)
14306	      || (ex9_loop_aware
14307		  && ((*irel)->r_addend & R_NDS32_RELAX_REGION_INNERMOST_LOOP_FLAG)))
14308	    {
14309	      /* Check the region if loop or not.  If it is true and
14310		 ex9-loop-aware is true, ignore the region till region end.  */
14311	      /* To save the status for in .no_relax ex9 region and
14312		 loop region to conform the block can do ex9 relaxation.  */
14313	      nested_ex9 = ((*irel)->r_addend & R_NDS32_RELAX_REGION_NO_EX9_FLAG);
14314	      nested_loop = (ex9_loop_aware
14315			     && ((*irel)->r_addend & R_NDS32_RELAX_REGION_INNERMOST_LOOP_FLAG));
14316	      while ((*irel) && (*irel) < irelend && (nested_ex9 || nested_loop))
14317		{
14318		  (*irel)++;
14319		  if (ELF32_R_TYPE ((*irel)->r_info) == R_NDS32_RELAX_REGION_BEGIN)
14320		    {
14321		      /* There may be nested region.  */
14322		      if (((*irel)->r_addend & R_NDS32_RELAX_REGION_NO_EX9_FLAG) != 0)
14323			nested_ex9 = TRUE;
14324		      else if (ex9_loop_aware
14325			       && ((*irel)->r_addend & R_NDS32_RELAX_REGION_INNERMOST_LOOP_FLAG))
14326			nested_loop = TRUE;
14327		    }
14328		  else if (ELF32_R_TYPE ((*irel)->r_info) == R_NDS32_RELAX_REGION_END)
14329		    {
14330		      /* The end of region.  */
14331		      if (((*irel)->r_addend & R_NDS32_RELAX_REGION_NO_EX9_FLAG) != 0)
14332			nested_ex9 = FALSE;
14333		      else if (ex9_loop_aware
14334			       && ((*irel)->r_addend & R_NDS32_RELAX_REGION_INNERMOST_LOOP_FLAG))
14335			nested_loop = FALSE;
14336		    }
14337		  else if (ELF32_R_TYPE ((*irel)->r_info) == R_NDS32_LABEL
14338			   && ((*irel)->r_addend & 0x1f) == 2)
14339		    {
14340		      /* Alignment exist in the region.  */
14341		      result |= CLEAN_PRE;
14342		      if (((*irel)->r_offset -
14343			   get_nds32_elf_blank_total (&relax_blank_list,
14344						      (*irel)->r_offset, 0)) & 0x02)
14345			result |= PUSH_PRE;
14346		    }
14347		}
14348	      if ((*irel) >= irelend)
14349		*off = sec->size;
14350	      else
14351		*off = (*irel)->r_offset;
14352
14353	      /* The final instruction in the region, regard this one as data to ignore it.  */
14354	      result |= DATA_EXIST;
14355	      return result;
14356	    }
14357	  break;
14358
14359	case R_NDS32_LABEL:
14360	  if (((*irel)->r_addend & 0x1f) == 2)
14361	    {
14362	      /* Check this point is align and decide to do ex9 or not.  */
14363	      result |= CLEAN_PRE;
14364	      if (((*irel)->r_offset -
14365		   get_nds32_elf_blank_total (&relax_blank_list,
14366					      (*irel)->r_offset, 0)) & 0x02)
14367		result |= PUSH_PRE;
14368	    }
14369	  break;
14370	case R_NDS32_32_RELA:
14371	  /* Data.  */
14372	  result |= (4 << 24);
14373	  result |= DATA_EXIST;
14374	  break;
14375	case R_NDS32_16_RELA:
14376	  /* Data.  */
14377	  result |= (2 << 24);
14378	  result |= DATA_EXIST;
14379	  break;
14380	case R_NDS32_DATA:
14381	  /* Data.  */
14382	  /* The least code alignment is 2.  If the data is only one byte,
14383	     we have to shift one more byte.  */
14384	  if ((*irel)->r_addend == 1)
14385	    result |= ((*irel)->r_addend << 25) ;
14386	  else
14387	    result |= ((*irel)->r_addend << 24) ;
14388
14389	  result |= DATA_EXIST;
14390	  break;
14391
14392	case R_NDS32_25_PCREL_RELA:
14393	case R_NDS32_SDA16S3_RELA:
14394	case R_NDS32_SDA15S3_RELA:
14395	case R_NDS32_SDA15S3:
14396	case R_NDS32_SDA17S2_RELA:
14397	case R_NDS32_SDA15S2_RELA:
14398	case R_NDS32_SDA12S2_SP_RELA:
14399	case R_NDS32_SDA12S2_DP_RELA:
14400	case R_NDS32_SDA15S2:
14401	case R_NDS32_SDA18S1_RELA:
14402	case R_NDS32_SDA15S1_RELA:
14403	case R_NDS32_SDA15S1:
14404	case R_NDS32_SDA19S0_RELA:
14405	case R_NDS32_SDA15S0_RELA:
14406	case R_NDS32_SDA15S0:
14407	case R_NDS32_HI20_RELA:
14408	case R_NDS32_LO12S0_ORI_RELA:
14409	case R_NDS32_LO12S0_RELA:
14410	case R_NDS32_LO12S1_RELA:
14411	case R_NDS32_LO12S2_RELA:
14412	  /* These relocation is supported ex9 relaxation currently.  */
14413	  /* We have to save the relocation for using later, since we have
14414	     to check there is any alignment in the same address.  */
14415	  irel_save = *irel;
14416	  break;
14417	default:
14418	  /* Not support relocations.  */
14419	  if (ELF32_R_TYPE ((*irel)->r_info) < ARRAY_SIZE (nds32_elf_howto_table)
14420	      && ELF32_R_TYPE ((*irel)->r_info) != R_NDS32_NONE
14421	      && ELF32_R_TYPE ((*irel)->r_info) != R_NDS32_INSN16)
14422	    {
14423	      /* Note: To optimize aggressively, it maybe can ignore R_NDS32_INSN16 here.
14424		 But we have to consider if there is any side-effect.  */
14425	      if (!(result & DATA_EXIST))
14426		{
14427		  /* We have to confirm there is no data relocation in the
14428		     same address.  In general case, this won't happen.  */
14429		  /* We have to do ex9 conservative, for those relocation not
14430		     considerd we ignore instruction.  */
14431		  result |= DATA_EXIST;
14432		  if (*(contents + *off) & 0x80)
14433		    result |= (2 << 24);
14434		  else
14435		    result |= (4 << 24);
14436		  break;
14437		}
14438	    }
14439	}
14440      if ((*irel) < irelend
14441	  && ((*irel) + 1) < irelend
14442	  && (*irel)->r_offset == ((*irel) + 1)->r_offset)
14443	/* There are relocations pointing to the same address, we have to
14444	   check all of them.  */
14445	(*irel)++;
14446      else
14447	{
14448	  if (irel_save)
14449	    *irel = irel_save;
14450	  return result;
14451	}
14452    }
14453  return result;
14454}
14455
14456/* Replace with ex9 instruction.  */
14457
14458static bfd_boolean
14459nds32_elf_ex9_push_insn (uint16_t insn16, bfd_byte *contents, bfd_vma pre_off,
14460			 nds32_elf_blank_t **relax_blank_list,
14461			 struct elf_nds32_irel_entry *pre_irel_ptr,
14462			 struct elf_nds32_irel_entry **irel_list)
14463{
14464  if (insn16 != 0)
14465    {
14466      /* Implement the ex9 relaxation.  */
14467      bfd_putb16 (insn16, contents + pre_off);
14468      if (!insert_nds32_elf_blank_recalc_total (relax_blank_list,
14469						pre_off + 2, 2))
14470	return FALSE;
14471      if (pre_irel_ptr != NULL)
14472	nds32_elf_insert_irel_entry (irel_list, pre_irel_ptr);
14473    }
14474  return TRUE;
14475}
14476
14477/* Replace input file instruction which is in ex9 itable.  */
14478
14479static bfd_boolean
14480nds32_elf_ex9_replace_instruction (struct bfd_link_info *info, bfd *abfd, asection *sec)
14481{
14482  struct elf_nds32_insn_times_entry *ex9_insn = ex9_insn_head;
14483  bfd_byte *contents = NULL;
14484  bfd_vma off;
14485  uint16_t insn16, insn_ex9;
14486  /* `pre_*' are used to track previous instruction that can use ex9.it.  */
14487  bfd_vma pre_off = -1;
14488  uint16_t pre_insn16 = 0;
14489  struct elf_nds32_irel_entry *pre_irel_ptr = NULL;
14490  Elf_Internal_Rela *internal_relocs;
14491  Elf_Internal_Rela *irel;
14492  Elf_Internal_Rela *irelend;
14493  Elf_Internal_Shdr *symtab_hdr;
14494  Elf_Internal_Sym *isym = NULL;
14495  nds32_elf_blank_t *relax_blank_list = NULL;
14496  uint32_t insn = 0;
14497  uint32_t insn_with_reg = 0;
14498  uint32_t it_insn;
14499  uint32_t it_insn_with_reg;
14500  unsigned long r_symndx;
14501  asection *isec;
14502  struct elf_nds32_irel_entry *irel_list = NULL;
14503  struct elf_link_hash_entry **sym_hashes = elf_sym_hashes (abfd);
14504  int data_flag, do_replace, save_irel;
14505  struct elf_link_hash_entry_list *h_list;
14506
14507
14508  /* Load section instructions, relocations, and symbol table.  */
14509  if (!nds32_get_section_contents (abfd, sec, &contents)
14510      || !nds32_get_local_syms (abfd, sec, &isym))
14511    return FALSE;
14512  internal_relocs =
14513    _bfd_elf_link_read_relocs (abfd, sec, NULL, NULL, TRUE /* keep_memory */);
14514  irelend = internal_relocs + sec->reloc_count;
14515  symtab_hdr = &elf_tdata (abfd)->symtab_hdr;
14516
14517  off = 0;
14518
14519  /* Check if the object enable ex9.  */
14520  irel = find_relocs_at_address (internal_relocs, internal_relocs,
14521				 irelend, R_NDS32_RELAX_ENTRY);
14522
14523  /* Check this section trigger ex9 relaxation.  */
14524  if (irel == NULL
14525      || irel >= irelend
14526      || ELF32_R_TYPE (irel->r_info) != R_NDS32_RELAX_ENTRY
14527      || (ELF32_R_TYPE (irel->r_info) == R_NDS32_RELAX_ENTRY
14528	  && !(irel->r_addend & R_NDS32_RELAX_ENTRY_EX9_FLAG)))
14529    return TRUE;
14530
14531  irel = internal_relocs;
14532
14533  /* Check alignment and fetch proper relocation.  */
14534  while (off < sec->size)
14535    {
14536      struct elf_link_hash_entry *h = NULL;
14537      struct elf_nds32_irel_entry *irel_ptr = NULL;
14538
14539      /* Syn the instruction and the relocation.  */
14540      while (irel != NULL && irel < irelend && irel->r_offset < off)
14541	irel++;
14542
14543      data_flag = nds32_elf_ex9_relocation_check (info, &irel, irelend,
14544						  relax_blank_list, sec,
14545						  &off, contents);
14546      if (data_flag & PUSH_PRE)
14547	if (!nds32_elf_ex9_push_insn (pre_insn16, contents, pre_off,
14548				      &relax_blank_list, pre_irel_ptr,
14549				      &irel_list))
14550	  return FALSE;
14551
14552      if (data_flag & CLEAN_PRE)
14553	{
14554	  pre_off = 0;
14555	  pre_insn16 = 0;
14556	  pre_irel_ptr = NULL;
14557	}
14558      if (data_flag & DATA_EXIST)
14559	{
14560	  /* We save the move offset in the highest byte.  */
14561	  off += (data_flag >> 24);
14562	  continue;
14563	}
14564
14565      if (*(contents + off) & 0x80)
14566	{
14567	  /* 2-byte instruction.  */
14568	  off += 2;
14569	  continue;
14570	}
14571
14572      /* Load the instruction and its opcode with register for comparing.  */
14573      ex9_insn = ex9_insn_head;
14574      insn = bfd_getb32 (contents + off);
14575      insn_with_reg = 0;
14576      while (ex9_insn)
14577	{
14578	  it_insn = strtol (ex9_insn->string, NULL, 16);
14579	  it_insn_with_reg = 0;
14580	  do_replace = 0;
14581	  save_irel = 0;
14582
14583	  if (irel != NULL && irel < irelend && irel->r_offset == off)
14584	    {
14585	      /* Insn with relocation.  */
14586	      nds32_elf_get_insn_with_reg (irel, insn, &insn_with_reg);
14587
14588	      if (ex9_insn->irel != NULL)
14589		nds32_elf_get_insn_with_reg (ex9_insn->irel, it_insn,
14590					     &it_insn_with_reg);
14591
14592	      if (ex9_insn->irel != NULL
14593		  && (ELF32_R_TYPE (irel->r_info) ==
14594		      ELF32_R_TYPE (ex9_insn->irel->r_info))
14595		  && (insn_with_reg == it_insn_with_reg))
14596		{
14597		  /* Insn relocation and format is the same as table entry.  */
14598
14599		  if (ELF32_R_TYPE (irel->r_info) == R_NDS32_25_PCREL_RELA
14600		      || ELF32_R_TYPE (irel->r_info) == R_NDS32_LO12S0_ORI_RELA
14601		      || ELF32_R_TYPE (irel->r_info) == R_NDS32_LO12S0_RELA
14602		      || ELF32_R_TYPE (irel->r_info) == R_NDS32_LO12S1_RELA
14603		      || ELF32_R_TYPE (irel->r_info) == R_NDS32_LO12S2_RELA
14604		      || (ELF32_R_TYPE (irel->r_info) >= R_NDS32_SDA15S3
14605			  && ELF32_R_TYPE (irel->r_info) <= R_NDS32_SDA15S0)
14606		      || (ELF32_R_TYPE (irel->r_info) >= R_NDS32_SDA15S3_RELA
14607			  && ELF32_R_TYPE (irel->r_info) <= R_NDS32_SDA15S0_RELA)
14608		      || (ELF32_R_TYPE (irel->r_info) >= R_NDS32_SDA12S2_DP_RELA
14609			  && ELF32_R_TYPE (irel->r_info) <=
14610			  R_NDS32_SDA12S2_SP_RELA)
14611		      || (ELF32_R_TYPE (irel->r_info) >= R_NDS32_SDA16S3_RELA
14612			  && ELF32_R_TYPE (irel->r_info) <= R_NDS32_SDA19S0_RELA))
14613		    {
14614		      r_symndx = ELF32_R_SYM (irel->r_info);
14615		      if (r_symndx < symtab_hdr->sh_info)
14616			{
14617			  /* Local symbol.  */
14618			  int shndx = isym[r_symndx].st_shndx;
14619
14620			  isec = elf_elfsections (abfd)[shndx]->bfd_section;
14621			  if (ex9_insn->sec == isec
14622			      && ex9_insn->irel->r_addend == irel->r_addend
14623			      && ex9_insn->irel->r_info == irel->r_info)
14624			    {
14625			      do_replace = 1;
14626			      save_irel = 1;
14627			    }
14628			}
14629		      else
14630			{
14631			  /* External symbol.  */
14632			  h = sym_hashes[r_symndx - symtab_hdr->sh_info];
14633			  if (ex9_insn->m_list)
14634			    {
14635			      h_list = ex9_insn->m_list->h_list;
14636			      while (h_list)
14637				{
14638				  if (h == h_list->h
14639				      && (ex9_insn->m_list->irel->r_addend ==
14640					  irel->r_addend))
14641				    {
14642				      do_replace = 1;
14643				      save_irel = 1;
14644				      break;
14645				    }
14646				  h_list = h_list->next;
14647				}
14648			    }
14649			}
14650		    }
14651		  else if (ELF32_R_TYPE (irel->r_info) == R_NDS32_HI20_RELA)
14652		    {
14653		      r_symndx = ELF32_R_SYM (irel->r_info);
14654		      if (r_symndx < symtab_hdr->sh_info)
14655			{
14656			  /* Local symbols.  Compare its base symbol and offset.  */
14657			  int shndx = isym[r_symndx].st_shndx;
14658
14659			  isec = elf_elfsections (abfd)[shndx]->bfd_section;
14660			  if (ex9_insn->sec == isec
14661			      && ex9_insn->irel->r_addend == irel->r_addend
14662			      && ex9_insn->irel->r_info == irel->r_info)
14663			    {
14664			      do_replace = 1;
14665			      save_irel = 1;
14666			    }
14667			}
14668		      else
14669			{
14670			  /* External symbol.  */
14671			  struct elf_link_hash_entry_mul_list *m_list;
14672
14673			  h = sym_hashes[r_symndx - symtab_hdr->sh_info];
14674			  m_list = ex9_insn->m_list;
14675
14676			  while (m_list)
14677			    {
14678			      h_list = m_list->h_list;
14679
14680			      while (h_list)
14681				{
14682				  if (h == h_list->h
14683				      && (m_list->irel->r_addend
14684					  == irel->r_addend))
14685				    {
14686				      do_replace = 1;
14687				      save_irel = 1;
14688				      if (ex9_insn->next
14689					  && ex9_insn->m_list
14690					  && ex9_insn->m_list == ex9_insn->next->m_list)
14691					{
14692					  /* sethi multiple entry must be fixed */
14693					  nds32_elf_ex9_insert_fix (sec, irel,
14694								    h, ex9_insn->order);
14695					}
14696				      break;
14697				    }
14698				  h_list = h_list->next;
14699				}
14700			      m_list = m_list->next;
14701			    }
14702			}
14703		    }
14704		}
14705
14706	      /* Import table: Check the symbol hash table and the
14707		 jump target.  Only R_NDS32_25_PCREL_RELA now.  */
14708	      else if (ex9_insn->times == -1
14709		       && ELF32_R_TYPE (irel->r_info) == R_NDS32_25_PCREL_RELA)
14710		{
14711		  nds32_elf_get_insn_with_reg (irel, it_insn, &it_insn_with_reg);
14712		  if (insn_with_reg == it_insn_with_reg)
14713		    {
14714		      char code[10];
14715		      bfd_vma relocation;
14716
14717		      r_symndx = ELF32_R_SYM (irel->r_info);
14718		      if (r_symndx >= symtab_hdr->sh_info)
14719			{
14720			  h = sym_hashes[r_symndx - symtab_hdr->sh_info];
14721			  if ((h->root.type == bfd_link_hash_defined
14722			       || h->root.type == bfd_link_hash_defweak)
14723			      && h->root.u.def.section != NULL
14724			      && h->root.u.def.section->output_section != NULL
14725			      && h->root.u.def.section->gc_mark == 1
14726			      && bfd_is_abs_section (h->root.u.def.section)
14727			      && h->root.u.def.value > sec->size)
14728			    {
14729			      relocation = h->root.u.def.value +
14730				h->root.u.def.section->output_section->vma +
14731				h->root.u.def.section->output_offset;
14732			      relocation += irel->r_addend;
14733			      insn = insn_with_reg
14734				| ((relocation >> 1) & 0xffffff);
14735			      snprintf (code, sizeof (code), "%08x", insn);
14736			      if (strcmp (code, ex9_insn->string) == 0)
14737				{
14738				  do_replace = 1;
14739				  save_irel = 1;
14740				}
14741			    }
14742			}
14743		    }
14744		}
14745	      else if (ELF32_R_TYPE (irel->r_info) == R_NDS32_RELAX_REGION_BEGIN
14746		       || ELF32_R_TYPE (irel->r_info) == R_NDS32_RELAX_REGION_END
14747		       || ELF32_R_TYPE (irel->r_info) == R_NDS32_NONE)
14748		{
14749		  /* These relocations do not have to relocate contens, so it can
14750		     be regard as instruction without relocation.  */
14751		  if (insn == it_insn && ex9_insn->irel == NULL)
14752		    do_replace = 1;
14753		}
14754	    }
14755	  else
14756	    {
14757	      /* Instruction without relocation, we only
14758		 have to compare their byte code.  */
14759	      if (insn == it_insn && ex9_insn->irel == NULL)
14760		do_replace = 1;
14761	    }
14762
14763	  /* Insntruction match so replacing the code here.  */
14764	  if (do_replace == 1)
14765	    {
14766	      /* There are two formats of ex9 instruction.  */
14767	      if (ex9_insn->order < 32)
14768		insn_ex9 = INSN_EX9_IT_2;
14769	      else
14770		insn_ex9 = INSN_EX9_IT_1;
14771	      insn16 = insn_ex9 | ex9_insn->order;
14772
14773	      /* Insert ex9 instruction.  */
14774	      nds32_elf_ex9_push_insn (pre_insn16, contents, pre_off,
14775				       &relax_blank_list, pre_irel_ptr,
14776				       &irel_list);
14777	      pre_off = off;
14778	      pre_insn16 = insn16;
14779
14780	      if (save_irel)
14781		{
14782		  /* For instuction with relocation do relax.  */
14783		  irel_ptr = (struct elf_nds32_irel_entry *)
14784		    bfd_malloc (sizeof (struct elf_nds32_irel_entry));
14785		  irel_ptr->irel = irel;
14786		  irel_ptr->next = NULL;
14787		  pre_irel_ptr = irel_ptr;
14788		}
14789	      else
14790		pre_irel_ptr = NULL;
14791	      break;
14792	    }
14793	  ex9_insn = ex9_insn->next;
14794	}
14795      off += 4;
14796    }
14797
14798  /* Insert ex9 instruction.  */
14799  nds32_elf_ex9_push_insn (pre_insn16, contents, pre_off,
14800			   &relax_blank_list, pre_irel_ptr,
14801			   &irel_list);
14802
14803  /* Delete the redundant code.  */
14804  if (relax_blank_list)
14805    {
14806      nds32_elf_relax_delete_blanks (abfd, sec, relax_blank_list);
14807      relax_blank_list = NULL;
14808    }
14809
14810  /* Clear the relocation that is replaced by ex9.  */
14811  while (irel_list)
14812    {
14813      struct elf_nds32_irel_entry *irel_ptr;
14814
14815      irel_ptr = irel_list;
14816      irel_list = irel_ptr->next;
14817      irel_ptr->irel->r_info =
14818	ELF32_R_INFO (ELF32_R_SYM (irel_ptr->irel->r_info), R_NDS32_TRAN);
14819      free (irel_ptr);
14820    }
14821  return TRUE;
14822}
14823
14824/* Initialize ex9 hash table.  */
14825
14826int
14827nds32_elf_ex9_init (void)
14828{
14829  if (!bfd_hash_table_init_n (&ex9_code_table, nds32_elf_code_hash_newfunc,
14830			      sizeof (struct elf_nds32_code_hash_entry),
14831			      1023))
14832    {
14833      (*_bfd_error_handler) (_("Linker: cannot init ex9 hash table error \n"));
14834      return FALSE;
14835    }
14836  return TRUE;
14837}
14838
14839/* Predict how many bytes will be relaxed with ex9 and ifc.  */
14840
14841static void
14842nds32_elf_ex9_total_relax (struct bfd_link_info *info)
14843{
14844  struct elf_nds32_insn_times_entry *ex9_insn;
14845  struct elf_nds32_insn_times_entry *temp;
14846  int target_optimize;
14847  struct elf_nds32_link_hash_table *table;
14848
14849  if (ex9_insn_head == NULL)
14850    return;
14851
14852  table = nds32_elf_hash_table (info);
14853  target_optimize  = table->target_optimize;
14854  ex9_insn = ex9_insn_head;
14855  while (ex9_insn)
14856    {
14857      ex9_relax_size = ex9_insn->times * 2 + ex9_relax_size;
14858      temp = ex9_insn;
14859      ex9_insn = ex9_insn->next;
14860      free (temp);
14861    }
14862  ex9_insn_head = NULL;
14863
14864  if ((target_optimize & NDS32_RELAX_JUMP_IFC_ON))
14865    {
14866      /* Examine ifc reduce size.  */
14867      struct elf_nds32_ifc_symbol_entry *ifc_ent = ifc_symbol_head;
14868      struct elf_nds32_ifc_irel_list *irel_ptr = NULL;
14869      int size = 0;
14870
14871      while (ifc_ent)
14872	{
14873	  if (ifc_ent->enable == 0)
14874	    {
14875	      /* Not ifc yet.  */
14876	      irel_ptr = ifc_ent->irel_head;
14877	      while (irel_ptr)
14878		{
14879		  size += 2;
14880		  irel_ptr = irel_ptr->next;
14881		}
14882	    }
14883	  size -= 2;
14884	  ifc_ent = ifc_ent->next;
14885	}
14886      ex9_relax_size += size;
14887    }
14888}
14889
14890/* Finish ex9 table.  */
14891
14892void
14893nds32_elf_ex9_finish (struct bfd_link_info *link_info)
14894{
14895  nds32_elf_code_hash_traverse (nds32_elf_examine_insn_times);
14896  nds32_elf_order_insn_times (link_info);
14897  nds32_elf_ex9_total_relax (link_info);
14898  /* Traverse the hash table and count its times.  */
14899  nds32_elf_code_hash_traverse (nds32_elf_count_insn_times);
14900  nds32_elf_order_insn_times (link_info);
14901  nds32_elf_ex9_build_itable (link_info);
14902}
14903
14904/* Relocate the entries in ex9 table.  */
14905
14906static bfd_vma
14907nds32_elf_ex9_reloc_insn (struct elf_nds32_insn_times_entry *ptr,
14908			  struct bfd_link_info *link_info)
14909{
14910  Elf_Internal_Sym *isym = NULL;
14911  bfd_vma relocation = -1;
14912  struct elf_link_hash_entry *h;
14913
14914  if (ptr->m_list != NULL)
14915    {
14916      /* Global symbol.  */
14917      h = ptr->m_list->h_list->h;
14918      if ((h->root.type == bfd_link_hash_defined
14919	   || h->root.type == bfd_link_hash_defweak)
14920	  && h->root.u.def.section != NULL
14921	  && h->root.u.def.section->output_section != NULL)
14922	{
14923
14924	  relocation = h->root.u.def.value +
14925	    h->root.u.def.section->output_section->vma +
14926	    h->root.u.def.section->output_offset;
14927	  relocation += ptr->m_list->irel->r_addend;
14928	}
14929      else
14930	relocation = 0;
14931    }
14932  else if (ptr->sec !=NULL)
14933    {
14934      /* Local symbol.  */
14935      Elf_Internal_Sym sym;
14936      asection *sec = NULL;
14937      asection isec;
14938      asection *isec_ptr = &isec;
14939      Elf_Internal_Rela irel_backup = *(ptr->irel);
14940      asection *sec_backup = ptr->sec;
14941      bfd *abfd = ptr->sec->owner;
14942
14943      if (!nds32_get_local_syms (abfd, sec, &isym))
14944	return FALSE;
14945      isym = isym + ELF32_R_SYM (ptr->irel->r_info);
14946
14947      sec = bfd_section_from_elf_index (abfd, isym->st_shndx);
14948      if (sec != NULL)
14949	*isec_ptr = *sec;
14950      sym = *isym;
14951
14952      /* The purpose is same as elf_link_input_bfd.  */
14953      if (isec_ptr != NULL
14954	  && isec_ptr->sec_info_type == SEC_INFO_TYPE_MERGE
14955	  && ELF_ST_TYPE (isym->st_info) != STT_SECTION)
14956	{
14957	  sym.st_value =
14958	    _bfd_merged_section_offset (ptr->sec->output_section->owner, &isec_ptr,
14959					elf_section_data (isec_ptr)->sec_info,
14960					isym->st_value);
14961	}
14962      relocation = _bfd_elf_rela_local_sym (link_info->output_bfd, &sym,
14963					    &ptr->sec, ptr->irel);
14964      if (ptr->irel != NULL)
14965	relocation += ptr->irel->r_addend;
14966
14967      /* Restore origin value since there may be some insntructions that
14968	 could not be replaced with ex9.it.  */
14969      *(ptr->irel) = irel_backup;
14970      ptr->sec = sec_backup;
14971    }
14972
14973  return relocation;
14974}
14975
14976/* Import ex9 table and build list.  */
14977
14978void
14979nds32_elf_ex9_import_table (struct bfd_link_info *info)
14980{
14981  int num = 0;
14982  bfd_byte *contents;
14983  unsigned long insn;
14984  FILE *ex9_import_file;
14985  int update_ex9_table;
14986  struct elf_nds32_link_hash_table *table;
14987
14988  table = nds32_elf_hash_table (info);
14989  ex9_import_file = table->ex9_import_file;
14990  rewind (table->ex9_import_file);
14991
14992  contents = bfd_malloc (sizeof (bfd_byte) * 4);
14993
14994  /* Read instructions from the input file and build the list.  */
14995  while (!feof (ex9_import_file))
14996    {
14997      char *code;
14998      struct elf_nds32_insn_times_entry *ptr;
14999      size_t nread;
15000
15001      nread = fread (contents, sizeof (bfd_byte) * 4, 1, ex9_import_file);
15002      /* Ignore the final byte 0x0a.  */
15003      if (nread < 1)
15004	break;
15005      insn = bfd_getb32 (contents);
15006      code = bfd_malloc (sizeof (char) * 9);
15007      snprintf (code, 9, "%08lx", insn);
15008      ptr = bfd_malloc (sizeof (struct elf_nds32_insn_times_entry));
15009      ptr->string = code;
15010      ptr->order = num;
15011      ptr->times = -1;
15012      ptr->sec = NULL;
15013      ptr->m_list = NULL;
15014      ptr->rel_backup.r_offset = 0;
15015      ptr->rel_backup.r_info = 0;
15016      ptr->rel_backup.r_addend = 0;
15017      ptr->irel = NULL;
15018      ptr->next = NULL;
15019      nds32_elf_ex9_insert_entry (ptr);
15020      num++;
15021    }
15022
15023  update_ex9_table = table->update_ex9_table;
15024  if (update_ex9_table == 1)
15025    {
15026      /* It has to consider of sethi need to use multiple page
15027	 but it not be done yet.  */
15028      nds32_elf_code_hash_traverse (nds32_elf_examine_insn_times);
15029      nds32_elf_order_insn_times (info);
15030    }
15031}
15032
15033/* Export ex9 table.  */
15034
15035static void
15036nds32_elf_ex9_export (struct bfd_link_info *info,
15037		      bfd_byte *contents, int size)
15038{
15039  FILE *ex9_export_file;
15040  struct elf_nds32_link_hash_table *table;
15041
15042  table = nds32_elf_hash_table (info);
15043  ex9_export_file = table->ex9_export_file;
15044  fwrite (contents, sizeof (bfd_byte), size, ex9_export_file);
15045  fclose (ex9_export_file);
15046}
15047
15048/* Adjust relocations of J and JAL in ex9.itable.
15049   Export ex9 table.  */
15050
15051static void
15052nds32_elf_ex9_reloc_jmp (struct bfd_link_info *link_info)
15053{
15054  asection *table_sec = NULL;
15055  struct elf_nds32_insn_times_entry *ex9_insn = ex9_insn_head;
15056  struct elf_nds32_insn_times_entry *temp_ptr, *temp_ptr2;
15057  bfd *it_abfd;
15058  uint32_t insn, insn_with_reg, source_insn;
15059  bfd_byte *contents = NULL, *source_contents = NULL;
15060  int size = 0;
15061  bfd_vma gp;
15062  int shift, update_ex9_table, offset = 0;
15063  reloc_howto_type *howto = NULL;
15064  Elf_Internal_Rela rel_backup;
15065  unsigned short insn_ex9;
15066  struct elf_nds32_link_hash_table *table;
15067  FILE *ex9_export_file;
15068  static bfd_boolean done = FALSE;
15069
15070  if (done)
15071    return;
15072
15073  done = TRUE;
15074
15075  table = nds32_elf_hash_table (link_info);
15076  if (table)
15077    table->relax_status |= NDS32_RELAX_EX9_DONE;
15078
15079
15080  update_ex9_table = table->update_ex9_table;
15081  /* Generated ex9.itable exactly.  */
15082  if (update_ex9_table == 0)
15083    {
15084      for (it_abfd = link_info->input_bfds; it_abfd != NULL;
15085	   it_abfd = it_abfd->link.next)
15086	{
15087	  table_sec = bfd_get_section_by_name (it_abfd, ".ex9.itable");
15088	  if (table_sec != NULL)
15089	    break;
15090	}
15091
15092      if (table_sec != NULL)
15093	{
15094	  bfd *output_bfd;
15095
15096	  output_bfd = table_sec->output_section->owner;
15097	  nds32_elf_final_sda_base (output_bfd, link_info, &gp, FALSE);
15098	  if (table_sec->size == 0)
15099	    return;
15100
15101	  if (!nds32_get_section_contents (it_abfd, table_sec, &contents))
15102	    return;
15103	}
15104    }
15105  else
15106    {
15107      /* Set gp.  */
15108      bfd *output_bfd;
15109
15110      output_bfd = link_info->input_bfds->sections->output_section->owner;
15111      nds32_elf_final_sda_base (output_bfd, link_info, &gp, FALSE);
15112      contents = bfd_malloc (sizeof (bfd_byte) * 2048);
15113    }
15114
15115  /* Relocate instruction.  */
15116  while (ex9_insn)
15117    {
15118      bfd_vma relocation, min_relocation = 0xffffffff;
15119
15120      insn = strtol (ex9_insn->string, NULL, 16);
15121      insn_with_reg = 0;
15122      if (ex9_insn->m_list != NULL || ex9_insn->sec != NULL)
15123	{
15124	  if (ex9_insn->m_list)
15125	    rel_backup = ex9_insn->m_list->rel_backup;
15126	  else
15127	    rel_backup = ex9_insn->rel_backup;
15128
15129	  nds32_elf_get_insn_with_reg (&rel_backup, insn, &insn_with_reg);
15130	  howto =
15131	    bfd_elf32_bfd_reloc_type_table_lookup (ELF32_R_TYPE
15132						   (rel_backup.r_info));
15133	  shift = howto->rightshift;
15134	  if (ELF32_R_TYPE (rel_backup.r_info) == R_NDS32_25_PCREL_RELA
15135	      || ELF32_R_TYPE (rel_backup.r_info) == R_NDS32_LO12S0_ORI_RELA
15136	      || ELF32_R_TYPE (rel_backup.r_info) == R_NDS32_LO12S0_RELA
15137	      || ELF32_R_TYPE (rel_backup.r_info) == R_NDS32_LO12S1_RELA
15138	      || ELF32_R_TYPE (rel_backup.r_info) == R_NDS32_LO12S2_RELA)
15139	    {
15140	      relocation = nds32_elf_ex9_reloc_insn (ex9_insn, link_info);
15141	      insn =
15142		insn_with_reg | ((relocation >> shift) &
15143				 nds32_elf_irel_mask (&rel_backup));
15144	      bfd_putb32 (insn, contents + (ex9_insn->order) * 4);
15145	    }
15146	  else if ((ELF32_R_TYPE (rel_backup.r_info) >= R_NDS32_SDA15S3
15147		    && ELF32_R_TYPE (rel_backup.r_info) <= R_NDS32_SDA15S0)
15148		   || (ELF32_R_TYPE (rel_backup.r_info) >= R_NDS32_SDA15S3_RELA
15149		       && ELF32_R_TYPE (rel_backup.r_info) <= R_NDS32_SDA15S0_RELA)
15150		   || (ELF32_R_TYPE (rel_backup.r_info) >= R_NDS32_SDA12S2_DP_RELA
15151		       && ELF32_R_TYPE (rel_backup.r_info) <= R_NDS32_SDA12S2_SP_RELA)
15152		   || (ELF32_R_TYPE (rel_backup.r_info) >= R_NDS32_SDA16S3_RELA
15153		       && ELF32_R_TYPE (rel_backup.r_info) <= R_NDS32_SDA19S0_RELA))
15154	    {
15155	      relocation = nds32_elf_ex9_reloc_insn (ex9_insn, link_info);
15156	      insn =
15157		insn_with_reg | (((relocation - gp) >> shift) &
15158				 nds32_elf_irel_mask (&rel_backup));
15159	      bfd_putb32 (insn, contents + (ex9_insn->order) * 4);
15160	    }
15161	  else if (ELF32_R_TYPE (rel_backup.r_info) == R_NDS32_HI20_RELA)
15162	    {
15163	      /* Sethi may be multiple entry for one insn.  */
15164	      if (ex9_insn->next && ex9_insn->m_list
15165		  && ex9_insn->m_list == ex9_insn->next->m_list)
15166		{
15167		  struct elf_link_hash_entry_mul_list *m_list;
15168		  struct elf_nds32_ex9_refix *fix_ptr;
15169		  struct elf_link_hash_entry *h;
15170
15171		  temp_ptr = ex9_insn;
15172		  temp_ptr2 = ex9_insn;
15173		  m_list = ex9_insn->m_list;
15174		  while (m_list)
15175		    {
15176		      h = m_list->h_list->h;
15177		      relocation = h->root.u.def.value +
15178			h->root.u.def.section->output_section->vma +
15179			h->root.u.def.section->output_offset;
15180		      relocation += m_list->irel->r_addend;
15181
15182		      if (relocation < min_relocation)
15183			min_relocation = relocation;
15184		      m_list = m_list->next;
15185		    }
15186		  relocation = min_relocation;
15187
15188		  /* Put insntruction into ex9 table.  */
15189		  insn = insn_with_reg
15190		    | ((relocation >> shift) & nds32_elf_irel_mask (&rel_backup));
15191		  bfd_putb32 (insn, contents + (ex9_insn->order) * 4);
15192		  relocation = relocation + 0x1000;	/* hi20 */
15193
15194		  while (ex9_insn->next && ex9_insn->m_list
15195			 && ex9_insn->m_list == ex9_insn->next->m_list)
15196		    {
15197		      /* Multiple sethi.  */
15198		      ex9_insn = ex9_insn->next;
15199		      size += 4;
15200		      insn =
15201			insn_with_reg | ((relocation >> shift) &
15202					 nds32_elf_irel_mask (&rel_backup));
15203		      bfd_putb32 (insn, contents + (ex9_insn->order) * 4);
15204		      relocation = relocation + 0x1000;	/* hi20 */
15205		    }
15206
15207		  fix_ptr = ex9_refix_head;
15208		  while (fix_ptr)
15209		    {
15210		      /* Fix ex9 insn.  */
15211		      /* temp_ptr2 points to the head of multiple sethi.  */
15212		      temp_ptr = temp_ptr2;
15213		      while (fix_ptr->order != temp_ptr->order && fix_ptr->next)
15214			{
15215			  fix_ptr = fix_ptr->next;
15216			}
15217		      if (fix_ptr->order != temp_ptr->order)
15218			break;
15219
15220		      /* Set source insn.  */
15221		      relocation =
15222			fix_ptr->h->root.u.def.value +
15223			fix_ptr->h->root.u.def.section->output_section->vma +
15224			fix_ptr->h->root.u.def.section->output_offset;
15225		      relocation += fix_ptr->irel->r_addend;
15226		      /* sethi imm is imm20s.  */
15227		      source_insn = insn_with_reg | ((relocation >> shift) & 0xfffff);
15228
15229		      while (temp_ptr)
15230			{
15231			  /* Match entry and source code.  */
15232			  insn = bfd_getb32 (contents + (temp_ptr->order) * 4 + offset);
15233			  if (insn == source_insn)
15234			    {
15235			      /* Fix the ex9 insn.  */
15236			      if (temp_ptr->order != fix_ptr->order)
15237				{
15238				  if (!nds32_get_section_contents
15239					 (fix_ptr->sec->owner, fix_ptr->sec,
15240					  &source_contents))
15241				    (*_bfd_error_handler)
15242				      (_("Linker: error cannot fixed ex9 relocation \n"));
15243				  if (temp_ptr->order < 32)
15244				    insn_ex9 = INSN_EX9_IT_2;
15245				  else
15246				    insn_ex9 = INSN_EX9_IT_1;
15247				  insn_ex9 = insn_ex9 | temp_ptr->order;
15248				  bfd_putb16 (insn_ex9, source_contents + fix_ptr->irel->r_offset);
15249				}
15250				break;
15251			    }
15252			  else
15253			    {
15254			      if (!temp_ptr->next || temp_ptr->m_list != temp_ptr->next->m_list)
15255				(*_bfd_error_handler)
15256				  (_("Linker: error cannot fixed ex9 relocation \n"));
15257			      else
15258				temp_ptr = temp_ptr->next;
15259			    }
15260			}
15261		      fix_ptr = fix_ptr->next;
15262		    }
15263		}
15264	      else
15265		{
15266		  relocation = nds32_elf_ex9_reloc_insn (ex9_insn, link_info);
15267		  insn = insn_with_reg
15268			 | ((relocation >> shift) & nds32_elf_irel_mask (&rel_backup));
15269		  bfd_putb32 (insn, contents + (ex9_insn->order) * 4);
15270		}
15271	    }
15272	}
15273      else
15274	{
15275	  /* Insn without relocation does not have to be fixed
15276	     if need to update export table.  */
15277	  if (update_ex9_table == 1)
15278	    bfd_putb32 (insn, contents + (ex9_insn->order) * 4);
15279	}
15280      ex9_insn = ex9_insn->next;
15281      size += 4;
15282    }
15283
15284  ex9_export_file = table->ex9_export_file;
15285  if (ex9_export_file != NULL)
15286    nds32_elf_ex9_export (link_info, contents, table_sec->size);
15287  else if (update_ex9_table == 1)
15288    {
15289      table->ex9_export_file = table->ex9_import_file;
15290      rewind (table->ex9_export_file);
15291      nds32_elf_ex9_export (link_info, contents, size);
15292    }
15293}
15294
15295/* Generate ex9 hash table.  */
15296
15297static bfd_boolean
15298nds32_elf_ex9_build_hash_table (bfd *abfd, asection *sec,
15299				struct bfd_link_info *link_info)
15300{
15301  Elf_Internal_Rela *internal_relocs;
15302  Elf_Internal_Rela *irelend;
15303  Elf_Internal_Rela *irel;
15304  Elf_Internal_Rela *jrel;
15305  Elf_Internal_Rela rel_backup;
15306  Elf_Internal_Shdr *symtab_hdr;
15307  Elf_Internal_Sym *isym = NULL;
15308  asection *isec;
15309  struct elf_link_hash_entry **sym_hashes;
15310  bfd_byte *contents = NULL;
15311  bfd_vma off = 0;
15312  unsigned long r_symndx;
15313  uint32_t insn, insn_with_reg;
15314  struct elf_link_hash_entry *h;
15315  int data_flag, shift, align;
15316  bfd_vma relocation;
15317  /* Suppress ex9 if `.no_relax ex9' or inner loop.  */
15318  reloc_howto_type *howto = NULL;
15319
15320  sym_hashes = elf_sym_hashes (abfd);
15321  /* Load section instructions, relocations, and symbol table.  */
15322  if (!nds32_get_section_contents (abfd, sec, &contents))
15323    return FALSE;
15324
15325  internal_relocs = _bfd_elf_link_read_relocs (abfd, sec, NULL, NULL,
15326					       TRUE /* keep_memory */);
15327  irelend = internal_relocs + sec->reloc_count;
15328  symtab_hdr = &elf_tdata (abfd)->symtab_hdr;
15329  if (!nds32_get_local_syms (abfd, sec, &isym))
15330    return FALSE;
15331
15332  /* Check the object if enable ex9.  */
15333  irel = find_relocs_at_address (internal_relocs, internal_relocs, irelend,
15334				 R_NDS32_RELAX_ENTRY);
15335
15336  /* Check this section trigger ex9 relaxation.  */
15337  if (irel == NULL
15338      || irel >= irelend
15339      || ELF32_R_TYPE (irel->r_info) != R_NDS32_RELAX_ENTRY
15340      || (ELF32_R_TYPE (irel->r_info) == R_NDS32_RELAX_ENTRY
15341	  && !(irel->r_addend & R_NDS32_RELAX_ENTRY_EX9_FLAG)))
15342    return TRUE;
15343
15344  irel = internal_relocs;
15345
15346  /* Push each insn into hash table.  */
15347  while (off < sec->size)
15348    {
15349      char code[10];
15350      struct elf_nds32_code_hash_entry *entry;
15351
15352      while (irel != NULL && irel < irelend && irel->r_offset < off)
15353	irel++;
15354
15355      data_flag = nds32_elf_ex9_relocation_check (link_info, &irel, irelend,
15356						  NULL, sec, &off, contents);
15357      if (data_flag & DATA_EXIST)
15358	{
15359	  /* We save the move offset in the highest byte.  */
15360	  off += (data_flag >> 24);
15361	  continue;
15362	}
15363
15364      if (*(contents + off) & 0x80)
15365	{
15366	  off += 2;
15367	}
15368      else
15369	{
15370	  h = NULL;
15371	  isec = NULL;
15372	  jrel = NULL;
15373	  rel_backup.r_info = 0;
15374	  rel_backup.r_offset = 0;
15375	  rel_backup.r_addend = 0;
15376	  /* Load the instruction and its opcode with register for comparing.  */
15377	  insn = bfd_getb32 (contents + off);
15378	  insn_with_reg = 0;
15379	  if (irel != NULL && irel < irelend && irel->r_offset == off)
15380	    {
15381	      nds32_elf_get_insn_with_reg (irel, insn, &insn_with_reg);
15382	      howto = bfd_elf32_bfd_reloc_type_table_lookup (ELF32_R_TYPE (irel->r_info));
15383	      shift = howto->rightshift;
15384	      align = (1 << shift) - 1;
15385	      if (ELF32_R_TYPE (irel->r_info) == R_NDS32_25_PCREL_RELA
15386		  || ELF32_R_TYPE (irel->r_info) == R_NDS32_HI20_RELA
15387		  || ELF32_R_TYPE (irel->r_info) == R_NDS32_LO12S0_ORI_RELA
15388		  || ELF32_R_TYPE (irel->r_info) == R_NDS32_LO12S0_RELA
15389		  || ELF32_R_TYPE (irel->r_info) == R_NDS32_LO12S1_RELA
15390		  || ELF32_R_TYPE (irel->r_info) == R_NDS32_LO12S2_RELA
15391		  ||(ELF32_R_TYPE (irel->r_info) >= R_NDS32_SDA15S3
15392		     && ELF32_R_TYPE (irel->r_info) <= R_NDS32_SDA15S0)
15393		  || (ELF32_R_TYPE (irel->r_info) >= R_NDS32_SDA15S3_RELA
15394		      && ELF32_R_TYPE (irel->r_info) <= R_NDS32_SDA15S0_RELA)
15395		  || (ELF32_R_TYPE (irel->r_info) >= R_NDS32_SDA12S2_DP_RELA
15396		      && ELF32_R_TYPE (irel->r_info) <= R_NDS32_SDA12S2_SP_RELA)
15397		  || (ELF32_R_TYPE (irel->r_info) >= R_NDS32_SDA16S3_RELA
15398		      && ELF32_R_TYPE (irel->r_info) <= R_NDS32_SDA19S0_RELA))
15399		{
15400		  r_symndx = ELF32_R_SYM (irel->r_info);
15401		  jrel = irel;
15402		  rel_backup = *irel;
15403		  if (r_symndx < symtab_hdr->sh_info)
15404		    {
15405		      /* Local symbol.  */
15406		      int shndx = isym[r_symndx].st_shndx;
15407
15408		      bfd_vma st_value = (isym + r_symndx)->st_value;
15409		      isec = elf_elfsections (abfd)[shndx]->bfd_section;
15410		      relocation = (isec->output_section->vma + isec->output_offset
15411				    + st_value + irel->r_addend);
15412		    }
15413		  else
15414		    {
15415		      /* External symbol.  */
15416		      bfd_boolean warned ATTRIBUTE_UNUSED;
15417		      bfd_boolean ignored ATTRIBUTE_UNUSED;
15418		      bfd_boolean unresolved_reloc ATTRIBUTE_UNUSED;
15419		      asection *sym_sec;
15420
15421		      /* Maybe there is a better way to get h and relocation */
15422		      RELOC_FOR_GLOBAL_SYMBOL (link_info, abfd, sec, irel,
15423					       r_symndx, symtab_hdr, sym_hashes,
15424					       h, sym_sec, relocation,
15425					       unresolved_reloc, warned, ignored);
15426		      relocation += irel->r_addend;
15427		      if ((h->root.type != bfd_link_hash_defined
15428			   && h->root.type != bfd_link_hash_defweak)
15429			  || strcmp (h->root.root.string, "_FP_BASE_") == 0)
15430			{
15431			  off += 4;
15432			  continue;
15433			}
15434		    }
15435
15436		  /* Check for gp relative instruction alignment.  */
15437		  if ((ELF32_R_TYPE (irel->r_info) >= R_NDS32_SDA15S3
15438		       && ELF32_R_TYPE (irel->r_info) <= R_NDS32_SDA15S0)
15439		      || (ELF32_R_TYPE (irel->r_info) >= R_NDS32_SDA15S3_RELA
15440			  && ELF32_R_TYPE (irel->r_info) <= R_NDS32_SDA15S0_RELA)
15441		      || (ELF32_R_TYPE (irel->r_info) >= R_NDS32_SDA12S2_DP_RELA
15442			  && ELF32_R_TYPE (irel->r_info) <= R_NDS32_SDA12S2_SP_RELA)
15443		      || (ELF32_R_TYPE (irel->r_info) >= R_NDS32_SDA16S3_RELA
15444			  && ELF32_R_TYPE (irel->r_info) <= R_NDS32_SDA19S0_RELA))
15445		    {
15446		      bfd_vma gp;
15447		      bfd *output_bfd = sec->output_section->owner;
15448		      bfd_reloc_status_type r;
15449
15450		      /* If the symbol is in the abs section, the out_bfd will be null.
15451			 This happens when the relocation has a symbol@GOTOFF.  */
15452		      r = nds32_elf_final_sda_base (output_bfd, link_info, &gp, FALSE);
15453		      if (r != bfd_reloc_ok)
15454			{
15455			  off += 4;
15456			  continue;
15457			}
15458
15459		      relocation -= gp;
15460
15461		      /* Make sure alignment is correct.  */
15462		      if (relocation & align)
15463			{
15464			  /* Incorrect alignment.  */
15465			  (*_bfd_error_handler)
15466			    (_("%s: warning: unaligned small data access. "
15467			       "For entry: {%d, %d, %d}, addr = 0x%x, align = 0x%x."),
15468			     bfd_get_filename (abfd), irel->r_offset,
15469			     irel->r_info, irel->r_addend, relocation, align);
15470			  off += 4;
15471			  continue;
15472			}
15473		    }
15474
15475		  insn = insn_with_reg
15476		    | ((relocation >> shift) & nds32_elf_irel_mask (irel));
15477		}
15478	      else if (ELF32_R_TYPE (irel->r_info) == R_NDS32_RELAX_REGION_BEGIN
15479		       || ELF32_R_TYPE (irel->r_info) == R_NDS32_RELAX_REGION_END
15480		       || ELF32_R_TYPE (irel->r_info) == R_NDS32_NONE)
15481		{
15482		  /* These relocations do not have to relocate contens, so it can
15483		     be regard as instruction without relocation.  */
15484		}
15485	      else
15486		{
15487		  off += 4;
15488		  continue;
15489		}
15490	    }
15491
15492	  snprintf (code, sizeof (code), "%08x", insn);
15493	  /* Copy "code".  */
15494	  entry = (struct elf_nds32_code_hash_entry*)
15495	    bfd_hash_lookup (&ex9_code_table, code, TRUE, TRUE);
15496	  if (entry == NULL)
15497	    {
15498	      (*_bfd_error_handler)
15499		(_("%P%F: failed creating ex9.it %s hash table: %E\n"), code);
15500	      return FALSE;
15501	    }
15502	  if (h)
15503	    {
15504	      if (h->root.type == bfd_link_hash_undefined)
15505		return TRUE;
15506	      /* Global symbol.  */
15507	      /* In order to do sethi with different symbol but same value.  */
15508	      if (entry->m_list == NULL)
15509		{
15510		  struct elf_link_hash_entry_mul_list *m_list_new;
15511		  struct elf_link_hash_entry_list *h_list_new;
15512
15513		  m_list_new = (struct elf_link_hash_entry_mul_list *)
15514		    bfd_malloc (sizeof (struct elf_link_hash_entry_mul_list));
15515		  h_list_new = (struct elf_link_hash_entry_list *)
15516		    bfd_malloc (sizeof (struct elf_link_hash_entry_list));
15517		  entry->m_list = m_list_new;
15518		  m_list_new->h_list = h_list_new;
15519		  m_list_new->rel_backup = rel_backup;
15520		  m_list_new->times = 1;
15521		  m_list_new->irel = jrel;
15522		  m_list_new->next = NULL;
15523		  h_list_new->h = h;
15524		  h_list_new->next = NULL;
15525		}
15526	      else
15527		{
15528		  struct elf_link_hash_entry_mul_list *m_list = entry->m_list;
15529		  struct elf_link_hash_entry_list *h_list;
15530
15531		  while (m_list)
15532		    {
15533		      /* Build the different symbols that point to the same address.  */
15534		      h_list = m_list->h_list;
15535		      if (h_list->h->root.u.def.value == h->root.u.def.value
15536			  && h_list->h->root.u.def.section->output_section->vma
15537			     == h->root.u.def.section->output_section->vma
15538			  && h_list->h->root.u.def.section->output_offset
15539			     == h->root.u.def.section->output_offset
15540			  && m_list->rel_backup.r_addend == rel_backup.r_addend)
15541			{
15542			  m_list->times++;
15543			  m_list->irel = jrel;
15544			  while (h_list->h != h && h_list->next)
15545			    h_list = h_list->next;
15546			  if (h_list->h != h)
15547			    {
15548			      struct elf_link_hash_entry_list *h_list_new;
15549
15550			      h_list_new = (struct elf_link_hash_entry_list *)
15551				bfd_malloc (sizeof (struct elf_link_hash_entry_list));
15552			      h_list->next = h_list_new;
15553			      h_list_new->h = h;
15554			      h_list_new->next = NULL;
15555			    }
15556			  break;
15557			}
15558		      /* The sethi case may have different address but the
15559			 hi20 is the same.  */
15560		      else if (ELF32_R_TYPE (jrel->r_info) == R_NDS32_HI20_RELA
15561			       && m_list->next == NULL)
15562			{
15563			  struct elf_link_hash_entry_mul_list *m_list_new;
15564			  struct elf_link_hash_entry_list *h_list_new;
15565
15566			  m_list_new = (struct elf_link_hash_entry_mul_list *)
15567			    bfd_malloc (sizeof (struct elf_link_hash_entry_mul_list));
15568			  h_list_new = (struct elf_link_hash_entry_list *)
15569			    bfd_malloc (sizeof (struct elf_link_hash_entry_list));
15570			  m_list->next = m_list_new;
15571			  m_list_new->h_list = h_list_new;
15572			  m_list_new->rel_backup = rel_backup;
15573			  m_list_new->times = 1;
15574			  m_list_new->irel = jrel;
15575			  m_list_new->next = NULL;
15576			  h_list_new->h = h;
15577			  h_list_new->next = NULL;
15578			  break;
15579			}
15580		      m_list = m_list->next;
15581		    }
15582		  if (!m_list)
15583		    {
15584		      off += 4;
15585		      continue;
15586		    }
15587		}
15588	    }
15589	  else
15590	    {
15591	      /* Local symbol and insn without relocation*/
15592	      entry->times++;
15593	      entry->rel_backup = rel_backup;
15594	    }
15595
15596	  /* Use in sethi insn with constant and global symbol in same format.  */
15597	  if (!jrel)
15598	    entry->const_insn = 1;
15599	  else
15600	    entry->irel = jrel;
15601	  entry->sec = isec;
15602	  off += 4;
15603	}
15604    }
15605  return TRUE;
15606}
15607
15608/* Set the _ITB_BASE, and point it to ex9 table.  */
15609
15610bfd_boolean
15611nds32_elf_ex9_itb_base (struct bfd_link_info *link_info)
15612{
15613  bfd *abfd;
15614  asection *sec;
15615  bfd *output_bfd = NULL;
15616  struct bfd_link_hash_entry *bh = NULL;
15617
15618  if (is_ITB_BASE_set == 1)
15619    return TRUE;
15620
15621  is_ITB_BASE_set = 1;
15622
15623  bh = bfd_link_hash_lookup (link_info->hash, "_ITB_BASE_", FALSE, FALSE, TRUE);
15624
15625  if (bh && (bh->type == bfd_link_hash_defined
15626	     || bh->type == bfd_link_hash_defweak))
15627    return TRUE;
15628
15629  for (abfd = link_info->input_bfds; abfd != NULL;
15630       abfd = abfd->link.next)
15631    {
15632      sec = bfd_get_section_by_name (abfd, ".ex9.itable");
15633      if (sec != NULL)
15634	{
15635	  output_bfd = sec->output_section->owner;
15636	  break;
15637	}
15638    }
15639  if (output_bfd == NULL)
15640    {
15641      output_bfd = link_info->output_bfd;
15642      if (output_bfd->sections == NULL)
15643	return TRUE;
15644      else
15645	sec = bfd_abs_section_ptr;
15646    }
15647  bh = bfd_link_hash_lookup (link_info->hash, "_ITB_BASE_",
15648			     FALSE, FALSE, TRUE);
15649  return (_bfd_generic_link_add_one_symbol
15650	  (link_info, output_bfd, "_ITB_BASE_",
15651	   BSF_GLOBAL | BSF_WEAK, sec, 0,
15652	   (const char *) NULL, FALSE, get_elf_backend_data
15653	   (output_bfd)->collect, &bh));
15654} /* End EX9.IT  */
15655
15656
15657#define ELF_ARCH				bfd_arch_nds32
15658#define ELF_MACHINE_CODE			EM_NDS32
15659#define ELF_MAXPAGESIZE				0x1000
15660#define ELF_TARGET_ID                           NDS32_ELF_DATA
15661
15662#define TARGET_BIG_SYM				nds32_elf32_be_vec
15663#define TARGET_BIG_NAME				"elf32-nds32be"
15664#define TARGET_LITTLE_SYM			nds32_elf32_le_vec
15665#define TARGET_LITTLE_NAME			"elf32-nds32le"
15666
15667#define elf_info_to_howto			nds32_info_to_howto
15668#define elf_info_to_howto_rel			nds32_info_to_howto_rel
15669
15670#define bfd_elf32_bfd_link_hash_table_create	nds32_elf_link_hash_table_create
15671#define bfd_elf32_bfd_merge_private_bfd_data	nds32_elf_merge_private_bfd_data
15672#define bfd_elf32_bfd_print_private_bfd_data	nds32_elf_print_private_bfd_data
15673#define bfd_elf32_bfd_relax_section		nds32_elf_relax_section
15674#define bfd_elf32_bfd_set_private_flags		nds32_elf_set_private_flags
15675
15676#define bfd_elf32_mkobject		        nds32_elf_mkobject
15677#define elf_backend_action_discarded		nds32_elf_action_discarded
15678#define elf_backend_add_symbol_hook		nds32_elf_add_symbol_hook
15679#define elf_backend_check_relocs		nds32_elf_check_relocs
15680#define elf_backend_adjust_dynamic_symbol	nds32_elf_adjust_dynamic_symbol
15681#define elf_backend_create_dynamic_sections	nds32_elf_create_dynamic_sections
15682#define elf_backend_finish_dynamic_sections	nds32_elf_finish_dynamic_sections
15683#define elf_backend_finish_dynamic_symbol	nds32_elf_finish_dynamic_symbol
15684#define elf_backend_size_dynamic_sections	nds32_elf_size_dynamic_sections
15685#define elf_backend_relocate_section		nds32_elf_relocate_section
15686#define elf_backend_gc_mark_hook		nds32_elf_gc_mark_hook
15687#define elf_backend_gc_sweep_hook		nds32_elf_gc_sweep_hook
15688#define elf_backend_grok_prstatus		nds32_elf_grok_prstatus
15689#define elf_backend_grok_psinfo			nds32_elf_grok_psinfo
15690#define elf_backend_reloc_type_class		nds32_elf_reloc_type_class
15691#define elf_backend_copy_indirect_symbol	nds32_elf_copy_indirect_symbol
15692#define elf_backend_link_output_symbol_hook	nds32_elf_output_symbol_hook
15693#define elf_backend_output_arch_syms		nds32_elf_output_arch_syms
15694#define elf_backend_object_p			nds32_elf_object_p
15695#define elf_backend_final_write_processing	nds32_elf_final_write_processing
15696#define elf_backend_special_sections		nds32_elf_special_sections
15697#define bfd_elf32_bfd_get_relocated_section_contents \
15698                                nds32_elf_get_relocated_section_contents
15699
15700#define elf_backend_can_gc_sections		1
15701#define elf_backend_can_refcount		1
15702#define elf_backend_want_got_plt		1
15703#define elf_backend_plt_readonly		1
15704#define elf_backend_want_plt_sym		0
15705#define elf_backend_got_header_size		12
15706#define elf_backend_may_use_rel_p		1
15707#define elf_backend_default_use_rela_p		1
15708#define elf_backend_may_use_rela_p		1
15709
15710#include "elf32-target.h"
15711
15712#undef ELF_MAXPAGESIZE
15713#define ELF_MAXPAGESIZE				0x2000
15714
15715#undef TARGET_BIG_SYM
15716#define TARGET_BIG_SYM				nds32_elf32_linux_be_vec
15717#undef TARGET_BIG_NAME
15718#define TARGET_BIG_NAME				"elf32-nds32be-linux"
15719#undef TARGET_LITTLE_SYM
15720#define TARGET_LITTLE_SYM			nds32_elf32_linux_le_vec
15721#undef TARGET_LITTLE_NAME
15722#define TARGET_LITTLE_NAME			"elf32-nds32le-linux"
15723#undef elf32_bed
15724#define elf32_bed				elf32_nds32_lin_bed
15725
15726#include "elf32-target.h"
15727