1#ifndef SIMOPS_H 2#define SIMOPS_H 3int OP_380 (void); 4int OP_480 (void); 5int OP_501 (void); 6int OP_700 (void); 7int OP_720 (void); 8int OP_10720 (void); 9int OP_740 (void); 10int OP_760 (void); 11int OP_10760 (void); 12int OP_1C0 (void); 13int OP_240 (void); 14int OP_600 (void); 15int OP_1A0 (void); 16int OP_180 (void); 17int OP_E0 (void); 18int OP_2E0 (void); 19int OP_6E0 (void); 20int OP_1E0 (void); 21int OP_260 (void); 22int OP_7E0 (void); 23int OP_C0 (void); 24int OP_220 (void); 25int OP_A0 (void); 26int OP_660 (void); 27int OP_80 (void); 28int OP_160 (void); 29int OP_200 (void); 30int OP_640 (void); 31int OP_2A0 (void); 32int OP_A007E0 (void); 33int OP_2C0 (void); 34int OP_C007E0 (void); 35int OP_280 (void); 36int OP_8007E0 (void); 37int OP_100 (void); 38int OP_680 (void); 39int OP_140 (void); 40int OP_6C0 (void); 41int OP_120 (void); 42int OP_6A0 (void); 43int OP_20 (void); 44int OP_7C0 (void); 45int OP_47C0 (void); 46int OP_87C0 (void); 47int OP_C7C0 (void); 48int OP_16007E0 (void); 49int OP_16087E0 (void); 50int OP_12007E0 (void); 51int OP_10007E0 (void); 52int OP_E607E0 (void); 53int OP_22207E0 (void); 54int OP_E407E0 (void); 55int OP_E207E0 (void); 56int OP_E007E0 (void); 57int OP_20007E0 (void); 58int OP_1C207E0 (void); 59int OP_1C007E0 (void); 60int OP_18207E0 (void); 61int OP_18007E0 (void); 62int OP_2C207E0 (void); 63int OP_2C007E0 (void); 64int OP_28207E0 (void); 65int OP_28007E0 (void); 66int OP_24207E0 (void); 67int OP_24007E0 (void); 68int OP_107E0 (void); 69int OP_10780 (void); 70int OP_1B0780 (void); 71int OP_130780 (void); 72int OP_B0780 (void); 73int OP_30780 (void); 74int OP_22007E0 (void); 75int OP_307F0 (void); 76int OP_107F0 (void); 77int OP_307E0 (void); 78 79int v850_float_compare(SIM_DESC sd, int cmp, sim_fpu wop1, sim_fpu wop2, int double_op_p); 80 81/* MEMORY ACCESS */ 82unsigned32 load_data_mem(SIM_DESC sd, SIM_ADDR addr, int len); 83void store_data_mem(SIM_DESC sd, SIM_ADDR addr, int len, unsigned32 data); 84 85unsigned long Add32 (unsigned long a1, unsigned long a2, int * carry); 86 87/* FPU */ 88 89/* 90 FPU: update FPSR flags 91 invalid, inexact, overflow, underflow 92 */ 93 94extern void check_invalid_snan (SIM_DESC sd, sim_fpu_status, unsigned int); 95 96#define check_cvt_fi(sd, status, double_op_p) \ 97 update_fpsr (sd, status, FPSR_XEV | FPSR_XEI, double_op_p) 98 99#define check_cvt_if(sd, status, double_op_p) \ 100 update_fpsr (sd, status, FPSR_XEI, double_op_p) 101 102#define check_cvt_ff(sd, status, double_op_p) \ 103 update_fpsr (sd, status, FPSR_XEV | FPSR_XEI | FPSR_XEO | FPSR_XEU, double_op_p) 104 105extern void update_fpsr (SIM_DESC sd, sim_fpu_status, unsigned int, unsigned int); 106 107 108/* 109 Exception 110 */ 111void SignalException (SIM_DESC sd); 112void SignalExceptionFPE (SIM_DESC sd, unsigned int double_op_p); 113 114int mpu_load_mem_test (SIM_DESC sd, unsigned int addr, int len, int base_reg); 115int mpu_store_mem_test (SIM_DESC sd, unsigned int addr, int len, int base_reg); 116 117void v850_sar (SIM_DESC sd, unsigned int op0, unsigned int op1, unsigned int *op2p); 118void v850_shl (SIM_DESC sd, unsigned int op0, unsigned int op1, unsigned int *op2p); 119void v850_rotl (SIM_DESC sd, unsigned int, unsigned int, unsigned int *); 120void v850_bins (SIM_DESC sd, unsigned int, unsigned int, unsigned int, unsigned int *); 121void v850_shr (SIM_DESC sd, unsigned int op0, unsigned int op1, unsigned int *op2p); 122void v850_satadd (SIM_DESC sd, unsigned int op0, unsigned int op1, unsigned int *op2p); 123void v850_satsub (SIM_DESC sd, unsigned int op0, unsigned int op1, unsigned int *op2p); 124void v850_div (SIM_DESC sd, unsigned int op0, unsigned int op1, unsigned int *op2p, unsigned int *op3p); 125void v850_divu (SIM_DESC sd, unsigned int op0, unsigned int op1, unsigned int *op2p, unsigned int *op3p); 126 127#endif 128