1//Original:/proj/frio/dv/testcases/seq/se_ssync/se_ssync.dsp
2// Description: Test SSYNC by writing a bunch of MMRs and verifying read
3# mach: bfin
4# sim: --environment operating
5
6#include "test.h"
7.include "testutils.inc"
8start
9
10//
11// Constants and Defines
12//
13
14include(selfcheck.inc)
15include(std.inc)
16include(mmrs.inc)
17include(symtable.inc)
18
19#ifndef STACKSIZE
20#define STACKSIZE 0x10   // change for how much stack you need
21#endif
22
23LD32(p0, EVT5);
24LD32(r0, 0x55555555);
25LD32(p1, EVT6);
26LD32(r1, 0xAAAAAAAA);
27LD32(p2, EVT7);
28LD32(r2, 0xBABEFACE);
29LD32(p3, EVT8);
30LD32(r3, 0xCFCFCFCF);
31LD32(p4, EVT9);
32LD32(r4, 0xDEADBEEF);
33LD32(p5, EVT10);
34LD32(r5, 0xBAD1BAD1);
35
36    [ P0 ] = R0;      // write the MMRS
37    [ P1 ] = R1;
38    [ P2 ] = R2;
39    [ P3 ] = R3;
40    [ P4 ] = R4;
41    [ P5 ] = R5;
42
43SSYNC;          // wait for it
44
45    R7 = [ P5 ];      // read back MMRs
46    R6 = [ P4 ];      // should be updated
47    R5 = [ P3 ];
48    R4 = [ P2 ];
49    R3 = [ P1 ];
50    R2 = [ P0 ];
51
52CHECK_INIT_DEF(p0); //CHECK_INIT(p0, 0xFF7FFFFC);
53
54CHECKREG(r2, 0x55555555);
55CHECKREG(r3, 0xAAAAAAAA);
56CHECKREG(r4, 0xBABEFACE);
57CHECKREG(r5, 0xCFCFCFCF);
58CHECKREG(r6, 0xDEADBEEF);
59CHECKREG(r7, 0xBAD1BAD1);
60
61dbg_pass;
62