1//Original:/testcases/core/c_alu2op_divs/c_alu2op_divs.dsp
2// Spec Reference: alu2op divide s
3# mach: bfin
4
5.include "testutils.inc"
6	start
7
8
9
10imm32 r0, 0x00000000;
11imm32 r1, 0x12345678;
12imm32 r2, 0x23456789;
13imm32 r3, 0x3456789a;
14imm32 r4, 0x856789ab;
15imm32 r5, 0x96789abc;
16imm32 r6, 0xa789abcd;
17imm32 r7, 0xb89abcde;
18R0.L = 1;
19DIVS ( R1 , R0 );
20DIVS ( R2 , R0 );
21DIVS ( R3 , R0 );
22DIVS ( R4 , R0 );
23DIVS ( R5 , R0 );
24DIVS ( R6 , R0 );
25DIVS ( R7 , R0 );
26DIVS ( R4 , R0 );
27DIVS ( R0 , R0 );
28CHECKREG r1, 0x2468ACF0;
29CHECKREG r2, 0x468ACF12;
30CHECKREG r3, 0x68ACF134;
31CHECKREG r4, 0x159E26AE;
32CHECKREG r5, 0x2CF13579;
33CHECKREG r6, 0x4F13579B;
34CHECKREG r7, 0x713579BD;
35CHECKREG r0, 0x00000002;
36
37imm32 r0, 0x01230002;
38imm32 r1, 0x00000000;
39imm32 r2, 0x93456789;
40imm32 r3, 0xa456789a;
41imm32 r4, 0xb56789ab;
42imm32 r5, 0xc6789abc;
43imm32 r6, 0xd789abcd;
44imm32 r7, 0xe89abcde;
45R1.L = -1;
46DIVS ( R0 , R1 );
47DIVS ( R2 , R1 );
48DIVS ( R3 , R1 );
49DIVS ( R4 , R1 );
50DIVS ( R5 , R1 );
51DIVS ( R6 , R1 );
52DIVS ( R7 , R1 );
53DIVS ( R1 , R1 );
54CHECKREG r0, 0x02460005;
55CHECKREG r1, 0x0001FFFF;
56CHECKREG r2, 0x268ACF12;
57CHECKREG r3, 0x48ACF134;
58CHECKREG r4, 0x6ACF1356;
59CHECKREG r5, 0x8CF13578;
60CHECKREG r6, 0xAF13579A;
61CHECKREG r7, 0xD13579BC;
62
63imm32 r0, 0x51230002;
64imm32 r1, 0x12345678;
65imm32 r2, 0x00000000;
66imm32 r3, 0x3456789a;
67imm32 r4, 0x956789ab;
68imm32 r5, 0x86789abc;
69imm32 r6, 0x6789abcd;
70imm32 r7, 0x789abcde;
71R2.L = 31;
72DIVS ( R0 , R2 );
73DIVS ( R1 , R2 );
74DIVS ( R3 , R2 );
75DIVS ( R4 , R2 );
76DIVS ( R5 , R2 );
77DIVS ( R6 , R2 );
78DIVS ( R7 , R2 );
79DIVS ( R2 , R2 );
80CHECKREG r0, 0xA2460004;
81CHECKREG r1, 0x2468ACF0;
82CHECKREG r2, 0x0000003E;
83CHECKREG r3, 0x68ACF134;
84CHECKREG r4, 0x2ACF1357;
85CHECKREG r5, 0x0CF13579;
86CHECKREG r6, 0xCF13579A;
87CHECKREG r7, 0xF13579BC;
88
89imm32 r0, 0x01230002;
90imm32 r1, 0x82345678;
91imm32 r2, 0x93456789;
92imm32 r3, 0x00000000;
93imm32 r4, 0xb56789ab;
94imm32 r5, 0xc6789abc;
95imm32 r6, 0xd789abcd;
96imm32 r7, 0xe89abcde;
97R3.L = -31;
98DIVS ( R0 , R3 );
99DIVS ( R1 , R3 );
100DIVS ( R2 , R3 );
101DIVS ( R4 , R3 );
102DIVS ( R5 , R3 );
103DIVS ( R6 , R3 );
104DIVS ( R7 , R3 );
105DIVS ( R3 , R3 );
106CHECKREG r0, 0x02460005;
107CHECKREG r1, 0x0468ACF0;
108CHECKREG r2, 0x268ACF12;
109CHECKREG r3, 0x0001FFC3;
110CHECKREG r4, 0x6ACF1356;
111CHECKREG r5, 0x8CF13578;
112CHECKREG r6, 0xAF13579A;
113CHECKREG r7, 0xD13579BC;
114
115imm32 r0, 0x00000001;
116imm32 r1, 0x12345678;
117imm32 r2, 0x23456789;
118imm32 r3, 0x3456789a;
119imm32 r4, 0x00000000;
120imm32 r5, 0x96789abc;
121imm32 r6, 0xa789abcd;
122imm32 r7, 0xb89abcde;
123R4.L = 15;
124DIVS ( R1 , R4 );
125DIVS ( R2 , R4 );
126DIVS ( R3 , R4 );
127DIVS ( R0 , R4 );
128DIVS ( R5 , R4 );
129DIVS ( R6 , R4 );
130DIVS ( R7 , R4 );
131DIVS ( R4 , R4 );
132CHECKREG r0, 0x00000002;
133CHECKREG r1, 0x2468ACF0;
134CHECKREG r2, 0x468ACF12;
135CHECKREG r3, 0x68ACF134;
136CHECKREG r4, 0x0000001E;
137CHECKREG r5, 0x2CF13579;
138CHECKREG r6, 0x4F13579B;
139CHECKREG r7, 0x713579BD;
140
141imm32 r0, 0x01230002;
142imm32 r1, 0x00000000;
143imm32 r2, 0x93456789;
144imm32 r3, 0xa456789a;
145imm32 r4, 0xb56789ab;
146imm32 r5, 0x00000000;
147imm32 r6, 0xd789abcd;
148imm32 r7, 0xe89abcde;
149R5.L = -15;
150DIVS ( R0 , R5 );
151DIVS ( R1 , R5 );
152DIVS ( R2 , R5 );
153DIVS ( R3 , R5 );
154DIVS ( R4 , R5 );
155DIVS ( R6 , R5 );
156DIVS ( R7 , R5 );
157DIVS ( R5 , R5 );
158CHECKREG r0, 0x02460005;
159CHECKREG r1, 0x00000001;
160CHECKREG r2, 0x268ACF12;
161CHECKREG r3, 0x48ACF134;
162CHECKREG r4, 0x6ACF1356;
163CHECKREG r5, 0x0001FFE3;
164CHECKREG r6, 0xAF13579A;
165CHECKREG r7, 0xD13579BC;
166
167imm32 r0, 0x51230002;
168imm32 r1, 0x12345678;
169imm32 r2, 0xb1256790;
170imm32 r3, 0x3456789a;
171imm32 r4, 0x956789ab;
172imm32 r5, 0x86789abc;
173imm32 r6, 0x00000000;
174imm32 r7, 0x789abcde;
175R6.L = 24;
176DIVS ( R0 , R6 );
177DIVS ( R1 , R6 );
178DIVS ( R2 , R6 );
179DIVS ( R3 , R6 );
180DIVS ( R4 , R6 );
181DIVS ( R5 , R6 );
182DIVS ( R7 , R6 );
183DIVS ( R6 , R6 );
184CHECKREG r0, 0xA2460004;
185CHECKREG r1, 0x2468ACF0;
186CHECKREG r2, 0x624ACF21;
187CHECKREG r3, 0x68ACF134;
188CHECKREG r4, 0x2ACF1357;
189CHECKREG r5, 0x0CF13579;
190CHECKREG r6, 0x00000030;
191CHECKREG r7, 0xF13579BC;
192
193imm32 r0, 0x01230002;
194imm32 r1, 0x82345678;
195imm32 r2, 0x93456789;
196imm32 r3, 0xa456789a;
197imm32 r4, 0xb56789ab;
198imm32 r5, 0xc6789abc;
199imm32 r6, 0xd789abcd;
200imm32 r7, 0x00000000;
201R7.L = -24;
202DIVS ( R0 , R7 );
203DIVS ( R1 , R7 );
204DIVS ( R2 , R7 );
205DIVS ( R3 , R7 );
206DIVS ( R4 , R7 );
207DIVS ( R5 , R7 );
208DIVS ( R6 , R7 );
209DIVS ( R7 , R7 );
210CHECKREG r0, 0x02460005;
211CHECKREG r1, 0x0468ACF0;
212CHECKREG r2, 0x268ACF12;
213CHECKREG r3, 0x48ACF134;
214CHECKREG r4, 0x6ACF1356;
215CHECKREG r5, 0x8CF13578;
216CHECKREG r6, 0xAF13579A;
217CHECKREG r7, 0x0001FFD1;
218
219
220pass
221