1# mach: all 2# output: 3# sim: --environment operating 4# as: -W 5 6.include "t-macros.i" 7 8 start 9 10 PSW_BITS = PSW_DM 11 12;;; Blat our DMAP registers so that they point at on-chip imem 13 14 ldi r2, MAP_INSN | 0xf 15 st r2, @(DMAP_REG,r0) 16 ldi r2, MAP_INSN 17 st r2, @(IMAP1_REG,r0) 18 19;;; Patch the interrupt vector's dbt entry with a jmp to success 20 21 ldi r4, #trap 22 ldi r5, (VEC_DBT & DMAP_MASK) + DMAP_BASE 23 ld2w r2, @(0,r4) 24 st2w r2, @(0,r5) 25 ld2w r2, @(4,r4) 26 st2w r2, @(4,r5) 27 28test_dbt: 29 dbt -> nop 30 exit47 31 32success: 33 checkpsw2 1 PSW_BITS 34 exit0 35 36 .data 37trap: ldi r1, success@word 38 jmp r1 39