1254721Semaste#ifndef __ASSEMBLER__ 2254721Semastetypedef unsigned long bu32; 3254721Semastetypedef long bs32; 4254721Semastetypedef unsigned short bu16; 5254721Semastetypedef short bs16; 6254721Semastetypedef unsigned char bu8; 7254721Semastetypedef char bs8; 8254721Semaste#define ARRAY_SIZE(a) (sizeof (a) / sizeof ((a)[0])) 9254721Semaste#define BFIN_MMR_16(mmr) mmr, __pad_##mmr 10254721Semaste#include "test-dma.h" 11263363Semaste#else 12254721Semaste#define __ADSPBF537__ /* XXX: Hack for .S files. */ 13254721Semaste#endif 14254721Semaste#ifndef __FDPIC__ 15254721Semaste#include <blackfin.h> 16254721Semaste#endif 17254721Semaste 18254721Semaste/* AZ AN AC0_COPY V_COPY CC AQ RND_MOD AC0 AC1 AV0 AV0S AV1 AV1S V VS */ 19254721Semaste 20254721Semaste#define _AZ (1 << 0) 21254721Semaste#define _AN (1 << 1) 22254721Semaste#define _AC0_COPY (1 << 2) 23254721Semaste#define _V_COPY (1 << 3) 24254721Semaste#define _CC (1 << 5) 25254721Semaste#define _AQ (1 << 6) 26254721Semaste#define _RND_MOD (1 << 8) 27254721Semaste#define _AC0 (1 << 12) 28254721Semaste#define _AC1 (1 << 13) 29254721Semaste#define _AV0 (1 << 16) 30254721Semaste#define _AV0S (1 << 17) 31254721Semaste#define _AV1 (1 << 18) 32254721Semaste#define _AV1S (1 << 19) 33263363Semaste#define _V (1 << 24) 34254721Semaste#define _VS (1 << 25) 35254721Semaste 36254721Semaste#define _SET 1 37254721Semaste#define _UNSET 0 38254721Semaste 39254721Semaste#define PASS do { puts ("pass"); _exit (0); } while (0) 40254721Semaste#define FAIL do { puts ("fail"); _exit (1); } while (0) 41254721Semaste#define DBG_PASS do { asm volatile ("outc 'p'; outc 'a'; outc 's'; outc 's'; outc '\n'; hlt;"); } while (1) 42254721Semaste#define DBG_FAIL do { asm volatile ("outc 'f'; outc 'a'; outc 'i'; outc 'l'; outc '\n'; abort;"); } while (1) 43254721Semaste 44254721Semaste#define HI(x) (((x) >> 16) & 0xffff) 45254721Semaste#define LO(x) ((x) & 0xffff) 46254721Semaste 47254721Semaste#define INIT_R_REGS(val) init_r_regs val 48254721Semaste#define INIT_P_REGS(val) init_p_regs val 49254721Semaste#define INIT_B_REGS(val) init_b_regs val 50254721Semaste#define INIT_I_REGS(val) init_i_regs val 51254721Semaste#define INIT_L_REGS(val) init_l_regs val 52254721Semaste#define INIT_M_REGS(val) init_m_regs val 53254721Semaste#define include(...) 54254721Semaste#define CHECK_INIT_DEF(...) nop; 55254721Semaste#define CHECK_INIT(...) nop; 56254721Semaste#define CHECKMEM32(...) 57254721Semaste#define GEN_INT_INIT(...) nop; 58254721Semaste 59254721Semaste#define LD32_LABEL(reg, sym) loadsym reg, sym 60254721Semaste#define LD32(reg, val) imm32 reg, val 61254721Semaste#define CHECKREG(reg, val) CHECKREG reg, val 62254721Semaste#define CHECKREG_SYM_JUMPLESS(reg, sym, scratch_reg) \ 63254721Semaste loadsym scratch_reg, sym; \ 64254721Semaste cc = reg == scratch_reg; \ 65254721Semaste /* Need to avoid jumping for trace buffer. */ \ 66254721Semaste if !cc jump fail_lvl; 67254721Semaste#define CHECKREG_SYM(reg, sym, scratch_reg) \ 68254721Semaste loadsym scratch_reg, sym; \ 69254721Semaste cc = reg == scratch_reg; \ 70254721Semaste if cc jump 9f; \ 71254721Semaste dbg_fail; \ 72254721Semaste9: 73254721Semaste 74254721Semaste#define WR_MMR(mmr, val, mmr_reg, val_reg) \ 75254721Semaste imm32 mmr_reg, mmr; \ 76254721Semaste imm32 val_reg, val; \ 77254721Semaste [mmr_reg] = val_reg; 78254721Semaste#define WR_MMR_LABEL(mmr, sym, mmr_reg, sym_reg) \ 79254721Semaste loadsym sym_reg, sym; \ 80254721Semaste imm32 mmr_reg, mmr; \ 81254721Semaste [mmr_reg] = sym_reg; 82254721Semaste#define RD_MMR(mmr, mmr_reg, val_reg) \ 83254721Semaste imm32 mmr_reg, mmr; \ 84254721Semaste val_reg = [mmr_reg]; 85254721Semaste 86254721Semaste/* Legacy CPLB bits */ 87254721Semaste#define CPLB_L1_CACHABLE CPLB_L1_CHBL 88254721Semaste#define CPLB_USER_RO CPLB_USER_RD 89254721Semaste 90254721Semaste#define DATA_ADDR_1 0xff800000 91254721Semaste#define DATA_ADDR_2 0xff900000 92254721Semaste#define DATA_ADDR_3 (DATA_ADDR_1 + 0x2000) 93254721Semaste 94254721Semaste/* The libgloss headers omit these defines. */ 95254721Semaste#define EVT_OVERRIDE 0xFFE02100 96254721Semaste#define EVT_IMASK IMASK 97254721Semaste 98254721Semaste#define PAGE_SIZE_1K PAGE_SIZE_1KB 99254721Semaste#define PAGE_SIZE_4K PAGE_SIZE_4KB 100254721Semaste#define PAGE_SIZE_1M PAGE_SIZE_1MB 101254721Semaste#define PAGE_SIZE_4M PAGE_SIZE_4MB 102254721Semaste 103254721Semaste#define CPLB_USER_RW (CPLB_USER_RD | CPLB_USER_WR) 104254721Semaste 105254721Semaste#define DMC_AB_SRAM 0x0 106254721Semaste#define DMC_AB_CACHE 0xc 107254721Semaste#define DMC_ACACHE_BSRAM 0x8 108254721Semaste 109254721Semaste#define CPLB_L1SRAM (1 << 5) 110254721Semaste#define CPLB_DA0ACC (1 << 6) 111254721Semaste 112254721Semaste#define FAULT_CPLB0 (1 << 0) 113254721Semaste#define FAULT_CPLB1 (1 << 1) 114254721Semaste#define FAULT_CPLB2 (1 << 2) 115254721Semaste#define FAULT_CPLB3 (1 << 3) 116254721Semaste#define FAULT_CPLB4 (1 << 4) 117254721Semaste#define FAULT_CPLB5 (1 << 5) 118254721Semaste#define FAULT_CPLB6 (1 << 6) 119254721Semaste#define FAULT_CPLB7 (1 << 7) 120254721Semaste#define FAULT_CPLB8 (1 << 8) 121254721Semaste#define FAULT_CPLB9 (1 << 9) 122254721Semaste#define FAULT_CPLB10 (1 << 10) 123254721Semaste#define FAULT_CPLB11 (1 << 11) 124254721Semaste#define FAULT_CPLB12 (1 << 12) 125254721Semaste#define FAULT_CPLB13 (1 << 13) 126254721Semaste#define FAULT_CPLB14 (1 << 14) 127254721Semaste#define FAULT_CPLB15 (1 << 15) 128254721Semaste#define FAULT_READ (0 << 16) 129254721Semaste#define FAULT_WRITE (1 << 16) 130254721Semaste#define FAULT_USER (0 << 17) 131254721Semaste#define FAULT_SUPV (1 << 17) 132254721Semaste#define FAULT_DAG0 (0 << 18) 133254721Semaste#define FAULT_DAG1 (1 << 18) 134254721Semaste#define FAULT_ILLADDR (1 << 19) 135254721Semaste