193250Sphk//Original:/proj/frio/dv/testcases/seq/se_excpt_dagprotviol/se_excpt_dagprotviol.dsp 293250Sphk// Description: EXCPT instruction combined with DAG Misaligned Access 393250Sphk# mach: bfin 493250Sphk# sim: --environment operating 593250Sphk 693250Sphk#include "test.h" 793250Sphk.include "testutils.inc" 893250Sphkstart 993250Sphk 1093250Sphkinclude(gen_int.inc) 1193250Sphkinclude(selfcheck.inc) 1293250Sphkinclude(std.inc) 1393250Sphkinclude(mmrs.inc) 1493250Sphkinclude(symtable.inc) 1593250Sphk 1693250Sphk#ifndef STACKSIZE 1793250Sphk#define STACKSIZE 0x100 // change for how much stack you need 1893250Sphk#endif 1993250Sphk#ifndef ITABLE 2093250Sphk#define ITABLE 0xF0000000 2193250Sphk#endif 2293250Sphk 2393250SphkGEN_INT_INIT(ITABLE) // set location for interrupt table 2493250Sphk 2593250Sphk// 2693250Sphk// Reset/Bootstrap Code 2793250Sphk// (Here we should set the processor operating modes, initialize registers, 2893250Sphk// etc.) 2993250Sphk// 3093250Sphk 3193250SphkBOOT: 3293250SphkINIT_R_REGS(0); // initialize general purpose regs 3393250Sphk 3493250SphkINIT_P_REGS(0); // initialize the pointers 3593250Sphk 3693250SphkINIT_I_REGS(0); // initialize the dsp address regs 3793250SphkINIT_M_REGS(0); 3893250SphkINIT_L_REGS(0); 3993250SphkINIT_B_REGS(0); 4093250Sphk 4193250SphkCLI R1; // inhibit events during MMR writes 4293250Sphk 43110523SphkLD32_LABEL(sp, USTACK); // setup the user stack pointer 4493250SphkUSP = SP; 45110759Sphk 46110759SphkLD32_LABEL(sp, KSTACK); // setup the kernel stack pointer 47110759SphkFP = SP; // and frame pointer 48110759Sphk 49112476SphkLD32(p0, EVT0); // Setup Event Vectors and Handlers 50110759Sphk 51112476Sphk P0 += 4; // EVT0 not used (Emulation) 52110759Sphk 53112476Sphk P0 += 4; // EVT1 not used (Reset) 5493250Sphk 55112476SphkLD32_LABEL(r0, NHANDLE); // NMI Handler (Int2) 5693250Sphk [ P0 ++ ] = R0; 5793250Sphk 5893250SphkLD32_LABEL(r0, XHANDLE); // Exception Handler (Int3) 5993250Sphk [ P0 ++ ] = R0; 6093250Sphk 6193250Sphk P0 += 4; // EVT4 not used (Global Interrupt Enable) 6293250Sphk 6393250SphkLD32_LABEL(r0, HWHANDLE); // HW Error Handler (Int5) 64104056Sphk [ P0 ++ ] = R0; 6593250Sphk 6693250SphkLD32_LABEL(r0, THANDLE); // Timer Handler (Int6) 6793250Sphk [ P0 ++ ] = R0; 6893250Sphk 6993250SphkLD32_LABEL(r0, I7HANDLE); // IVG7 Handler 7093250Sphk [ P0 ++ ] = R0; 7193250Sphk 7293250SphkLD32_LABEL(r0, I8HANDLE); // IVG8 Handler 7393250Sphk [ P0 ++ ] = R0; 7493250Sphk 75104056SphkLD32_LABEL(r0, I9HANDLE); // IVG9 Handler 76104056Sphk [ P0 ++ ] = R0; 7793250Sphk 7893250SphkLD32_LABEL(r0, I10HANDLE);// IVG10 Handler 79110540Sphk [ P0 ++ ] = R0; 80110540Sphk 81110540SphkLD32_LABEL(r0, I11HANDLE);// IVG11 Handler 82110540Sphk [ P0 ++ ] = R0; 83110540Sphk 84110540SphkLD32_LABEL(r0, I12HANDLE);// IVG12 Handler 85110540Sphk [ P0 ++ ] = R0; 86110540Sphk 8793250SphkLD32_LABEL(r0, I13HANDLE);// IVG13 Handler 88104452Sphk [ P0 ++ ] = R0; 89104452Sphk 90104452SphkLD32_LABEL(r0, I14HANDLE);// IVG14 Handler 91106101Sphk [ P0 ++ ] = R0; 9293250Sphk 9393250SphkLD32_LABEL(r0, I15HANDLE);// IVG15 Handler 9493250Sphk [ P0 ++ ] = R0; 9593250Sphk 9693250SphkLD32(p0, EVT_OVERRIDE); 97112517Sphk R0 = 0; 98112517Sphk [ P0 ++ ] = R0; 9993250Sphk 10093250Sphk R1 = -1; // Change this to mask interrupts (*) 10193774SphkCSYNC; // wait for MMR writes to finish 10293250SphkSTI R1; // sync and reenable events (implicit write to IMASK) 10393250Sphk 10493250SphkDUMMY: 10593250Sphk 10693250Sphk R0 = 0 (Z); 10793250Sphk 10893250SphkLT0 = r0; // set loop counters to something deterministic 10993250SphkLB0 = r0; 11093250SphkLC0 = r0; 111LT1 = r0; 112LB1 = r0; 113LC1 = r0; 114 115ASTAT = r0; // reset other internal regs 116SYSCFG = r0; 117RETS = r0; // prevent X's breaking LINK instruction 118 119RETI = r0; // prevent Xs later on 120RETX = r0; 121RETN = r0; 122RETE = r0; 123 124 125// The following code sets up the test for running in USER mode 126 127LD32_LABEL(r0, STARTUSER);// One gets to user mode by doing a 128 // ReturnFromInterrupt (RTI) 129RETI = r0; // We need to load the return address 130 131// Comment the following line for a USER Mode test 132 133// JUMP STARTSUP; // jump to code start for SUPERVISOR mode 134 135RTI; 136 137STARTSUP: 138LD32_LABEL(p1, BEGIN); 139 140LD32(p0, EVT15); 141 142CLI R1; // inhibit events during write to MMR 143 [ P0 ] = P1; // IVG15 (General) handler (Int 15) load with start 144CSYNC; // wait for it 145STI R1; // reenable events with proper imask 146 147RAISE 15; // after we RTI, INT 15 should be taken 148 149RTI; 150 151// 152// The Main Program 153// 154 155STARTUSER: 156 157LD32_LABEL(sp, USTACK); // setup the user stack pointer 158FP = SP; 159LINK 0; // change for how much stack frame space you need. 160 161JUMP BEGIN; 162 163//********************************************************************* 164 165BEGIN: 166 167 // COMMENT the following line for USER MODE tests 168// [--sp] = RETI; // enable interrupts in supervisor mode 169 170 R0 = 0; 171 R1 = -1; 172LD32_LABEL(p1, USTACK); 173 P1 += 1; // misalign it 174 175EXCPT 2; // the RAISE should not prevent the EXCPT from being taken 176 R2 = [ P1 ]; 177 178CHECK_INIT_DEF(p0); //CHECK_INIT(p0, 0xFF7FFFFC); 179 180CHECKREG(r5, 2); // check the flag 181 182END: 183dbg_pass; // End the test 184 185//********************************************************************* 186 187// 188// Handlers for Events 189// 190 191NHANDLE: // NMI Handler 2 192RTN; 193 194XHANDLE: // Exception Handler 3 195 196 [ -- SP ] = ASTAT; // save what we damage 197 [ -- SP ] = ( R7:6 ); 198 R7 = SEQSTAT; 199 R7 <<= 26; 200 R7 >>= 26; // only want EXCAUSE 201 R6 = 0x02; // EXCAUSE 0x02 means EXCPT 2 instruction 202CC = r7 == r6; 203IF CC JUMP EXCPT2; 204 205 R6 = 0x24; // EXCAUSE 0x24 means DAG misalign 206CC = r7 == r6; 207IF CC JUMP DGPROTVIOL; 208 209JUMP.S OUT; // if the EXCAUSE is wrong the test will infinite loop 210 211EXCPT2: 212 R5 = 1; // Set a Flag 213JUMP.S OUT; 214 215DGPROTVIOL: 216 R7 = RETX; // Fix up return address 217 218 R7 += 2; // skip offending 16 bit instruction 219 220RETX = r7; // and put back in RETX 221 222 R5 <<= 1; // Alter Global Flag 223 224OUT: 225 ( R7:6 ) = [ SP ++ ]; 226ASTAT = [sp++]; 227RTX; 228 229HWHANDLE: // HW Error Handler 5 230RTI; 231 232THANDLE: // Timer Handler 6 233RTI; 234 235I7HANDLE: // IVG 7 Handler 236RTI; 237 238I8HANDLE: // IVG 8 Handler 239RTI; 240 241I9HANDLE: // IVG 9 Handler 242RTI; 243 244I10HANDLE: // IVG 10 Handler 245RTI; 246 247I11HANDLE: // IVG 11 Handler 248RTI; 249 250I12HANDLE: // IVG 12 Handler 251RTI; 252 253I13HANDLE: // IVG 13 Handler 254RTI; 255 256I14HANDLE: // IVG 14 Handler 257RTI; 258 259I15HANDLE: // IVG 15 Handler 260RTI; 261 262 263 // padding for the icache 264 265EXCPT 0; EXCPT 0; EXCPT 0; EXCPT 0; EXCPT 0; EXCPT 0; EXCPT 0; 266 267// 268// Data Segment 269// 270 271.data 272DATA: 273 .space (0x10); 274 275// Stack Segments (Both Kernel and User) 276 277 .space (STACKSIZE); 278KSTACK: 279 280 .space (STACKSIZE); 281USTACK: 282