1//Original:/proj/frio/dv/testcases/core/c_progctrl_raise_rt_i_n/c_progctrl_raise_rt_i_n.dsp 2// Spec Reference: progctrl raise rti rtn 3# mach: bfin 4# sim: --environment operating 5 6#include "test.h" 7.include "testutils.inc" 8start 9 10include(std.inc) 11include(selfcheck.inc) 12include(gen_int.inc) 13INIT_R_REGS(0); 14INIT_P_REGS(0); 15INIT_I_REGS(0); // initialize the dsp address regs 16INIT_M_REGS(0); 17INIT_L_REGS(0); 18INIT_B_REGS(0); 19CHECK_INIT(p5, 0xe0000000); 20 21#ifndef STACKSIZE 22#define STACKSIZE 0x10 23#endif 24#ifndef EVT 25#define EVT 0xFFE02000 26#endif 27#ifndef EVT15 28#define EVT15 0xFFE0203C 29#endif 30#ifndef EVT_OVERRIDE 31#define EVT_OVERRIDE 0xFFE02100 32#endif 33#ifndef ITABLE 34#define ITABLE 0xF0000000 35#endif 36 37GEN_INT_INIT(ITABLE) // set location for interrupt table 38 39// 40// Reset/Bootstrap Code 41// (Here we should set the processor operating modes, initialize registers, 42// etc.) 43// 44 45BOOT: 46 47 48LD32_LABEL(sp, KSTACK); // setup the stack pointer 49FP = SP; // and frame pointer 50 51LD32(p0, EVT); // Setup Event Vectors and Handlers 52LD32_LABEL(r0, EHANDLE); // Emulation Handler (Int0) 53 [ P0 ++ ] = R0; 54 55LD32_LABEL(r0, RHANDLE); // Reset Handler (Int1) 56 [ P0 ++ ] = R0; 57 58LD32_LABEL(r0, NHANDLE); // NMI Handler (Int2) 59 [ P0 ++ ] = R0; 60 61LD32_LABEL(r0, XHANDLE); // Exception Handler (Int3) 62 [ P0 ++ ] = R0; 63 64 [ P0 ++ ] = R0; // IVT4 not used 65 66LD32_LABEL(r0, HWHANDLE); // HW Error Handler (Int5) 67 [ P0 ++ ] = R0; 68 69LD32_LABEL(r0, THANDLE); // Timer Handler (Int6) 70 [ P0 ++ ] = R0; 71 72LD32_LABEL(r0, I7HANDLE); // IVG7 Handler 73 [ P0 ++ ] = R0; 74 75LD32_LABEL(r0, I8HANDLE); // IVG8 Handler 76 [ P0 ++ ] = R0; 77 78LD32_LABEL(r0, I9HANDLE); // IVG9 Handler 79 [ P0 ++ ] = R0; 80 81LD32_LABEL(r0, I10HANDLE);// IVG10 Handler 82 [ P0 ++ ] = R0; 83 84LD32_LABEL(r0, I11HANDLE);// IVG11 Handler 85 [ P0 ++ ] = R0; 86 87LD32_LABEL(r0, I12HANDLE);// IVG12 Handler 88 [ P0 ++ ] = R0; 89 90LD32_LABEL(r0, I13HANDLE);// IVG13 Handler 91 [ P0 ++ ] = R0; 92 93LD32_LABEL(r0, I14HANDLE);// IVG14 Handler 94 [ P0 ++ ] = R0; 95 96LD32_LABEL(r0, I15HANDLE);// IVG15 Handler 97 [ P0 ++ ] = R0; 98 99LD32(p0, EVT_OVERRIDE); 100 R0 = 0; 101 [ P0 ++ ] = R0; 102 R0 = -1; // Change this to mask interrupts (*) 103 [ P0 ] = R0; // IMASK 104 105DUMMY: 106 107 R0 = 0 (Z); 108 109LT0 = r0; // set loop counters to something deterministic 110LB0 = r0; 111LC0 = r0; 112LT1 = r0; 113LB1 = r0; 114LC1 = r0; 115 116ASTAT = r0; // reset other internal regs 117 118// The following code sets up the test for running in USER mode 119 120LD32_LABEL(r0, STARTUSER);// One gets to user mode by doing a 121 // ReturnFromInterrupt (RTI) 122RETI = r0; // We need to load the return address 123 124// Comment the following line for a USER Mode test 125 126JUMP STARTSUP; // jump to code start for SUPERVISOR mode 127 128RTI; 129 130STARTSUP: 131LD32_LABEL(p1, BEGIN); 132 133LD32(p0, EVT15); 134 [ P0 ] = P1; // IVG15 (General) handler (Int 15) load with start 135 136RAISE 15; // after we RTI, INT 15 should be taken 137 138NOP; // Workaround for Bug 217 139RTI; 140 141// 142// The Main Program 143// 144STARTUSER: 145LD32_LABEL(sp, USTACK); // setup the stack pointer 146FP = SP; // set frame pointer 147JUMP BEGIN; 148 149//********************************************************************* 150 151BEGIN: 152 153 // COMMENT the following line for USER MODE tests 154 [ -- SP ] = RETI; // enable interrupts in supervisor mode 155 156 // **** YOUR CODE GOES HERE **** 157 158 159 160 // PUT YOUR TEST HERE! 161 // Can't Raise 0, 3, or 4 162 // Raise 1 requires some intelligence so the test 163 // doesn't loop forever - use SFTRESET bit in SEQSTAT (TBD) 164RAISE 2; // RTN 165RAISE 5; // RTI 166RAISE 6; // RTI 167RAISE 7; // RTI 168RAISE 8; // RTI 169RAISE 9; // RTI 170RAISE 10; // RTI 171RAISE 11; // RTI 172RAISE 12; // RTI 173RAISE 13; // RTI 174RAISE 14; // RTI 175RAISE 15; // RTI 176 177CHECKREG(r0, 0x0000000B); 178CHECKREG(r1, 0x0000000C); 179CHECKREG(r2, 0x0000000D); 180CHECKREG(r3, 0x0000000E); 181CHECKREG(r4, 0x00000007); 182CHECKREG(r5, 0x00000008); 183CHECKREG(r6, 0x00000009); 184CHECKREG(r7, 0x0000000A); 185R0 = I0; 186R1 = I1; 187R2 = I2; 188R3 = I3; 189R4 = M0; 190CHECKREG(r0, 0x00000002); 191CHECKREG(r1, 0x00000000); 192CHECKREG(r2, 0x00000005); 193CHECKREG(r3, 0x00000006); 194CHECKREG(r4, 0x00000007); 195 196 197END: 198dbg_pass; // End the test 199 200//********************************************************************* 201 202// 203// Handlers for Events 204// 205 206EHANDLE: // Emulation Handler 0 207RTE; 208 209RHANDLE: // Reset Handler 1 210RTI; 211 212NHANDLE: // NMI Handler 2 213 R0 = 2; 214RTN; 215 216XHANDLE: // Exception Handler 3 217 R1 = 3; 218RTX; 219 220HWHANDLE: // HW Error Handler 5 221 R2 = 5; 222RTI; 223 224THANDLE: // Timer Handler 6 225 R3 = 6; 226RTI; 227 228I7HANDLE: // IVG 7 Handler 229 R4 = 7; 230RTI; 231 232I8HANDLE: // IVG 8 Handler 233 R5 = 8; 234RTI; 235 236I9HANDLE: // IVG 9 Handler 237 R6 = 9; 238RTI; 239 240I10HANDLE: // IVG 10 Handler 241 R7 = 10; 242RTI; 243 244I11HANDLE: // IVG 11 Handler 245 I0 = R0; 246 I1 = R1; 247 I2 = R2; 248 I3 = R3; 249 M0 = R4; 250 R0 = 11; 251RTI; 252 253I12HANDLE: // IVG 12 Handler 254 R1 = 12; 255RTI; 256 257I13HANDLE: // IVG 13 Handler 258 R2 = 13; 259RTI; 260 261I14HANDLE: // IVG 14 Handler 262 R3 = 14; 263RTI; 264 265I15HANDLE: // IVG 15 Handler 266 R4 = 15; 267RTI; 268 269NOP;NOP;NOP;NOP;NOP;NOP;NOP; // needed for icache bug 270 271// 272// Data Segment 273// 274 275.data 276DATA: 277 .space (0x10); 278 279// Stack Segments (Both Kernel and User) 280 281 .space (STACKSIZE); 282KSTACK: 283 284 .space (STACKSIZE); 285USTACK: 286