1//Original:/proj/frio/dv/testcases/core/c_interr_excpt/c_interr_excpt.dsp
2// Spec Reference: interr excpt
3# mach: bfin
4# sim: --environment operating
5
6#include "test.h"
7.include "testutils.inc"
8start
9
10include(std.inc)
11include(selfcheck.inc)
12include(gen_int.inc)
13INIT_R_REGS(0);
14INIT_P_REGS(0);
15INIT_I_REGS(0);     // initialize the dsp address regs
16INIT_M_REGS(0);
17INIT_L_REGS(0);
18INIT_B_REGS(0);
19//CHECK_INIT(p5, 0xe0000000);
20include(symtable.inc)
21CHECK_INIT_DEF(p5);
22
23
24#ifndef STACKSIZE
25#define STACKSIZE 0x10
26#endif
27#ifndef EVT
28#define EVT  0xFFE02000
29#endif
30#ifndef EVT15
31#define EVT15  0xFFE0203C
32#endif
33#ifndef EVT_OVERRIDE
34#define EVT_OVERRIDE 0xFFE02100
35#endif
36#ifndef ITABLE
37#define ITABLE 0xF0000000
38#endif
39
40GEN_INT_INIT(ITABLE) // set location for interrupt table
41
42//
43// Reset/Bootstrap Code
44//   (Here we should set the processor operating modes, initialize registers,
45//    etc.)
46//
47
48BOOT:
49
50
51LD32_LABEL(sp, KSTACK);   // setup the stack pointer
52FP = SP;        // and frame pointer
53
54LD32(p0, EVT);      // Setup Event Vectors and Handlers
55LD32_LABEL(r0, EHANDLE);  // Emulation Handler (Int0)
56    [ P0 ++ ] = R0;
57
58LD32_LABEL(r0, RHANDLE);  // Reset Handler (Int1)
59    [ P0 ++ ] = R0;
60
61LD32_LABEL(r0, NHANDLE);  // NMI Handler (Int2)
62    [ P0 ++ ] = R0;
63
64LD32_LABEL(r0, XHANDLE);  // Exception Handler (Int3)
65    [ P0 ++ ] = R0;
66
67    [ P0 ++ ] = R0;        // IVT4 not used
68
69LD32_LABEL(r0, HWHANDLE); // HW Error Handler (Int5)
70    [ P0 ++ ] = R0;
71
72LD32_LABEL(r0, THANDLE);  // Timer Handler (Int6)
73    [ P0 ++ ] = R0;
74
75LD32_LABEL(r0, I7HANDLE); // IVG7 Handler
76    [ P0 ++ ] = R0;
77
78LD32_LABEL(r0, I8HANDLE); // IVG8 Handler
79    [ P0 ++ ] = R0;
80
81LD32_LABEL(r0, I9HANDLE); // IVG9 Handler
82    [ P0 ++ ] = R0;
83
84LD32_LABEL(r0, I10HANDLE);// IVG10 Handler
85    [ P0 ++ ] = R0;
86
87LD32_LABEL(r0, I11HANDLE);// IVG11 Handler
88    [ P0 ++ ] = R0;
89
90LD32_LABEL(r0, I12HANDLE);// IVG12 Handler
91    [ P0 ++ ] = R0;
92
93LD32_LABEL(r0, I13HANDLE);// IVG13 Handler
94    [ P0 ++ ] = R0;
95
96LD32_LABEL(r0, I14HANDLE);// IVG14 Handler
97    [ P0 ++ ] = R0;
98
99LD32_LABEL(r0, I15HANDLE);// IVG15 Handler
100    [ P0 ++ ] = R0;
101
102LD32(p0, EVT_OVERRIDE);
103    R0 = 0;
104    [ P0 ++ ] = R0;
105    R0 = -1;     // Change this to mask interrupts (*)
106    [ P0 ] = R0;   // IMASK
107
108DUMMY:
109
110    R0 = 0 (Z);
111
112LT0 = r0;       // set loop counters to something deterministic
113LB0 = r0;
114LC0 = r0;
115LT1 = r0;
116LB1 = r0;
117LC1 = r0;
118
119ASTAT = r0;     // reset other internal regs
120SYSCFG = r0;
121RETS = r0;      // prevent X's breaking LINK instruction
122
123
124// The following code sets up the test for running in USER mode
125
126LD32_LABEL(r0, STARTUSER);// One gets to user mode by doing a
127                        // ReturnFromInterrupt (RTI)
128RETI = r0;      // We need to load the return address
129
130// Comment the following line for a USER Mode test
131
132JUMP    STARTSUP;   // jump to code start for SUPERVISOR mode
133
134RTI;
135
136STARTSUP:
137LD32_LABEL(p1, BEGIN);
138
139LD32(p0, EVT15);
140    [ P0 ] = P1;   // IVG15 (General) handler (Int 15) load with start
141CSYNC;
142RAISE 15;       // after we RTI, INT 15 should be taken
143
144RTI;
145
146//
147// The Main Program
148//
149STARTUSER:
150LD32_LABEL(sp, USTACK);   // setup the stack pointer
151FP = SP;            // set frame pointer
152JUMP BEGIN;
153
154//*********************************************************************
155
156BEGIN:
157
158                // COMMENT the following line for USER MODE tests
159    [ -- SP ] = RETI;  // enable interrupts in supervisor mode
160
161                // **** YOUR CODE GOES HERE ****
162
163
164
165    // PUT YOUR TEST HERE!
166                // Can't Raise 0, 3, or 4
167                // Raise 1 requires some intelligence so the test
168                //  doesn't loop forever - use SFTRESET bit in SEQSTAT (TBD)
169
170    R0 = 1;
171    R1 = 2;
172    R2 = 3;
173    R3 = 4;
174
175
176EXCPT 1;    // RTX
177EXCPT 2;    // RTX
178EXCPT 3;    // RTX
179EXCPT 4;    // RTX
180EXCPT 5;    // RTX
181EXCPT 5;    // RTX
182EXCPT 6;    // RTX
183EXCPT 7;    // RTX
184EXCPT 8;    // RTX
185EXCPT 9;    // RTX
186EXCPT 10;    // RTX
187EXCPT 11;    // RTX
188EXCPT 12;    // RTX
189EXCPT 13;    // RTX
190EXCPT 14;    // RTX
191EXCPT 15;    // RTX
192
193CHECKREG(r0, 0x33333333);
194CHECKREG(r1, 0xCCCCCCCD);
195CHECKREG(r2, 0x00000000);
196CHECKREG(r3, 0x33333333);
197CHECKREG(r4, 0x00000000);
198CHECKREG(r5, 0x00000000);
199CHECKREG(r6, 0x00000000);
200CHECKREG(r7, 0x00000000);
201
202
203END:
204dbg_pass;            // End the test
205
206//*********************************************************************
207
208//
209// Handlers for Events
210//
211
212EHANDLE:            // Emulation Handler 0
213RTE;
214
215RHANDLE:            // Reset Handler 1
216RTI;
217
218NHANDLE:            // NMI Handler 2
219    R0 = 2;
220RTN;
221
222XHANDLE:            // Exception Handler 3
223    R0 = R1 + R2;
224    R1 = R2 + R3;
225    R2 = R0 + R1;
226    R3 = R0 + R2;
227RTX;
228
229HWHANDLE:           // HW Error Handler 5
230    R2 = 5;
231RTI;
232
233THANDLE:            // Timer Handler 6
234    R3 = 6;
235RTI;
236
237I7HANDLE:           // IVG 7 Handler
238    R4 = 7;
239RTI;
240
241I8HANDLE:           // IVG 8 Handler
242    R5 = 8;
243RTI;
244
245I9HANDLE:           // IVG 9 Handler
246    R6 = 9;
247RTI;
248
249I10HANDLE:          // IVG 10 Handler
250    R7 = 10;
251RTI;
252
253I11HANDLE:          // IVG 11 Handler
254    R0 = 11;
255RTI;
256
257I12HANDLE:          // IVG 12 Handler
258    R1 = 12;
259RTI;
260
261I13HANDLE:          // IVG 13 Handler
262    R2 = 13;
263RTI;
264
265I14HANDLE:          // IVG 14 Handler
266    R3 = 14;
267RTI;
268
269I15HANDLE:          // IVG 15 Handler
270    R4 = 15;
271RTI;
272
273NOP;NOP;NOP;NOP;NOP;NOP;NOP; // needed for icache bug
274
275//
276// Data Segment
277//
278
279//.data 0xF0000000
280.data
281DATA:
282    .space (0x10);
283
284// Stack Segments (Both Kernel and User)
285
286    .space (STACKSIZE);
287KSTACK:
288
289    .space (STACKSIZE);
290USTACK:
291