167754Smsmith/* interrupts.h -- 68HC11 Interrupts Emulation
267754Smsmith   Copyright 1999-2020 Free Software Foundation, Inc.
367754Smsmith   Written by Stephane Carrez (stcarrez@worldnet.fr)
467754Smsmith
567754SmsmithThis file is part of GDB, GAS, and the GNU binutils.
667754Smsmith
7217365SjkimThis program is free software; you can redistribute it and/or modify
8245582Sjkimit under the terms of the GNU General Public License as published by
970243Smsmiththe Free Software Foundation; either version 3 of the License, or
1067754Smsmith(at your option) any later version.
11217365Sjkim
12217365SjkimThis program is distributed in the hope that it will be useful,
13217365Sjkimbut WITHOUT ANY WARRANTY; without even the implied warranty of
14217365SjkimMERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
15217365SjkimGNU General Public License for more details.
16217365Sjkim
17217365SjkimYou should have received a copy of the GNU General Public License
18217365Sjkimalong with this program.  If not, see <http://www.gnu.org/licenses/>.  */
19217365Sjkim
20217365Sjkim#ifndef _M6811_SIM_INTERRUPTS_H
21217365Sjkim#define _M6811_SIM_INTERRUPTS_H
22217365Sjkim
23217365Sjkim/* Definition of 68HC11 interrupts.  These enum are used as an index
24217365Sjkim   in the interrupt table.  */
2567754Smsmithenum M6811_INT
26217365Sjkim{
27217365Sjkim  M6811_INT_RESERVED1 = 0,
28217365Sjkim  M6811_INT_RESERVED2,
2967754Smsmith  M6811_INT_RESERVED3,
30217365Sjkim  M6811_INT_RESERVED4,
31217365Sjkim  M6811_INT_RESERVED5,
32217365Sjkim  M6811_INT_RESERVED6,
33217365Sjkim  M6811_INT_RESERVED7,
34217365Sjkim  M6811_INT_RESERVED8,
35217365Sjkim
36217365Sjkim  M6811_INT_RESERVED9,
37217365Sjkim  M6811_INT_RESERVED10,
38217365Sjkim  M6811_INT_RESERVED11,
39217365Sjkim
40217365Sjkim  M6811_INT_SCI,
41217365Sjkim  M6811_INT_SPI,
42217365Sjkim  M6811_INT_AINPUT,
4367754Smsmith  M6811_INT_AOVERFLOW,
4467754Smsmith  M6811_INT_TCTN,
4567754Smsmith
46193341Sjkim  M6811_INT_OUTCMP5,
47193341Sjkim  M6811_INT_OUTCMP4,
48193341Sjkim  M6811_INT_OUTCMP3,
49193341Sjkim  M6811_INT_OUTCMP2,
50193341Sjkim  M6811_INT_OUTCMP1,
51193341Sjkim
5267754Smsmith  M6811_INT_INCMP3,
5377424Smsmith  M6811_INT_INCMP2,
5491116Smsmith  M6811_INT_INCMP1,
5567754Smsmith
56151937Sjkim  M6811_INT_RT,
5767754Smsmith  M6811_INT_IRQ,
58151937Sjkim  M6811_INT_XIRQ,
59151937Sjkim  M6811_INT_SWI,
60151937Sjkim  M6811_INT_ILLEGAL,
61151937Sjkim
62151937Sjkim  M6811_INT_COPRESET,
63151937Sjkim  M6811_INT_COPFAIL,
64151937Sjkim
65151937Sjkim  M6811_INT_RESET,
66151937Sjkim  M6811_INT_NUMBER
6767754Smsmith};
6867754Smsmith
6967754Smsmith
7067754Smsmith/* Structure to describe how to recognize an interrupt in the
7167754Smsmith   68hc11 IO regs.  */
7267754Smsmithstruct interrupt_def
73167802Sjkim{
7467754Smsmith  enum M6811_INT   int_number;
7567754Smsmith  unsigned char    int_paddr;
76167802Sjkim  unsigned char    int_mask;
77167802Sjkim  unsigned char    enable_paddr;
7867754Smsmith  unsigned char    enabled_mask;
7967754Smsmith};
8067754Smsmith
81151937Sjkim#define MAX_INT_HISTORY 64
8267754Smsmith
8367754Smsmith/* Structure used to keep track of interrupt history.
8467754Smsmith   This is used to understand in which order interrupts were
85167802Sjkim   raised and when.  */
86167802Sjkimstruct interrupt_history
87193267Sjkim{
88167802Sjkim  enum M6811_INT   type;
8967754Smsmith
9067754Smsmith  /* CPU cycle when interrupt handler is called.  */
91167802Sjkim  signed64         taken_cycle;
9267754Smsmith
9367754Smsmith  /* CPU cycle when the interrupt is first raised by the device.  */
94167802Sjkim  signed64         raised_cycle;
95167802Sjkim};
96167802Sjkim
97167802Sjkim#define SIM_STOP_WHEN_RAISED 1
98167802Sjkim#define SIM_STOP_WHEN_TAKEN  2
99193267Sjkim
10067754Smsmith/* Information and control of pending interrupts.  */
101167802Sjkimstruct interrupt
102167802Sjkim{
103167802Sjkim  /* CPU cycle when the interrupt is raised by the device.  */
10467754Smsmith  signed64         cpu_cycle;
105167802Sjkim
106167802Sjkim  /* Number of times the interrupt was raised.  */
107167802Sjkim  unsigned long    raised_count;
108167802Sjkim
109167802Sjkim  /* Controls whether we must stop the simulator.  */
110167802Sjkim  int              stop_mode;
111167802Sjkim};
112167802Sjkim
11367754Smsmith
114167802Sjkim/* Management of 68HC11 interrupts:
115167802Sjkim    - We use a table of 'interrupt_def' to describe the interrupts that must be
116167802Sjkim      raised depending on IO register flags (enable and present flags).
11767754Smsmith    - We keep a mask of pending interrupts.  This mask is refreshed by
118167802Sjkim      calling 'interrupts_update_pending'.  It must be refreshed each time
11967754Smsmith      an IO register is changed.
120167802Sjkim    - 'interrupts_process' must be called after each insn. It has two purposes:
121245582Sjkim      first it maintains a min/max count of CPU cycles between which interrupts
12267754Smsmith      are masked; second it checks for pending interrupts and raise one if
12367754Smsmith      interrupts are enabled.  */
12467754Smsmithstruct interrupts {
12567754Smsmith  sim_cpu           *cpu;
12667754Smsmith
12767754Smsmith  /* Mask of current pending interrupts.  */
12867754Smsmith  unsigned long     pending_mask;
12967754Smsmith
13067754Smsmith  /* Address of vector table.  This is set depending on the
13167754Smsmith     68hc11 init mode.  */
13267754Smsmith  uint16            vectors_addr;
13367754Smsmith
134241973Sjkim  /* Priority order of interrupts.  This is controlled by setting the HPRIO
13567754Smsmith     IO register.  */
13667754Smsmith  enum M6811_INT    interrupt_order[M6811_INT_NUMBER];
13767754Smsmith  struct interrupt  interrupts[M6811_INT_NUMBER];
13867754Smsmith
13967754Smsmith  /* Simulator statistics to report useful debug information to users.  */
14067754Smsmith
14167754Smsmith  /* - Max/Min number of CPU cycles executed with interrupts masked.  */
14267754Smsmith  signed64          start_mask_cycle;
143167802Sjkim  signed64          min_mask_cycles;
14467754Smsmith  signed64          max_mask_cycles;
14567754Smsmith  signed64          last_mask_cycles;
146167802Sjkim
14767754Smsmith  /* - Same for XIRQ.  */
14867754Smsmith  signed64          xirq_start_mask_cycle;
149167802Sjkim  signed64          xirq_min_mask_cycles;
150107325Siwasaki  signed64          xirq_max_mask_cycles;
151167802Sjkim  signed64          xirq_last_mask_cycles;
15267754Smsmith
153167802Sjkim  /* - Total number of interrupts raised.  */
15467754Smsmith  unsigned long     nb_interrupts_raised;
15567754Smsmith
15667754Smsmith  /* Interrupt history to help understand which interrupts
15767754Smsmith     were raised recently and in which order.  */
15867754Smsmith  int               history_index;
15967754Smsmith  struct interrupt_history interrupts_history[MAX_INT_HISTORY];
16067754Smsmith};
16167754Smsmith
16267754Smsmithextern void interrupts_initialize     (SIM_DESC sd, sim_cpu *cpu);
16367754Smsmithextern void interrupts_reset          (struct interrupts* interrupts);
16467754Smsmithextern void interrupts_update_pending (struct interrupts* interrupts);
16567754Smsmithextern int  interrupts_get_current    (struct interrupts* interrupts);
166241973Sjkimextern int  interrupts_process        (struct interrupts* interrupts);
167241973Sjkimextern void interrupts_raise          (struct interrupts* interrupts,
16867754Smsmith                                       enum M6811_INT number);
16967754Smsmith
17067754Smsmithextern void interrupts_info           (SIM_DESC sd,
17167754Smsmith                                       struct interrupts* interrupts);
172114237Snjl
17367754Smsmith#endif
17467754Smsmith