1178253Sdelphij/* sim-main.h -- Interface with sim/common. 21573Srgrimes 31573Srgrimes Copyright (C) 2015-2020 Free Software Foundation, Inc. 41573Srgrimes 51573Srgrimes Contributed by Red Hat. 61573Srgrimes 71573Srgrimes This file is part of GDB. 81573Srgrimes 91573Srgrimes This program is free software; you can redistribute it and/or modify 101573Srgrimes it under the terms of the GNU General Public License as published by 111573Srgrimes the Free Software Foundation; either version 3 of the License, or 121573Srgrimes (at your option) any later version. 131573Srgrimes 141573Srgrimes This program is distributed in the hope that it will be useful, 151573Srgrimes but WITHOUT ANY WARRANTY; without even the implied warranty of 161573Srgrimes MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the 171573Srgrimes GNU General Public License for more details. 181573Srgrimes 191573Srgrimes You should have received a copy of the GNU General Public License 201573Srgrimes along with this program. If not, see <http://www.gnu.org/licenses/>. */ 211573Srgrimes 221573Srgrimes#ifndef _SIM_MAIN_H 231573Srgrimes#define _SIM_MAIN_H 241573Srgrimes 251573Srgrimes#include "sim-basics.h" 261573Srgrimes#include "sim-types.h" 271573Srgrimes#include "sim-base.h" 281573Srgrimes#include "sim-base.h" 291573Srgrimes#include "sim-io.h" 301573Srgrimes#include "cpustate.h" 3123668Speter 321573Srgrimes/* A per-core state structure. */ 3390039Sobrienstruct _sim_cpu 3490039Sobrien{ 351573Srgrimes GRegister gr[33]; /* Extra register at index 32 is used to hold zero value. */ 3671579Sdeischen FRegister fr[32]; 371573Srgrimes 3823768Sbde uint64_t pc; 397978Sbde uint32_t CPSR; 401573Srgrimes uint32_t FPSR; /* Floating point Status register. */ 411573Srgrimes uint32_t FPCR; /* Floating point Control register. */ 427978Sbde 431573Srgrimes uint64_t nextpc; 441573Srgrimes uint32_t instr; 45108631Stjr 461573Srgrimes uint64_t tpidr; /* Thread pointer id. */ 4771579Sdeischen 481573Srgrimes sim_cpu_base base; 4969841Sdeischen}; 50178256Sdelphij 51178256Sdelphijtypedef enum 52178256Sdelphij{ 531573Srgrimes AARCH64_MIN_GR = 0, 5423668Speter AARCH64_MAX_GR = 31, 551573Srgrimes AARCH64_MIN_FR = 32, 561573Srgrimes AARCH64_MAX_FR = 63, 57178253Sdelphij AARCH64_PC_REGNO = 64, 581573Srgrimes AARCH64_CPSR_REGNO = 65, 5973632Sobrien AARCH64_FPSR_REGNO = 66, 6023668Speter AARCH64_MAX_REGNO = 67 6123668Speter} aarch64_regno; 621573Srgrimes 63178256Sdelphij/* The simulator state structure used to hold all global variables. */ 64178256Sdelphijstruct sim_state 65178256Sdelphij{ 6623668Speter sim_cpu * cpu[MAX_NR_PROCESSORS]; 67178256Sdelphij sim_state_base base; 68178256Sdelphij}; 69178256Sdelphij 70178256Sdelphij#endif /* _SIM_MAIN_H */ 71178256Sdelphij