1/* GNU/Linux/PowerPC specific low level interface, for the in-process
2   agent library for GDB.
3
4   Copyright (C) 2016-2020 Free Software Foundation, Inc.
5
6   This file is part of GDB.
7
8   This program is free software; you can redistribute it and/or modify
9   it under the terms of the GNU General Public License as published by
10   the Free Software Foundation; either version 3 of the License, or
11   (at your option) any later version.
12
13   This program is distributed in the hope that it will be useful,
14   but WITHOUT ANY WARRANTY; without even the implied warranty of
15   MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
16   GNU General Public License for more details.
17
18   You should have received a copy of the GNU General Public License
19   along with this program.  If not, see <http://www.gnu.org/licenses/>.  */
20
21#include "server.h"
22#include <sys/mman.h>
23#include "tracepoint.h"
24#include "arch/ppc-linux-tdesc.h"
25#include "linux-ppc-tdesc-init.h"
26#include <elf.h>
27#ifdef HAVE_GETAUXVAL
28#include <sys/auxv.h>
29#endif
30
31/* These macros define the position of registers in the buffer collected
32   by the fast tracepoint jump pad.  */
33#define FT_CR_R0	0
34#define FT_CR_CR	32
35#define FT_CR_XER	33
36#define FT_CR_LR	34
37#define FT_CR_CTR	35
38#define FT_CR_PC	36
39#define FT_CR_GPR(n)	(FT_CR_R0 + (n))
40
41static const int ppc_ft_collect_regmap[] = {
42  /* GPRs */
43  FT_CR_GPR (0), FT_CR_GPR (1), FT_CR_GPR (2),
44  FT_CR_GPR (3), FT_CR_GPR (4), FT_CR_GPR (5),
45  FT_CR_GPR (6), FT_CR_GPR (7), FT_CR_GPR (8),
46  FT_CR_GPR (9), FT_CR_GPR (10), FT_CR_GPR (11),
47  FT_CR_GPR (12), FT_CR_GPR (13), FT_CR_GPR (14),
48  FT_CR_GPR (15), FT_CR_GPR (16), FT_CR_GPR (17),
49  FT_CR_GPR (18), FT_CR_GPR (19), FT_CR_GPR (20),
50  FT_CR_GPR (21), FT_CR_GPR (22), FT_CR_GPR (23),
51  FT_CR_GPR (24), FT_CR_GPR (25), FT_CR_GPR (26),
52  FT_CR_GPR (27), FT_CR_GPR (28), FT_CR_GPR (29),
53  FT_CR_GPR (30), FT_CR_GPR (31),
54  /* FPRs - not collected.  */
55  -1, -1, -1, -1, -1, -1, -1, -1,
56  -1, -1, -1, -1, -1, -1, -1, -1,
57  -1, -1, -1, -1, -1, -1, -1, -1,
58  -1, -1, -1, -1, -1, -1, -1, -1,
59  FT_CR_PC, /* PC */
60  -1, /* MSR */
61  FT_CR_CR, /* CR */
62  FT_CR_LR, /* LR */
63  FT_CR_CTR, /* CTR */
64  FT_CR_XER, /* XER */
65  -1, /* FPSCR */
66};
67
68#define PPC_NUM_FT_COLLECT_GREGS \
69  (sizeof (ppc_ft_collect_regmap) / sizeof(ppc_ft_collect_regmap[0]))
70
71/* Supply registers collected by the fast tracepoint jump pad.
72   BUF is the second argument we pass to gdb_collect in jump pad.  */
73
74void
75supply_fast_tracepoint_registers (struct regcache *regcache,
76				  const unsigned char *buf)
77{
78  int i;
79
80  for (i = 0; i < PPC_NUM_FT_COLLECT_GREGS; i++)
81    {
82      if (ppc_ft_collect_regmap[i] == -1)
83	continue;
84      supply_register (regcache, i,
85		       ((char *) buf)
86			+ ppc_ft_collect_regmap[i] * sizeof (long));
87    }
88}
89
90/* Return the value of register REGNUM.  RAW_REGS is collected buffer
91   by jump pad.  This function is called by emit_reg.  */
92
93ULONGEST
94get_raw_reg (const unsigned char *raw_regs, int regnum)
95{
96  if (regnum >= PPC_NUM_FT_COLLECT_GREGS)
97    return 0;
98  if (ppc_ft_collect_regmap[regnum] == -1)
99    return 0;
100
101  return *(unsigned long *) (raw_regs
102			     + ppc_ft_collect_regmap[regnum] * sizeof (long));
103}
104
105/* Allocate buffer for the jump pads.  The branch instruction has a reach
106   of +/- 32MiB, and the executable is loaded at 0x10000000 (256MiB).
107
108   64-bit: To maximize the area of executable that can use tracepoints,
109   try allocating at 0x10000000 - size initially, decreasing until we hit
110   a free area.
111
112   32-bit: ld.so loads dynamic libraries right below the executable, so
113   we cannot depend on that area (dynamic libraries can be quite large).
114   Instead, aim right after the executable - at sbrk(0).  This will
115   cause future brk to fail, and malloc will fallback to mmap.  */
116
117void *
118alloc_jump_pad_buffer (size_t size)
119{
120#ifdef __powerpc64__
121  uintptr_t addr;
122  uintptr_t exec_base = getauxval (AT_PHDR);
123  int pagesize;
124  void *res;
125
126  if (exec_base == 0)
127    exec_base = 0x10000000;
128
129  pagesize = sysconf (_SC_PAGE_SIZE);
130  if (pagesize == -1)
131    perror_with_name ("sysconf");
132
133  addr = exec_base - size;
134
135  /* size should already be page-aligned, but this can't hurt.  */
136  addr &= ~(pagesize - 1);
137
138  /* Search for a free area.  If we hit 0, we're out of luck.  */
139  for (; addr; addr -= pagesize)
140    {
141      /* No MAP_FIXED - we don't want to zap someone's mapping.  */
142      res = mmap ((void *) addr, size,
143		  PROT_READ | PROT_WRITE | PROT_EXEC,
144		  MAP_PRIVATE | MAP_ANONYMOUS, -1, 0);
145
146      /* If we got what we wanted, return.  */
147      if ((uintptr_t) res == addr)
148	return res;
149
150      /* If we got a mapping, but at a wrong address, undo it.  */
151      if (res != MAP_FAILED)
152	munmap (res, size);
153    }
154
155  return NULL;
156#else
157  void *target = sbrk (0);
158  void *res = mmap (target, size, PROT_READ | PROT_WRITE | PROT_EXEC,
159		    MAP_PRIVATE | MAP_ANONYMOUS, -1, 0);
160
161  if (res == target)
162    return res;
163
164  if (res != MAP_FAILED)
165    munmap (res, size);
166
167  return NULL;
168#endif
169}
170
171/* Return target_desc to use for IPA, given the tdesc index passed by
172   gdbserver.  */
173
174const struct target_desc *
175get_ipa_tdesc (int idx)
176{
177  switch (idx)
178    {
179#ifdef __powerpc64__
180    case PPC_TDESC_BASE:
181      return tdesc_powerpc_64l;
182    case PPC_TDESC_ALTIVEC:
183      return tdesc_powerpc_altivec64l;
184    case PPC_TDESC_VSX:
185      return tdesc_powerpc_vsx64l;
186    case PPC_TDESC_ISA205:
187      return tdesc_powerpc_isa205_64l;
188    case PPC_TDESC_ISA205_ALTIVEC:
189      return tdesc_powerpc_isa205_altivec64l;
190    case PPC_TDESC_ISA205_VSX:
191      return tdesc_powerpc_isa205_vsx64l;
192    case PPC_TDESC_ISA205_PPR_DSCR_VSX:
193      return tdesc_powerpc_isa205_ppr_dscr_vsx64l;
194    case PPC_TDESC_ISA207_VSX:
195      return tdesc_powerpc_isa207_vsx64l;
196    case PPC_TDESC_ISA207_HTM_VSX:
197      return tdesc_powerpc_isa207_htm_vsx64l;
198#else
199    case PPC_TDESC_BASE:
200      return tdesc_powerpc_32l;
201    case PPC_TDESC_ALTIVEC:
202      return tdesc_powerpc_altivec32l;
203    case PPC_TDESC_VSX:
204      return tdesc_powerpc_vsx32l;
205    case PPC_TDESC_ISA205:
206      return tdesc_powerpc_isa205_32l;
207    case PPC_TDESC_ISA205_ALTIVEC:
208      return tdesc_powerpc_isa205_altivec32l;
209    case PPC_TDESC_ISA205_VSX:
210      return tdesc_powerpc_isa205_vsx32l;
211    case PPC_TDESC_ISA205_PPR_DSCR_VSX:
212      return tdesc_powerpc_isa205_ppr_dscr_vsx32l;
213    case PPC_TDESC_ISA207_VSX:
214      return tdesc_powerpc_isa207_vsx32l;
215    case PPC_TDESC_ISA207_HTM_VSX:
216      return tdesc_powerpc_isa207_htm_vsx32l;
217    case PPC_TDESC_E500:
218      return tdesc_powerpc_e500l;
219#endif
220    default:
221      internal_error (__FILE__, __LINE__,
222                     "unknown ipa tdesc index: %d", idx);
223#ifdef __powerpc64__
224      return tdesc_powerpc_64l;
225#else
226      return tdesc_powerpc_32l;
227#endif
228    }
229}
230
231
232/* Initialize ipa_tdesc and others.  */
233
234void
235initialize_low_tracepoint (void)
236{
237#ifdef __powerpc64__
238  init_registers_powerpc_64l ();
239  init_registers_powerpc_altivec64l ();
240  init_registers_powerpc_vsx64l ();
241  init_registers_powerpc_isa205_64l ();
242  init_registers_powerpc_isa205_altivec64l ();
243  init_registers_powerpc_isa205_vsx64l ();
244  init_registers_powerpc_isa205_ppr_dscr_vsx64l ();
245  init_registers_powerpc_isa207_vsx64l ();
246  init_registers_powerpc_isa207_htm_vsx64l ();
247#else
248  init_registers_powerpc_32l ();
249  init_registers_powerpc_altivec32l ();
250  init_registers_powerpc_vsx32l ();
251  init_registers_powerpc_isa205_32l ();
252  init_registers_powerpc_isa205_altivec32l ();
253  init_registers_powerpc_isa205_vsx32l ();
254  init_registers_powerpc_isa205_ppr_dscr_vsx32l ();
255  init_registers_powerpc_isa207_vsx32l ();
256  init_registers_powerpc_isa207_htm_vsx32l ();
257  init_registers_powerpc_e500l ();
258#endif
259}
260