1/* Target-dependent code for the i386.
2
3   Copyright (C) 2001-2020 Free Software Foundation, Inc.
4
5   This file is part of GDB.
6
7   This program is free software; you can redistribute it and/or modify
8   it under the terms of the GNU General Public License as published by
9   the Free Software Foundation; either version 3 of the License, or
10   (at your option) any later version.
11
12   This program is distributed in the hope that it will be useful,
13   but WITHOUT ANY WARRANTY; without even the implied warranty of
14   MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
15   GNU General Public License for more details.
16
17   You should have received a copy of the GNU General Public License
18   along with this program.  If not, see <http://www.gnu.org/licenses/>.  */
19
20#ifndef I386_TDEP_H
21#define I386_TDEP_H
22
23#include "gdbarch.h"
24#include "infrun.h"
25
26struct frame_info;
27struct gdbarch;
28struct reggroup;
29struct regset;
30struct regcache;
31
32/* GDB's i386 target supports both the 32-bit Intel Architecture
33   (IA-32) and the 64-bit AMD x86-64 architecture.  Internally it uses
34   a similar register layout for both.
35
36   - General purpose registers
37   - FPU data registers
38   - FPU control registers
39   - SSE data registers
40   - SSE control register
41
42   The general purpose registers for the x86-64 architecture are quite
43   different from IA-32.  Therefore, gdbarch_fp0_regnum
44   determines the register number at which the FPU data registers
45   start.  The number of FPU data and control registers is the same
46   for both architectures.  The number of SSE registers however,
47   differs and is determined by the num_xmm_regs member of `struct
48   gdbarch_tdep'.  */
49
50/* Convention for returning structures.  */
51
52enum struct_return
53{
54  pcc_struct_return,		/* Return "short" structures in memory.  */
55  reg_struct_return		/* Return "short" structures in registers.  */
56};
57
58/* i386 architecture specific information.  */
59struct gdbarch_tdep
60{
61  /* General-purpose registers.  */
62  int *gregset_reg_offset;
63  int gregset_num_regs;
64  size_t sizeof_gregset;
65
66  /* Floating-point registers.  */
67  size_t sizeof_fpregset;
68
69  /* Register number for %st(0).  The register numbers for the other
70     registers follow from this one.  Set this to -1 to indicate the
71     absence of an FPU.  */
72  int st0_regnum;
73
74  /* Number of MMX registers.  */
75  int num_mmx_regs;
76
77  /* Register number for %mm0.  Set this to -1 to indicate the absence
78     of MMX support.  */
79  int mm0_regnum;
80
81  /* Number of pseudo YMM registers.  */
82  int num_ymm_regs;
83
84  /* Register number for %ymm0.  Set this to -1 to indicate the absence
85     of pseudo YMM register support.  */
86  int ymm0_regnum;
87
88  /* Number of AVX512 OpMask registers (K-registers)  */
89  int num_k_regs;
90
91  /* Register number for %k0.  Set this to -1 to indicate the absence
92     of AVX512 OpMask register support.  */
93  int k0_regnum;
94
95  /* Number of pseudo ZMM registers ($zmm0-$zmm31).  */
96  int num_zmm_regs;
97
98  /* Register number for %zmm0.  Set this to -1 to indicate the absence
99     of pseudo ZMM register support.  */
100  int zmm0_regnum;
101
102  /* Number of byte registers.  */
103  int num_byte_regs;
104
105  /* Register pseudo number for %al.  */
106  int al_regnum;
107
108  /* Number of pseudo word registers.  */
109  int num_word_regs;
110
111  /* Register number for %ax.  */
112  int ax_regnum;
113
114  /* Number of pseudo dword registers.  */
115  int num_dword_regs;
116
117  /* Register number for %eax.  Set this to -1 to indicate the absence
118     of pseudo dword register support.  */
119  int eax_regnum;
120
121  /* Number of core registers.  */
122  int num_core_regs;
123
124  /* Number of SSE registers.  */
125  int num_xmm_regs;
126
127  /* Number of SSE registers added in AVX512.  */
128  int num_xmm_avx512_regs;
129
130  /* Register number of XMM16, the first XMM register added in AVX512.  */
131  int xmm16_regnum;
132
133  /* Number of YMM registers added in AVX512.  */
134  int num_ymm_avx512_regs;
135
136  /* Register number of YMM16, the first YMM register added in AVX512.  */
137  int ymm16_regnum;
138
139  /* Bits of the extended control register 0 (the XFEATURE_ENABLED_MASK
140     register), excluding the x87 bit, which are supported by this GDB.  */
141
142  uint64_t xcr0;
143
144  /* Offset of XCR0 in XSAVE extended state.  */
145  int xsave_xcr0_offset;
146
147  /* Register names.  */
148  const char **register_names;
149
150  /* Register number for %ymm0h.  Set this to -1 to indicate the absence
151     of upper YMM register support.  */
152  int ymm0h_regnum;
153
154  /* Upper YMM register names.  Only used for tdesc_numbered_register.  */
155  const char **ymmh_register_names;
156
157  /* Register number for %ymm16h.  Set this to -1 to indicate the absence
158  of support for YMM16-31.  */
159  int ymm16h_regnum;
160
161  /* YMM16-31 register names.  Only used for tdesc_numbered_register.  */
162  const char **ymm16h_register_names;
163
164  /* Register number for %bnd0r.  Set this to -1 to indicate the absence
165     bound registers.  */
166  int bnd0r_regnum;
167
168  /* Register number for pseudo register %bnd0.  Set this to -1 to indicate the absence
169     bound registers.  */
170  int bnd0_regnum;
171
172  /* Register number for %bndcfgu. Set this to -1 to indicate the absence
173     bound control registers.  */
174  int bndcfgu_regnum;
175
176  /* MPX register names.  Only used for tdesc_numbered_register.  */
177  const char **mpx_register_names;
178
179  /* Register number for %zmm0h.  Set this to -1 to indicate the absence
180     of ZMM_HI256 register support.  */
181  int zmm0h_regnum;
182
183  /* OpMask register names.  */
184  const char **k_register_names;
185
186  /* ZMM register names.  Only used for tdesc_numbered_register.  */
187  const char **zmmh_register_names;
188
189  /* XMM16-31 register names.  Only used for tdesc_numbered_register.  */
190  const char **xmm_avx512_register_names;
191
192  /* YMM16-31 register names.  Only used for tdesc_numbered_register.  */
193  const char **ymm_avx512_register_names;
194
195  /* Number of PKEYS registers.  */
196  int num_pkeys_regs;
197
198  /* Register number for PKRU register.  */
199  int pkru_regnum;
200
201  /* PKEYS register names.  */
202  const char **pkeys_register_names;
203
204  /* Register number for %fsbase.  Set this to -1 to indicate the
205     absence of segment base registers.  */
206  int fsbase_regnum;
207
208  /* Target description.  */
209  const struct target_desc *tdesc;
210
211  /* Register group function.  */
212  gdbarch_register_reggroup_p_ftype *register_reggroup_p;
213
214  /* Offset of saved PC in jmp_buf.  */
215  int jb_pc_offset;
216
217  /* Convention for returning structures.  */
218  enum struct_return struct_return;
219
220  /* Address range where sigtramp lives.  */
221  CORE_ADDR sigtramp_start;
222  CORE_ADDR sigtramp_end;
223
224  /* Detect sigtramp.  */
225  int (*sigtramp_p) (struct frame_info *);
226
227  /* Get address of sigcontext for sigtramp.  */
228  CORE_ADDR (*sigcontext_addr) (struct frame_info *);
229
230  /* Offset of registers in `struct sigcontext'.  */
231  int *sc_reg_offset;
232  int sc_num_regs;
233
234  /* Offset of saved PC and SP in `struct sigcontext'.  Usage of these
235     is deprecated, please use `sc_reg_offset' instead.  */
236  int sc_pc_offset;
237  int sc_sp_offset;
238
239  /* ISA-specific data types.  */
240  struct type *i386_mmx_type;
241  struct type *i386_ymm_type;
242  struct type *i386_zmm_type;
243  struct type *i387_ext_type;
244  struct type *i386_bnd_type;
245
246  /* Process record/replay target.  */
247  /* The map for registers because the AMD64's registers order
248     in GDB is not same as I386 instructions.  */
249  const int *record_regmap;
250  /* Parse intx80 args.  */
251  int (*i386_intx80_record) (struct regcache *regcache);
252  /* Parse sysenter args.  */
253  int (*i386_sysenter_record) (struct regcache *regcache);
254  /* Parse syscall args.  */
255  int (*i386_syscall_record) (struct regcache *regcache);
256
257  /* Regsets. */
258  const struct regset *fpregset;
259};
260
261/* Floating-point registers.  */
262
263/* All FPU control registers (except for FIOFF and FOOFF) are 16-bit
264   (at most) in the FPU, but are zero-extended to 32 bits in GDB's
265   register cache.  */
266
267/* Return non-zero if REGNUM matches the FP register and the FP
268   register set is active.  */
269extern int i386_fp_regnum_p (struct gdbarch *, int);
270extern int i386_fpc_regnum_p (struct gdbarch *, int);
271
272/* Register numbers of various important registers.  */
273
274enum i386_regnum
275{
276  I386_EAX_REGNUM,		/* %eax */
277  I386_ECX_REGNUM,		/* %ecx */
278  I386_EDX_REGNUM,		/* %edx */
279  I386_EBX_REGNUM,		/* %ebx */
280  I386_ESP_REGNUM,		/* %esp */
281  I386_EBP_REGNUM,		/* %ebp */
282  I386_ESI_REGNUM,		/* %esi */
283  I386_EDI_REGNUM,		/* %edi */
284  I386_EIP_REGNUM,		/* %eip */
285  I386_EFLAGS_REGNUM,		/* %eflags */
286  I386_CS_REGNUM,		/* %cs */
287  I386_SS_REGNUM,		/* %ss */
288  I386_DS_REGNUM,		/* %ds */
289  I386_ES_REGNUM,		/* %es */
290  I386_FS_REGNUM,		/* %fs */
291  I386_GS_REGNUM,		/* %gs */
292  I386_ST0_REGNUM,		/* %st(0) */
293  I386_MXCSR_REGNUM = 40,	/* %mxcsr */
294  I386_YMM0H_REGNUM,		/* %ymm0h */
295  I386_YMM7H_REGNUM = I386_YMM0H_REGNUM + 7,
296  I386_BND0R_REGNUM,
297  I386_BND3R_REGNUM = I386_BND0R_REGNUM + 3,
298  I386_BNDCFGU_REGNUM,
299  I386_BNDSTATUS_REGNUM,
300  I386_K0_REGNUM,		/* %k0 */
301  I386_K7_REGNUM = I386_K0_REGNUM + 7,
302  I386_ZMM0H_REGNUM,		/* %zmm0h */
303  I386_ZMM7H_REGNUM = I386_ZMM0H_REGNUM + 7,
304  I386_PKRU_REGNUM,
305  I386_FSBASE_REGNUM,
306  I386_GSBASE_REGNUM
307};
308
309/* Register numbers of RECORD_REGMAP.  */
310
311enum record_i386_regnum
312{
313  X86_RECORD_REAX_REGNUM,
314  X86_RECORD_RECX_REGNUM,
315  X86_RECORD_REDX_REGNUM,
316  X86_RECORD_REBX_REGNUM,
317  X86_RECORD_RESP_REGNUM,
318  X86_RECORD_REBP_REGNUM,
319  X86_RECORD_RESI_REGNUM,
320  X86_RECORD_REDI_REGNUM,
321  X86_RECORD_R8_REGNUM,
322  X86_RECORD_R9_REGNUM,
323  X86_RECORD_R10_REGNUM,
324  X86_RECORD_R11_REGNUM,
325  X86_RECORD_R12_REGNUM,
326  X86_RECORD_R13_REGNUM,
327  X86_RECORD_R14_REGNUM,
328  X86_RECORD_R15_REGNUM,
329  X86_RECORD_REIP_REGNUM,
330  X86_RECORD_EFLAGS_REGNUM,
331  X86_RECORD_CS_REGNUM,
332  X86_RECORD_SS_REGNUM,
333  X86_RECORD_DS_REGNUM,
334  X86_RECORD_ES_REGNUM,
335  X86_RECORD_FS_REGNUM,
336  X86_RECORD_GS_REGNUM,
337};
338
339#define I386_NUM_GREGS	16
340#define I386_NUM_XREGS  9
341
342#define I386_SSE_NUM_REGS	(I386_MXCSR_REGNUM + 1)
343#define I386_AVX_NUM_REGS	(I386_YMM7H_REGNUM + 1)
344#define I386_MPX_NUM_REGS	(I386_BNDSTATUS_REGNUM + 1)
345#define I386_AVX512_NUM_REGS	(I386_ZMM7H_REGNUM + 1)
346#define I386_PKEYS_NUM_REGS	(I386_PKRU_REGNUM + 1)
347#define I386_NUM_REGS		(I386_GSBASE_REGNUM + 1)
348
349/* Size of the largest register.  */
350#define I386_MAX_REGISTER_SIZE	64
351
352/* Types for i386-specific registers.  */
353extern struct type *i387_ext_type (struct gdbarch *gdbarch);
354
355/* Checks of different pseudo-registers.  */
356extern int i386_byte_regnum_p (struct gdbarch *gdbarch, int regnum);
357extern int i386_word_regnum_p (struct gdbarch *gdbarch, int regnum);
358extern int i386_dword_regnum_p (struct gdbarch *gdbarch, int regnum);
359extern int i386_xmm_regnum_p (struct gdbarch *gdbarch, int regnum);
360extern int i386_xmm_avx512_regnum_p (struct gdbarch * gdbarch, int regnum);
361extern int i386_ymm_regnum_p (struct gdbarch *gdbarch, int regnum);
362extern int i386_ymm_avx512_regnum_p (struct gdbarch *gdbarch, int regnum);
363extern int i386_bnd_regnum_p (struct gdbarch *gdbarch, int regnum);
364extern int i386_k_regnum_p (struct gdbarch *gdbarch, int regnum);
365extern int i386_zmm_regnum_p (struct gdbarch *gdbarch, int regnum);
366extern int i386_zmmh_regnum_p (struct gdbarch *gdbarch, int regnum);
367extern bool i386_pkru_regnum_p (struct gdbarch *gdbarch, int regnum);
368
369extern const char *i386_pseudo_register_name (struct gdbarch *gdbarch,
370					      int regnum);
371extern struct type *i386_pseudo_register_type (struct gdbarch *gdbarch,
372					       int regnum);
373
374extern void i386_pseudo_register_read_into_value (struct gdbarch *gdbarch,
375						  readable_regcache *regcache,
376						  int regnum,
377						  struct value *result);
378
379extern void i386_pseudo_register_write (struct gdbarch *gdbarch,
380					struct regcache *regcache,
381					int regnum, const gdb_byte *buf);
382
383extern int i386_ax_pseudo_register_collect (struct gdbarch *gdbarch,
384					    struct agent_expr *ax,
385					    int regnum);
386
387/* Segment selectors.  */
388#define I386_SEL_RPL	0x0003  /* Requester's Privilege Level mask.  */
389#define I386_SEL_UPL	0x0003	/* User Privilige Level.  */
390#define I386_SEL_KPL	0x0000	/* Kernel Privilige Level.  */
391
392/* The length of the longest i386 instruction (according to
393   include/asm-i386/kprobes.h in Linux 2.6.  */
394#define I386_MAX_INSN_LEN (16)
395
396/* Functions exported from i386-tdep.c.  */
397extern CORE_ADDR i386_pe_skip_trampoline_code (struct frame_info *frame,
398					       CORE_ADDR pc, char *name);
399extern CORE_ADDR i386_skip_main_prologue (struct gdbarch *gdbarch,
400					  CORE_ADDR pc);
401
402/* The "push_dummy_call" gdbarch method, optionally with the thiscall
403   calling convention.  */
404extern CORE_ADDR i386_thiscall_push_dummy_call (struct gdbarch *gdbarch,
405						struct value *function,
406						struct regcache *regcache,
407						CORE_ADDR bp_addr,
408						int nargs, struct value **args,
409						CORE_ADDR sp,
410						function_call_return_method
411						return_method,
412						CORE_ADDR struct_addr,
413						bool thiscall);
414
415/* Return whether the THIS_FRAME corresponds to a sigtramp routine.  */
416extern int i386_sigtramp_p (struct frame_info *this_frame);
417
418/* Return non-zero if REGNUM is a member of the specified group.  */
419extern int i386_register_reggroup_p (struct gdbarch *gdbarch, int regnum,
420				     struct reggroup *group);
421
422/* Supply register REGNUM from the general-purpose register set REGSET
423   to register cache REGCACHE.  If REGNUM is -1, do this for all
424   registers in REGSET.  */
425extern void i386_supply_gregset (const struct regset *regset,
426				 struct regcache *regcache, int regnum,
427				 const void *gregs, size_t len);
428
429/* General-purpose register set. */
430extern const struct regset i386_gregset;
431
432/* Floating-point register set. */
433extern const struct regset i386_fpregset;
434
435/* Default iterator over core file register note sections.  */
436extern void
437  i386_iterate_over_regset_sections (struct gdbarch *gdbarch,
438				     iterate_over_regset_sections_cb *cb,
439				     void *cb_data,
440				     const struct regcache *regcache);
441
442typedef buf_displaced_step_closure i386_displaced_step_closure;
443
444extern displaced_step_closure_up i386_displaced_step_copy_insn
445  (struct gdbarch *gdbarch, CORE_ADDR from, CORE_ADDR to,
446   struct regcache *regs);
447extern void i386_displaced_step_fixup (struct gdbarch *gdbarch,
448				       struct displaced_step_closure *closure,
449				       CORE_ADDR from, CORE_ADDR to,
450				       struct regcache *regs);
451
452/* Initialize a basic ELF architecture variant.  */
453extern void i386_elf_init_abi (struct gdbarch_info, struct gdbarch *);
454
455/* Initialize a SVR4 architecture variant.  */
456extern void i386_svr4_init_abi (struct gdbarch_info, struct gdbarch *);
457
458/* Convert SVR4 register number REG to the appropriate register number
459   used by GDB.  */
460extern int i386_svr4_reg_to_regnum (struct gdbarch *gdbarch, int reg);
461
462extern int i386_process_record (struct gdbarch *gdbarch,
463                                struct regcache *regcache, CORE_ADDR addr);
464extern const struct target_desc *i386_target_description (uint64_t xcr0,
465							  bool segments);
466
467/* Return true iff the current target is MPX enabled.  */
468extern int i386_mpx_enabled (void);
469
470
471/* Functions and variables exported from i386-bsd-tdep.c.  */
472
473extern void i386bsd_init_abi (struct gdbarch_info, struct gdbarch *);
474extern CORE_ADDR i386fbsd_sigtramp_start_addr;
475extern CORE_ADDR i386fbsd_sigtramp_end_addr;
476extern CORE_ADDR i386obsd_sigtramp_start_addr;
477extern CORE_ADDR i386obsd_sigtramp_end_addr;
478extern int i386fbsd4_sc_reg_offset[];
479extern int i386fbsd_sc_reg_offset[];
480extern int i386nbsd_sc_reg_offset[];
481extern int i386obsd_sc_reg_offset[];
482extern int i386bsd_sc_reg_offset[];
483
484/* SystemTap related functions.  */
485
486extern int i386_stap_is_single_operand (struct gdbarch *gdbarch,
487					const char *s);
488
489extern int i386_stap_parse_special_token (struct gdbarch *gdbarch,
490					  struct stap_parse_info *p);
491
492#endif /* i386-tdep.h */
493