elf32-rx.c revision 1.9
1/* Renesas RX specific support for 32-bit ELF. 2 Copyright (C) 2008-2020 Free Software Foundation, Inc. 3 4 This file is part of BFD, the Binary File Descriptor library. 5 6 This program is free software; you can redistribute it and/or modify 7 it under the terms of the GNU General Public License as published by 8 the Free Software Foundation; either version 3 of the License, or 9 (at your option) any later version. 10 11 This program is distributed in the hope that it will be useful, 12 but WITHOUT ANY WARRANTY; without even the implied warranty of 13 MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the 14 GNU General Public License for more details. 15 16 You should have received a copy of the GNU General Public License 17 along with this program; if not, write to the Free Software 18 Foundation, Inc., 51 Franklin Street - Fifth Floor, Boston, 19 MA 02110-1301, USA. */ 20 21#include "sysdep.h" 22#include "bfd.h" 23#include "libbfd.h" 24#include "elf-bfd.h" 25#include "elf/rx.h" 26#include "libiberty.h" 27#include "elf32-rx.h" 28 29#define RX_OPCODE_BIG_ENDIAN 0 30 31/* This is a meta-target that's used only with objcopy, to avoid the 32 endian-swap we would otherwise get. We check for this in 33 rx_elf_object_p(). */ 34const bfd_target rx_elf32_be_ns_vec; 35const bfd_target rx_elf32_be_vec; 36 37#ifdef DEBUG 38char * rx_get_reloc (long); 39void rx_dump_symtab (bfd *, void *, void *); 40#endif 41 42#define RXREL(n,sz,bit,shift,complain,pcrel) \ 43 HOWTO (R_RX_##n, shift, sz, bit, pcrel, 0, complain_overflow_ ## complain, \ 44 bfd_elf_generic_reloc, "R_RX_" #n, FALSE, 0, ~0, FALSE) 45 46/* Note that the relocations around 0x7f are internal to this file; 47 feel free to move them as needed to avoid conflicts with published 48 relocation numbers. */ 49 50static reloc_howto_type rx_elf_howto_table [] = 51{ 52 RXREL (NONE, 3, 0, 0, dont, FALSE), 53 RXREL (DIR32, 2, 32, 0, signed, FALSE), 54 RXREL (DIR24S, 2, 24, 0, signed, FALSE), 55 RXREL (DIR16, 1, 16, 0, dont, FALSE), 56 RXREL (DIR16U, 1, 16, 0, unsigned, FALSE), 57 RXREL (DIR16S, 1, 16, 0, signed, FALSE), 58 RXREL (DIR8, 0, 8, 0, dont, FALSE), 59 RXREL (DIR8U, 0, 8, 0, unsigned, FALSE), 60 RXREL (DIR8S, 0, 8, 0, signed, FALSE), 61 RXREL (DIR24S_PCREL, 2, 24, 0, signed, TRUE), 62 RXREL (DIR16S_PCREL, 1, 16, 0, signed, TRUE), 63 RXREL (DIR8S_PCREL, 0, 8, 0, signed, TRUE), 64 RXREL (DIR16UL, 1, 16, 2, unsigned, FALSE), 65 RXREL (DIR16UW, 1, 16, 1, unsigned, FALSE), 66 RXREL (DIR8UL, 0, 8, 2, unsigned, FALSE), 67 RXREL (DIR8UW, 0, 8, 1, unsigned, FALSE), 68 RXREL (DIR32_REV, 1, 16, 0, dont, FALSE), 69 RXREL (DIR16_REV, 1, 16, 0, dont, FALSE), 70 RXREL (DIR3U_PCREL, 0, 3, 0, dont, TRUE), 71 72 EMPTY_HOWTO (0x13), 73 EMPTY_HOWTO (0x14), 74 EMPTY_HOWTO (0x15), 75 EMPTY_HOWTO (0x16), 76 EMPTY_HOWTO (0x17), 77 EMPTY_HOWTO (0x18), 78 EMPTY_HOWTO (0x19), 79 EMPTY_HOWTO (0x1a), 80 EMPTY_HOWTO (0x1b), 81 EMPTY_HOWTO (0x1c), 82 EMPTY_HOWTO (0x1d), 83 EMPTY_HOWTO (0x1e), 84 EMPTY_HOWTO (0x1f), 85 86 RXREL (RH_3_PCREL, 0, 3, 0, signed, TRUE), 87 RXREL (RH_16_OP, 1, 16, 0, signed, FALSE), 88 RXREL (RH_24_OP, 2, 24, 0, signed, FALSE), 89 RXREL (RH_32_OP, 2, 32, 0, signed, FALSE), 90 RXREL (RH_24_UNS, 2, 24, 0, unsigned, FALSE), 91 RXREL (RH_8_NEG, 0, 8, 0, signed, FALSE), 92 RXREL (RH_16_NEG, 1, 16, 0, signed, FALSE), 93 RXREL (RH_24_NEG, 2, 24, 0, signed, FALSE), 94 RXREL (RH_32_NEG, 2, 32, 0, signed, FALSE), 95 RXREL (RH_DIFF, 2, 32, 0, signed, FALSE), 96 RXREL (RH_GPRELB, 1, 16, 0, unsigned, FALSE), 97 RXREL (RH_GPRELW, 1, 16, 0, unsigned, FALSE), 98 RXREL (RH_GPRELL, 1, 16, 0, unsigned, FALSE), 99 RXREL (RH_RELAX, 0, 0, 0, dont, FALSE), 100 101 EMPTY_HOWTO (0x2e), 102 EMPTY_HOWTO (0x2f), 103 EMPTY_HOWTO (0x30), 104 EMPTY_HOWTO (0x31), 105 EMPTY_HOWTO (0x32), 106 EMPTY_HOWTO (0x33), 107 EMPTY_HOWTO (0x34), 108 EMPTY_HOWTO (0x35), 109 EMPTY_HOWTO (0x36), 110 EMPTY_HOWTO (0x37), 111 EMPTY_HOWTO (0x38), 112 EMPTY_HOWTO (0x39), 113 EMPTY_HOWTO (0x3a), 114 EMPTY_HOWTO (0x3b), 115 EMPTY_HOWTO (0x3c), 116 EMPTY_HOWTO (0x3d), 117 EMPTY_HOWTO (0x3e), 118 EMPTY_HOWTO (0x3f), 119 EMPTY_HOWTO (0x40), 120 121 RXREL (ABS32, 2, 32, 0, dont, FALSE), 122 RXREL (ABS24S, 2, 24, 0, signed, FALSE), 123 RXREL (ABS16, 1, 16, 0, dont, FALSE), 124 RXREL (ABS16U, 1, 16, 0, unsigned, FALSE), 125 RXREL (ABS16S, 1, 16, 0, signed, FALSE), 126 RXREL (ABS8, 0, 8, 0, dont, FALSE), 127 RXREL (ABS8U, 0, 8, 0, unsigned, FALSE), 128 RXREL (ABS8S, 0, 8, 0, signed, FALSE), 129 RXREL (ABS24S_PCREL, 2, 24, 0, signed, TRUE), 130 RXREL (ABS16S_PCREL, 1, 16, 0, signed, TRUE), 131 RXREL (ABS8S_PCREL, 0, 8, 0, signed, TRUE), 132 RXREL (ABS16UL, 1, 16, 0, unsigned, FALSE), 133 RXREL (ABS16UW, 1, 16, 0, unsigned, FALSE), 134 RXREL (ABS8UL, 0, 8, 0, unsigned, FALSE), 135 RXREL (ABS8UW, 0, 8, 0, unsigned, FALSE), 136 RXREL (ABS32_REV, 2, 32, 0, dont, FALSE), 137 RXREL (ABS16_REV, 1, 16, 0, dont, FALSE), 138 139#define STACK_REL_P(x) ((x) <= R_RX_ABS16_REV && (x) >= R_RX_ABS32) 140 141 EMPTY_HOWTO (0x52), 142 EMPTY_HOWTO (0x53), 143 EMPTY_HOWTO (0x54), 144 EMPTY_HOWTO (0x55), 145 EMPTY_HOWTO (0x56), 146 EMPTY_HOWTO (0x57), 147 EMPTY_HOWTO (0x58), 148 EMPTY_HOWTO (0x59), 149 EMPTY_HOWTO (0x5a), 150 EMPTY_HOWTO (0x5b), 151 EMPTY_HOWTO (0x5c), 152 EMPTY_HOWTO (0x5d), 153 EMPTY_HOWTO (0x5e), 154 EMPTY_HOWTO (0x5f), 155 EMPTY_HOWTO (0x60), 156 EMPTY_HOWTO (0x61), 157 EMPTY_HOWTO (0x62), 158 EMPTY_HOWTO (0x63), 159 EMPTY_HOWTO (0x64), 160 EMPTY_HOWTO (0x65), 161 EMPTY_HOWTO (0x66), 162 EMPTY_HOWTO (0x67), 163 EMPTY_HOWTO (0x68), 164 EMPTY_HOWTO (0x69), 165 EMPTY_HOWTO (0x6a), 166 EMPTY_HOWTO (0x6b), 167 EMPTY_HOWTO (0x6c), 168 EMPTY_HOWTO (0x6d), 169 EMPTY_HOWTO (0x6e), 170 EMPTY_HOWTO (0x6f), 171 EMPTY_HOWTO (0x70), 172 EMPTY_HOWTO (0x71), 173 EMPTY_HOWTO (0x72), 174 EMPTY_HOWTO (0x73), 175 EMPTY_HOWTO (0x74), 176 EMPTY_HOWTO (0x75), 177 EMPTY_HOWTO (0x76), 178 EMPTY_HOWTO (0x77), 179 180 /* These are internal. */ 181 /* A 5-bit unsigned displacement to a B/W/L address, at bit position 8/12. */ 182 /* ---- ---- 4--- 3210. */ 183#define R_RX_RH_ABS5p8B 0x78 184 RXREL (RH_ABS5p8B, 0, 0, 0, dont, FALSE), 185#define R_RX_RH_ABS5p8W 0x79 186 RXREL (RH_ABS5p8W, 0, 0, 0, dont, FALSE), 187#define R_RX_RH_ABS5p8L 0x7a 188 RXREL (RH_ABS5p8L, 0, 0, 0, dont, FALSE), 189 /* A 5-bit unsigned displacement to a B/W/L address, at bit position 5/12. */ 190 /* ---- -432 1--- 0---. */ 191#define R_RX_RH_ABS5p5B 0x7b 192 RXREL (RH_ABS5p5B, 0, 0, 0, dont, FALSE), 193#define R_RX_RH_ABS5p5W 0x7c 194 RXREL (RH_ABS5p5W, 0, 0, 0, dont, FALSE), 195#define R_RX_RH_ABS5p5L 0x7d 196 RXREL (RH_ABS5p5L, 0, 0, 0, dont, FALSE), 197 /* A 4-bit unsigned immediate at bit position 8. */ 198#define R_RX_RH_UIMM4p8 0x7e 199 RXREL (RH_UIMM4p8, 0, 0, 0, dont, FALSE), 200 /* A 4-bit negative unsigned immediate at bit position 8. */ 201#define R_RX_RH_UNEG4p8 0x7f 202 RXREL (RH_UNEG4p8, 0, 0, 0, dont, FALSE), 203 /* End of internal relocs. */ 204 205 RXREL (SYM, 2, 32, 0, dont, FALSE), 206 RXREL (OPneg, 2, 32, 0, dont, FALSE), 207 RXREL (OPadd, 2, 32, 0, dont, FALSE), 208 RXREL (OPsub, 2, 32, 0, dont, FALSE), 209 RXREL (OPmul, 2, 32, 0, dont, FALSE), 210 RXREL (OPdiv, 2, 32, 0, dont, FALSE), 211 RXREL (OPshla, 2, 32, 0, dont, FALSE), 212 RXREL (OPshra, 2, 32, 0, dont, FALSE), 213 RXREL (OPsctsize, 2, 32, 0, dont, FALSE), 214 RXREL (OPscttop, 2, 32, 0, dont, FALSE), 215 RXREL (OPand, 2, 32, 0, dont, FALSE), 216 RXREL (OPor, 2, 32, 0, dont, FALSE), 217 RXREL (OPxor, 2, 32, 0, dont, FALSE), 218 RXREL (OPnot, 2, 32, 0, dont, FALSE), 219 RXREL (OPmod, 2, 32, 0, dont, FALSE), 220 RXREL (OPromtop, 2, 32, 0, dont, FALSE), 221 RXREL (OPramtop, 2, 32, 0, dont, FALSE) 222}; 223 224/* Map BFD reloc types to RX ELF reloc types. */ 225 226struct rx_reloc_map 227{ 228 bfd_reloc_code_real_type bfd_reloc_val; 229 unsigned int rx_reloc_val; 230}; 231 232static const struct rx_reloc_map rx_reloc_map [] = 233{ 234 { BFD_RELOC_NONE, R_RX_NONE }, 235 { BFD_RELOC_8, R_RX_DIR8S }, 236 { BFD_RELOC_16, R_RX_DIR16S }, 237 { BFD_RELOC_24, R_RX_DIR24S }, 238 { BFD_RELOC_32, R_RX_DIR32 }, 239 { BFD_RELOC_RX_16_OP, R_RX_DIR16 }, 240 { BFD_RELOC_RX_DIR3U_PCREL, R_RX_DIR3U_PCREL }, 241 { BFD_RELOC_8_PCREL, R_RX_DIR8S_PCREL }, 242 { BFD_RELOC_16_PCREL, R_RX_DIR16S_PCREL }, 243 { BFD_RELOC_24_PCREL, R_RX_DIR24S_PCREL }, 244 { BFD_RELOC_RX_8U, R_RX_DIR8U }, 245 { BFD_RELOC_RX_16U, R_RX_DIR16U }, 246 { BFD_RELOC_RX_24U, R_RX_RH_24_UNS }, 247 { BFD_RELOC_RX_NEG8, R_RX_RH_8_NEG }, 248 { BFD_RELOC_RX_NEG16, R_RX_RH_16_NEG }, 249 { BFD_RELOC_RX_NEG24, R_RX_RH_24_NEG }, 250 { BFD_RELOC_RX_NEG32, R_RX_RH_32_NEG }, 251 { BFD_RELOC_RX_DIFF, R_RX_RH_DIFF }, 252 { BFD_RELOC_RX_GPRELB, R_RX_RH_GPRELB }, 253 { BFD_RELOC_RX_GPRELW, R_RX_RH_GPRELW }, 254 { BFD_RELOC_RX_GPRELL, R_RX_RH_GPRELL }, 255 { BFD_RELOC_RX_RELAX, R_RX_RH_RELAX }, 256 { BFD_RELOC_RX_SYM, R_RX_SYM }, 257 { BFD_RELOC_RX_OP_SUBTRACT, R_RX_OPsub }, 258 { BFD_RELOC_RX_OP_NEG, R_RX_OPneg }, 259 { BFD_RELOC_RX_ABS8, R_RX_ABS8 }, 260 { BFD_RELOC_RX_ABS16, R_RX_ABS16 }, 261 { BFD_RELOC_RX_ABS16_REV, R_RX_ABS16_REV }, 262 { BFD_RELOC_RX_ABS32, R_RX_ABS32 }, 263 { BFD_RELOC_RX_ABS32_REV, R_RX_ABS32_REV }, 264 { BFD_RELOC_RX_ABS16UL, R_RX_ABS16UL }, 265 { BFD_RELOC_RX_ABS16UW, R_RX_ABS16UW }, 266 { BFD_RELOC_RX_ABS16U, R_RX_ABS16U } 267}; 268 269#define BIGE(abfd) ((abfd)->xvec->byteorder == BFD_ENDIAN_BIG) 270 271static reloc_howto_type * 272rx_reloc_type_lookup (bfd * abfd ATTRIBUTE_UNUSED, 273 bfd_reloc_code_real_type code) 274{ 275 unsigned int i; 276 277 if (code == BFD_RELOC_RX_32_OP) 278 return rx_elf_howto_table + R_RX_DIR32; 279 280 for (i = ARRAY_SIZE (rx_reloc_map); i--;) 281 if (rx_reloc_map [i].bfd_reloc_val == code) 282 return rx_elf_howto_table + rx_reloc_map[i].rx_reloc_val; 283 284 return NULL; 285} 286 287static reloc_howto_type * 288rx_reloc_name_lookup (bfd * abfd ATTRIBUTE_UNUSED, const char * r_name) 289{ 290 unsigned int i; 291 292 for (i = 0; i < ARRAY_SIZE (rx_elf_howto_table); i++) 293 if (rx_elf_howto_table[i].name != NULL 294 && strcasecmp (rx_elf_howto_table[i].name, r_name) == 0) 295 return rx_elf_howto_table + i; 296 297 return NULL; 298} 299 300/* Set the howto pointer for an RX ELF reloc. */ 301 302static bfd_boolean 303rx_info_to_howto_rela (bfd * abfd, 304 arelent * cache_ptr, 305 Elf_Internal_Rela * dst) 306{ 307 unsigned int r_type; 308 309 r_type = ELF32_R_TYPE (dst->r_info); 310 if (r_type >= (unsigned int) R_RX_max) 311 { 312 /* xgettext:c-format */ 313 _bfd_error_handler (_("%pB: unsupported relocation type %#x"), 314 abfd, r_type); 315 bfd_set_error (bfd_error_bad_value); 316 return FALSE; 317 } 318 cache_ptr->howto = rx_elf_howto_table + r_type; 319 if (cache_ptr->howto->name == NULL) 320 { 321 /* xgettext:c-format */ 322 _bfd_error_handler (_("%pB: unsupported relocation type %#x"), 323 abfd, r_type); 324 bfd_set_error (bfd_error_bad_value); 325 return FALSE; 326 } 327 return TRUE; 328} 329 330static bfd_vma 331get_symbol_value (const char * name, 332 struct bfd_link_info * info, 333 bfd * input_bfd, 334 asection * input_section, 335 int offset) 336{ 337 bfd_vma value = 0; 338 struct bfd_link_hash_entry * h; 339 340 h = bfd_link_hash_lookup (info->hash, name, FALSE, FALSE, TRUE); 341 342 if (h == NULL 343 || (h->type != bfd_link_hash_defined 344 && h->type != bfd_link_hash_defweak)) 345 (*info->callbacks->undefined_symbol) 346 (info, name, input_bfd, input_section, offset, TRUE); 347 else 348 value = (h->u.def.value 349 + h->u.def.section->output_section->vma 350 + h->u.def.section->output_offset); 351 352 return value; 353} 354 355static bfd_vma 356get_symbol_value_maybe (const char * name, 357 struct bfd_link_info * info) 358{ 359 bfd_vma value = 0; 360 struct bfd_link_hash_entry * h; 361 362 h = bfd_link_hash_lookup (info->hash, name, FALSE, FALSE, TRUE); 363 364 if (h == NULL 365 || (h->type != bfd_link_hash_defined 366 && h->type != bfd_link_hash_defweak)) 367 return 0; 368 else 369 value = (h->u.def.value 370 + h->u.def.section->output_section->vma 371 + h->u.def.section->output_offset); 372 373 return value; 374} 375 376static bfd_vma 377get_gp (struct bfd_link_info * info, 378 bfd * abfd, 379 asection * sec, 380 int offset) 381{ 382 static bfd_boolean cached = FALSE; 383 static bfd_vma cached_value = 0; 384 385 if (!cached) 386 { 387 cached_value = get_symbol_value ("__gp", info, abfd, sec, offset); 388 cached = TRUE; 389 } 390 return cached_value; 391} 392 393static bfd_vma 394get_romstart (struct bfd_link_info * info, 395 bfd * abfd, 396 asection * sec, 397 int offset) 398{ 399 static bfd_boolean cached = FALSE; 400 static bfd_vma cached_value = 0; 401 402 if (!cached) 403 { 404 cached_value = get_symbol_value ("_start", info, abfd, sec, offset); 405 cached = TRUE; 406 } 407 return cached_value; 408} 409 410static bfd_vma 411get_ramstart (struct bfd_link_info * info, 412 bfd * abfd, 413 asection * sec, 414 int offset) 415{ 416 static bfd_boolean cached = FALSE; 417 static bfd_vma cached_value = 0; 418 419 if (!cached) 420 { 421 cached_value = get_symbol_value ("__datastart", info, abfd, sec, offset); 422 cached = TRUE; 423 } 424 return cached_value; 425} 426 427#define NUM_STACK_ENTRIES 16 428static int32_t rx_stack [ NUM_STACK_ENTRIES ]; 429static unsigned int rx_stack_top; 430 431#define RX_STACK_PUSH(val) \ 432 do \ 433 { \ 434 if (rx_stack_top < NUM_STACK_ENTRIES) \ 435 rx_stack [rx_stack_top ++] = (val); \ 436 else \ 437 r = bfd_reloc_dangerous; \ 438 } \ 439 while (0) 440 441#define RX_STACK_POP(dest) \ 442 do \ 443 { \ 444 if (rx_stack_top > 0) \ 445 (dest) = rx_stack [-- rx_stack_top]; \ 446 else \ 447 (dest) = 0, r = bfd_reloc_dangerous; \ 448 } \ 449 while (0) 450 451/* Relocate an RX ELF section. 452 There is some attempt to make this function usable for many architectures, 453 both USE_REL and USE_RELA ['twould be nice if such a critter existed], 454 if only to serve as a learning tool. 455 456 The RELOCATE_SECTION function is called by the new ELF backend linker 457 to handle the relocations for a section. 458 459 The relocs are always passed as Rela structures; if the section 460 actually uses Rel structures, the r_addend field will always be 461 zero. 462 463 This function is responsible for adjusting the section contents as 464 necessary, and (if using Rela relocs and generating a relocatable 465 output file) adjusting the reloc addend as necessary. 466 467 This function does not have to worry about setting the reloc 468 address or the reloc symbol index. 469 470 LOCAL_SYMS is a pointer to the swapped in local symbols. 471 472 LOCAL_SECTIONS is an array giving the section in the input file 473 corresponding to the st_shndx field of each local symbol. 474 475 The global hash table entry for the global symbols can be found 476 via elf_sym_hashes (input_bfd). 477 478 When generating relocatable output, this function must handle 479 STB_LOCAL/STT_SECTION symbols specially. The output symbol is 480 going to be the section symbol corresponding to the output 481 section, which means that the addend must be adjusted 482 accordingly. */ 483 484static bfd_boolean 485rx_elf_relocate_section 486 (bfd * output_bfd, 487 struct bfd_link_info * info, 488 bfd * input_bfd, 489 asection * input_section, 490 bfd_byte * contents, 491 Elf_Internal_Rela * relocs, 492 Elf_Internal_Sym * local_syms, 493 asection ** local_sections) 494{ 495 Elf_Internal_Shdr * symtab_hdr; 496 struct elf_link_hash_entry ** sym_hashes; 497 Elf_Internal_Rela * rel; 498 Elf_Internal_Rela * relend; 499 bfd_boolean pid_mode; 500 bfd_boolean saw_subtract = FALSE; 501 const char * table_default_cache = NULL; 502 bfd_vma table_start_cache = 0; 503 bfd_vma table_end_cache = 0; 504 505 if (elf_elfheader (output_bfd)->e_flags & E_FLAG_RX_PID) 506 pid_mode = TRUE; 507 else 508 pid_mode = FALSE; 509 510 symtab_hdr = & elf_tdata (input_bfd)->symtab_hdr; 511 sym_hashes = elf_sym_hashes (input_bfd); 512 relend = relocs + input_section->reloc_count; 513 for (rel = relocs; rel < relend; rel ++) 514 { 515 reloc_howto_type * howto; 516 unsigned long r_symndx; 517 Elf_Internal_Sym * sym; 518 asection * sec; 519 struct elf_link_hash_entry * h; 520 bfd_vma relocation; 521 bfd_reloc_status_type r; 522 const char * name = NULL; 523 bfd_boolean unresolved_reloc = TRUE; 524 int r_type; 525 526 r_type = ELF32_R_TYPE (rel->r_info); 527 r_symndx = ELF32_R_SYM (rel->r_info); 528 529 howto = rx_elf_howto_table + ELF32_R_TYPE (rel->r_info); 530 h = NULL; 531 sym = NULL; 532 sec = NULL; 533 relocation = 0; 534 535 if (rx_stack_top == 0) 536 saw_subtract = FALSE; 537 538 if (r_symndx < symtab_hdr->sh_info) 539 { 540 sym = local_syms + r_symndx; 541 sec = local_sections [r_symndx]; 542 relocation = _bfd_elf_rela_local_sym (output_bfd, sym, & sec, rel); 543 544 name = bfd_elf_string_from_elf_section 545 (input_bfd, symtab_hdr->sh_link, sym->st_name); 546 name = sym->st_name == 0 ? bfd_section_name (sec) : name; 547 } 548 else 549 { 550 bfd_boolean warned, ignored; 551 552 RELOC_FOR_GLOBAL_SYMBOL (info, input_bfd, input_section, rel, 553 r_symndx, symtab_hdr, sym_hashes, h, 554 sec, relocation, unresolved_reloc, 555 warned, ignored); 556 557 name = h->root.root.string; 558 } 559 560 if (strncmp (name, "$tableentry$default$", 20) == 0) 561 { 562 bfd_vma entry_vma; 563 int idx; 564 char *buf; 565 566 if (table_default_cache != name) 567 { 568 569 /* All relocs for a given table should be to the same 570 (weak) default symbol) so we can use it to detect a 571 cache miss. We use the offset into the table to find 572 the "real" symbol. Calculate and store the table's 573 offset here. */ 574 575 table_default_cache = name; 576 577 /* We have already done error checking in rx_table_find(). */ 578 579 buf = (char *) bfd_malloc (13 + strlen (name + 20)); 580 if (buf == NULL) 581 return FALSE; 582 583 sprintf (buf, "$tablestart$%s", name + 20); 584 table_start_cache = get_symbol_value (buf, 585 info, 586 input_bfd, 587 input_section, 588 rel->r_offset); 589 590 sprintf (buf, "$tableend$%s", name + 20); 591 table_end_cache = get_symbol_value (buf, 592 info, 593 input_bfd, 594 input_section, 595 rel->r_offset); 596 597 free (buf); 598 } 599 600 entry_vma = (input_section->output_section->vma 601 + input_section->output_offset 602 + rel->r_offset); 603 604 if (table_end_cache <= entry_vma || entry_vma < table_start_cache) 605 { 606 /* xgettext:c-format */ 607 _bfd_error_handler (_("%pB:%pA: table entry %s outside table"), 608 input_bfd, input_section, 609 name); 610 } 611 else if ((int) (entry_vma - table_start_cache) % 4) 612 { 613 /* xgettext:c-format */ 614 _bfd_error_handler (_("%pB:%pA: table entry %s not word-aligned within table"), 615 input_bfd, input_section, 616 name); 617 } 618 else 619 { 620 idx = (int) (entry_vma - table_start_cache) / 4; 621 622 /* This will look like $tableentry$<N>$<name> */ 623 buf = (char *) bfd_malloc (12 + 20 + strlen (name + 20)); 624 if (buf == NULL) 625 return FALSE; 626 627 sprintf (buf, "$tableentry$%d$%s", idx, name + 20); 628 629 h = (struct elf_link_hash_entry *) bfd_link_hash_lookup (info->hash, buf, FALSE, FALSE, TRUE); 630 631 if (h) 632 { 633 relocation = (h->root.u.def.value 634 + h->root.u.def.section->output_section->vma 635 + h->root.u.def.section->output_offset);; 636 } 637 638 free (buf); 639 } 640 } 641 642 if (sec != NULL && discarded_section (sec)) 643 RELOC_AGAINST_DISCARDED_SECTION (info, input_bfd, input_section, 644 rel, 1, relend, howto, 0, contents); 645 646 if (bfd_link_relocatable (info)) 647 { 648 /* This is a relocatable link. We don't have to change 649 anything, unless the reloc is against a section symbol, 650 in which case we have to adjust according to where the 651 section symbol winds up in the output section. */ 652 if (sym != NULL && ELF_ST_TYPE (sym->st_info) == STT_SECTION) 653 rel->r_addend += sec->output_offset; 654 continue; 655 } 656 657 if (h != NULL && h->root.type == bfd_link_hash_undefweak) 658 /* If the symbol is undefined and weak 659 then the relocation resolves to zero. */ 660 relocation = 0; 661 else 662 { 663 if (howto->pc_relative) 664 { 665 relocation -= (input_section->output_section->vma 666 + input_section->output_offset 667 + rel->r_offset); 668 if (r_type != R_RX_RH_3_PCREL 669 && r_type != R_RX_DIR3U_PCREL) 670 relocation ++; 671 } 672 673 relocation += rel->r_addend; 674 } 675 676 r = bfd_reloc_ok; 677 678#define RANGE(a,b) \ 679 if (a > (long) relocation || (long) relocation > b) \ 680 r = bfd_reloc_overflow 681#define ALIGN(m) \ 682 if (relocation & m) \ 683 r = bfd_reloc_other 684#define OP(i) \ 685 (contents[rel->r_offset + (i)]) 686#define WARN_REDHAT(type) \ 687 /* xgettext:c-format */ \ 688 _bfd_error_handler \ 689 (_("%pB:%pA: warning: deprecated Red Hat reloc " \ 690 "%s detected against: %s"), \ 691 input_bfd, input_section, #type, name) 692 693 /* Check for unsafe relocs in PID mode. These are any relocs where 694 an absolute address is being computed. There are special cases 695 for relocs against symbols that are known to be referenced in 696 crt0.o before the PID base address register has been initialised. */ 697#define UNSAFE_FOR_PID \ 698 do \ 699 { \ 700 if (pid_mode \ 701 && sec != NULL \ 702 && sec->flags & SEC_READONLY \ 703 && !(input_section->flags & SEC_DEBUGGING) \ 704 && strcmp (name, "__pid_base") != 0 \ 705 && strcmp (name, "__gp") != 0 \ 706 && strcmp (name, "__romdatastart") != 0 \ 707 && !saw_subtract) \ 708 /* xgettext:c-format */ \ 709 _bfd_error_handler (_("%pB(%pA): unsafe PID relocation %s " \ 710 "at %#" PRIx64 " (against %s in %s)"), \ 711 input_bfd, input_section, howto->name, \ 712 (uint64_t) (input_section->output_section->vma \ 713 + input_section->output_offset \ 714 + rel->r_offset), \ 715 name, sec->name); \ 716 } \ 717 while (0) 718 719 /* Opcode relocs are always big endian. Data relocs are bi-endian. */ 720 switch (r_type) 721 { 722 case R_RX_NONE: 723 break; 724 725 case R_RX_RH_RELAX: 726 break; 727 728 case R_RX_RH_3_PCREL: 729 WARN_REDHAT ("RX_RH_3_PCREL"); 730 RANGE (3, 10); 731 OP (0) &= 0xf8; 732 OP (0) |= relocation & 0x07; 733 break; 734 735 case R_RX_RH_8_NEG: 736 WARN_REDHAT ("RX_RH_8_NEG"); 737 relocation = - relocation; 738 /* Fall through. */ 739 case R_RX_DIR8S_PCREL: 740 UNSAFE_FOR_PID; 741 RANGE (-128, 127); 742 OP (0) = relocation; 743 break; 744 745 case R_RX_DIR8S: 746 UNSAFE_FOR_PID; 747 RANGE (-128, 255); 748 OP (0) = relocation; 749 break; 750 751 case R_RX_DIR8U: 752 UNSAFE_FOR_PID; 753 RANGE (0, 255); 754 OP (0) = relocation; 755 break; 756 757 case R_RX_RH_16_NEG: 758 WARN_REDHAT ("RX_RH_16_NEG"); 759 relocation = - relocation; 760 /* Fall through. */ 761 case R_RX_DIR16S_PCREL: 762 UNSAFE_FOR_PID; 763 RANGE (-32768, 32767); 764#if RX_OPCODE_BIG_ENDIAN 765#else 766 OP (0) = relocation; 767 OP (1) = relocation >> 8; 768#endif 769 break; 770 771 case R_RX_RH_16_OP: 772 WARN_REDHAT ("RX_RH_16_OP"); 773 UNSAFE_FOR_PID; 774 RANGE (-32768, 32767); 775#if RX_OPCODE_BIG_ENDIAN 776 OP (1) = relocation; 777 OP (0) = relocation >> 8; 778#else 779 OP (0) = relocation; 780 OP (1) = relocation >> 8; 781#endif 782 break; 783 784 case R_RX_DIR16S: 785 UNSAFE_FOR_PID; 786 RANGE (-32768, 65535); 787 if (BIGE (output_bfd) && !(input_section->flags & SEC_CODE)) 788 { 789 OP (1) = relocation; 790 OP (0) = relocation >> 8; 791 } 792 else 793 { 794 OP (0) = relocation; 795 OP (1) = relocation >> 8; 796 } 797 break; 798 799 case R_RX_DIR16U: 800 UNSAFE_FOR_PID; 801 RANGE (0, 65536); 802#if RX_OPCODE_BIG_ENDIAN 803 OP (1) = relocation; 804 OP (0) = relocation >> 8; 805#else 806 OP (0) = relocation; 807 OP (1) = relocation >> 8; 808#endif 809 break; 810 811 case R_RX_DIR16: 812 UNSAFE_FOR_PID; 813 RANGE (-32768, 65536); 814#if RX_OPCODE_BIG_ENDIAN 815 OP (1) = relocation; 816 OP (0) = relocation >> 8; 817#else 818 OP (0) = relocation; 819 OP (1) = relocation >> 8; 820#endif 821 break; 822 823 case R_RX_DIR16_REV: 824 UNSAFE_FOR_PID; 825 RANGE (-32768, 65536); 826#if RX_OPCODE_BIG_ENDIAN 827 OP (0) = relocation; 828 OP (1) = relocation >> 8; 829#else 830 OP (1) = relocation; 831 OP (0) = relocation >> 8; 832#endif 833 break; 834 835 case R_RX_DIR3U_PCREL: 836 RANGE (3, 10); 837 OP (0) &= 0xf8; 838 OP (0) |= relocation & 0x07; 839 break; 840 841 case R_RX_RH_24_NEG: 842 UNSAFE_FOR_PID; 843 WARN_REDHAT ("RX_RH_24_NEG"); 844 relocation = - relocation; 845 /* Fall through. */ 846 case R_RX_DIR24S_PCREL: 847 RANGE (-0x800000, 0x7fffff); 848#if RX_OPCODE_BIG_ENDIAN 849 OP (2) = relocation; 850 OP (1) = relocation >> 8; 851 OP (0) = relocation >> 16; 852#else 853 OP (0) = relocation; 854 OP (1) = relocation >> 8; 855 OP (2) = relocation >> 16; 856#endif 857 break; 858 859 case R_RX_RH_24_OP: 860 UNSAFE_FOR_PID; 861 WARN_REDHAT ("RX_RH_24_OP"); 862 RANGE (-0x800000, 0x7fffff); 863#if RX_OPCODE_BIG_ENDIAN 864 OP (2) = relocation; 865 OP (1) = relocation >> 8; 866 OP (0) = relocation >> 16; 867#else 868 OP (0) = relocation; 869 OP (1) = relocation >> 8; 870 OP (2) = relocation >> 16; 871#endif 872 break; 873 874 case R_RX_DIR24S: 875 UNSAFE_FOR_PID; 876 RANGE (-0x800000, 0x7fffff); 877 if (BIGE (output_bfd) && !(input_section->flags & SEC_CODE)) 878 { 879 OP (2) = relocation; 880 OP (1) = relocation >> 8; 881 OP (0) = relocation >> 16; 882 } 883 else 884 { 885 OP (0) = relocation; 886 OP (1) = relocation >> 8; 887 OP (2) = relocation >> 16; 888 } 889 break; 890 891 case R_RX_RH_24_UNS: 892 UNSAFE_FOR_PID; 893 WARN_REDHAT ("RX_RH_24_UNS"); 894 RANGE (0, 0xffffff); 895#if RX_OPCODE_BIG_ENDIAN 896 OP (2) = relocation; 897 OP (1) = relocation >> 8; 898 OP (0) = relocation >> 16; 899#else 900 OP (0) = relocation; 901 OP (1) = relocation >> 8; 902 OP (2) = relocation >> 16; 903#endif 904 break; 905 906 case R_RX_RH_32_NEG: 907 UNSAFE_FOR_PID; 908 WARN_REDHAT ("RX_RH_32_NEG"); 909 relocation = - relocation; 910#if RX_OPCODE_BIG_ENDIAN 911 OP (3) = relocation; 912 OP (2) = relocation >> 8; 913 OP (1) = relocation >> 16; 914 OP (0) = relocation >> 24; 915#else 916 OP (0) = relocation; 917 OP (1) = relocation >> 8; 918 OP (2) = relocation >> 16; 919 OP (3) = relocation >> 24; 920#endif 921 break; 922 923 case R_RX_RH_32_OP: 924 UNSAFE_FOR_PID; 925 WARN_REDHAT ("RX_RH_32_OP"); 926#if RX_OPCODE_BIG_ENDIAN 927 OP (3) = relocation; 928 OP (2) = relocation >> 8; 929 OP (1) = relocation >> 16; 930 OP (0) = relocation >> 24; 931#else 932 OP (0) = relocation; 933 OP (1) = relocation >> 8; 934 OP (2) = relocation >> 16; 935 OP (3) = relocation >> 24; 936#endif 937 break; 938 939 case R_RX_DIR32: 940 if (BIGE (output_bfd) && !(input_section->flags & SEC_CODE)) 941 { 942 OP (3) = relocation; 943 OP (2) = relocation >> 8; 944 OP (1) = relocation >> 16; 945 OP (0) = relocation >> 24; 946 } 947 else 948 { 949 OP (0) = relocation; 950 OP (1) = relocation >> 8; 951 OP (2) = relocation >> 16; 952 OP (3) = relocation >> 24; 953 } 954 break; 955 956 case R_RX_DIR32_REV: 957 if (BIGE (output_bfd)) 958 { 959 OP (0) = relocation; 960 OP (1) = relocation >> 8; 961 OP (2) = relocation >> 16; 962 OP (3) = relocation >> 24; 963 } 964 else 965 { 966 OP (3) = relocation; 967 OP (2) = relocation >> 8; 968 OP (1) = relocation >> 16; 969 OP (0) = relocation >> 24; 970 } 971 break; 972 973 case R_RX_RH_DIFF: 974 { 975 bfd_vma val; 976 WARN_REDHAT ("RX_RH_DIFF"); 977 val = bfd_get_32 (output_bfd, & OP (0)); 978 val -= relocation; 979 bfd_put_32 (output_bfd, val, & OP (0)); 980 } 981 break; 982 983 case R_RX_RH_GPRELB: 984 WARN_REDHAT ("RX_RH_GPRELB"); 985 relocation -= get_gp (info, input_bfd, input_section, rel->r_offset); 986 RANGE (0, 65535); 987#if RX_OPCODE_BIG_ENDIAN 988 OP (1) = relocation; 989 OP (0) = relocation >> 8; 990#else 991 OP (0) = relocation; 992 OP (1) = relocation >> 8; 993#endif 994 break; 995 996 case R_RX_RH_GPRELW: 997 WARN_REDHAT ("RX_RH_GPRELW"); 998 relocation -= get_gp (info, input_bfd, input_section, rel->r_offset); 999 ALIGN (1); 1000 relocation >>= 1; 1001 RANGE (0, 65535); 1002#if RX_OPCODE_BIG_ENDIAN 1003 OP (1) = relocation; 1004 OP (0) = relocation >> 8; 1005#else 1006 OP (0) = relocation; 1007 OP (1) = relocation >> 8; 1008#endif 1009 break; 1010 1011 case R_RX_RH_GPRELL: 1012 WARN_REDHAT ("RX_RH_GPRELL"); 1013 relocation -= get_gp (info, input_bfd, input_section, rel->r_offset); 1014 ALIGN (3); 1015 relocation >>= 2; 1016 RANGE (0, 65535); 1017#if RX_OPCODE_BIG_ENDIAN 1018 OP (1) = relocation; 1019 OP (0) = relocation >> 8; 1020#else 1021 OP (0) = relocation; 1022 OP (1) = relocation >> 8; 1023#endif 1024 break; 1025 1026 /* Internal relocations just for relaxation: */ 1027 case R_RX_RH_ABS5p5B: 1028 RX_STACK_POP (relocation); 1029 RANGE (0, 31); 1030 OP (0) &= 0xf8; 1031 OP (0) |= relocation >> 2; 1032 OP (1) &= 0x77; 1033 OP (1) |= (relocation << 6) & 0x80; 1034 OP (1) |= (relocation << 3) & 0x08; 1035 break; 1036 1037 case R_RX_RH_ABS5p5W: 1038 RX_STACK_POP (relocation); 1039 RANGE (0, 62); 1040 ALIGN (1); 1041 relocation >>= 1; 1042 OP (0) &= 0xf8; 1043 OP (0) |= relocation >> 2; 1044 OP (1) &= 0x77; 1045 OP (1) |= (relocation << 6) & 0x80; 1046 OP (1) |= (relocation << 3) & 0x08; 1047 break; 1048 1049 case R_RX_RH_ABS5p5L: 1050 RX_STACK_POP (relocation); 1051 RANGE (0, 124); 1052 ALIGN (3); 1053 relocation >>= 2; 1054 OP (0) &= 0xf8; 1055 OP (0) |= relocation >> 2; 1056 OP (1) &= 0x77; 1057 OP (1) |= (relocation << 6) & 0x80; 1058 OP (1) |= (relocation << 3) & 0x08; 1059 break; 1060 1061 case R_RX_RH_ABS5p8B: 1062 RX_STACK_POP (relocation); 1063 RANGE (0, 31); 1064 OP (0) &= 0x70; 1065 OP (0) |= (relocation << 3) & 0x80; 1066 OP (0) |= relocation & 0x0f; 1067 break; 1068 1069 case R_RX_RH_ABS5p8W: 1070 RX_STACK_POP (relocation); 1071 RANGE (0, 62); 1072 ALIGN (1); 1073 relocation >>= 1; 1074 OP (0) &= 0x70; 1075 OP (0) |= (relocation << 3) & 0x80; 1076 OP (0) |= relocation & 0x0f; 1077 break; 1078 1079 case R_RX_RH_ABS5p8L: 1080 RX_STACK_POP (relocation); 1081 RANGE (0, 124); 1082 ALIGN (3); 1083 relocation >>= 2; 1084 OP (0) &= 0x70; 1085 OP (0) |= (relocation << 3) & 0x80; 1086 OP (0) |= relocation & 0x0f; 1087 break; 1088 1089 case R_RX_RH_UIMM4p8: 1090 RANGE (0, 15); 1091 OP (0) &= 0x0f; 1092 OP (0) |= relocation << 4; 1093 break; 1094 1095 case R_RX_RH_UNEG4p8: 1096 RANGE (-15, 0); 1097 OP (0) &= 0x0f; 1098 OP (0) |= (-relocation) << 4; 1099 break; 1100 1101 /* Complex reloc handling: */ 1102 1103 case R_RX_ABS32: 1104 UNSAFE_FOR_PID; 1105 RX_STACK_POP (relocation); 1106#if RX_OPCODE_BIG_ENDIAN 1107 OP (3) = relocation; 1108 OP (2) = relocation >> 8; 1109 OP (1) = relocation >> 16; 1110 OP (0) = relocation >> 24; 1111#else 1112 OP (0) = relocation; 1113 OP (1) = relocation >> 8; 1114 OP (2) = relocation >> 16; 1115 OP (3) = relocation >> 24; 1116#endif 1117 break; 1118 1119 case R_RX_ABS32_REV: 1120 UNSAFE_FOR_PID; 1121 RX_STACK_POP (relocation); 1122#if RX_OPCODE_BIG_ENDIAN 1123 OP (0) = relocation; 1124 OP (1) = relocation >> 8; 1125 OP (2) = relocation >> 16; 1126 OP (3) = relocation >> 24; 1127#else 1128 OP (3) = relocation; 1129 OP (2) = relocation >> 8; 1130 OP (1) = relocation >> 16; 1131 OP (0) = relocation >> 24; 1132#endif 1133 break; 1134 1135 case R_RX_ABS24S_PCREL: 1136 case R_RX_ABS24S: 1137 UNSAFE_FOR_PID; 1138 RX_STACK_POP (relocation); 1139 RANGE (-0x800000, 0x7fffff); 1140 if (BIGE (output_bfd) && !(input_section->flags & SEC_CODE)) 1141 { 1142 OP (2) = relocation; 1143 OP (1) = relocation >> 8; 1144 OP (0) = relocation >> 16; 1145 } 1146 else 1147 { 1148 OP (0) = relocation; 1149 OP (1) = relocation >> 8; 1150 OP (2) = relocation >> 16; 1151 } 1152 break; 1153 1154 case R_RX_ABS16: 1155 UNSAFE_FOR_PID; 1156 RX_STACK_POP (relocation); 1157 RANGE (-32768, 65535); 1158#if RX_OPCODE_BIG_ENDIAN 1159 OP (1) = relocation; 1160 OP (0) = relocation >> 8; 1161#else 1162 OP (0) = relocation; 1163 OP (1) = relocation >> 8; 1164#endif 1165 break; 1166 1167 case R_RX_ABS16_REV: 1168 UNSAFE_FOR_PID; 1169 RX_STACK_POP (relocation); 1170 RANGE (-32768, 65535); 1171#if RX_OPCODE_BIG_ENDIAN 1172 OP (0) = relocation; 1173 OP (1) = relocation >> 8; 1174#else 1175 OP (1) = relocation; 1176 OP (0) = relocation >> 8; 1177#endif 1178 break; 1179 1180 case R_RX_ABS16S_PCREL: 1181 case R_RX_ABS16S: 1182 RX_STACK_POP (relocation); 1183 RANGE (-32768, 32767); 1184 if (BIGE (output_bfd) && !(input_section->flags & SEC_CODE)) 1185 { 1186 OP (1) = relocation; 1187 OP (0) = relocation >> 8; 1188 } 1189 else 1190 { 1191 OP (0) = relocation; 1192 OP (1) = relocation >> 8; 1193 } 1194 break; 1195 1196 case R_RX_ABS16U: 1197 UNSAFE_FOR_PID; 1198 RX_STACK_POP (relocation); 1199 RANGE (0, 65536); 1200#if RX_OPCODE_BIG_ENDIAN 1201 OP (1) = relocation; 1202 OP (0) = relocation >> 8; 1203#else 1204 OP (0) = relocation; 1205 OP (1) = relocation >> 8; 1206#endif 1207 break; 1208 1209 case R_RX_ABS16UL: 1210 UNSAFE_FOR_PID; 1211 RX_STACK_POP (relocation); 1212 relocation >>= 2; 1213 RANGE (0, 65536); 1214#if RX_OPCODE_BIG_ENDIAN 1215 OP (1) = relocation; 1216 OP (0) = relocation >> 8; 1217#else 1218 OP (0) = relocation; 1219 OP (1) = relocation >> 8; 1220#endif 1221 break; 1222 1223 case R_RX_ABS16UW: 1224 UNSAFE_FOR_PID; 1225 RX_STACK_POP (relocation); 1226 relocation >>= 1; 1227 RANGE (0, 65536); 1228#if RX_OPCODE_BIG_ENDIAN 1229 OP (1) = relocation; 1230 OP (0) = relocation >> 8; 1231#else 1232 OP (0) = relocation; 1233 OP (1) = relocation >> 8; 1234#endif 1235 break; 1236 1237 case R_RX_ABS8: 1238 UNSAFE_FOR_PID; 1239 RX_STACK_POP (relocation); 1240 RANGE (-128, 255); 1241 OP (0) = relocation; 1242 break; 1243 1244 case R_RX_ABS8U: 1245 UNSAFE_FOR_PID; 1246 RX_STACK_POP (relocation); 1247 RANGE (0, 255); 1248 OP (0) = relocation; 1249 break; 1250 1251 case R_RX_ABS8UL: 1252 UNSAFE_FOR_PID; 1253 RX_STACK_POP (relocation); 1254 relocation >>= 2; 1255 RANGE (0, 255); 1256 OP (0) = relocation; 1257 break; 1258 1259 case R_RX_ABS8UW: 1260 UNSAFE_FOR_PID; 1261 RX_STACK_POP (relocation); 1262 relocation >>= 1; 1263 RANGE (0, 255); 1264 OP (0) = relocation; 1265 break; 1266 1267 case R_RX_ABS8S: 1268 UNSAFE_FOR_PID; 1269 /* Fall through. */ 1270 case R_RX_ABS8S_PCREL: 1271 RX_STACK_POP (relocation); 1272 RANGE (-128, 127); 1273 OP (0) = relocation; 1274 break; 1275 1276 case R_RX_SYM: 1277 if (r_symndx < symtab_hdr->sh_info) 1278 RX_STACK_PUSH (sec->output_section->vma 1279 + sec->output_offset 1280 + sym->st_value 1281 + rel->r_addend); 1282 else 1283 { 1284 if (h != NULL 1285 && (h->root.type == bfd_link_hash_defined 1286 || h->root.type == bfd_link_hash_defweak)) 1287 RX_STACK_PUSH (h->root.u.def.value 1288 + sec->output_section->vma 1289 + sec->output_offset 1290 + rel->r_addend); 1291 else 1292 _bfd_error_handler 1293 (_("warning: RX_SYM reloc with an unknown symbol")); 1294 } 1295 break; 1296 1297 case R_RX_OPneg: 1298 { 1299 int32_t tmp; 1300 1301 saw_subtract = TRUE; 1302 RX_STACK_POP (tmp); 1303 tmp = - tmp; 1304 RX_STACK_PUSH (tmp); 1305 } 1306 break; 1307 1308 case R_RX_OPadd: 1309 { 1310 int32_t tmp1, tmp2; 1311 1312 RX_STACK_POP (tmp1); 1313 RX_STACK_POP (tmp2); 1314 tmp1 += tmp2; 1315 RX_STACK_PUSH (tmp1); 1316 } 1317 break; 1318 1319 case R_RX_OPsub: 1320 { 1321 int32_t tmp1, tmp2; 1322 1323 saw_subtract = TRUE; 1324 RX_STACK_POP (tmp1); 1325 RX_STACK_POP (tmp2); 1326 tmp2 -= tmp1; 1327 RX_STACK_PUSH (tmp2); 1328 } 1329 break; 1330 1331 case R_RX_OPmul: 1332 { 1333 int32_t tmp1, tmp2; 1334 1335 RX_STACK_POP (tmp1); 1336 RX_STACK_POP (tmp2); 1337 tmp1 *= tmp2; 1338 RX_STACK_PUSH (tmp1); 1339 } 1340 break; 1341 1342 case R_RX_OPdiv: 1343 { 1344 int32_t tmp1, tmp2; 1345 1346 RX_STACK_POP (tmp1); 1347 RX_STACK_POP (tmp2); 1348 tmp1 /= tmp2; 1349 RX_STACK_PUSH (tmp1); 1350 } 1351 break; 1352 1353 case R_RX_OPshla: 1354 { 1355 int32_t tmp1, tmp2; 1356 1357 RX_STACK_POP (tmp1); 1358 RX_STACK_POP (tmp2); 1359 tmp1 <<= tmp2; 1360 RX_STACK_PUSH (tmp1); 1361 } 1362 break; 1363 1364 case R_RX_OPshra: 1365 { 1366 int32_t tmp1, tmp2; 1367 1368 RX_STACK_POP (tmp1); 1369 RX_STACK_POP (tmp2); 1370 tmp1 >>= tmp2; 1371 RX_STACK_PUSH (tmp1); 1372 } 1373 break; 1374 1375 case R_RX_OPsctsize: 1376 RX_STACK_PUSH (input_section->size); 1377 break; 1378 1379 case R_RX_OPscttop: 1380 RX_STACK_PUSH (input_section->output_section->vma); 1381 break; 1382 1383 case R_RX_OPand: 1384 { 1385 int32_t tmp1, tmp2; 1386 1387 RX_STACK_POP (tmp1); 1388 RX_STACK_POP (tmp2); 1389 tmp1 &= tmp2; 1390 RX_STACK_PUSH (tmp1); 1391 } 1392 break; 1393 1394 case R_RX_OPor: 1395 { 1396 int32_t tmp1, tmp2; 1397 1398 RX_STACK_POP (tmp1); 1399 RX_STACK_POP (tmp2); 1400 tmp1 |= tmp2; 1401 RX_STACK_PUSH (tmp1); 1402 } 1403 break; 1404 1405 case R_RX_OPxor: 1406 { 1407 int32_t tmp1, tmp2; 1408 1409 RX_STACK_POP (tmp1); 1410 RX_STACK_POP (tmp2); 1411 tmp1 ^= tmp2; 1412 RX_STACK_PUSH (tmp1); 1413 } 1414 break; 1415 1416 case R_RX_OPnot: 1417 { 1418 int32_t tmp; 1419 1420 RX_STACK_POP (tmp); 1421 tmp = ~ tmp; 1422 RX_STACK_PUSH (tmp); 1423 } 1424 break; 1425 1426 case R_RX_OPmod: 1427 { 1428 int32_t tmp1, tmp2; 1429 1430 RX_STACK_POP (tmp1); 1431 RX_STACK_POP (tmp2); 1432 tmp1 %= tmp2; 1433 RX_STACK_PUSH (tmp1); 1434 } 1435 break; 1436 1437 case R_RX_OPromtop: 1438 RX_STACK_PUSH (get_romstart (info, input_bfd, input_section, rel->r_offset)); 1439 break; 1440 1441 case R_RX_OPramtop: 1442 RX_STACK_PUSH (get_ramstart (info, input_bfd, input_section, rel->r_offset)); 1443 break; 1444 1445 default: 1446 r = bfd_reloc_notsupported; 1447 break; 1448 } 1449 1450 if (r != bfd_reloc_ok) 1451 { 1452 const char * msg = NULL; 1453 1454 switch (r) 1455 { 1456 case bfd_reloc_overflow: 1457 /* Catch the case of a missing function declaration 1458 and emit a more helpful error message. */ 1459 if (r_type == R_RX_DIR24S_PCREL) 1460 /* xgettext:c-format */ 1461 msg = _("%pB(%pA): error: call to undefined function '%s'"); 1462 else 1463 (*info->callbacks->reloc_overflow) 1464 (info, (h ? &h->root : NULL), name, howto->name, (bfd_vma) 0, 1465 input_bfd, input_section, rel->r_offset); 1466 break; 1467 1468 case bfd_reloc_undefined: 1469 (*info->callbacks->undefined_symbol) 1470 (info, name, input_bfd, input_section, rel->r_offset, TRUE); 1471 break; 1472 1473 case bfd_reloc_other: 1474 /* xgettext:c-format */ 1475 msg = _("%pB(%pA): warning: unaligned access to symbol '%s' in the small data area"); 1476 break; 1477 1478 case bfd_reloc_outofrange: 1479 /* xgettext:c-format */ 1480 msg = _("%pB(%pA): internal error: out of range error"); 1481 break; 1482 1483 case bfd_reloc_notsupported: 1484 /* xgettext:c-format */ 1485 msg = _("%pB(%pA): internal error: unsupported relocation error"); 1486 break; 1487 1488 case bfd_reloc_dangerous: 1489 /* xgettext:c-format */ 1490 msg = _("%pB(%pA): internal error: dangerous relocation"); 1491 break; 1492 1493 default: 1494 /* xgettext:c-format */ 1495 msg = _("%pB(%pA): internal error: unknown error"); 1496 break; 1497 } 1498 1499 if (msg) 1500 _bfd_error_handler (msg, input_bfd, input_section, name); 1501 } 1502 } 1503 1504 return TRUE; 1505} 1506 1507/* Relaxation Support. */ 1508 1509/* Progression of relocations from largest operand size to smallest 1510 operand size. */ 1511 1512static int 1513next_smaller_reloc (int r) 1514{ 1515 switch (r) 1516 { 1517 case R_RX_DIR32: return R_RX_DIR24S; 1518 case R_RX_DIR24S: return R_RX_DIR16S; 1519 case R_RX_DIR16S: return R_RX_DIR8S; 1520 case R_RX_DIR8S: return R_RX_NONE; 1521 1522 case R_RX_DIR16: return R_RX_DIR8; 1523 case R_RX_DIR8: return R_RX_NONE; 1524 1525 case R_RX_DIR16U: return R_RX_DIR8U; 1526 case R_RX_DIR8U: return R_RX_NONE; 1527 1528 case R_RX_DIR24S_PCREL: return R_RX_DIR16S_PCREL; 1529 case R_RX_DIR16S_PCREL: return R_RX_DIR8S_PCREL; 1530 case R_RX_DIR8S_PCREL: return R_RX_DIR3U_PCREL; 1531 1532 case R_RX_DIR16UL: return R_RX_DIR8UL; 1533 case R_RX_DIR8UL: return R_RX_NONE; 1534 case R_RX_DIR16UW: return R_RX_DIR8UW; 1535 case R_RX_DIR8UW: return R_RX_NONE; 1536 1537 case R_RX_RH_32_OP: return R_RX_RH_24_OP; 1538 case R_RX_RH_24_OP: return R_RX_RH_16_OP; 1539 case R_RX_RH_16_OP: return R_RX_DIR8; 1540 1541 case R_RX_ABS32: return R_RX_ABS24S; 1542 case R_RX_ABS24S: return R_RX_ABS16S; 1543 case R_RX_ABS16: return R_RX_ABS8; 1544 case R_RX_ABS16U: return R_RX_ABS8U; 1545 case R_RX_ABS16S: return R_RX_ABS8S; 1546 case R_RX_ABS8: return R_RX_NONE; 1547 case R_RX_ABS8U: return R_RX_NONE; 1548 case R_RX_ABS8S: return R_RX_NONE; 1549 case R_RX_ABS24S_PCREL: return R_RX_ABS16S_PCREL; 1550 case R_RX_ABS16S_PCREL: return R_RX_ABS8S_PCREL; 1551 case R_RX_ABS8S_PCREL: return R_RX_NONE; 1552 case R_RX_ABS16UL: return R_RX_ABS8UL; 1553 case R_RX_ABS16UW: return R_RX_ABS8UW; 1554 case R_RX_ABS8UL: return R_RX_NONE; 1555 case R_RX_ABS8UW: return R_RX_NONE; 1556 } 1557 return r; 1558}; 1559 1560/* Delete some bytes from a section while relaxing. */ 1561 1562static bfd_boolean 1563elf32_rx_relax_delete_bytes (bfd *abfd, asection *sec, bfd_vma addr, int count, 1564 Elf_Internal_Rela *alignment_rel, int force_snip, 1565 Elf_Internal_Rela *irelstart) 1566{ 1567 Elf_Internal_Shdr * symtab_hdr; 1568 unsigned int sec_shndx; 1569 bfd_byte * contents; 1570 Elf_Internal_Rela * irel; 1571 Elf_Internal_Rela * irelend; 1572 Elf_Internal_Sym * isym; 1573 Elf_Internal_Sym * isymend; 1574 bfd_vma toaddr; 1575 unsigned int symcount; 1576 struct elf_link_hash_entry ** sym_hashes; 1577 struct elf_link_hash_entry ** end_hashes; 1578 1579 if (!alignment_rel) 1580 force_snip = 1; 1581 1582 sec_shndx = _bfd_elf_section_from_bfd_section (abfd, sec); 1583 1584 contents = elf_section_data (sec)->this_hdr.contents; 1585 1586 /* The deletion must stop at the next alignment boundary, if 1587 ALIGNMENT_REL is non-NULL. */ 1588 toaddr = sec->size; 1589 if (alignment_rel) 1590 toaddr = alignment_rel->r_offset; 1591 1592 BFD_ASSERT (toaddr > addr); 1593 1594 /* Actually delete the bytes. */ 1595 memmove (contents + addr, contents + addr + count, 1596 (size_t) (toaddr - addr - count)); 1597 1598 /* If we don't have an alignment marker to worry about, we can just 1599 shrink the section. Otherwise, we have to fill in the newly 1600 created gap with NOP insns (0x03). */ 1601 if (force_snip) 1602 sec->size -= count; 1603 else 1604 memset (contents + toaddr - count, 0x03, count); 1605 1606 irel = irelstart; 1607 BFD_ASSERT (irel != NULL || sec->reloc_count == 0); 1608 irelend = irel + sec->reloc_count; 1609 1610 /* Adjust all the relocs. */ 1611 for (; irel < irelend; irel++) 1612 { 1613 /* Get the new reloc address. */ 1614 if (irel->r_offset > addr 1615 && (irel->r_offset < toaddr 1616 || (force_snip && irel->r_offset == toaddr))) 1617 irel->r_offset -= count; 1618 1619 /* If we see an ALIGN marker at the end of the gap, we move it 1620 to the beginning of the gap, since marking these gaps is what 1621 they're for. */ 1622 if (irel->r_offset == toaddr 1623 && ELF32_R_TYPE (irel->r_info) == R_RX_RH_RELAX 1624 && irel->r_addend & RX_RELAXA_ALIGN) 1625 irel->r_offset -= count; 1626 } 1627 1628 /* Adjust the local symbols defined in this section. */ 1629 symtab_hdr = &elf_tdata (abfd)->symtab_hdr; 1630 isym = (Elf_Internal_Sym *) symtab_hdr->contents; 1631 isymend = isym + symtab_hdr->sh_info; 1632 1633 for (; isym < isymend; isym++) 1634 { 1635 /* If the symbol is in the range of memory we just moved, we 1636 have to adjust its value. */ 1637 if (isym->st_shndx == sec_shndx 1638 && isym->st_value > addr 1639 && isym->st_value < toaddr) 1640 isym->st_value -= count; 1641 1642 /* If the symbol *spans* the bytes we just deleted (i.e. it's 1643 *end* is in the moved bytes but it's *start* isn't), then we 1644 must adjust its size. */ 1645 if (isym->st_shndx == sec_shndx 1646 && isym->st_value < addr 1647 && isym->st_value + isym->st_size > addr 1648 && isym->st_value + isym->st_size < toaddr) 1649 isym->st_size -= count; 1650 } 1651 1652 /* Now adjust the global symbols defined in this section. */ 1653 symcount = (symtab_hdr->sh_size / sizeof (Elf32_External_Sym) 1654 - symtab_hdr->sh_info); 1655 sym_hashes = elf_sym_hashes (abfd); 1656 end_hashes = sym_hashes + symcount; 1657 1658 for (; sym_hashes < end_hashes; sym_hashes++) 1659 { 1660 struct elf_link_hash_entry *sym_hash = *sym_hashes; 1661 1662 if ((sym_hash->root.type == bfd_link_hash_defined 1663 || sym_hash->root.type == bfd_link_hash_defweak) 1664 && sym_hash->root.u.def.section == sec) 1665 { 1666 /* As above, adjust the value if needed. */ 1667 if (sym_hash->root.u.def.value > addr 1668 && sym_hash->root.u.def.value < toaddr) 1669 sym_hash->root.u.def.value -= count; 1670 1671 /* As above, adjust the size if needed. */ 1672 if (sym_hash->root.u.def.value < addr 1673 && sym_hash->root.u.def.value + sym_hash->size > addr 1674 && sym_hash->root.u.def.value + sym_hash->size < toaddr) 1675 sym_hash->size -= count; 1676 } 1677 } 1678 1679 return TRUE; 1680} 1681 1682/* Used to sort relocs by address. If relocs have the same address, 1683 we maintain their relative order, except that R_RX_RH_RELAX 1684 alignment relocs must be the first reloc for any given address. */ 1685 1686static void 1687reloc_bubblesort (Elf_Internal_Rela * r, int count) 1688{ 1689 int i; 1690 bfd_boolean again; 1691 bfd_boolean swappit; 1692 1693 /* This is almost a classic bubblesort. It's the slowest sort, but 1694 we're taking advantage of the fact that the relocations are 1695 mostly in order already (the assembler emits them that way) and 1696 we need relocs with the same address to remain in the same 1697 relative order. */ 1698 again = TRUE; 1699 while (again) 1700 { 1701 again = FALSE; 1702 for (i = 0; i < count - 1; i ++) 1703 { 1704 if (r[i].r_offset > r[i + 1].r_offset) 1705 swappit = TRUE; 1706 else if (r[i].r_offset < r[i + 1].r_offset) 1707 swappit = FALSE; 1708 else if (ELF32_R_TYPE (r[i + 1].r_info) == R_RX_RH_RELAX 1709 && (r[i + 1].r_addend & RX_RELAXA_ALIGN)) 1710 swappit = TRUE; 1711 else if (ELF32_R_TYPE (r[i + 1].r_info) == R_RX_RH_RELAX 1712 && (r[i + 1].r_addend & RX_RELAXA_ELIGN) 1713 && !(ELF32_R_TYPE (r[i].r_info) == R_RX_RH_RELAX 1714 && (r[i].r_addend & RX_RELAXA_ALIGN))) 1715 swappit = TRUE; 1716 else 1717 swappit = FALSE; 1718 1719 if (swappit) 1720 { 1721 Elf_Internal_Rela tmp; 1722 1723 tmp = r[i]; 1724 r[i] = r[i + 1]; 1725 r[i + 1] = tmp; 1726 /* If we do move a reloc back, re-scan to see if it 1727 needs to be moved even further back. This avoids 1728 most of the O(n^2) behavior for our cases. */ 1729 if (i > 0) 1730 i -= 2; 1731 again = TRUE; 1732 } 1733 } 1734 } 1735} 1736 1737 1738#define OFFSET_FOR_RELOC(rel, lrel, scale) \ 1739 rx_offset_for_reloc (abfd, rel + 1, symtab_hdr, shndx_buf, intsyms, \ 1740 lrel, abfd, sec, link_info, scale) 1741 1742static bfd_vma 1743rx_offset_for_reloc (bfd * abfd, 1744 Elf_Internal_Rela * rel, 1745 Elf_Internal_Shdr * symtab_hdr, 1746 bfd_byte * shndx_buf ATTRIBUTE_UNUSED, 1747 Elf_Internal_Sym * intsyms, 1748 Elf_Internal_Rela ** lrel, 1749 bfd * input_bfd, 1750 asection * input_section, 1751 struct bfd_link_info * info, 1752 int * scale) 1753{ 1754 bfd_vma symval; 1755 bfd_reloc_status_type r; 1756 1757 *scale = 1; 1758 1759 /* REL is the first of 1..N relocations. We compute the symbol 1760 value for each relocation, then combine them if needed. LREL 1761 gets a pointer to the last relocation used. */ 1762 while (1) 1763 { 1764 int32_t tmp1, tmp2; 1765 1766 /* Get the value of the symbol referred to by the reloc. */ 1767 if (ELF32_R_SYM (rel->r_info) < symtab_hdr->sh_info) 1768 { 1769 /* A local symbol. */ 1770 Elf_Internal_Sym *isym; 1771 asection *ssec; 1772 1773 isym = intsyms + ELF32_R_SYM (rel->r_info); 1774 1775 if (isym->st_shndx == SHN_UNDEF) 1776 ssec = bfd_und_section_ptr; 1777 else if (isym->st_shndx == SHN_ABS) 1778 ssec = bfd_abs_section_ptr; 1779 else if (isym->st_shndx == SHN_COMMON) 1780 ssec = bfd_com_section_ptr; 1781 else 1782 ssec = bfd_section_from_elf_index (abfd, 1783 isym->st_shndx); 1784 1785 /* Initial symbol value. */ 1786 symval = isym->st_value; 1787 1788 /* GAS may have made this symbol relative to a section, in 1789 which case, we have to add the addend to find the 1790 symbol. */ 1791 if (ELF_ST_TYPE (isym->st_info) == STT_SECTION) 1792 symval += rel->r_addend; 1793 1794 if (ssec) 1795 { 1796 if ((ssec->flags & SEC_MERGE) 1797 && ssec->sec_info_type == SEC_INFO_TYPE_MERGE) 1798 symval = _bfd_merged_section_offset (abfd, & ssec, 1799 elf_section_data (ssec)->sec_info, 1800 symval); 1801 } 1802 1803 /* Now make the offset relative to where the linker is putting it. */ 1804 if (ssec) 1805 symval += 1806 ssec->output_section->vma + ssec->output_offset; 1807 1808 symval += rel->r_addend; 1809 } 1810 else 1811 { 1812 unsigned long indx; 1813 struct elf_link_hash_entry * h; 1814 1815 /* An external symbol. */ 1816 indx = ELF32_R_SYM (rel->r_info) - symtab_hdr->sh_info; 1817 h = elf_sym_hashes (abfd)[indx]; 1818 BFD_ASSERT (h != NULL); 1819 1820 if (h->root.type != bfd_link_hash_defined 1821 && h->root.type != bfd_link_hash_defweak) 1822 { 1823 /* This appears to be a reference to an undefined 1824 symbol. Just ignore it--it will be caught by the 1825 regular reloc processing. */ 1826 if (lrel) 1827 *lrel = rel; 1828 return 0; 1829 } 1830 1831 symval = (h->root.u.def.value 1832 + h->root.u.def.section->output_section->vma 1833 + h->root.u.def.section->output_offset); 1834 1835 symval += rel->r_addend; 1836 } 1837 1838 switch (ELF32_R_TYPE (rel->r_info)) 1839 { 1840 case R_RX_SYM: 1841 RX_STACK_PUSH (symval); 1842 break; 1843 1844 case R_RX_OPneg: 1845 RX_STACK_POP (tmp1); 1846 tmp1 = - tmp1; 1847 RX_STACK_PUSH (tmp1); 1848 break; 1849 1850 case R_RX_OPadd: 1851 RX_STACK_POP (tmp1); 1852 RX_STACK_POP (tmp2); 1853 tmp1 += tmp2; 1854 RX_STACK_PUSH (tmp1); 1855 break; 1856 1857 case R_RX_OPsub: 1858 RX_STACK_POP (tmp1); 1859 RX_STACK_POP (tmp2); 1860 tmp2 -= tmp1; 1861 RX_STACK_PUSH (tmp2); 1862 break; 1863 1864 case R_RX_OPmul: 1865 RX_STACK_POP (tmp1); 1866 RX_STACK_POP (tmp2); 1867 tmp1 *= tmp2; 1868 RX_STACK_PUSH (tmp1); 1869 break; 1870 1871 case R_RX_OPdiv: 1872 RX_STACK_POP (tmp1); 1873 RX_STACK_POP (tmp2); 1874 tmp1 /= tmp2; 1875 RX_STACK_PUSH (tmp1); 1876 break; 1877 1878 case R_RX_OPshla: 1879 RX_STACK_POP (tmp1); 1880 RX_STACK_POP (tmp2); 1881 tmp1 <<= tmp2; 1882 RX_STACK_PUSH (tmp1); 1883 break; 1884 1885 case R_RX_OPshra: 1886 RX_STACK_POP (tmp1); 1887 RX_STACK_POP (tmp2); 1888 tmp1 >>= tmp2; 1889 RX_STACK_PUSH (tmp1); 1890 break; 1891 1892 case R_RX_OPsctsize: 1893 RX_STACK_PUSH (input_section->size); 1894 break; 1895 1896 case R_RX_OPscttop: 1897 RX_STACK_PUSH (input_section->output_section->vma); 1898 break; 1899 1900 case R_RX_OPand: 1901 RX_STACK_POP (tmp1); 1902 RX_STACK_POP (tmp2); 1903 tmp1 &= tmp2; 1904 RX_STACK_PUSH (tmp1); 1905 break; 1906 1907 case R_RX_OPor: 1908 RX_STACK_POP (tmp1); 1909 RX_STACK_POP (tmp2); 1910 tmp1 |= tmp2; 1911 RX_STACK_PUSH (tmp1); 1912 break; 1913 1914 case R_RX_OPxor: 1915 RX_STACK_POP (tmp1); 1916 RX_STACK_POP (tmp2); 1917 tmp1 ^= tmp2; 1918 RX_STACK_PUSH (tmp1); 1919 break; 1920 1921 case R_RX_OPnot: 1922 RX_STACK_POP (tmp1); 1923 tmp1 = ~ tmp1; 1924 RX_STACK_PUSH (tmp1); 1925 break; 1926 1927 case R_RX_OPmod: 1928 RX_STACK_POP (tmp1); 1929 RX_STACK_POP (tmp2); 1930 tmp1 %= tmp2; 1931 RX_STACK_PUSH (tmp1); 1932 break; 1933 1934 case R_RX_OPromtop: 1935 RX_STACK_PUSH (get_romstart (info, input_bfd, input_section, rel->r_offset)); 1936 break; 1937 1938 case R_RX_OPramtop: 1939 RX_STACK_PUSH (get_ramstart (info, input_bfd, input_section, rel->r_offset)); 1940 break; 1941 1942 case R_RX_DIR16UL: 1943 case R_RX_DIR8UL: 1944 case R_RX_ABS16UL: 1945 case R_RX_ABS8UL: 1946 if (rx_stack_top) 1947 RX_STACK_POP (symval); 1948 if (lrel) 1949 *lrel = rel; 1950 *scale = 4; 1951 return symval; 1952 1953 case R_RX_DIR16UW: 1954 case R_RX_DIR8UW: 1955 case R_RX_ABS16UW: 1956 case R_RX_ABS8UW: 1957 if (rx_stack_top) 1958 RX_STACK_POP (symval); 1959 if (lrel) 1960 *lrel = rel; 1961 *scale = 2; 1962 return symval; 1963 1964 default: 1965 if (rx_stack_top) 1966 RX_STACK_POP (symval); 1967 if (lrel) 1968 *lrel = rel; 1969 return symval; 1970 } 1971 1972 rel ++; 1973 } 1974 /* FIXME. */ 1975 (void) r; 1976} 1977 1978static void 1979move_reloc (Elf_Internal_Rela * irel, Elf_Internal_Rela * srel, int delta) 1980{ 1981 bfd_vma old_offset = srel->r_offset; 1982 1983 irel ++; 1984 while (irel <= srel) 1985 { 1986 if (irel->r_offset == old_offset) 1987 irel->r_offset += delta; 1988 irel ++; 1989 } 1990} 1991 1992/* Relax one section. */ 1993 1994static bfd_boolean 1995elf32_rx_relax_section (bfd * abfd, 1996 asection * sec, 1997 struct bfd_link_info * link_info, 1998 bfd_boolean * again, 1999 bfd_boolean allow_pcrel3) 2000{ 2001 Elf_Internal_Shdr * symtab_hdr; 2002 Elf_Internal_Shdr * shndx_hdr; 2003 Elf_Internal_Rela * internal_relocs; 2004 Elf_Internal_Rela * irel; 2005 Elf_Internal_Rela * srel; 2006 Elf_Internal_Rela * irelend; 2007 Elf_Internal_Rela * next_alignment; 2008 Elf_Internal_Rela * prev_alignment; 2009 bfd_byte * contents = NULL; 2010 bfd_byte * free_contents = NULL; 2011 Elf_Internal_Sym * intsyms = NULL; 2012 Elf_Internal_Sym * free_intsyms = NULL; 2013 bfd_byte * shndx_buf = NULL; 2014 bfd_vma pc; 2015 bfd_vma sec_start; 2016 bfd_vma symval = 0; 2017 int pcrel = 0; 2018 int code = 0; 2019 int section_alignment_glue; 2020 /* how much to scale the relocation by - 1, 2, or 4. */ 2021 int scale; 2022 2023 /* Assume nothing changes. */ 2024 *again = FALSE; 2025 2026 /* We don't have to do anything for a relocatable link, if 2027 this section does not have relocs, or if this is not a 2028 code section. */ 2029 if (bfd_link_relocatable (link_info) 2030 || (sec->flags & SEC_RELOC) == 0 2031 || sec->reloc_count == 0 2032 || (sec->flags & SEC_CODE) == 0) 2033 return TRUE; 2034 2035 symtab_hdr = & elf_symtab_hdr (abfd); 2036 if (elf_symtab_shndx_list (abfd)) 2037 shndx_hdr = & elf_symtab_shndx_list (abfd)->hdr; 2038 else 2039 shndx_hdr = NULL; 2040 2041 sec_start = sec->output_section->vma + sec->output_offset; 2042 2043 /* Get the section contents. */ 2044 if (elf_section_data (sec)->this_hdr.contents != NULL) 2045 contents = elf_section_data (sec)->this_hdr.contents; 2046 /* Go get them off disk. */ 2047 else 2048 { 2049 if (! bfd_malloc_and_get_section (abfd, sec, &contents)) 2050 goto error_return; 2051 elf_section_data (sec)->this_hdr.contents = contents; 2052 } 2053 2054 /* Read this BFD's symbols. */ 2055 /* Get cached copy if it exists. */ 2056 if (symtab_hdr->contents != NULL) 2057 intsyms = (Elf_Internal_Sym *) symtab_hdr->contents; 2058 else 2059 { 2060 intsyms = bfd_elf_get_elf_syms (abfd, symtab_hdr, symtab_hdr->sh_info, 0, NULL, NULL, NULL); 2061 symtab_hdr->contents = (bfd_byte *) intsyms; 2062 } 2063 2064 if (shndx_hdr && shndx_hdr->sh_size != 0) 2065 { 2066 size_t amt; 2067 2068 if (_bfd_mul_overflow (symtab_hdr->sh_info, 2069 sizeof (Elf_External_Sym_Shndx), &amt)) 2070 { 2071 bfd_set_error (bfd_error_file_too_big); 2072 goto error_return; 2073 } 2074 if (bfd_seek (abfd, shndx_hdr->sh_offset, SEEK_SET) != 0) 2075 goto error_return; 2076 shndx_buf = _bfd_malloc_and_read (abfd, amt, amt); 2077 if (shndx_buf == NULL) 2078 goto error_return; 2079 shndx_hdr->contents = shndx_buf; 2080 } 2081 2082 /* Get a copy of the native relocations. */ 2083 /* Note - we ignore the setting of link_info->keep_memory when reading 2084 in these relocs. We have to maintain a permanent copy of the relocs 2085 because we are going to walk over them multiple times, adjusting them 2086 as bytes are deleted from the section, and with this relaxation 2087 function itself being called multiple times on the same section... */ 2088 internal_relocs = _bfd_elf_link_read_relocs 2089 (abfd, sec, NULL, (Elf_Internal_Rela *) NULL, TRUE); 2090 if (internal_relocs == NULL) 2091 goto error_return; 2092 2093 /* The RL_ relocs must be just before the operand relocs they go 2094 with, so we must sort them to guarantee this. We use bubblesort 2095 instead of qsort so we can guarantee that relocs with the same 2096 address remain in the same relative order. */ 2097 reloc_bubblesort (internal_relocs, sec->reloc_count); 2098 2099 /* Walk through them looking for relaxing opportunities. */ 2100 irelend = internal_relocs + sec->reloc_count; 2101 2102 /* This will either be NULL or a pointer to the next alignment 2103 relocation. */ 2104 next_alignment = internal_relocs; 2105 /* This will be the previous alignment, although at first it points 2106 to the first real relocation. */ 2107 prev_alignment = internal_relocs; 2108 2109 /* We calculate worst case shrinkage caused by alignment directives. 2110 No fool-proof, but better than either ignoring the problem or 2111 doing heavy duty analysis of all the alignment markers in all 2112 input sections. */ 2113 section_alignment_glue = 0; 2114 for (irel = internal_relocs; irel < irelend; irel++) 2115 if (ELF32_R_TYPE (irel->r_info) == R_RX_RH_RELAX 2116 && irel->r_addend & RX_RELAXA_ALIGN) 2117 { 2118 int this_glue = 1 << (irel->r_addend & RX_RELAXA_ANUM); 2119 2120 if (section_alignment_glue < this_glue) 2121 section_alignment_glue = this_glue; 2122 } 2123 /* Worst case is all 0..N alignments, in order, causing 2*N-1 byte 2124 shrinkage. */ 2125 section_alignment_glue *= 2; 2126 2127 for (irel = internal_relocs; irel < irelend; irel++) 2128 { 2129 unsigned char *insn; 2130 int nrelocs; 2131 2132 /* The insns we care about are all marked with one of these. */ 2133 if (ELF32_R_TYPE (irel->r_info) != R_RX_RH_RELAX) 2134 continue; 2135 2136 if (irel->r_addend & RX_RELAXA_ALIGN 2137 || next_alignment == internal_relocs) 2138 { 2139 /* When we delete bytes, we need to maintain all the alignments 2140 indicated. In addition, we need to be careful about relaxing 2141 jumps across alignment boundaries - these displacements 2142 *grow* when we delete bytes. For now, don't shrink 2143 displacements across an alignment boundary, just in case. 2144 Note that this only affects relocations to the same 2145 section. */ 2146 prev_alignment = next_alignment; 2147 next_alignment += 2; 2148 while (next_alignment < irelend 2149 && (ELF32_R_TYPE (next_alignment->r_info) != R_RX_RH_RELAX 2150 || !(next_alignment->r_addend & RX_RELAXA_ELIGN))) 2151 next_alignment ++; 2152 if (next_alignment >= irelend || next_alignment->r_offset == 0) 2153 next_alignment = NULL; 2154 } 2155 2156 /* When we hit alignment markers, see if we've shrunk enough 2157 before them to reduce the gap without violating the alignment 2158 requirements. */ 2159 if (irel->r_addend & RX_RELAXA_ALIGN) 2160 { 2161 /* At this point, the next relocation *should* be the ELIGN 2162 end marker. */ 2163 Elf_Internal_Rela *erel = irel + 1; 2164 unsigned int alignment, nbytes; 2165 2166 if (ELF32_R_TYPE (erel->r_info) != R_RX_RH_RELAX) 2167 continue; 2168 if (!(erel->r_addend & RX_RELAXA_ELIGN)) 2169 continue; 2170 2171 alignment = 1 << (irel->r_addend & RX_RELAXA_ANUM); 2172 2173 if (erel->r_offset - irel->r_offset < alignment) 2174 continue; 2175 2176 nbytes = erel->r_offset - irel->r_offset; 2177 nbytes /= alignment; 2178 nbytes *= alignment; 2179 2180 elf32_rx_relax_delete_bytes (abfd, sec, erel->r_offset-nbytes, nbytes, next_alignment, 2181 erel->r_offset == sec->size, internal_relocs); 2182 *again = TRUE; 2183 2184 continue; 2185 } 2186 2187 if (irel->r_addend & RX_RELAXA_ELIGN) 2188 continue; 2189 2190 insn = contents + irel->r_offset; 2191 2192 nrelocs = irel->r_addend & RX_RELAXA_RNUM; 2193 2194 /* At this point, we have an insn that is a candidate for linker 2195 relaxation. There are NRELOCS relocs following that may be 2196 relaxed, although each reloc may be made of more than one 2197 reloc entry (such as gp-rel symbols). */ 2198 2199 /* Get the value of the symbol referred to by the reloc. Just 2200 in case this is the last reloc in the list, use the RL's 2201 addend to choose between this reloc (no addend) or the next 2202 (yes addend, which means at least one following reloc). */ 2203 2204 /* srel points to the "current" reloction for this insn - 2205 actually the last reloc for a given operand, which is the one 2206 we need to update. We check the relaxations in the same 2207 order that the relocations happen, so we'll just push it 2208 along as we go. */ 2209 srel = irel; 2210 2211 pc = sec->output_section->vma + sec->output_offset 2212 + srel->r_offset; 2213 2214#define GET_RELOC \ 2215 symval = OFFSET_FOR_RELOC (srel, &srel, &scale); \ 2216 pcrel = symval - pc + srel->r_addend; \ 2217 nrelocs --; 2218 2219#define SNIPNR(offset, nbytes) \ 2220 elf32_rx_relax_delete_bytes (abfd, sec, (insn - contents) + offset, nbytes, next_alignment, 0, internal_relocs); 2221#define SNIP(offset, nbytes, newtype) \ 2222 SNIPNR (offset, nbytes); \ 2223 srel->r_info = ELF32_R_INFO (ELF32_R_SYM (srel->r_info), newtype) 2224 2225 /* The order of these bit tests must match the order that the 2226 relocs appear in. Since we sorted those by offset, we can 2227 predict them. */ 2228 2229 /* Note that the numbers in, say, DSP6 are the bit offsets of 2230 the code fields that describe the operand. Bits number 0 for 2231 the MSB of insn[0]. */ 2232 2233 /* DSP* codes: 2234 0 00 [reg] 2235 1 01 dsp:8[reg] 2236 2 10 dsp:16[reg] 2237 3 11 reg */ 2238 if (irel->r_addend & RX_RELAXA_DSP6) 2239 { 2240 GET_RELOC; 2241 2242 code = insn[0] & 3; 2243 if (code == 2 && symval/scale <= 255) 2244 { 2245 unsigned int newrel = ELF32_R_TYPE (srel->r_info); 2246 insn[0] &= 0xfc; 2247 insn[0] |= 0x01; 2248 newrel = next_smaller_reloc (ELF32_R_TYPE (srel->r_info)); 2249 if (newrel != ELF32_R_TYPE (srel->r_info)) 2250 { 2251 SNIP (3, 1, newrel); 2252 *again = TRUE; 2253 } 2254 } 2255 2256 else if (code == 1 && symval == 0) 2257 { 2258 insn[0] &= 0xfc; 2259 SNIP (2, 1, R_RX_NONE); 2260 *again = TRUE; 2261 } 2262 2263 /* Special case DSP:5 format: MOV.bwl dsp:5[Rsrc],Rdst. */ 2264 else if (code == 1 && symval/scale <= 31 2265 /* Decodable bits. */ 2266 && (insn[0] & 0xcc) == 0xcc 2267 /* Width. */ 2268 && (insn[0] & 0x30) != 0x30 2269 /* Register MSBs. */ 2270 && (insn[1] & 0x88) == 0x00) 2271 { 2272 int newrel = 0; 2273 2274 insn[0] = 0x88 | (insn[0] & 0x30); 2275 /* The register fields are in the right place already. */ 2276 2277 /* We can't relax this new opcode. */ 2278 irel->r_addend = 0; 2279 2280 switch ((insn[0] & 0x30) >> 4) 2281 { 2282 case 0: 2283 newrel = R_RX_RH_ABS5p5B; 2284 break; 2285 case 1: 2286 newrel = R_RX_RH_ABS5p5W; 2287 break; 2288 case 2: 2289 newrel = R_RX_RH_ABS5p5L; 2290 break; 2291 } 2292 2293 move_reloc (irel, srel, -2); 2294 SNIP (2, 1, newrel); 2295 } 2296 2297 /* Special case DSP:5 format: MOVU.bw dsp:5[Rsrc],Rdst. */ 2298 else if (code == 1 && symval/scale <= 31 2299 /* Decodable bits. */ 2300 && (insn[0] & 0xf8) == 0x58 2301 /* Register MSBs. */ 2302 && (insn[1] & 0x88) == 0x00) 2303 { 2304 int newrel = 0; 2305 2306 insn[0] = 0xb0 | ((insn[0] & 0x04) << 1); 2307 /* The register fields are in the right place already. */ 2308 2309 /* We can't relax this new opcode. */ 2310 irel->r_addend = 0; 2311 2312 switch ((insn[0] & 0x08) >> 3) 2313 { 2314 case 0: 2315 newrel = R_RX_RH_ABS5p5B; 2316 break; 2317 case 1: 2318 newrel = R_RX_RH_ABS5p5W; 2319 break; 2320 } 2321 2322 move_reloc (irel, srel, -2); 2323 SNIP (2, 1, newrel); 2324 } 2325 } 2326 2327 /* A DSP4 operand always follows a DSP6 operand, even if there's 2328 no relocation for it. We have to read the code out of the 2329 opcode to calculate the offset of the operand. */ 2330 if (irel->r_addend & RX_RELAXA_DSP4) 2331 { 2332 int code6, offset = 0; 2333 2334 GET_RELOC; 2335 2336 code6 = insn[0] & 0x03; 2337 switch (code6) 2338 { 2339 case 0: offset = 2; break; 2340 case 1: offset = 3; break; 2341 case 2: offset = 4; break; 2342 case 3: offset = 2; break; 2343 } 2344 2345 code = (insn[0] & 0x0c) >> 2; 2346 2347 if (code == 2 && symval / scale <= 255) 2348 { 2349 unsigned int newrel = ELF32_R_TYPE (srel->r_info); 2350 2351 insn[0] &= 0xf3; 2352 insn[0] |= 0x04; 2353 newrel = next_smaller_reloc (ELF32_R_TYPE (srel->r_info)); 2354 if (newrel != ELF32_R_TYPE (srel->r_info)) 2355 { 2356 SNIP (offset+1, 1, newrel); 2357 *again = TRUE; 2358 } 2359 } 2360 2361 else if (code == 1 && symval == 0) 2362 { 2363 insn[0] &= 0xf3; 2364 SNIP (offset, 1, R_RX_NONE); 2365 *again = TRUE; 2366 } 2367 /* Special case DSP:5 format: MOV.bwl Rsrc,dsp:5[Rdst] */ 2368 else if (code == 1 && symval/scale <= 31 2369 /* Decodable bits. */ 2370 && (insn[0] & 0xc3) == 0xc3 2371 /* Width. */ 2372 && (insn[0] & 0x30) != 0x30 2373 /* Register MSBs. */ 2374 && (insn[1] & 0x88) == 0x00) 2375 { 2376 int newrel = 0; 2377 2378 insn[0] = 0x80 | (insn[0] & 0x30); 2379 /* The register fields are in the right place already. */ 2380 2381 /* We can't relax this new opcode. */ 2382 irel->r_addend = 0; 2383 2384 switch ((insn[0] & 0x30) >> 4) 2385 { 2386 case 0: 2387 newrel = R_RX_RH_ABS5p5B; 2388 break; 2389 case 1: 2390 newrel = R_RX_RH_ABS5p5W; 2391 break; 2392 case 2: 2393 newrel = R_RX_RH_ABS5p5L; 2394 break; 2395 } 2396 2397 move_reloc (irel, srel, -2); 2398 SNIP (2, 1, newrel); 2399 } 2400 } 2401 2402 /* These always occur alone, but the offset depends on whether 2403 it's a MEMEX opcode (0x06) or not. */ 2404 if (irel->r_addend & RX_RELAXA_DSP14) 2405 { 2406 int offset; 2407 GET_RELOC; 2408 2409 if (insn[0] == 0x06) 2410 offset = 3; 2411 else 2412 offset = 4; 2413 2414 code = insn[1] & 3; 2415 2416 if (code == 2 && symval / scale <= 255) 2417 { 2418 unsigned int newrel = ELF32_R_TYPE (srel->r_info); 2419 2420 insn[1] &= 0xfc; 2421 insn[1] |= 0x01; 2422 newrel = next_smaller_reloc (ELF32_R_TYPE (srel->r_info)); 2423 if (newrel != ELF32_R_TYPE (srel->r_info)) 2424 { 2425 SNIP (offset, 1, newrel); 2426 *again = TRUE; 2427 } 2428 } 2429 else if (code == 1 && symval == 0) 2430 { 2431 insn[1] &= 0xfc; 2432 SNIP (offset, 1, R_RX_NONE); 2433 *again = TRUE; 2434 } 2435 } 2436 2437 /* IMM* codes: 2438 0 00 imm:32 2439 1 01 simm:8 2440 2 10 simm:16 2441 3 11 simm:24. */ 2442 2443 /* These always occur alone. */ 2444 if (irel->r_addend & RX_RELAXA_IMM6) 2445 { 2446 long ssymval; 2447 2448 GET_RELOC; 2449 2450 /* These relocations sign-extend, so we must do signed compares. */ 2451 ssymval = (long) symval; 2452 2453 code = insn[0] & 0x03; 2454 2455 if (code == 0 && ssymval <= 8388607 && ssymval >= -8388608) 2456 { 2457 unsigned int newrel = ELF32_R_TYPE (srel->r_info); 2458 2459 insn[0] &= 0xfc; 2460 insn[0] |= 0x03; 2461 newrel = next_smaller_reloc (ELF32_R_TYPE (srel->r_info)); 2462 if (newrel != ELF32_R_TYPE (srel->r_info)) 2463 { 2464 SNIP (2, 1, newrel); 2465 *again = TRUE; 2466 } 2467 } 2468 2469 else if (code == 3 && ssymval <= 32767 && ssymval >= -32768) 2470 { 2471 unsigned int newrel = ELF32_R_TYPE (srel->r_info); 2472 2473 insn[0] &= 0xfc; 2474 insn[0] |= 0x02; 2475 newrel = next_smaller_reloc (ELF32_R_TYPE (srel->r_info)); 2476 if (newrel != ELF32_R_TYPE (srel->r_info)) 2477 { 2478 SNIP (2, 1, newrel); 2479 *again = TRUE; 2480 } 2481 } 2482 2483 /* Special case UIMM8 format: CMP #uimm8,Rdst. */ 2484 else if (code == 2 && ssymval <= 255 && ssymval >= 16 2485 /* Decodable bits. */ 2486 && (insn[0] & 0xfc) == 0x74 2487 /* Decodable bits. */ 2488 && ((insn[1] & 0xf0) == 0x00)) 2489 { 2490 int newrel; 2491 2492 insn[0] = 0x75; 2493 insn[1] = 0x50 | (insn[1] & 0x0f); 2494 2495 /* We can't relax this new opcode. */ 2496 irel->r_addend = 0; 2497 2498 if (STACK_REL_P (ELF32_R_TYPE (srel->r_info))) 2499 newrel = R_RX_ABS8U; 2500 else 2501 newrel = R_RX_DIR8U; 2502 2503 SNIP (2, 1, newrel); 2504 *again = TRUE; 2505 } 2506 2507 else if (code == 2 && ssymval <= 127 && ssymval >= -128) 2508 { 2509 unsigned int newrel = ELF32_R_TYPE (srel->r_info); 2510 2511 insn[0] &= 0xfc; 2512 insn[0] |= 0x01; 2513 newrel = next_smaller_reloc (ELF32_R_TYPE (srel->r_info)); 2514 if (newrel != ELF32_R_TYPE (srel->r_info)) 2515 { 2516 SNIP (2, 1, newrel); 2517 *again = TRUE; 2518 } 2519 } 2520 2521 /* Special case UIMM4 format: CMP, MUL, AND, OR. */ 2522 else if (code == 1 && ssymval <= 15 && ssymval >= 0 2523 /* Decodable bits and immediate type. */ 2524 && insn[0] == 0x75 2525 /* Decodable bits. */ 2526 && (insn[1] & 0xc0) == 0x00) 2527 { 2528 static const int newop[4] = { 1, 3, 4, 5 }; 2529 2530 insn[0] = 0x60 | newop[insn[1] >> 4]; 2531 /* The register number doesn't move. */ 2532 2533 /* We can't relax this new opcode. */ 2534 irel->r_addend = 0; 2535 2536 move_reloc (irel, srel, -1); 2537 2538 SNIP (2, 1, R_RX_RH_UIMM4p8); 2539 *again = TRUE; 2540 } 2541 2542 /* Special case UIMM4 format: ADD -> ADD/SUB. */ 2543 else if (code == 1 && ssymval <= 15 && ssymval >= -15 2544 /* Decodable bits and immediate type. */ 2545 && insn[0] == 0x71 2546 /* Same register for source and destination. */ 2547 && ((insn[1] >> 4) == (insn[1] & 0x0f))) 2548 { 2549 int newrel; 2550 2551 /* Note that we can't turn "add $0,Rs" into a NOP 2552 because the flags need to be set right. */ 2553 2554 if (ssymval < 0) 2555 { 2556 insn[0] = 0x60; /* Subtract. */ 2557 newrel = R_RX_RH_UNEG4p8; 2558 } 2559 else 2560 { 2561 insn[0] = 0x62; /* Add. */ 2562 newrel = R_RX_RH_UIMM4p8; 2563 } 2564 2565 /* The register number is in the right place. */ 2566 2567 /* We can't relax this new opcode. */ 2568 irel->r_addend = 0; 2569 2570 move_reloc (irel, srel, -1); 2571 2572 SNIP (2, 1, newrel); 2573 *again = TRUE; 2574 } 2575 } 2576 2577 /* These are either matched with a DSP6 (2-byte base) or an id24 2578 (3-byte base). */ 2579 if (irel->r_addend & RX_RELAXA_IMM12) 2580 { 2581 int dspcode, offset = 0; 2582 long ssymval; 2583 2584 GET_RELOC; 2585 2586 if ((insn[0] & 0xfc) == 0xfc) 2587 dspcode = 1; /* Just something with one byte operand. */ 2588 else 2589 dspcode = insn[0] & 3; 2590 switch (dspcode) 2591 { 2592 case 0: offset = 2; break; 2593 case 1: offset = 3; break; 2594 case 2: offset = 4; break; 2595 case 3: offset = 2; break; 2596 } 2597 2598 /* These relocations sign-extend, so we must do signed compares. */ 2599 ssymval = (long) symval; 2600 2601 code = (insn[1] >> 2) & 3; 2602 if (code == 0 && ssymval <= 8388607 && ssymval >= -8388608) 2603 { 2604 unsigned int newrel = ELF32_R_TYPE (srel->r_info); 2605 2606 insn[1] &= 0xf3; 2607 insn[1] |= 0x0c; 2608 newrel = next_smaller_reloc (ELF32_R_TYPE (srel->r_info)); 2609 if (newrel != ELF32_R_TYPE (srel->r_info)) 2610 { 2611 SNIP (offset, 1, newrel); 2612 *again = TRUE; 2613 } 2614 } 2615 2616 else if (code == 3 && ssymval <= 32767 && ssymval >= -32768) 2617 { 2618 unsigned int newrel = ELF32_R_TYPE (srel->r_info); 2619 2620 insn[1] &= 0xf3; 2621 insn[1] |= 0x08; 2622 newrel = next_smaller_reloc (ELF32_R_TYPE (srel->r_info)); 2623 if (newrel != ELF32_R_TYPE (srel->r_info)) 2624 { 2625 SNIP (offset, 1, newrel); 2626 *again = TRUE; 2627 } 2628 } 2629 2630 /* Special case UIMM8 format: MOV #uimm8,Rdst. */ 2631 else if (code == 2 && ssymval <= 255 && ssymval >= 16 2632 /* Decodable bits. */ 2633 && insn[0] == 0xfb 2634 /* Decodable bits. */ 2635 && ((insn[1] & 0x03) == 0x02)) 2636 { 2637 int newrel; 2638 2639 insn[0] = 0x75; 2640 insn[1] = 0x40 | (insn[1] >> 4); 2641 2642 /* We can't relax this new opcode. */ 2643 irel->r_addend = 0; 2644 2645 if (STACK_REL_P (ELF32_R_TYPE (srel->r_info))) 2646 newrel = R_RX_ABS8U; 2647 else 2648 newrel = R_RX_DIR8U; 2649 2650 SNIP (2, 1, newrel); 2651 *again = TRUE; 2652 } 2653 2654 else if (code == 2 && ssymval <= 127 && ssymval >= -128) 2655 { 2656 unsigned int newrel = ELF32_R_TYPE(srel->r_info); 2657 2658 insn[1] &= 0xf3; 2659 insn[1] |= 0x04; 2660 newrel = next_smaller_reloc (ELF32_R_TYPE (srel->r_info)); 2661 if (newrel != ELF32_R_TYPE(srel->r_info)) 2662 { 2663 SNIP (offset, 1, newrel); 2664 *again = TRUE; 2665 } 2666 } 2667 2668 /* Special case UIMM4 format: MOV #uimm4,Rdst. */ 2669 else if (code == 1 && ssymval <= 15 && ssymval >= 0 2670 /* Decodable bits. */ 2671 && insn[0] == 0xfb 2672 /* Decodable bits. */ 2673 && ((insn[1] & 0x03) == 0x02)) 2674 { 2675 insn[0] = 0x66; 2676 insn[1] = insn[1] >> 4; 2677 2678 /* We can't relax this new opcode. */ 2679 irel->r_addend = 0; 2680 2681 move_reloc (irel, srel, -1); 2682 2683 SNIP (2, 1, R_RX_RH_UIMM4p8); 2684 *again = TRUE; 2685 } 2686 } 2687 2688 if (irel->r_addend & RX_RELAXA_BRA) 2689 { 2690 unsigned int newrel = ELF32_R_TYPE (srel->r_info); 2691 int max_pcrel3 = 4; 2692 int alignment_glue = 0; 2693 2694 GET_RELOC; 2695 2696 /* Branches over alignment chunks are problematic, as 2697 deleting bytes here makes the branch *further* away. We 2698 can be agressive with branches within this alignment 2699 block, but not branches outside it. */ 2700 if ((prev_alignment == NULL 2701 || symval < (bfd_vma)(sec_start + prev_alignment->r_offset)) 2702 && (next_alignment == NULL 2703 || symval > (bfd_vma)(sec_start + next_alignment->r_offset))) 2704 alignment_glue = section_alignment_glue; 2705 2706 if (ELF32_R_TYPE(srel[1].r_info) == R_RX_RH_RELAX 2707 && srel[1].r_addend & RX_RELAXA_BRA 2708 && srel[1].r_offset < irel->r_offset + pcrel) 2709 max_pcrel3 ++; 2710 2711 newrel = next_smaller_reloc (ELF32_R_TYPE (srel->r_info)); 2712 2713 /* The values we compare PCREL with are not what you'd 2714 expect; they're off by a little to compensate for (1) 2715 where the reloc is relative to the insn, and (2) how much 2716 the insn is going to change when we relax it. */ 2717 2718 /* These we have to decode. */ 2719 switch (insn[0]) 2720 { 2721 case 0x04: /* BRA pcdsp:24 */ 2722 if (-32768 + alignment_glue <= pcrel 2723 && pcrel <= 32765 - alignment_glue) 2724 { 2725 insn[0] = 0x38; 2726 SNIP (3, 1, newrel); 2727 *again = TRUE; 2728 } 2729 break; 2730 2731 case 0x38: /* BRA pcdsp:16 */ 2732 if (-128 + alignment_glue <= pcrel 2733 && pcrel <= 127 - alignment_glue) 2734 { 2735 insn[0] = 0x2e; 2736 SNIP (2, 1, newrel); 2737 *again = TRUE; 2738 } 2739 break; 2740 2741 case 0x2e: /* BRA pcdsp:8 */ 2742 /* Note that there's a risk here of shortening things so 2743 much that we no longer fit this reloc; it *should* 2744 only happen when you branch across a branch, and that 2745 branch also devolves into BRA.S. "Real" code should 2746 be OK. */ 2747 if (max_pcrel3 + alignment_glue <= pcrel 2748 && pcrel <= 10 - alignment_glue 2749 && allow_pcrel3) 2750 { 2751 insn[0] = 0x08; 2752 SNIP (1, 1, newrel); 2753 move_reloc (irel, srel, -1); 2754 *again = TRUE; 2755 } 2756 break; 2757 2758 case 0x05: /* BSR pcdsp:24 */ 2759 if (-32768 + alignment_glue <= pcrel 2760 && pcrel <= 32765 - alignment_glue) 2761 { 2762 insn[0] = 0x39; 2763 SNIP (1, 1, newrel); 2764 *again = TRUE; 2765 } 2766 break; 2767 2768 case 0x3a: /* BEQ.W pcdsp:16 */ 2769 case 0x3b: /* BNE.W pcdsp:16 */ 2770 if (-128 + alignment_glue <= pcrel 2771 && pcrel <= 127 - alignment_glue) 2772 { 2773 insn[0] = 0x20 | (insn[0] & 1); 2774 SNIP (1, 1, newrel); 2775 *again = TRUE; 2776 } 2777 break; 2778 2779 case 0x20: /* BEQ.B pcdsp:8 */ 2780 case 0x21: /* BNE.B pcdsp:8 */ 2781 if (max_pcrel3 + alignment_glue <= pcrel 2782 && pcrel - alignment_glue <= 10 2783 && allow_pcrel3) 2784 { 2785 insn[0] = 0x10 | ((insn[0] & 1) << 3); 2786 SNIP (1, 1, newrel); 2787 move_reloc (irel, srel, -1); 2788 *again = TRUE; 2789 } 2790 break; 2791 2792 case 0x16: /* synthetic BNE dsp24 */ 2793 case 0x1e: /* synthetic BEQ dsp24 */ 2794 if (-32767 + alignment_glue <= pcrel 2795 && pcrel <= 32766 - alignment_glue 2796 && insn[1] == 0x04) 2797 { 2798 if (insn[0] == 0x16) 2799 insn[0] = 0x3b; 2800 else 2801 insn[0] = 0x3a; 2802 /* We snip out the bytes at the end else the reloc 2803 will get moved too, and too much. */ 2804 SNIP (3, 2, newrel); 2805 move_reloc (irel, srel, -1); 2806 *again = TRUE; 2807 } 2808 break; 2809 } 2810 2811 /* Special case - synthetic conditional branches, pcrel24. 2812 Note that EQ and NE have been handled above. */ 2813 if ((insn[0] & 0xf0) == 0x20 2814 && insn[1] == 0x06 2815 && insn[2] == 0x04 2816 && srel->r_offset != irel->r_offset + 1 2817 && -32767 + alignment_glue <= pcrel 2818 && pcrel <= 32766 - alignment_glue) 2819 { 2820 insn[1] = 0x05; 2821 insn[2] = 0x38; 2822 SNIP (5, 1, newrel); 2823 *again = TRUE; 2824 } 2825 2826 /* Special case - synthetic conditional branches, pcrel16 */ 2827 if ((insn[0] & 0xf0) == 0x20 2828 && insn[1] == 0x05 2829 && insn[2] == 0x38 2830 && srel->r_offset != irel->r_offset + 1 2831 && -127 + alignment_glue <= pcrel 2832 && pcrel <= 126 - alignment_glue) 2833 { 2834 int cond = (insn[0] & 0x0f) ^ 0x01; 2835 2836 insn[0] = 0x20 | cond; 2837 /* By moving the reloc first, we avoid having 2838 delete_bytes move it also. */ 2839 move_reloc (irel, srel, -2); 2840 SNIP (2, 3, newrel); 2841 *again = TRUE; 2842 } 2843 } 2844 2845 BFD_ASSERT (nrelocs == 0); 2846 2847 /* Special case - check MOV.bwl #IMM, dsp[reg] and see if we can 2848 use MOV.bwl #uimm:8, dsp:5[r7] format. This is tricky 2849 because it may have one or two relocations. */ 2850 if ((insn[0] & 0xfc) == 0xf8 2851 && (insn[1] & 0x80) == 0x00 2852 && (insn[0] & 0x03) != 0x03) 2853 { 2854 int dcode, icode, reg, ioff, dscale, ilen; 2855 bfd_vma disp_val = 0; 2856 long imm_val = 0; 2857 Elf_Internal_Rela * disp_rel = 0; 2858 Elf_Internal_Rela * imm_rel = 0; 2859 2860 /* Reset this. */ 2861 srel = irel; 2862 2863 dcode = insn[0] & 0x03; 2864 icode = (insn[1] >> 2) & 0x03; 2865 reg = (insn[1] >> 4) & 0x0f; 2866 2867 ioff = dcode == 1 ? 3 : dcode == 2 ? 4 : 2; 2868 2869 /* Figure out what the dispacement is. */ 2870 if (dcode == 1 || dcode == 2) 2871 { 2872 /* There's a displacement. See if there's a reloc for it. */ 2873 if (srel[1].r_offset == irel->r_offset + 2) 2874 { 2875 GET_RELOC; 2876 disp_val = symval; 2877 disp_rel = srel; 2878 } 2879 else 2880 { 2881 if (dcode == 1) 2882 disp_val = insn[2]; 2883 else 2884 { 2885#if RX_OPCODE_BIG_ENDIAN 2886 disp_val = insn[2] * 256 + insn[3]; 2887#else 2888 disp_val = insn[2] + insn[3] * 256; 2889#endif 2890 } 2891 switch (insn[1] & 3) 2892 { 2893 case 1: 2894 disp_val *= 2; 2895 scale = 2; 2896 break; 2897 case 2: 2898 disp_val *= 4; 2899 scale = 4; 2900 break; 2901 } 2902 } 2903 } 2904 2905 dscale = scale; 2906 2907 /* Figure out what the immediate is. */ 2908 if (srel[1].r_offset == irel->r_offset + ioff) 2909 { 2910 GET_RELOC; 2911 imm_val = (long) symval; 2912 imm_rel = srel; 2913 } 2914 else 2915 { 2916 unsigned char * ip = insn + ioff; 2917 2918 switch (icode) 2919 { 2920 case 1: 2921 /* For byte writes, we don't sign extend. Makes the math easier later. */ 2922 if (scale == 1) 2923 imm_val = ip[0]; 2924 else 2925 imm_val = (char) ip[0]; 2926 break; 2927 case 2: 2928#if RX_OPCODE_BIG_ENDIAN 2929 imm_val = ((char) ip[0] << 8) | ip[1]; 2930#else 2931 imm_val = ((char) ip[1] << 8) | ip[0]; 2932#endif 2933 break; 2934 case 3: 2935#if RX_OPCODE_BIG_ENDIAN 2936 imm_val = ((char) ip[0] << 16) | (ip[1] << 8) | ip[2]; 2937#else 2938 imm_val = ((char) ip[2] << 16) | (ip[1] << 8) | ip[0]; 2939#endif 2940 break; 2941 case 0: 2942#if RX_OPCODE_BIG_ENDIAN 2943 imm_val = ((unsigned) ip[0] << 24) | (ip[1] << 16) | (ip[2] << 8) | ip[3]; 2944#else 2945 imm_val = ((unsigned) ip[3] << 24) | (ip[2] << 16) | (ip[1] << 8) | ip[0]; 2946#endif 2947 break; 2948 } 2949 } 2950 2951 ilen = 2; 2952 2953 switch (dcode) 2954 { 2955 case 1: 2956 ilen += 1; 2957 break; 2958 case 2: 2959 ilen += 2; 2960 break; 2961 } 2962 2963 switch (icode) 2964 { 2965 case 1: 2966 ilen += 1; 2967 break; 2968 case 2: 2969 ilen += 2; 2970 break; 2971 case 3: 2972 ilen += 3; 2973 break; 2974 case 4: 2975 ilen += 4; 2976 break; 2977 } 2978 2979 /* The shortcut happens when the immediate is 0..255, 2980 register r0 to r7, and displacement (scaled) 0..31. */ 2981 2982 if (0 <= imm_val && imm_val <= 255 2983 && 0 <= reg && reg <= 7 2984 && disp_val / dscale <= 31) 2985 { 2986 insn[0] = 0x3c | (insn[1] & 0x03); 2987 insn[1] = (((disp_val / dscale) << 3) & 0x80) | (reg << 4) | ((disp_val/dscale) & 0x0f); 2988 insn[2] = imm_val; 2989 2990 if (disp_rel) 2991 { 2992 int newrel = R_RX_NONE; 2993 2994 switch (dscale) 2995 { 2996 case 1: 2997 newrel = R_RX_RH_ABS5p8B; 2998 break; 2999 case 2: 3000 newrel = R_RX_RH_ABS5p8W; 3001 break; 3002 case 4: 3003 newrel = R_RX_RH_ABS5p8L; 3004 break; 3005 } 3006 disp_rel->r_info = ELF32_R_INFO (ELF32_R_SYM (disp_rel->r_info), newrel); 3007 move_reloc (irel, disp_rel, -1); 3008 } 3009 if (imm_rel) 3010 { 3011 imm_rel->r_info = ELF32_R_INFO (ELF32_R_SYM (imm_rel->r_info), R_RX_DIR8U); 3012 move_reloc (disp_rel ? disp_rel : irel, 3013 imm_rel, 3014 irel->r_offset - imm_rel->r_offset + 2); 3015 } 3016 3017 SNIPNR (3, ilen - 3); 3018 *again = TRUE; 3019 3020 /* We can't relax this new opcode. */ 3021 irel->r_addend = 0; 3022 } 3023 } 3024 } 3025 3026 /* We can't reliably relax branches to DIR3U_PCREL unless we know 3027 whatever they're branching over won't shrink any more. If we're 3028 basically done here, do one more pass just for branches - but 3029 don't request a pass after that one! */ 3030 if (!*again && !allow_pcrel3) 3031 { 3032 bfd_boolean ignored; 3033 3034 elf32_rx_relax_section (abfd, sec, link_info, &ignored, TRUE); 3035 } 3036 3037 return TRUE; 3038 3039 error_return: 3040 free (free_contents); 3041 3042 if (shndx_buf != NULL) 3043 { 3044 shndx_hdr->contents = NULL; 3045 free (shndx_buf); 3046 } 3047 3048 free (free_intsyms); 3049 3050 return FALSE; 3051} 3052 3053static bfd_boolean 3054elf32_rx_relax_section_wrapper (bfd * abfd, 3055 asection * sec, 3056 struct bfd_link_info * link_info, 3057 bfd_boolean * again) 3058{ 3059 return elf32_rx_relax_section (abfd, sec, link_info, again, FALSE); 3060} 3061 3062/* Function to set the ELF flag bits. */ 3063 3064static bfd_boolean 3065rx_elf_set_private_flags (bfd * abfd, flagword flags) 3066{ 3067 elf_elfheader (abfd)->e_flags = flags; 3068 elf_flags_init (abfd) = TRUE; 3069 return TRUE; 3070} 3071 3072static bfd_boolean no_warn_mismatch = FALSE; 3073static bfd_boolean ignore_lma = TRUE; 3074 3075void bfd_elf32_rx_set_target_flags (bfd_boolean, bfd_boolean); 3076 3077void 3078bfd_elf32_rx_set_target_flags (bfd_boolean user_no_warn_mismatch, 3079 bfd_boolean user_ignore_lma) 3080{ 3081 no_warn_mismatch = user_no_warn_mismatch; 3082 ignore_lma = user_ignore_lma; 3083} 3084 3085/* Converts FLAGS into a descriptive string. 3086 Returns a static pointer. */ 3087 3088static const char * 3089describe_flags (flagword flags) 3090{ 3091 static char buf [128]; 3092 3093 buf[0] = 0; 3094 3095 if (flags & E_FLAG_RX_64BIT_DOUBLES) 3096 strcat (buf, "64-bit doubles"); 3097 else 3098 strcat (buf, "32-bit doubles"); 3099 3100 if (flags & E_FLAG_RX_DSP) 3101 strcat (buf, ", dsp"); 3102 else 3103 strcat (buf, ", no dsp"); 3104 3105 if (flags & E_FLAG_RX_PID) 3106 strcat (buf, ", pid"); 3107 else 3108 strcat (buf, ", no pid"); 3109 3110 if (flags & E_FLAG_RX_ABI) 3111 strcat (buf, ", RX ABI"); 3112 else 3113 strcat (buf, ", GCC ABI"); 3114 3115 if (flags & E_FLAG_RX_SINSNS_SET) 3116 strcat (buf, flags & E_FLAG_RX_SINSNS_YES ? ", uses String instructions" : ", bans String instructions"); 3117 3118 return buf; 3119} 3120 3121/* Merge backend specific data from an object file to the output 3122 object file when linking. */ 3123 3124static bfd_boolean 3125rx_elf_merge_private_bfd_data (bfd * ibfd, struct bfd_link_info *info) 3126{ 3127 bfd *obfd = info->output_bfd; 3128 flagword old_flags; 3129 flagword new_flags; 3130 bfd_boolean error = FALSE; 3131 3132 new_flags = elf_elfheader (ibfd)->e_flags; 3133 old_flags = elf_elfheader (obfd)->e_flags; 3134 3135 if (!elf_flags_init (obfd)) 3136 { 3137 /* First call, no flags set. */ 3138 elf_flags_init (obfd) = TRUE; 3139 elf_elfheader (obfd)->e_flags = new_flags; 3140 } 3141 else if (old_flags != new_flags) 3142 { 3143 flagword known_flags; 3144 3145 if (old_flags & E_FLAG_RX_SINSNS_SET) 3146 { 3147 if ((new_flags & E_FLAG_RX_SINSNS_SET) == 0) 3148 { 3149 new_flags &= ~ E_FLAG_RX_SINSNS_MASK; 3150 new_flags |= (old_flags & E_FLAG_RX_SINSNS_MASK); 3151 } 3152 } 3153 else if (new_flags & E_FLAG_RX_SINSNS_SET) 3154 { 3155 old_flags &= ~ E_FLAG_RX_SINSNS_MASK; 3156 old_flags |= (new_flags & E_FLAG_RX_SINSNS_MASK); 3157 } 3158 3159 known_flags = E_FLAG_RX_ABI | E_FLAG_RX_64BIT_DOUBLES 3160 | E_FLAG_RX_DSP | E_FLAG_RX_PID | E_FLAG_RX_SINSNS_MASK; 3161 3162 if ((old_flags ^ new_flags) & known_flags) 3163 { 3164 /* Only complain if flag bits we care about do not match. 3165 Other bits may be set, since older binaries did use some 3166 deprecated flags. */ 3167 if (no_warn_mismatch) 3168 { 3169 elf_elfheader (obfd)->e_flags = (new_flags | old_flags) & known_flags; 3170 } 3171 else 3172 { 3173 _bfd_error_handler (_("there is a conflict merging the" 3174 " ELF header flags from %pB"), 3175 ibfd); 3176 _bfd_error_handler (_(" the input file's flags: %s"), 3177 describe_flags (new_flags)); 3178 _bfd_error_handler (_(" the output file's flags: %s"), 3179 describe_flags (old_flags)); 3180 error = TRUE; 3181 } 3182 } 3183 else 3184 elf_elfheader (obfd)->e_flags = new_flags & known_flags; 3185 } 3186 3187 if (error) 3188 bfd_set_error (bfd_error_bad_value); 3189 3190 return !error; 3191} 3192 3193static bfd_boolean 3194rx_elf_print_private_bfd_data (bfd * abfd, void * ptr) 3195{ 3196 FILE * file = (FILE *) ptr; 3197 flagword flags; 3198 3199 BFD_ASSERT (abfd != NULL && ptr != NULL); 3200 3201 /* Print normal ELF private data. */ 3202 _bfd_elf_print_private_bfd_data (abfd, ptr); 3203 3204 flags = elf_elfheader (abfd)->e_flags; 3205 fprintf (file, _("private flags = 0x%lx:"), (long) flags); 3206 3207 fprintf (file, "%s", describe_flags (flags)); 3208 return TRUE; 3209} 3210 3211/* Return the MACH for an e_flags value. */ 3212 3213static int 3214elf32_rx_machine (bfd * abfd ATTRIBUTE_UNUSED) 3215{ 3216#if 0 /* FIXME: EF_RX_CPU_MASK collides with E_FLAG_RX_... 3217 Need to sort out how these flag bits are used. 3218 For now we assume that the flags are OK. */ 3219 if ((elf_elfheader (abfd)->e_flags & EF_RX_CPU_MASK) == EF_RX_CPU_RX) 3220#endif 3221 if ((elf_elfheader (abfd)->e_flags & E_FLAG_RX_V2)) 3222 return bfd_mach_rx_v2; 3223 else if ((elf_elfheader (abfd)->e_flags & E_FLAG_RX_V3)) 3224 return bfd_mach_rx_v3; 3225 else 3226 return bfd_mach_rx; 3227 3228 return 0; 3229} 3230 3231static bfd_boolean 3232rx_elf_object_p (bfd * abfd) 3233{ 3234 int i; 3235 unsigned int u; 3236 Elf_Internal_Phdr *phdr = elf_tdata (abfd)->phdr; 3237 Elf_Internal_Ehdr *ehdr = elf_elfheader (abfd); 3238 int nphdrs = ehdr->e_phnum; 3239 sec_ptr bsec; 3240 static int saw_be = FALSE; 3241 bfd_vma end_phdroff; 3242 3243 /* We never want to automatically choose the non-swapping big-endian 3244 target. The user can only get that explicitly, such as with -I 3245 and objcopy. */ 3246 if (abfd->xvec == &rx_elf32_be_ns_vec 3247 && abfd->target_defaulted) 3248 return FALSE; 3249 3250 /* BFD->target_defaulted is not set to TRUE when a target is chosen 3251 as a fallback, so we check for "scanning" to know when to stop 3252 using the non-swapping target. */ 3253 if (abfd->xvec == &rx_elf32_be_ns_vec 3254 && saw_be) 3255 return FALSE; 3256 if (abfd->xvec == &rx_elf32_be_vec) 3257 saw_be = TRUE; 3258 3259 bfd_default_set_arch_mach (abfd, bfd_arch_rx, 3260 elf32_rx_machine (abfd)); 3261 3262 /* For each PHDR in the object, we must find some section that 3263 corresponds (based on matching file offsets) and use its VMA 3264 information to reconstruct the p_vaddr field we clobbered when we 3265 wrote it out. */ 3266 /* If PT_LOAD headers include the ELF file header or program headers 3267 then the PT_LOAD header does not start with some section contents. 3268 Making adjustments based on the difference between sh_offset and 3269 p_offset is nonsense in such cases. Exclude them. Note that 3270 since standard linker scripts for RX do not use SIZEOF_HEADERS, 3271 the linker won't normally create PT_LOAD segments covering the 3272 headers so this is mainly for passing the ld testsuite. 3273 FIXME. Why are we looking at non-PT_LOAD headers here? */ 3274 end_phdroff = ehdr->e_ehsize; 3275 if (ehdr->e_phoff != 0) 3276 end_phdroff = ehdr->e_phoff + nphdrs * ehdr->e_phentsize; 3277 for (i=0; i<nphdrs; i++) 3278 { 3279 for (u=0; u<elf_tdata(abfd)->num_elf_sections; u++) 3280 { 3281 Elf_Internal_Shdr *sec = elf_tdata(abfd)->elf_sect_ptr[u]; 3282 3283 if (phdr[i].p_filesz 3284 && phdr[i].p_offset >= end_phdroff 3285 && phdr[i].p_offset <= (bfd_vma) sec->sh_offset 3286 && sec->sh_size > 0 3287 && sec->sh_type != SHT_NOBITS 3288 && (bfd_vma)sec->sh_offset <= phdr[i].p_offset + (phdr[i].p_filesz - 1)) 3289 { 3290 /* Found one! The difference between the two addresses, 3291 plus the difference between the two file offsets, is 3292 enough information to reconstruct the lma. */ 3293 3294 /* Example where they aren't: 3295 PHDR[1] = lma fffc0100 offset 00002010 size 00000100 3296 SEC[6] = vma 00000050 offset 00002050 size 00000040 3297 3298 The correct LMA for the section is fffc0140 + (2050-2010). 3299 */ 3300 3301 phdr[i].p_vaddr = sec->sh_addr + (sec->sh_offset - phdr[i].p_offset); 3302 break; 3303 } 3304 } 3305 3306 /* We must update the bfd sections as well, so we don't stop 3307 with one match. */ 3308 bsec = abfd->sections; 3309 while (bsec) 3310 { 3311 if (phdr[i].p_filesz 3312 && phdr[i].p_vaddr <= bsec->vma 3313 && bsec->vma <= phdr[i].p_vaddr + (phdr[i].p_filesz - 1)) 3314 { 3315 bsec->lma = phdr[i].p_paddr + (bsec->vma - phdr[i].p_vaddr); 3316 } 3317 bsec = bsec->next; 3318 } 3319 } 3320 3321 return TRUE; 3322} 3323 3324static bfd_boolean 3325rx_linux_object_p (bfd * abfd) 3326{ 3327 bfd_default_set_arch_mach (abfd, bfd_arch_rx, elf32_rx_machine (abfd)); 3328 return TRUE; 3329} 3330 3331 3332#ifdef DEBUG 3333void 3334rx_dump_symtab (bfd * abfd, void * internal_syms, void * external_syms) 3335{ 3336 size_t locsymcount; 3337 Elf_Internal_Sym * isymbuf; 3338 Elf_Internal_Sym * isymend; 3339 Elf_Internal_Sym * isym; 3340 Elf_Internal_Shdr * symtab_hdr; 3341 char * st_info_str; 3342 char * st_info_stb_str; 3343 char * st_other_str; 3344 char * st_shndx_str; 3345 3346 symtab_hdr = &elf_tdata (abfd)->symtab_hdr; 3347 locsymcount = symtab_hdr->sh_size / get_elf_backend_data (abfd)->s->sizeof_sym; 3348 if (!internal_syms) 3349 isymbuf = bfd_elf_get_elf_syms (abfd, symtab_hdr, 3350 symtab_hdr->sh_info, 0, 3351 internal_syms, external_syms, NULL); 3352 else 3353 isymbuf = internal_syms; 3354 isymend = isymbuf + locsymcount; 3355 3356 for (isym = isymbuf ; isym < isymend ; isym++) 3357 { 3358 switch (ELF_ST_TYPE (isym->st_info)) 3359 { 3360 case STT_FUNC: st_info_str = "STT_FUNC"; break; 3361 case STT_SECTION: st_info_str = "STT_SECTION"; break; 3362 case STT_FILE: st_info_str = "STT_FILE"; break; 3363 case STT_OBJECT: st_info_str = "STT_OBJECT"; break; 3364 case STT_TLS: st_info_str = "STT_TLS"; break; 3365 default: st_info_str = ""; 3366 } 3367 switch (ELF_ST_BIND (isym->st_info)) 3368 { 3369 case STB_LOCAL: st_info_stb_str = "STB_LOCAL"; break; 3370 case STB_GLOBAL: st_info_stb_str = "STB_GLOBAL"; break; 3371 default: st_info_stb_str = ""; 3372 } 3373 switch (ELF_ST_VISIBILITY (isym->st_other)) 3374 { 3375 case STV_DEFAULT: st_other_str = "STV_DEFAULT"; break; 3376 case STV_INTERNAL: st_other_str = "STV_INTERNAL"; break; 3377 case STV_PROTECTED: st_other_str = "STV_PROTECTED"; break; 3378 default: st_other_str = ""; 3379 } 3380 switch (isym->st_shndx) 3381 { 3382 case SHN_ABS: st_shndx_str = "SHN_ABS"; break; 3383 case SHN_COMMON: st_shndx_str = "SHN_COMMON"; break; 3384 case SHN_UNDEF: st_shndx_str = "SHN_UNDEF"; break; 3385 default: st_shndx_str = ""; 3386 } 3387 3388 printf ("isym = %p st_value = %lx st_size = %lx st_name = (%lu) %s " 3389 "st_info = (%d) %s %s st_other = (%d) %s st_shndx = (%d) %s\n", 3390 isym, 3391 (unsigned long) isym->st_value, 3392 (unsigned long) isym->st_size, 3393 isym->st_name, 3394 bfd_elf_string_from_elf_section (abfd, symtab_hdr->sh_link, 3395 isym->st_name), 3396 isym->st_info, st_info_str, st_info_stb_str, 3397 isym->st_other, st_other_str, 3398 isym->st_shndx, st_shndx_str); 3399 } 3400} 3401 3402char * 3403rx_get_reloc (long reloc) 3404{ 3405 if (0 <= reloc && reloc < R_RX_max) 3406 return rx_elf_howto_table[reloc].name; 3407 return ""; 3408} 3409#endif /* DEBUG */ 3410 3411 3412/* We must take care to keep the on-disk copy of any code sections 3413 that are fully linked swapped if the target is big endian, to match 3414 the Renesas tools. */ 3415 3416/* The rule is: big endian object that are final-link executables, 3417 have code sections stored with 32-bit words swapped relative to 3418 what you'd get by default. */ 3419 3420static bfd_boolean 3421rx_get_section_contents (bfd * abfd, 3422 sec_ptr section, 3423 void * location, 3424 file_ptr offset, 3425 bfd_size_type count) 3426{ 3427 int exec = (abfd->flags & EXEC_P) ? 1 : 0; 3428 int s_code = (section->flags & SEC_CODE) ? 1 : 0; 3429 bfd_boolean rv; 3430 3431#ifdef DJDEBUG 3432 fprintf (stderr, "dj: get %ld %ld from %s %s e%d sc%d %08lx:%08lx\n", 3433 (long) offset, (long) count, section->name, 3434 bfd_big_endian(abfd) ? "be" : "le", 3435 exec, s_code, (long unsigned) section->filepos, 3436 (long unsigned) offset); 3437#endif 3438 3439 if (exec && s_code && bfd_big_endian (abfd)) 3440 { 3441 char * cloc = (char *) location; 3442 bfd_size_type cnt, end_cnt; 3443 3444 rv = TRUE; 3445 3446 /* Fetch and swap unaligned bytes at the beginning. */ 3447 if (offset % 4) 3448 { 3449 char buf[4]; 3450 3451 rv = _bfd_generic_get_section_contents (abfd, section, buf, 3452 (offset & -4), 4); 3453 if (!rv) 3454 return FALSE; 3455 3456 bfd_putb32 (bfd_getl32 (buf), buf); 3457 3458 cnt = 4 - (offset % 4); 3459 if (cnt > count) 3460 cnt = count; 3461 3462 memcpy (location, buf + (offset % 4), cnt); 3463 3464 count -= cnt; 3465 offset += cnt; 3466 cloc += count; 3467 } 3468 3469 end_cnt = count % 4; 3470 3471 /* Fetch and swap the middle bytes. */ 3472 if (count >= 4) 3473 { 3474 rv = _bfd_generic_get_section_contents (abfd, section, cloc, offset, 3475 count - end_cnt); 3476 if (!rv) 3477 return FALSE; 3478 3479 for (cnt = count; cnt >= 4; cnt -= 4, cloc += 4) 3480 bfd_putb32 (bfd_getl32 (cloc), cloc); 3481 } 3482 3483 /* Fetch and swap the end bytes. */ 3484 if (end_cnt > 0) 3485 { 3486 char buf[4]; 3487 3488 /* Fetch the end bytes. */ 3489 rv = _bfd_generic_get_section_contents (abfd, section, buf, 3490 offset + count - end_cnt, 4); 3491 if (!rv) 3492 return FALSE; 3493 3494 bfd_putb32 (bfd_getl32 (buf), buf); 3495 memcpy (cloc, buf, end_cnt); 3496 } 3497 } 3498 else 3499 rv = _bfd_generic_get_section_contents (abfd, section, location, offset, count); 3500 3501 return rv; 3502} 3503 3504#ifdef DJDEBUG 3505static bfd_boolean 3506rx2_set_section_contents (bfd * abfd, 3507 sec_ptr section, 3508 const void * location, 3509 file_ptr offset, 3510 bfd_size_type count) 3511{ 3512 bfd_size_type i; 3513 3514 fprintf (stderr, " set sec %s %08x loc %p offset %#x count %#x\n", 3515 section->name, (unsigned) section->vma, location, (int) offset, (int) count); 3516 for (i = 0; i < count; i++) 3517 { 3518 if (i % 16 == 0 && i > 0) 3519 fprintf (stderr, "\n"); 3520 3521 if (i % 16 && i % 4 == 0) 3522 fprintf (stderr, " "); 3523 3524 if (i % 16 == 0) 3525 fprintf (stderr, " %08x:", (int) (section->vma + offset + i)); 3526 3527 fprintf (stderr, " %02x", ((unsigned char *) location)[i]); 3528 } 3529 fprintf (stderr, "\n"); 3530 3531 return _bfd_elf_set_section_contents (abfd, section, location, offset, count); 3532} 3533#define _bfd_elf_set_section_contents rx2_set_section_contents 3534#endif 3535 3536static bfd_boolean 3537rx_set_section_contents (bfd * abfd, 3538 sec_ptr section, 3539 const void * location, 3540 file_ptr offset, 3541 bfd_size_type count) 3542{ 3543 bfd_boolean exec = (abfd->flags & EXEC_P) ? TRUE : FALSE; 3544 bfd_boolean s_code = (section->flags & SEC_CODE) ? TRUE : FALSE; 3545 bfd_boolean rv; 3546 char * swapped_data = NULL; 3547 bfd_size_type i; 3548 bfd_vma caddr = section->vma + offset; 3549 file_ptr faddr = 0; 3550 bfd_size_type scount; 3551 3552#ifdef DJDEBUG 3553 bfd_size_type i; 3554 3555 fprintf (stderr, "\ndj: set %ld %ld to %s %s e%d sc%d\n", 3556 (long) offset, (long) count, section->name, 3557 bfd_big_endian (abfd) ? "be" : "le", 3558 exec, s_code); 3559 3560 for (i = 0; i < count; i++) 3561 { 3562 int a = section->vma + offset + i; 3563 3564 if (a % 16 == 0 && a > 0) 3565 fprintf (stderr, "\n"); 3566 3567 if (a % 16 && a % 4 == 0) 3568 fprintf (stderr, " "); 3569 3570 if (a % 16 == 0 || i == 0) 3571 fprintf (stderr, " %08x:", (int) (section->vma + offset + i)); 3572 3573 fprintf (stderr, " %02x", ((unsigned char *) location)[i]); 3574 } 3575 3576 fprintf (stderr, "\n"); 3577#endif 3578 3579 if (! exec || ! s_code || ! bfd_big_endian (abfd)) 3580 return _bfd_elf_set_section_contents (abfd, section, location, offset, count); 3581 3582 while (count > 0 && caddr > 0 && caddr % 4) 3583 { 3584 switch (caddr % 4) 3585 { 3586 case 0: faddr = offset + 3; break; 3587 case 1: faddr = offset + 1; break; 3588 case 2: faddr = offset - 1; break; 3589 case 3: faddr = offset - 3; break; 3590 } 3591 3592 rv = _bfd_elf_set_section_contents (abfd, section, location, faddr, 1); 3593 if (! rv) 3594 return rv; 3595 3596 location = (bfd_byte *) location + 1; 3597 offset ++; 3598 count --; 3599 caddr ++; 3600 } 3601 3602 scount = (int)(count / 4) * 4; 3603 if (scount > 0) 3604 { 3605 char * cloc = (char *) location; 3606 3607 swapped_data = (char *) bfd_alloc (abfd, count); 3608 if (swapped_data == NULL) 3609 return FALSE; 3610 3611 for (i = 0; i < count; i += 4) 3612 { 3613 bfd_vma v = bfd_getl32 (cloc + i); 3614 bfd_putb32 (v, swapped_data + i); 3615 } 3616 3617 rv = _bfd_elf_set_section_contents (abfd, section, swapped_data, offset, scount); 3618 3619 if (!rv) 3620 return rv; 3621 } 3622 3623 count -= scount; 3624 location = (bfd_byte *) location + scount; 3625 offset += scount; 3626 3627 if (count > 0) 3628 { 3629 caddr = section->vma + offset; 3630 while (count > 0) 3631 { 3632 switch (caddr % 4) 3633 { 3634 case 0: faddr = offset + 3; break; 3635 case 1: faddr = offset + 1; break; 3636 case 2: faddr = offset - 1; break; 3637 case 3: faddr = offset - 3; break; 3638 } 3639 rv = _bfd_elf_set_section_contents (abfd, section, location, faddr, 1); 3640 if (! rv) 3641 return rv; 3642 3643 location = (bfd_byte *) location + 1; 3644 offset ++; 3645 count --; 3646 caddr ++; 3647 } 3648 } 3649 3650 return TRUE; 3651} 3652 3653static bfd_boolean 3654rx_final_link (bfd * abfd, struct bfd_link_info * info) 3655{ 3656 asection * o; 3657 3658 for (o = abfd->sections; o != NULL; o = o->next) 3659 { 3660#ifdef DJDEBUG 3661 fprintf (stderr, "sec %s fl %x vma %lx lma %lx size %lx raw %lx\n", 3662 o->name, o->flags, o->vma, o->lma, o->size, o->rawsize); 3663#endif 3664 if (o->flags & SEC_CODE 3665 && bfd_big_endian (abfd) 3666 && o->size % 4) 3667 { 3668#ifdef DJDEBUG 3669 fprintf (stderr, "adjusting...\n"); 3670#endif 3671 o->size += 4 - (o->size % 4); 3672 } 3673 } 3674 3675 return bfd_elf_final_link (abfd, info); 3676} 3677 3678static bfd_boolean 3679elf32_rx_modify_headers (bfd *abfd, struct bfd_link_info *info) 3680{ 3681 const struct elf_backend_data * bed; 3682 struct elf_obj_tdata * tdata; 3683 Elf_Internal_Phdr * phdr; 3684 unsigned int count; 3685 unsigned int i; 3686 3687 bed = get_elf_backend_data (abfd); 3688 tdata = elf_tdata (abfd); 3689 phdr = tdata->phdr; 3690 count = elf_program_header_size (abfd) / bed->s->sizeof_phdr; 3691 3692 if (ignore_lma) 3693 for (i = count; i-- != 0;) 3694 if (phdr[i].p_type == PT_LOAD) 3695 { 3696 /* The Renesas tools expect p_paddr to be zero. However, 3697 there is no other way to store the writable data in ROM for 3698 startup initialization. So, we let the linker *think* 3699 we're using paddr and vaddr the "usual" way, but at the 3700 last minute we move the paddr into the vaddr (which is what 3701 the simulator uses) and zero out paddr. Note that this 3702 does not affect the section headers, just the program 3703 headers. We hope. */ 3704 phdr[i].p_vaddr = phdr[i].p_paddr; 3705#if 0 /* If we zero out p_paddr, then the LMA in the section table 3706 becomes wrong. */ 3707 phdr[i].p_paddr = 0; 3708#endif 3709 } 3710 3711 return _bfd_elf_modify_headers (abfd, info); 3712} 3713 3714/* The default literal sections should always be marked as "code" (i.e., 3715 SHF_EXECINSTR). This is particularly important for big-endian mode 3716 when we do not want their contents byte reversed. */ 3717static const struct bfd_elf_special_section elf32_rx_special_sections[] = 3718{ 3719 { STRING_COMMA_LEN (".init_array"), 0, SHT_INIT_ARRAY, SHF_ALLOC + SHF_EXECINSTR }, 3720 { STRING_COMMA_LEN (".fini_array"), 0, SHT_FINI_ARRAY, SHF_ALLOC + SHF_EXECINSTR }, 3721 { STRING_COMMA_LEN (".preinit_array"), 0, SHT_PREINIT_ARRAY, SHF_ALLOC + SHF_EXECINSTR }, 3722 { NULL, 0, 0, 0, 0 } 3723}; 3724 3725typedef struct { 3726 bfd *abfd; 3727 struct bfd_link_info *info; 3728 bfd_vma table_start; 3729 int table_size; 3730 bfd_vma *table_handlers; 3731 bfd_vma table_default_handler; 3732 struct bfd_link_hash_entry **table_entries; 3733 struct bfd_link_hash_entry *table_default_entry; 3734 FILE *mapfile; 3735} RX_Table_Info; 3736 3737static bfd_boolean 3738rx_table_find (struct bfd_hash_entry *vent, void *vinfo) 3739{ 3740 RX_Table_Info *info = (RX_Table_Info *)vinfo; 3741 struct bfd_link_hash_entry *ent = (struct bfd_link_hash_entry *)vent; 3742 const char *name; /* of the symbol we've found */ 3743 asection *sec; 3744 struct bfd *abfd; 3745 int idx; 3746 const char *tname; /* name of the table */ 3747 bfd_vma start_addr, end_addr; 3748 char *buf; 3749 struct bfd_link_hash_entry * h; 3750 3751 /* We're looking for globally defined symbols of the form 3752 $tablestart$<NAME>. */ 3753 if (ent->type != bfd_link_hash_defined 3754 && ent->type != bfd_link_hash_defweak) 3755 return TRUE; 3756 3757 name = ent->root.string; 3758 sec = ent->u.def.section; 3759 abfd = sec->owner; 3760 3761 if (strncmp (name, "$tablestart$", 12)) 3762 return TRUE; 3763 3764 sec->flags |= SEC_KEEP; 3765 3766 tname = name + 12; 3767 3768 start_addr = ent->u.def.value; 3769 3770 /* At this point, we can't build the table but we can (and must) 3771 find all the related symbols and mark their sections as SEC_KEEP 3772 so we don't garbage collect them. */ 3773 3774 buf = (char *) bfd_malloc (12 + 10 + strlen (tname)); 3775 if (buf == NULL) 3776 return FALSE; 3777 3778 sprintf (buf, "$tableend$%s", tname); 3779 h = bfd_link_hash_lookup (info->info->hash, buf, FALSE, FALSE, TRUE); 3780 if (!h || (h->type != bfd_link_hash_defined 3781 && h->type != bfd_link_hash_defweak)) 3782 { 3783 /* xgettext:c-format */ 3784 _bfd_error_handler (_("%pB:%pA: table %s missing corresponding %s"), 3785 abfd, sec, name, buf); 3786 return TRUE; 3787 } 3788 3789 if (h->u.def.section != ent->u.def.section) 3790 { 3791 /* xgettext:c-format */ 3792 _bfd_error_handler (_("%pB:%pA: %s and %s must be in the same input section"), 3793 h->u.def.section->owner, h->u.def.section, 3794 name, buf); 3795 return TRUE; 3796 } 3797 3798 end_addr = h->u.def.value; 3799 3800 sprintf (buf, "$tableentry$default$%s", tname); 3801 h = bfd_link_hash_lookup (info->info->hash, buf, FALSE, FALSE, TRUE); 3802 if (h && (h->type == bfd_link_hash_defined 3803 || h->type == bfd_link_hash_defweak)) 3804 { 3805 h->u.def.section->flags |= SEC_KEEP; 3806 } 3807 3808 for (idx = 0; idx < (int) (end_addr - start_addr) / 4; idx ++) 3809 { 3810 sprintf (buf, "$tableentry$%d$%s", idx, tname); 3811 h = bfd_link_hash_lookup (info->info->hash, buf, FALSE, FALSE, TRUE); 3812 if (h && (h->type == bfd_link_hash_defined 3813 || h->type == bfd_link_hash_defweak)) 3814 { 3815 h->u.def.section->flags |= SEC_KEEP; 3816 } 3817 } 3818 3819 /* Return TRUE to keep scanning, FALSE to end the traversal. */ 3820 return TRUE; 3821} 3822 3823/* We need to check for table entry symbols and build the tables, and 3824 we need to do it before the linker does garbage collection. This function is 3825 called once per input object file. */ 3826static bfd_boolean 3827rx_check_directives 3828 (bfd * abfd ATTRIBUTE_UNUSED, 3829 struct bfd_link_info * info ATTRIBUTE_UNUSED) 3830{ 3831 RX_Table_Info stuff; 3832 3833 stuff.abfd = abfd; 3834 stuff.info = info; 3835 bfd_hash_traverse (&(info->hash->table), rx_table_find, &stuff); 3836 3837 return TRUE; 3838} 3839 3840 3841static bfd_boolean 3842rx_table_map_2 (struct bfd_hash_entry *vent, void *vinfo) 3843{ 3844 RX_Table_Info *info = (RX_Table_Info *)vinfo; 3845 struct bfd_link_hash_entry *ent = (struct bfd_link_hash_entry *)vent; 3846 int idx; 3847 const char *name; 3848 bfd_vma addr; 3849 3850 /* See if the symbol ENT has an address listed in the table, and 3851 isn't a debug/special symbol. If so, put it in the table. */ 3852 3853 if (ent->type != bfd_link_hash_defined 3854 && ent->type != bfd_link_hash_defweak) 3855 return TRUE; 3856 3857 name = ent->root.string; 3858 3859 if (name[0] == '$' || name[0] == '.' || name[0] < ' ') 3860 return TRUE; 3861 3862 addr = (ent->u.def.value 3863 + ent->u.def.section->output_section->vma 3864 + ent->u.def.section->output_offset); 3865 3866 for (idx = 0; idx < info->table_size; idx ++) 3867 if (addr == info->table_handlers[idx]) 3868 info->table_entries[idx] = ent; 3869 3870 if (addr == info->table_default_handler) 3871 info->table_default_entry = ent; 3872 3873 return TRUE; 3874} 3875 3876static bfd_boolean 3877rx_table_map (struct bfd_hash_entry *vent, void *vinfo) 3878{ 3879 RX_Table_Info *info = (RX_Table_Info *)vinfo; 3880 struct bfd_link_hash_entry *ent = (struct bfd_link_hash_entry *)vent; 3881 const char *name; /* of the symbol we've found */ 3882 int idx; 3883 const char *tname; /* name of the table */ 3884 bfd_vma start_addr, end_addr; 3885 char *buf; 3886 struct bfd_link_hash_entry * h; 3887 int need_elipses; 3888 3889 /* We're looking for globally defined symbols of the form 3890 $tablestart$<NAME>. */ 3891 if (ent->type != bfd_link_hash_defined 3892 && ent->type != bfd_link_hash_defweak) 3893 return TRUE; 3894 3895 name = ent->root.string; 3896 3897 if (strncmp (name, "$tablestart$", 12)) 3898 return TRUE; 3899 3900 tname = name + 12; 3901 start_addr = (ent->u.def.value 3902 + ent->u.def.section->output_section->vma 3903 + ent->u.def.section->output_offset); 3904 3905 buf = (char *) bfd_malloc (12 + 10 + strlen (tname)); 3906 if (buf == NULL) 3907 return FALSE; 3908 3909 sprintf (buf, "$tableend$%s", tname); 3910 end_addr = get_symbol_value_maybe (buf, info->info); 3911 3912 sprintf (buf, "$tableentry$default$%s", tname); 3913 h = bfd_link_hash_lookup (info->info->hash, buf, FALSE, FALSE, TRUE); 3914 if (h) 3915 { 3916 info->table_default_handler = (h->u.def.value 3917 + h->u.def.section->output_section->vma 3918 + h->u.def.section->output_offset); 3919 } 3920 else 3921 /* Zero is a valid handler address! */ 3922 info->table_default_handler = (bfd_vma) (-1); 3923 info->table_default_entry = NULL; 3924 3925 info->table_start = start_addr; 3926 info->table_size = (int) (end_addr - start_addr) / 4; 3927 info->table_handlers = (bfd_vma *) 3928 bfd_malloc (info->table_size * sizeof (bfd_vma)); 3929 if (info->table_handlers == NULL) 3930 { 3931 free (buf); 3932 return FALSE; 3933 } 3934 info->table_entries = (struct bfd_link_hash_entry **) 3935 bfd_malloc (info->table_size * sizeof (struct bfd_link_hash_entry)); 3936 if (info->table_entries == NULL) 3937 { 3938 free (info->table_handlers); 3939 free (buf); 3940 return FALSE; 3941 } 3942 3943 for (idx = 0; idx < (int) (end_addr - start_addr) / 4; idx ++) 3944 { 3945 sprintf (buf, "$tableentry$%d$%s", idx, tname); 3946 h = bfd_link_hash_lookup (info->info->hash, buf, FALSE, FALSE, TRUE); 3947 if (h && (h->type == bfd_link_hash_defined 3948 || h->type == bfd_link_hash_defweak)) 3949 { 3950 info->table_handlers[idx] = (h->u.def.value 3951 + h->u.def.section->output_section->vma 3952 + h->u.def.section->output_offset); 3953 } 3954 else 3955 info->table_handlers[idx] = info->table_default_handler; 3956 info->table_entries[idx] = NULL; 3957 } 3958 3959 free (buf); 3960 3961 bfd_hash_traverse (&(info->info->hash->table), rx_table_map_2, info); 3962 3963 fprintf (info->mapfile, "\nRX Vector Table: %s has %d entries at 0x%08" BFD_VMA_FMT "x\n\n", 3964 tname, info->table_size, start_addr); 3965 3966 if (info->table_default_entry) 3967 fprintf (info->mapfile, " default handler is: %s at 0x%08" BFD_VMA_FMT "x\n", 3968 info->table_default_entry->root.string, 3969 info->table_default_handler); 3970 else if (info->table_default_handler != (bfd_vma)(-1)) 3971 fprintf (info->mapfile, " default handler is at 0x%08" BFD_VMA_FMT "x\n", 3972 info->table_default_handler); 3973 else 3974 fprintf (info->mapfile, " no default handler\n"); 3975 3976 need_elipses = 1; 3977 for (idx = 0; idx < info->table_size; idx ++) 3978 { 3979 if (info->table_handlers[idx] == info->table_default_handler) 3980 { 3981 if (need_elipses) 3982 fprintf (info->mapfile, " . . .\n"); 3983 need_elipses = 0; 3984 continue; 3985 } 3986 need_elipses = 1; 3987 3988 fprintf (info->mapfile, " 0x%08" BFD_VMA_FMT "x [%3d] ", start_addr + 4 * idx, idx); 3989 3990 if (info->table_handlers[idx] == (bfd_vma) (-1)) 3991 fprintf (info->mapfile, "(no handler found)\n"); 3992 3993 else if (info->table_handlers[idx] == info->table_default_handler) 3994 { 3995 if (info->table_default_entry) 3996 fprintf (info->mapfile, "(default)\n"); 3997 else 3998 fprintf (info->mapfile, "(default)\n"); 3999 } 4000 4001 else if (info->table_entries[idx]) 4002 { 4003 fprintf (info->mapfile, "0x%08" BFD_VMA_FMT "x %s\n", info->table_handlers[idx], info->table_entries[idx]->root.string); 4004 } 4005 4006 else 4007 { 4008 fprintf (info->mapfile, "0x%08" BFD_VMA_FMT "x ???\n", info->table_handlers[idx]); 4009 } 4010 } 4011 if (need_elipses) 4012 fprintf (info->mapfile, " . . .\n"); 4013 4014 return TRUE; 4015} 4016 4017void 4018rx_additional_link_map_text (bfd *obfd, struct bfd_link_info *info, FILE *mapfile) 4019{ 4020 /* We scan the symbol table looking for $tableentry$'s, and for 4021 each, try to deduce which handlers go with which entries. */ 4022 4023 RX_Table_Info stuff; 4024 4025 stuff.abfd = obfd; 4026 stuff.info = info; 4027 stuff.mapfile = mapfile; 4028 bfd_hash_traverse (&(info->hash->table), rx_table_map, &stuff); 4029} 4030 4031 4032#define ELF_ARCH bfd_arch_rx 4033#define ELF_MACHINE_CODE EM_RX 4034#define ELF_MAXPAGESIZE 0x1000 4035 4036#define TARGET_BIG_SYM rx_elf32_be_vec 4037#define TARGET_BIG_NAME "elf32-rx-be" 4038 4039#define TARGET_LITTLE_SYM rx_elf32_le_vec 4040#define TARGET_LITTLE_NAME "elf32-rx-le" 4041 4042#define elf_info_to_howto_rel NULL 4043#define elf_info_to_howto rx_info_to_howto_rela 4044#define elf_backend_object_p rx_elf_object_p 4045#define elf_backend_relocate_section rx_elf_relocate_section 4046#define elf_symbol_leading_char ('_') 4047#define elf_backend_can_gc_sections 1 4048#define elf_backend_modify_headers elf32_rx_modify_headers 4049 4050#define bfd_elf32_bfd_reloc_type_lookup rx_reloc_type_lookup 4051#define bfd_elf32_bfd_reloc_name_lookup rx_reloc_name_lookup 4052#define bfd_elf32_bfd_set_private_flags rx_elf_set_private_flags 4053#define bfd_elf32_bfd_merge_private_bfd_data rx_elf_merge_private_bfd_data 4054#define bfd_elf32_bfd_print_private_bfd_data rx_elf_print_private_bfd_data 4055#define bfd_elf32_get_section_contents rx_get_section_contents 4056#define bfd_elf32_set_section_contents rx_set_section_contents 4057#define bfd_elf32_bfd_final_link rx_final_link 4058#define bfd_elf32_bfd_relax_section elf32_rx_relax_section_wrapper 4059#define elf_backend_special_sections elf32_rx_special_sections 4060#define elf_backend_check_directives rx_check_directives 4061 4062#include "elf32-target.h" 4063 4064/* We define a second big-endian target that doesn't have the custom 4065 section get/set hooks, for times when we want to preserve the 4066 pre-swapped .text sections (like objcopy). */ 4067 4068#undef TARGET_BIG_SYM 4069#define TARGET_BIG_SYM rx_elf32_be_ns_vec 4070#undef TARGET_BIG_NAME 4071#define TARGET_BIG_NAME "elf32-rx-be-ns" 4072#undef TARGET_LITTLE_SYM 4073 4074#undef bfd_elf32_get_section_contents 4075#undef bfd_elf32_set_section_contents 4076 4077#undef elf32_bed 4078#define elf32_bed elf32_rx_be_ns_bed 4079 4080#include "elf32-target.h" 4081 4082#undef TARGET_LITTLE_SYM 4083#define TARGET_LITTLE_SYM rx_elf32_linux_le_vec 4084#undef TARGET_LITTLE_NAME 4085#define TARGET_LITTLE_NAME "elf32-rx-linux" 4086#undef TARGET_BIG_SYM 4087#undef TARGET_BIG_NAME 4088 4089#undef elf_backend_object_p 4090#define elf_backend_object_p rx_linux_object_p 4091#undef elf_symbol_leading_char 4092#undef elf32_bed 4093#define elf32_bed elf32_rx_le_linux_bed 4094 4095#include "elf32-target.h" 4096