1# CPU, FPU and architecture specifications for ARM. 2# 3# Copyright (C) 2011-2022 Free Software Foundation, Inc. 4# 5# This file is part of GCC. 6# 7# GCC is free software; you can redistribute it and/or modify it under 8# the terms of the GNU General Public License as published by the Free 9# Software Foundation; either version 3, or (at your option) any later 10# version. 11# 12# GCC is distributed in the hope that it will be useful, but WITHOUT ANY 13# WARRANTY; without even the implied warranty of MERCHANTABILITY or 14# FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License 15# for more details. 16# 17# You should have received a copy of the GNU General Public License 18# along with GCC; see the file COPYING3. If not see 19# <http://www.gnu.org/licenses/>. 20 21# This file describes all the various CPUs, FPUs and architectures supported 22# by the compiler. It is pre-processed by parsecpu.awk for a number of 23# purposes. 24# 25# The general form is a sequence of begin..end blocks with the following 26# syntax: 27# begin <object-type> <name> 28# attribute-statement* 29# end <object-type> <name> 30# 31# where object type is one of "cpu" "arch" "fpu". Each object type has 32# a specific set of permitted attributes, some of which are optional; further 33# details can be found below. 34# 35# Some objects cross-reference other objects by name. Objects are permitted 36# in any order and it is not necessary to place a cross-referenced object 37# earlier in the file. 38# 39# The object names for cpu, arch and fpu objects are used for the public option 40# names in the final compiler. The order within each group is preserved and 41# forms the order for the list within the compiler. 42 43# Most objects in this file support forward references. The major 44# exception is feature groups, which may only refer to previously 45# defined features or feature groups. This is done to avoid the risk 46# of feature groups recursively referencing each other and causing 47# the parser to hang. 48 49# Features - general convention: all lower case. 50 51# Architecture rel 4 52define feature armv4 53 54# Thumb aware. 55define feature thumb 56 57# Architecture rel 5t. 58define feature armv5t 59 60# Architecture rel 5te. 61define feature armv5te 62 63# XScale. 64define feature xscale 65 66# Architecture rel 6. 67define feature armv6 68 69# Architecture rel 6k. 70define feature armv6k 71 72# Thumb-2. 73define feature thumb2 74 75# Instructions not present in 'M' profile. 76define feature notm 77 78# Architecture uses be8 mode in big-endian. 79define feature be8 80 81# Thumb division instructions. 82define feature tdiv 83 84# Architecture rel 7e-m. 85define feature armv7em 86 87# Architecture rel 7. 88define feature armv7 89 90# MP extension to ArmV7-A 91define feature mp 92 93# SEC extension to ArmV7-A 94define feature sec 95 96# ARM division instructions. 97define feature adiv 98 99# Architecture rel 8. 100define feature armv8 101 102# ARMv8 CRC32 instructions. 103define feature crc32 104 105# XScale v2 (Wireless MMX). 106define feature iwmmxt 107 108# XScale Wireless MMX2. 109define feature iwmmxt2 110 111# Architecture rel 8.1. 112define feature armv8_1 113 114# Architecture rel 8.2. 115define feature armv8_2 116 117# Architecture rel 8.3. 118define feature armv8_3 119 120# Architecture rel 8.4. 121define feature armv8_4 122 123# Architecture rel 8.5. 124define feature armv8_5 125 126# Architecture rel 8.6. 127define feature armv8_6 128 129# M-Profile security extensions. 130define feature cmse 131 132# Architecture rel 8.1-M. 133define feature armv8_1m_main 134 135# Architecture rel 9.0. 136define feature armv9 137 138# Floating point and Neon extensions. 139# VFPv1 is not supported in GCC. 140 141# Vector floating point v2. 142define feature vfpv2 143 144# Vector floating point v3. 145define feature vfpv3 146 147# Vector floating point v4. 148define feature vfpv4 149 150# Floating point v5. 151define feature fpv5 152 153# ARMv7-A LPAE. 154define feature lpae 155 156# Advanced SIMD instructions. 157define feature neon 158 159# Conversions to/from fp16 (VFPv3 extension). 160define feature fp16conv 161 162# Double precision operations supported. 163define feature fp_dbl 164 165# 32 Double precision registers. 166define feature fp_d32 167 168# Crypto extension to ARMv8. 169define feature crypto 170 171# FP16 data processing (half-precision float). 172define feature fp16 173 174# Dot Product instructions extension to ARMv8.2-a. 175define feature dotprod 176 177# Half-precision floating-point instructions in ARMv8.4-A. 178define feature fp16fml 179 180# ISA Quirks (errata?). Don't forget to add this to the fgroup 181# ALL_QUIRKS below. 182 183# No volatile memory in IT blocks. 184define feature quirk_no_volatile_ce 185 186# Previously mis-identified by GCC. 187define feature quirk_armv6kz 188 189# Cortex-M3 LDRD quirk. 190define feature quirk_cm3_ldrd 191 192# v8-m/v8.1-m VLLDM errata. 193define feature quirk_vlldm 194 195# AES errata on some Cortex-A parts 196define feature quirk_aes_1742098 197 198# Don't use .cpu assembly directive 199define feature quirk_no_asmcpu 200 201# (Very) slow multiply operations. Should probably be a tuning bit. 202define feature smallmul 203 204# Speculation Barrier Instruction for v8-A architectures, added by 205# default to v8.5-A 206define feature sb 207 208# Execution and Data Prediction Restriction Instruction for 209# v8-A architectures, added by default from v8.5-A 210define feature predres 211 212# M-profile Vector Extension feature bits 213define feature mve 214define feature mve_float 215 216# 8-bit Integer Matrix Multiply extension. Optional from v8.2-A. 217define feature i8mm 218 219# Brain half-precision floating-point extension. Optional from v8.2-A. 220define feature bf16 221 222# Arm Custom Datapath Extension (CDE). 223define feature cdecp0 224define feature cdecp1 225define feature cdecp2 226define feature cdecp3 227define feature cdecp4 228define feature cdecp5 229define feature cdecp6 230define feature cdecp7 231 232# Feature groups. Conventionally all (or mostly) upper case. 233# ALL_FPU lists all the feature bits associated with the floating-point 234# unit; these will all be removed if the floating-point unit is disabled 235# (eg -mfloat-abi=soft). ALL_FPU_INTERNAL must ONLY contain features that 236# form part of a named -mfpu option; it is used to map the capabilities 237# back to a named FPU for the benefit of the assembler. 238# 239# ALL_SIMD_INTERNAL and ALL_SIMD are similarly defined to help with the 240# construction of ALL_FPU and ALL_FPU_INTERNAL; they describe the SIMD 241# extensions that are either part of a named FPU or optional extensions 242# respectively. 243 244 245# List of all cryptographic extensions to stripout if crypto is 246# disabled. Currently, that's trivial, but we define it anyway for 247# consistency with the SIMD and FP disable lists. 248define fgroup ALL_CRYPTO crypto 249 250# List of all SIMD bits to strip out if SIMD is disabled. This does 251# strip off 32 D-registers, but does not remove support for 252# double-precision FP. 253define fgroup ALL_SIMD_INTERNAL fp_d32 neon ALL_CRYPTO 254define fgroup ALL_SIMD_EXTERNAL dotprod fp16fml i8mm 255define fgroup ALL_SIMD ALL_SIMD_INTERNAL ALL_SIMD_EXTERNAL 256 257# List of all FPU bits to strip out if -mfpu is used to override the 258# default. fp16 is deliberately missing from this list. 259define fgroup ALL_FPU_INTERNAL vfpv2 vfpv3 vfpv4 fpv5 fp16conv fp_dbl ALL_SIMD_INTERNAL 260# Similarly, but including fp16 and other extensions that aren't part of 261# -mfpu support. 262define fgroup ALL_FPU_EXTERNAL fp16 bf16 263 264# Everything related to the FPU extensions (FP or SIMD). 265define fgroup ALL_FP ALL_FPU_EXTERNAL ALL_FPU_INTERNAL ALL_SIMD 266 267define fgroup ARMv4 armv4 notm 268define fgroup ARMv4t ARMv4 thumb 269define fgroup ARMv5t ARMv4t armv5t 270define fgroup ARMv5te ARMv5t armv5te 271define fgroup ARMv5tej ARMv5te 272define fgroup ARMv6 ARMv5te armv6 be8 273define fgroup ARMv6j ARMv6 274define fgroup ARMv6k ARMv6 armv6k 275define fgroup ARMv6z ARMv6 276define fgroup ARMv6kz ARMv6k quirk_armv6kz 277define fgroup ARMv6zk ARMv6k 278define fgroup ARMv6t2 ARMv6 thumb2 279# This is suspect. ARMv6-m doesn't really pull in any useful features 280# from ARMv5* or ARMv6. 281define fgroup ARMv6m armv4 thumb armv5t armv5te armv6 be8 282# This is suspect, the 'common' ARMv7 subset excludes the thumb2 'DSP' and 283# integer SIMD instructions that are in ARMv6T2. */ 284define fgroup ARMv7 ARMv6m thumb2 armv7 285 286define fgroup ARMv7a ARMv7 notm armv6k 287define fgroup ARMv7ve ARMv7a adiv tdiv lpae mp sec 288define fgroup ARMv7r ARMv7a tdiv 289define fgroup ARMv7m ARMv7 tdiv 290define fgroup ARMv7em ARMv7m armv7em 291define fgroup ARMv8a ARMv7ve armv8 292define fgroup ARMv8_1a ARMv8a crc32 armv8_1 293define fgroup ARMv8_2a ARMv8_1a armv8_2 294define fgroup ARMv8_3a ARMv8_2a armv8_3 295define fgroup ARMv8_4a ARMv8_3a armv8_4 296define fgroup ARMv8_5a ARMv8_4a armv8_5 sb predres 297define fgroup ARMv8_6a ARMv8_5a armv8_6 298define fgroup ARMv8m_base ARMv6m armv8 cmse tdiv 299define fgroup ARMv8m_main ARMv7m armv8 cmse 300define fgroup ARMv8r ARMv8a 301define fgroup ARMv8_1m_main ARMv8m_main armv8_1m_main 302define fgroup ARMv9a ARMv8_5a armv9 303 304# Useful combinations. 305define fgroup VFPv2 vfpv2 306define fgroup VFPv3 VFPv2 vfpv3 307define fgroup VFPv4 VFPv3 vfpv4 fp16conv 308define fgroup FPv5 VFPv4 fpv5 309define fgroup MVE mve armv7em 310define fgroup MVE_FP MVE FPv5 fp16 mve_float 311 312define fgroup FP_DBL fp_dbl 313define fgroup FP_D32 FP_DBL fp_d32 314define fgroup FP_ARMv8 FPv5 FP_D32 315define fgroup NEON FP_D32 neon 316define fgroup CRYPTO NEON crypto 317define fgroup DOTPROD NEON dotprod 318 319# Implied feature bits. These are for non-named features shared between fgroups. 320# Shared feature f belonging to fgroups A and B will be erroneously removed if: 321# A and B are enabled by default AND A is disabled by a removal flag. 322# To ensure that f is retained, we must add such bits to the ISA after 323# processing the removal flags. This is implemented by 'implied bits': 324# define implied <name> [<feature-or-fgroup>]+ 325# This indicates that, if any of the listed features are enabled, or if any 326# member of a listed fgroup is enabled, then <name> will be implicitly enabled. 327 328# Enabled for all VFP, MVE and MVE with floating point extensions. 329define implied vfp_base MVE MVE_FP ALL_FP 330 331# List of all quirk bits to strip out when comparing CPU features with 332# architectures. 333# xscale isn't really a 'quirk', but it isn't an architecture either and we 334# need to ignore it for matching purposes. 335define fgroup ALL_QUIRKS quirk_no_volatile_ce quirk_armv6kz quirk_cm3_ldrd quirk_vlldm xscale quirk_no_asmcpu quirk_aes_1742098 336 337define fgroup IGNORE_FOR_MULTILIB cdecp0 cdecp1 cdecp2 cdecp3 cdecp4 cdecp5 cdecp6 cdecp7 338 339# Architecture entries 340# format: 341# begin arch <name> 342# tune for <cpu> 343# [tune flags <list>] 344# base <name> 345# [profile <A|R|M>] 346# isa <isa-flags-list> 347# end arch <name> 348# 349 350begin arch armv4 351 tune for arm7tdmi 352 tune flags CO_PROC 353 base 4 354 isa ARMv4 355end arch armv4 356 357begin arch armv4t 358 tune for arm7tdmi 359 tune flags CO_PROC 360 base 4T 361 isa ARMv4t 362end arch armv4t 363 364begin arch armv5t 365 tune for arm10tdmi 366 tune flags CO_PROC 367 base 5T 368 isa ARMv5t 369end arch armv5t 370 371begin arch armv5te 372 tune for arm1026ej-s 373 tune flags CO_PROC 374 base 5TE 375 isa ARMv5te 376 option fp add VFPv2 FP_DBL 377 optalias vfpv2 fp 378 option nofp remove ALL_FP 379end arch armv5te 380 381begin arch armv5tej 382 tune for arm1026ej-s 383 tune flags CO_PROC 384 base 5TEJ 385 isa ARMv5tej 386 option fp add VFPv2 FP_DBL 387 optalias vfpv2 fp 388 option nofp remove ALL_FP 389end arch armv5tej 390 391begin arch armv6 392 tune for arm1136j-s 393 tune flags CO_PROC 394 base 6 395 isa ARMv6 396 option fp add VFPv2 FP_DBL 397 optalias vfpv2 fp 398 option nofp remove ALL_FP 399end arch armv6 400 401begin arch armv6j 402 tune for arm1136j-s 403 tune flags CO_PROC 404 base 6J 405 isa ARMv6j 406 option fp add VFPv2 FP_DBL 407 optalias vfpv2 fp 408 option nofp remove ALL_FP 409end arch armv6j 410 411begin arch armv6k 412 tune for mpcore 413 tune flags CO_PROC 414 base 6K 415 isa ARMv6k 416 option fp add VFPv2 FP_DBL 417 optalias vfpv2 fp 418 option nofp remove ALL_FP 419end arch armv6k 420 421begin arch armv6z 422 tune for arm1176jz-s 423 tune flags CO_PROC 424 base 6Z 425 isa ARMv6z 426 option fp add VFPv2 FP_DBL 427 optalias vfpv2 fp 428 option nofp remove ALL_FP 429end arch armv6z 430 431begin arch armv6kz 432 tune for arm1176jz-s 433 tune flags CO_PROC 434 base 6KZ 435 isa ARMv6kz 436 option fp add VFPv2 FP_DBL 437 optalias vfpv2 fp 438 option nofp remove ALL_FP 439end arch armv6kz 440 441begin arch armv6zk 442 tune for arm1176jz-s 443 tune flags CO_PROC 444 base 6KZ 445 isa ARMv6kz 446 option fp add VFPv2 FP_DBL 447 optalias vfpv2 fp 448 option nofp remove ALL_FP 449end arch armv6zk 450 451begin arch armv6t2 452 tune for arm1156t2-s 453 tune flags CO_PROC 454 base 6T2 455 isa ARMv6t2 456 option fp add VFPv2 FP_DBL 457 optalias vfpv2 fp 458 option nofp remove ALL_FP 459end arch armv6t2 460 461begin arch armv6-m 462 tune for cortex-m1 463 base 6M 464 profile M 465 isa ARMv6m 466end arch armv6-m 467 468# This is now equivalent to armv6-m, but we keep it because some 469# versions of GAS still distinguish between the two. 470begin arch armv6s-m 471 tune for cortex-m1 472 base 6M 473 profile M 474 isa ARMv6m 475end arch armv6s-m 476 477begin arch armv7 478 tune for cortex-a53 479 tune flags CO_PROC 480 base 7 481 isa ARMv7 482# fp => VFPv3-d16 (only useful for the A+R profile subset). 483 option fp add VFPv3 FP_DBL 484 optalias vfpv3-d16 fp 485 option nofp remove ALL_FP 486end arch armv7 487 488begin arch armv7-a 489 tune for cortex-a53 490 tune flags CO_PROC 491 base 7A 492 profile A 493 isa ARMv7a 494 option mp add mp 495 option sec add sec 496# fp => VFPv3-d16, simd => neon-vfpv3 497 option fp add VFPv3 FP_DBL 498 optalias vfpv3-d16 fp 499 option vfpv3 add VFPv3 FP_D32 500 option vfpv3-d16-fp16 add VFPv3 FP_DBL fp16conv 501 option vfpv3-fp16 add VFPv3 FP_DBL FP_D32 fp16conv 502 option vfpv4-d16 add VFPv4 FP_DBL 503 option vfpv4 add VFPv4 FP_D32 504 option simd add VFPv3 NEON 505 optalias neon simd 506 optalias neon-vfpv3 simd 507 option neon-fp16 add VFPv3 NEON fp16conv 508 option neon-vfpv4 add VFPv4 NEON 509 option nosimd remove ALL_SIMD 510 option nofp remove ALL_FP 511end arch armv7-a 512 513begin arch armv7ve 514 tune for cortex-a53 515 tune flags CO_PROC 516 base 7A 517 profile A 518 isa ARMv7ve 519# fp => VFPv4-d16, simd => neon-vfpv4 520 option vfpv3-d16 add VFPv3 FP_DBL 521 option vfpv3 add VFPv3 FP_D32 522 option vfpv3-d16-fp16 add VFPv3 FP_DBL fp16conv 523 option vfpv3-fp16 add VFPv3 FP_DBL FP_D32 fp16conv 524 option fp add VFPv4 FP_DBL 525 optalias vfpv4-d16 fp 526 option vfpv4 add VFPv4 FP_D32 527 option neon add VFPv3 NEON 528 optalias neon-vfpv3 neon 529 option neon-fp16 add VFPv3 NEON fp16conv 530 option simd add VFPv4 NEON 531 optalias neon-vfpv4 simd 532 option nosimd remove ALL_SIMD 533 option nofp remove ALL_FP 534end arch armv7ve 535 536begin arch armv7-r 537 tune for cortex-r4 538 tune flags CO_PROC 539 base 7R 540 profile R 541 isa ARMv7r 542# ARMv7-r uses VFPv3-d16 543 option fp.sp add VFPv3 544 optalias vfpv3xd fp.sp 545 option fp add VFPv3 FP_DBL 546 optalias vfpv3-d16 fp 547 option vfpv3xd-fp16 add VFPv3 fp16conv 548 option vfpv3-d16-fp16 add VFPv3 FP_DBL fp16conv 549 option idiv add adiv 550 option nofp remove ALL_FP 551 option noidiv remove adiv 552end arch armv7-r 553 554begin arch armv7-m 555 tune for cortex-m3 556 tune flags CO_PROC 557 base 7M 558 profile M 559 isa ARMv7m 560# In theory FP is permitted in v7-m, but in practice no implementations exist. 561# leave it out for now. 562end arch armv7-m 563 564begin arch armv7e-m 565 tune for cortex-m4 566 tune flags CO_PROC 567 base 7EM 568 profile M 569 isa ARMv7em 570# fp => VFPv4-sp-d16; fpv5 => FPv5-sp-d16; fp.dp => FPv5-d16 571 option fp add VFPv4 572 optalias vfpv4-sp-d16 fp 573 option fpv5 add FPv5 574 option fp.dp add FPv5 FP_DBL 575 optalias fpv5-d16 fp.dp 576 option nofp remove ALL_FP 577end arch armv7e-m 578 579begin arch armv8-a 580 tune for cortex-a53 581 tune flags CO_PROC 582 base 8A 583 profile A 584 isa ARMv8a 585 option crc add crc32 586 option simd add FP_ARMv8 NEON 587 option crypto add FP_ARMv8 CRYPTO 588 option nocrypto remove ALL_CRYPTO 589 option nofp remove ALL_FP 590 option sb add sb 591 option predres add predres 592end arch armv8-a 593 594begin arch armv8.1-a 595 tune for cortex-a53 596 tune flags CO_PROC 597 base 8A 598 profile A 599 isa ARMv8_1a 600 option simd add FP_ARMv8 NEON 601 option crypto add FP_ARMv8 CRYPTO 602 option nocrypto remove ALL_CRYPTO 603 option nofp remove ALL_FP 604 option sb add sb 605 option predres add predres 606end arch armv8.1-a 607 608begin arch armv8.2-a 609 tune for cortex-a53 610 tune flags CO_PROC 611 base 8A 612 profile A 613 isa ARMv8_2a 614 option simd add FP_ARMv8 NEON 615 option fp16 add fp16 FP_ARMv8 NEON 616 option fp16fml add fp16fml fp16 FP_ARMv8 NEON 617 option crypto add FP_ARMv8 CRYPTO 618 option nocrypto remove ALL_CRYPTO 619 option nofp remove ALL_FP 620 option dotprod add FP_ARMv8 DOTPROD 621 option sb add sb 622 option predres add predres 623 option i8mm add i8mm FP_ARMv8 NEON 624 option bf16 add bf16 FP_ARMv8 NEON 625end arch armv8.2-a 626 627begin arch armv8.3-a 628 tune for cortex-a53 629 tune flags CO_PROC 630 base 8A 631 profile A 632 isa ARMv8_3a 633 option simd add FP_ARMv8 NEON 634 option fp16 add fp16 FP_ARMv8 NEON 635 option fp16fml add fp16fml fp16 FP_ARMv8 NEON 636 option crypto add FP_ARMv8 CRYPTO 637 option nocrypto remove ALL_CRYPTO 638 option nofp remove ALL_FP 639 option dotprod add FP_ARMv8 DOTPROD 640 option sb add sb 641 option predres add predres 642 option i8mm add i8mm FP_ARMv8 NEON 643 option bf16 add bf16 FP_ARMv8 NEON 644end arch armv8.3-a 645 646begin arch armv8.4-a 647 tune for cortex-a53 648 tune flags CO_PROC 649 base 8A 650 profile A 651 isa ARMv8_4a 652 option simd add FP_ARMv8 DOTPROD 653 option fp16 add fp16 fp16fml FP_ARMv8 DOTPROD 654 option crypto add FP_ARMv8 CRYPTO DOTPROD 655 option nocrypto remove ALL_CRYPTO 656 option nofp remove ALL_FP 657 option sb add sb 658 option predres add predres 659 option i8mm add i8mm FP_ARMv8 DOTPROD 660 option bf16 add bf16 FP_ARMv8 DOTPROD 661end arch armv8.4-a 662 663begin arch armv8.5-a 664 tune for cortex-a53 665 tune flags CO_PROC 666 base 8A 667 profile A 668 isa ARMv8_5a 669 option simd add FP_ARMv8 DOTPROD 670 option fp16 add fp16 fp16fml FP_ARMv8 DOTPROD 671 option crypto add FP_ARMv8 CRYPTO DOTPROD 672 option nocrypto remove ALL_CRYPTO 673 option nofp remove ALL_FP 674 option i8mm add i8mm FP_ARMv8 DOTPROD 675 option bf16 add bf16 FP_ARMv8 DOTPROD 676end arch armv8.5-a 677 678begin arch armv8.6-a 679 tune for cortex-a53 680 tune flags CO_PROC 681 base 8A 682 profile A 683 isa ARMv8_6a 684 option simd add FP_ARMv8 DOTPROD 685 option fp16 add fp16 fp16fml FP_ARMv8 DOTPROD 686 option crypto add FP_ARMv8 CRYPTO DOTPROD 687 option nocrypto remove ALL_CRYPTO 688 option nofp remove ALL_FP 689 option i8mm add i8mm FP_ARMv8 DOTPROD 690 option bf16 add bf16 FP_ARMv8 DOTPROD 691end arch armv8.6-a 692 693begin arch armv8-m.base 694 tune for cortex-m23 695 base 8M_BASE 696 profile M 697 isa ARMv8m_base 698end arch armv8-m.base 699 700begin arch armv8-m.main 701 tune for cortex-m7 702 tune flags CO_PROC 703 base 8M_MAIN 704 profile M 705 isa ARMv8m_main 706 option dsp add armv7em 707# fp => FPv5-sp-d16; fp.dp => FPv5-d16 708 option fp add FPv5 709 option fp.dp add FPv5 FP_DBL 710 option nofp remove ALL_FP 711 option nodsp remove armv7em 712 option cdecp0 add cdecp0 713 option cdecp1 add cdecp1 714 option cdecp2 add cdecp2 715 option cdecp3 add cdecp3 716 option cdecp4 add cdecp4 717 option cdecp5 add cdecp5 718 option cdecp6 add cdecp6 719 option cdecp7 add cdecp7 720end arch armv8-m.main 721 722begin arch armv8-r 723 tune for cortex-r52 724 tune flags CO_PROC 725 base 8R 726 profile R 727 isa ARMv8r 728 option crc add crc32 729# fp.sp => fp-armv8 (d16); simd => simd + fp-armv8 + d32 + double precision 730# note: no fp option for fp-armv8 (d16) + double precision at the moment 731 option fp.sp add FPv5 732 option simd add FP_ARMv8 NEON 733 option crypto add FP_ARMv8 CRYPTO 734 option nocrypto remove ALL_CRYPTO 735 option nofp remove ALL_FP 736end arch armv8-r 737 738begin arch armv8.1-m.main 739 tune for cortex-m55 740 tune flags CO_PROC 741 base 8M_MAIN 742 profile M 743 isa ARMv8_1m_main 744# fp => FPv5-sp-d16; fp.dp => FPv5-d16 745 option dsp add armv7em 746 option fp add FPv5 fp16 747 option fp.dp add FPv5 FP_DBL fp16 748 option nofp remove ALL_FP 749 option mve add MVE 750 option mve.fp add MVE_FP 751 option cdecp0 add cdecp0 752 option cdecp1 add cdecp1 753 option cdecp2 add cdecp2 754 option cdecp3 add cdecp3 755 option cdecp4 add cdecp4 756 option cdecp5 add cdecp5 757 option cdecp6 add cdecp6 758 option cdecp7 add cdecp7 759end arch armv8.1-m.main 760 761begin arch armv9-a 762 tune for cortex-a53 763 tune flags CO_PROC 764 base 9A 765 profile A 766 isa ARMv9a 767 option simd add FP_ARMv8 DOTPROD 768 option fp16 add fp16 fp16fml FP_ARMv8 DOTPROD 769 option crypto add FP_ARMv8 CRYPTO DOTPROD 770 option nocrypto remove ALL_CRYPTO 771 option nofp remove ALL_FP 772 option i8mm add i8mm FP_ARMv8 DOTPROD 773 option bf16 add bf16 FP_ARMv8 DOTPROD 774end arch armv9-a 775 776begin arch iwmmxt 777 tune for iwmmxt 778 tune flags LDSCHED STRONG XSCALE 779 base 5TE 780 isa ARMv5te xscale iwmmxt 781end arch iwmmxt 782 783begin arch iwmmxt2 784 tune for iwmmxt2 785 tune flags LDSCHED STRONG XSCALE 786 base 5TE 787 isa ARMv5te xscale iwmmxt iwmmxt2 788end arch iwmmxt2 789 790# CPU entries 791# format: 792# begin cpu <name> 793# [cname <c-compatible-name>] 794# [alias <name>+] 795# [tune for <cpu-name>] 796# [tune flags <list>] 797# architecture <name> 798# [isa <additional-isa-flags-list>] 799# [option <name> add|remove <isa-list>]* 800# [optalias <name> <optname>]* 801# [costs <name>] 802# [vendor <vendor-id> 803# [part <part-id> [minrev [maxrev]]] 804# end cpu <name> 805# 806# If omitted, cname is formed from transforming the cpuname to convert 807# non-valid punctuation characters to '_'. 808# Any number of alias names may be specified for a CPU. If the name starts 809# with a '!' then it will be recognized as a valid name, but will not 810# be printed in any help text listing permitted CPUs. 811# If specified, tune for specifies a CPU target to use for tuning this core. 812# isa flags are appended to those defined by the architecture. 813# Each add option must have a distinct feature set and each remove 814# option must similarly have a distinct feature set. Option aliases can be 815# added with the optalias statement. 816# Vendor, part and revision information is used for native CPU and architecture 817# detection. All values must be in hex (lower case) with the leading '0x' 818# omitted. For example the cortex-a9 will have vendor 41 and part c09. 819# Revision information is used to match a subrange of part 820# revisions: minrev <= detected <= maxrev. 821# If a minrev or maxrev are omitted then minrev defaults to zero and maxrev 822# to infinity. 823# Revision information is not implemented yet; no part uses it. 824 825# V4 Architecture Processors 826begin cpu arm8 827 tune flags LDSCHED 828 architecture armv4 829 costs fastmul 830end cpu arm8 831 832begin cpu arm810 833 tune flags LDSCHED 834 architecture armv4 835 costs fastmul 836end cpu arm810 837 838begin cpu strongarm 839 alias strongarm110 !strongarm1100 !strongarm1110 840 tune flags LDSCHED STRONG 841 architecture armv4 842 costs strongarm 843end cpu strongarm 844 845begin cpu fa526 846 tune flags LDSCHED 847 architecture armv4 848 costs fastmul 849end cpu fa526 850 851begin cpu fa626 852 tune flags LDSCHED 853 architecture armv4 854 costs fastmul 855end cpu fa626 856 857 858# V4T Architecture Processors 859begin cpu arm7tdmi 860 alias arm7tdmi-s 861 tune flags CO_PROC 862 architecture armv4t 863 costs fastmul 864end cpu arm7tdmi 865 866begin cpu arm710t 867 alias arm720t arm740t 868 tune flags WBUF 869 architecture armv4t 870 costs fastmul 871end cpu arm710t 872 873begin cpu arm9 874 tune flags LDSCHED 875 architecture armv4t 876 costs fastmul 877end cpu arm9 878 879begin cpu arm9tdmi 880 tune flags LDSCHED 881 architecture armv4t 882 costs fastmul 883end cpu arm9tdmi 884 885begin cpu arm920t 886 alias arm920 arm922t arm940t ep9312 887 tune flags LDSCHED 888 architecture armv4t 889 costs fastmul 890end cpu arm920t 891 892 893# V5T Architecture Processors 894# These used VFPv1 which isn't supported by GCC 895begin cpu arm10tdmi 896 alias arm1020t 897 tune flags LDSCHED 898 architecture armv5t 899 costs fastmul 900end cpu arm10tdmi 901 902 903# V5TE Architecture Processors 904begin cpu arm9e 905 alias arm946e-s arm966e-s arm968e-s 906 tune flags LDSCHED 907 architecture armv5te+fp 908 option nofp remove ALL_FP 909 costs 9e 910end cpu arm9e 911 912begin cpu arm10e 913 alias arm1020e arm1022e 914 tune flags LDSCHED 915 architecture armv5te+fp 916 option nofp remove ALL_FP 917 costs fastmul 918end cpu arm10e 919 920begin cpu xscale 921 tune flags LDSCHED XSCALE 922 architecture armv5te 923 isa xscale 924 costs xscale 925end cpu xscale 926 927begin cpu iwmmxt 928 tune flags LDSCHED XSCALE 929 architecture iwmmxt 930 costs xscale 931end cpu iwmmxt 932 933begin cpu iwmmxt2 934 tune flags LDSCHED XSCALE 935 architecture iwmmxt2 936 costs xscale 937end cpu iwmmxt2 938 939begin cpu fa606te 940 tune flags LDSCHED 941 architecture armv5te 942 costs 9e 943end cpu fa606te 944 945begin cpu fa626te 946 tune flags LDSCHED 947 architecture armv5te 948 costs 9e 949end cpu fa626te 950 951begin cpu fmp626 952 tune flags LDSCHED 953 architecture armv5te 954 costs 9e 955end cpu fmp626 956 957begin cpu fa726te 958 tune flags LDSCHED 959 architecture armv5te 960 costs fa726te 961end cpu fa726te 962 963 964# V5TEJ Architecture Processors 965begin cpu arm926ej-s 966 cname arm926ejs 967 tune flags LDSCHED 968 architecture armv5tej+fp 969 option nofp remove ALL_FP 970 costs 9e 971 vendor 41 972 part 926 973end cpu arm926ej-s 974 975begin cpu arm1026ej-s 976 cname arm1026ejs 977 tune flags LDSCHED 978 architecture armv5tej+fp 979 option nofp remove ALL_FP 980 costs 9e 981 vendor 41 982 part a26 983end cpu arm1026ej-s 984 985 986# V6 Architecture Processors 987begin cpu arm1136j-s 988 cname arm1136js 989 tune flags LDSCHED 990 architecture armv6j 991 costs 9e 992end cpu arm1136j-s 993 994begin cpu arm1136jf-s 995 cname arm1136jfs 996 tune flags LDSCHED 997 architecture armv6j+fp 998 costs 9e 999 vendor 41 1000 part b36 1001end cpu arm1136jf-s 1002 1003begin cpu arm1176jz-s 1004 cname arm1176jzs 1005 tune flags LDSCHED 1006 architecture armv6kz 1007 costs 9e 1008end cpu arm1176jz-s 1009 1010begin cpu arm1176jzf-s 1011 cname arm1176jzfs 1012 tune flags LDSCHED 1013 architecture armv6kz+fp 1014 costs 9e 1015 vendor 41 1016 part b76 1017end cpu arm1176jzf-s 1018 1019begin cpu mpcorenovfp 1020 tune flags LDSCHED 1021 architecture armv6k 1022 costs 9e 1023end cpu mpcorenovfp 1024 1025begin cpu mpcore 1026 tune flags LDSCHED 1027 architecture armv6k+fp 1028 costs 9e 1029 vendor 41 1030 part b02 1031end cpu mpcore 1032 1033begin cpu arm1156t2-s 1034 cname arm1156t2s 1035 tune flags LDSCHED 1036 architecture armv6t2 1037 costs v6t2 1038end cpu arm1156t2-s 1039 1040begin cpu arm1156t2f-s 1041 cname arm1156t2fs 1042 tune flags LDSCHED 1043 architecture armv6t2+fp 1044 costs v6t2 1045 vendor 41 1046 part b56 1047end cpu arm1156t2f-s 1048 1049 1050# V6M Architecture Processors 1051begin cpu cortex-m1 1052 cname cortexm1 1053 tune flags LDSCHED 1054 architecture armv6s-m 1055 costs v6m 1056 vendor 41 1057 part c21 1058end cpu cortex-m1 1059 1060begin cpu cortex-m0 1061 cname cortexm0 1062 tune flags LDSCHED 1063 architecture armv6s-m 1064 costs v6m 1065 vendor 41 1066 part c20 1067end cpu cortex-m0 1068 1069begin cpu cortex-m0plus 1070 cname cortexm0plus 1071 tune flags LDSCHED 1072 architecture armv6s-m 1073 costs v6m 1074end cpu cortex-m0plus 1075 1076 1077# V6M Architecture Processors for small-multiply implementations. 1078begin cpu cortex-m1.small-multiply 1079 cname cortexm1smallmultiply 1080 tune for cortex-m1 1081 tune flags LDSCHED SMALLMUL 1082 architecture armv6s-m 1083 costs v6m 1084end cpu cortex-m1.small-multiply 1085 1086begin cpu cortex-m0.small-multiply 1087 cname cortexm0smallmultiply 1088 tune for cortex-m0 1089 tune flags LDSCHED SMALLMUL 1090 architecture armv6s-m 1091 costs v6m 1092end cpu cortex-m0.small-multiply 1093 1094begin cpu cortex-m0plus.small-multiply 1095 cname cortexm0plussmallmultiply 1096 tune for cortex-m0plus 1097 tune flags LDSCHED SMALLMUL 1098 architecture armv6s-m 1099 costs v6m 1100end cpu cortex-m0plus.small-multiply 1101 1102 1103# V7 Architecture Processors 1104begin cpu generic-armv7-a 1105 cname genericv7a 1106 tune flags LDSCHED 1107 architecture armv7-a+fp 1108 isa quirk_no_asmcpu 1109 option mp add mp 1110 option sec add sec 1111 option vfpv3-d16 add VFPv3 FP_DBL 1112 option vfpv3 add VFPv3 FP_D32 1113 option vfpv3-d16-fp16 add VFPv3 FP_DBL fp16conv 1114 option vfpv3-fp16 add VFPv3 FP_D32 fp16conv 1115 option vfpv4-d16 add VFPv4 FP_DBL 1116 option vfpv4 add VFPv4 FP_D32 1117 option simd add VFPv3 NEON 1118 optalias neon simd 1119 optalias neon-vfpv3 simd 1120 option neon-fp16 add VFPv3 NEON fp16conv 1121 option neon-vfpv4 add VFPv4 NEON 1122 option nosimd remove ALL_SIMD 1123 option nofp remove ALL_FP 1124 costs cortex 1125end cpu generic-armv7-a 1126 1127begin cpu cortex-a5 1128 cname cortexa5 1129 tune flags LDSCHED 1130 architecture armv7-a+mp+sec+neon-fp16 1131 option nosimd remove ALL_SIMD 1132 option nofp remove ALL_FP 1133 costs cortex_a5 1134 vendor 41 1135 part c05 1136end cpu cortex-a5 1137 1138begin cpu cortex-a7 1139 cname cortexa7 1140 tune flags LDSCHED 1141 architecture armv7ve+simd 1142 option nosimd remove ALL_SIMD 1143 option nofp remove ALL_FP 1144 costs cortex_a7 1145 vendor 41 1146 part c07 1147end cpu cortex-a7 1148 1149begin cpu cortex-a8 1150 cname cortexa8 1151 tune flags LDSCHED 1152 architecture armv7-a+sec+simd 1153 option nofp remove ALL_FP 1154 costs cortex_a8 1155 vendor 41 1156 part c08 1157end cpu cortex-a8 1158 1159begin cpu cortex-a9 1160 cname cortexa9 1161 tune flags LDSCHED 1162 architecture armv7-a+mp+sec+neon-fp16 1163 option nosimd remove ALL_SIMD 1164 option nofp remove ALL_FP 1165 costs cortex_a9 1166 vendor 41 1167 part c09 1168end cpu cortex-a9 1169 1170begin cpu cortex-a12 1171 cname cortexa12 1172 tune for cortex-a17 1173 tune flags LDSCHED 1174 architecture armv7ve+simd 1175 option nofp remove ALL_FP 1176 costs cortex_a12 1177 vendor 41 1178 part c0d 1179end cpu cortex-a12 1180 1181begin cpu cortex-a15 1182 cname cortexa15 1183 tune flags LDSCHED 1184 architecture armv7ve+simd 1185 option nofp remove ALL_FP 1186 costs cortex_a15 1187 vendor 41 1188 part c0f 1189end cpu cortex-a15 1190 1191begin cpu cortex-a17 1192 cname cortexa17 1193 tune flags LDSCHED 1194 architecture armv7ve+simd 1195 option nofp remove ALL_FP 1196 costs cortex_a12 1197 vendor 41 1198 part c0e 1199end cpu cortex-a17 1200 1201begin cpu cortex-r4 1202 cname cortexr4 1203 tune flags LDSCHED 1204 architecture armv7-r 1205 costs cortex 1206end cpu cortex-r4 1207 1208begin cpu cortex-r4f 1209 cname cortexr4f 1210 tune flags LDSCHED 1211 architecture armv7-r+fp 1212 costs cortex 1213 vendor 41 1214 part c14 1215end cpu cortex-r4f 1216 1217begin cpu cortex-r5 1218 cname cortexr5 1219 tune flags LDSCHED 1220 architecture armv7-r+idiv+fp 1221 option nofp.dp remove FP_DBL 1222 option nofp remove ALL_FP 1223 costs cortex 1224 vendor 41 1225 part c15 1226end cpu cortex-r5 1227 1228begin cpu cortex-r7 1229 cname cortexr7 1230 tune flags LDSCHED 1231 architecture armv7-r+idiv+vfpv3-d16-fp16 1232 option nofp.dp remove FP_DBL 1233 option nofp remove ALL_FP 1234 costs cortex 1235 vendor 41 1236 part c17 1237end cpu cortex-r7 1238 1239begin cpu cortex-r8 1240 cname cortexr8 1241 tune for cortex-r7 1242 tune flags LDSCHED 1243 architecture armv7-r+idiv+vfpv3-d16-fp16 1244 option nofp.dp remove FP_DBL 1245 option nofp remove ALL_FP 1246 costs cortex 1247 vendor 41 1248 part c18 1249end cpu cortex-r8 1250 1251begin cpu cortex-m7 1252 cname cortexm7 1253 tune flags LDSCHED 1254 architecture armv7e-m+fp.dp 1255 isa quirk_no_volatile_ce 1256 option nofp.dp remove FP_DBL 1257 option nofp remove ALL_FP 1258 costs cortex_m7 1259end cpu cortex-m7 1260 1261begin cpu cortex-m4 1262 cname cortexm4 1263 tune flags LDSCHED 1264 architecture armv7e-m+fp 1265 option nofp remove ALL_FP 1266 costs v7m 1267 vendor 41 1268 part c24 1269end cpu cortex-m4 1270 1271begin cpu cortex-m3 1272 cname cortexm3 1273 tune flags LDSCHED 1274 architecture armv7-m 1275 isa quirk_cm3_ldrd 1276 costs v7m 1277 vendor 41 1278 part c23 1279end cpu cortex-m3 1280 1281begin cpu marvell-pj4 1282 tune flags LDSCHED 1283 architecture armv7-a+mp+sec+fp 1284 costs marvell_pj4 1285end cpu marvell-pj4 1286 1287 1288# V7 big.LITTLE implementations 1289begin cpu cortex-a15.cortex-a7 1290 cname cortexa15cortexa7 1291 tune for cortex-a7 1292 tune flags LDSCHED 1293 architecture armv7ve+simd 1294 option nofp remove ALL_FP 1295 costs cortex_a15 1296end cpu cortex-a15.cortex-a7 1297 1298begin cpu cortex-a17.cortex-a7 1299 cname cortexa17cortexa7 1300 tune for cortex-a7 1301 tune flags LDSCHED 1302 architecture armv7ve+simd 1303 option nofp remove ALL_FP 1304 costs cortex_a12 1305end cpu cortex-a17.cortex-a7 1306 1307 1308# V8 A-profile Architecture Processors 1309begin cpu cortex-a32 1310 cname cortexa32 1311 tune for cortex-a53 1312 tune flags LDSCHED 1313 architecture armv8-a+crc+simd 1314 option crypto add FP_ARMv8 CRYPTO 1315 option nofp remove ALL_FP 1316 costs cortex_a35 1317 vendor 41 1318 part d01 1319end cpu cortex-a32 1320 1321begin cpu cortex-a35 1322 cname cortexa35 1323 tune for cortex-a53 1324 tune flags LDSCHED 1325 architecture armv8-a+crc+simd 1326 option crypto add FP_ARMv8 CRYPTO 1327 option nofp remove ALL_FP 1328 costs cortex_a35 1329 vendor 41 1330 part d04 1331end cpu cortex-a35 1332 1333begin cpu cortex-a53 1334 cname cortexa53 1335 tune flags LDSCHED 1336 architecture armv8-a+crc+simd 1337 option crypto add FP_ARMv8 CRYPTO 1338 option nofp remove ALL_FP 1339 costs cortex_a53 1340 vendor 41 1341 part d03 1342end cpu cortex-a53 1343 1344begin cpu cortex-a57 1345 cname cortexa57 1346 tune flags LDSCHED 1347 architecture armv8-a+crc+simd 1348 isa quirk_aes_1742098 1349 option crypto add FP_ARMv8 CRYPTO 1350 costs cortex_a57 1351 vendor 41 1352 part d07 1353end cpu cortex-a57 1354 1355begin cpu cortex-a72 1356 cname cortexa72 1357 tune for cortex-a57 1358 tune flags LDSCHED 1359 architecture armv8-a+crc+simd 1360 isa quirk_aes_1742098 1361 option crypto add FP_ARMv8 CRYPTO 1362 costs cortex_a57 1363 vendor 41 1364 part d08 1365end cpu cortex-a72 1366 1367begin cpu cortex-a73 1368 cname cortexa73 1369 tune for cortex-a57 1370 tune flags LDSCHED 1371 architecture armv8-a+crc+simd 1372 option crypto add FP_ARMv8 CRYPTO 1373 costs cortex_a73 1374 vendor 41 1375 part d09 1376end cpu cortex-a73 1377 1378begin cpu exynos-m1 1379 cname exynosm1 1380 tune flags LDSCHED 1381 architecture armv8-a+crc+simd 1382 option crypto add FP_ARMv8 CRYPTO 1383 costs exynosm1 1384end cpu exynos-m1 1385 1386begin cpu xgene1 1387 tune flags LDSCHED 1388 architecture armv8-a+simd 1389 option crypto add FP_ARMv8 CRYPTO 1390 costs xgene1 1391end cpu xgene1 1392 1393# V8 A-profile big.LITTLE implementations 1394begin cpu cortex-a57.cortex-a53 1395 cname cortexa57cortexa53 1396 tune for cortex-a53 1397 tune flags LDSCHED 1398 architecture armv8-a+crc+simd 1399 isa quirk_aes_1742098 1400 option crypto add FP_ARMv8 CRYPTO 1401 costs cortex_a57 1402end cpu cortex-a57.cortex-a53 1403 1404begin cpu cortex-a72.cortex-a53 1405 cname cortexa72cortexa53 1406 tune for cortex-a53 1407 tune flags LDSCHED 1408 architecture armv8-a+crc+simd 1409 isa quirk_aes_1742098 1410 option crypto add FP_ARMv8 CRYPTO 1411 costs cortex_a57 1412end cpu cortex-a72.cortex-a53 1413 1414begin cpu cortex-a73.cortex-a35 1415 cname cortexa73cortexa35 1416 tune for cortex-a53 1417 tune flags LDSCHED 1418 architecture armv8-a+crc+simd 1419 option crypto add FP_ARMv8 CRYPTO 1420 costs cortex_a73 1421end cpu cortex-a73.cortex-a35 1422 1423begin cpu cortex-a73.cortex-a53 1424 cname cortexa73cortexa53 1425 tune for cortex-a53 1426 tune flags LDSCHED 1427 architecture armv8-a+crc+simd 1428 option crypto add FP_ARMv8 CRYPTO 1429 costs cortex_a73 1430end cpu cortex-a73.cortex-a53 1431 1432 1433# ARMv8.2 A-profile Architecture Processors 1434begin cpu cortex-a55 1435 cname cortexa55 1436 tune for cortex-a53 1437 tune flags LDSCHED 1438 architecture armv8.2-a+fp16+dotprod 1439 option crypto add FP_ARMv8 CRYPTO 1440 option nofp remove ALL_FP 1441 costs cortex_a53 1442 vendor 41 1443 part d05 1444end cpu cortex-a55 1445 1446begin cpu cortex-a75 1447 cname cortexa75 1448 tune for cortex-a57 1449 tune flags LDSCHED 1450 architecture armv8.2-a+fp16+dotprod 1451 option crypto add FP_ARMv8 CRYPTO 1452 costs cortex_a73 1453 vendor 41 1454 part d0a 1455end cpu cortex-a75 1456 1457begin cpu cortex-a76 1458 cname cortexa76 1459 tune for cortex-a57 1460 tune flags LDSCHED 1461 architecture armv8.2-a+fp16+dotprod 1462 option crypto add FP_ARMv8 CRYPTO 1463 costs cortex_a57 1464 vendor 41 1465 part d0b 1466end cpu cortex-a76 1467 1468begin cpu cortex-a76ae 1469 cname cortexa76ae 1470 tune for cortex-a57 1471 tune flags LDSCHED 1472 architecture armv8.2-a+fp16+dotprod 1473 option crypto add FP_ARMv8 CRYPTO 1474 costs cortex_a57 1475 vendor 41 1476 part d0e 1477end cpu cortex-a76ae 1478 1479begin cpu cortex-a77 1480 cname cortexa77 1481 tune for cortex-a57 1482 tune flags LDSCHED 1483 architecture armv8.2-a+fp16+dotprod 1484 option crypto add FP_ARMv8 CRYPTO 1485 costs cortex_a57 1486 vendor 41 1487 part d0d 1488end cpu cortex-a77 1489 1490begin cpu cortex-a78 1491 cname cortexa78 1492 tune for cortex-a57 1493 tune flags LDSCHED 1494 architecture armv8.2-a+fp16+dotprod 1495 option crypto add FP_ARMv8 CRYPTO 1496 costs cortex_a57 1497 vendor 41 1498 part d41 1499end cpu cortex-a78 1500 1501begin cpu cortex-a78ae 1502 cname cortexa78ae 1503 tune for cortex-a57 1504 tune flags LDSCHED 1505 architecture armv8.2-a+fp16+dotprod 1506 option crypto add FP_ARMv8 CRYPTO 1507 costs cortex_a57 1508 vendor 41 1509 part d42 1510end cpu cortex-a78ae 1511 1512begin cpu cortex-a78c 1513 cname cortexa78c 1514 tune for cortex-a57 1515 tune flags LDSCHED 1516 architecture armv8.2-a+fp16+dotprod 1517 option crypto add FP_ARMv8 CRYPTO 1518 costs cortex_a57 1519 vendor 41 1520 part d4b 1521end cpu cortex-a78c 1522 1523begin cpu cortex-a710 1524 cname cortexa710 1525 tune for cortex-a57 1526 tune flags LDSCHED 1527 architecture armv9-a+fp16+bf16+i8mm 1528 option crypto add FP_ARMv8 CRYPTO 1529 costs cortex_a57 1530 vendor 41 1531 part d47 1532end cpu cortex-a710 1533 1534begin cpu cortex-x1 1535 cname cortexx1 1536 tune for cortex-a57 1537 tune flags LDSCHED 1538 architecture armv8.2-a+fp16+dotprod 1539 option crypto add FP_ARMv8 CRYPTO 1540 costs cortex_a57 1541 vendor 41 1542 part d44 1543end cpu cortex-x1 1544 1545begin cpu neoverse-n1 1546 cname neoversen1 1547 alias !ares 1548 tune for cortex-a57 1549 tune flags LDSCHED 1550 architecture armv8.2-a+fp16+dotprod 1551 option crypto add FP_ARMv8 CRYPTO 1552 costs cortex_a57 1553 vendor 41 1554 part d0c 1555end cpu neoverse-n1 1556 1557# ARMv8.2 A-profile ARM DynamIQ big.LITTLE implementations 1558begin cpu cortex-a75.cortex-a55 1559 cname cortexa75cortexa55 1560 tune for cortex-a53 1561 tune flags LDSCHED 1562 architecture armv8.2-a+fp16+dotprod 1563 option crypto add FP_ARMv8 CRYPTO 1564 costs cortex_a73 1565end cpu cortex-a75.cortex-a55 1566 1567begin cpu cortex-a76.cortex-a55 1568 cname cortexa76cortexa55 1569 tune for cortex-a53 1570 tune flags LDSCHED 1571 architecture armv8.2-a+fp16+dotprod 1572 option crypto add FP_ARMv8 CRYPTO 1573 costs cortex_a57 1574end cpu cortex-a76.cortex-a55 1575 1576# Armv8.4 A-profile Architecture Processors 1577begin cpu neoverse-v1 1578 cname neoversev1 1579 tune for cortex-a57 1580 tune flags LDSCHED 1581 architecture armv8.4-a+fp16+bf16+i8mm 1582 option crypto add FP_ARMv8 CRYPTO 1583 costs cortex_a57 1584 vendor 41 1585 part 0xd40 1586end cpu neoverse-v1 1587 1588# Armv8.5 A-profile Architecture Processors 1589begin cpu neoverse-n2 1590 cname neoversen2 1591 tune for cortex-a57 1592 tune flags LDSCHED 1593 architecture armv8.5-a+fp16+bf16+i8mm 1594 option crypto add FP_ARMv8 CRYPTO 1595 costs cortex_a57 1596 vendor 41 1597 part 0xd49 1598end cpu neoverse-n2 1599 1600# V8 M-profile implementations. 1601begin cpu cortex-m23 1602 cname cortexm23 1603 tune flags LDSCHED 1604 architecture armv8-m.base 1605 costs v6m 1606end cpu cortex-m23 1607 1608begin cpu cortex-m33 1609 cname cortexm33 1610 tune flags LDSCHED 1611 architecture armv8-m.main+dsp+fp 1612 option nofp remove ALL_FP 1613 option nodsp remove armv7em 1614 isa quirk_vlldm 1615 costs v7m 1616end cpu cortex-m33 1617 1618begin cpu cortex-m35p 1619 cname cortexm35p 1620 tune flags LDSCHED 1621 architecture armv8-m.main+dsp+fp 1622 option nofp remove ALL_FP 1623 option nodsp remove armv7em 1624 isa quirk_vlldm 1625 costs v7m 1626end cpu cortex-m35p 1627 1628begin cpu cortex-m55 1629 cname cortexm55 1630 tune flags LDSCHED 1631 architecture armv8.1-m.main+mve.fp+fp.dp 1632 option nomve.fp remove mve_float 1633 option nomve remove mve mve_float 1634 option nofp remove ALL_FP mve_float 1635 option nodsp remove MVE mve_float 1636 isa quirk_no_asmcpu quirk_vlldm 1637 costs v7m 1638 vendor 41 1639end cpu cortex-m55 1640 1641# V8 R-profile implementations. 1642begin cpu cortex-r52 1643 cname cortexr52 1644 tune flags LDSCHED 1645 architecture armv8-r+crc+simd 1646 option nofp.dp remove FP_DBL ALL_SIMD 1647 costs cortex 1648 vendor 41 1649 part d13 1650end cpu cortex-r52 1651 1652begin cpu cortex-r52plus 1653 cname cortexr52plus 1654 tune flags LDSCHED 1655 architecture armv8-r+crc+simd 1656 option nofp.dp remove FP_DBL ALL_SIMD 1657 costs cortex 1658 vendor 41 1659 part d16 1660end cpu cortex-r52plus 1661 1662# FPU entries 1663# format: 1664# begin fpu <name> 1665# isa <isa-flags-list> 1666# end fpu <name> 1667 1668begin fpu vfp 1669 isa VFPv2 FP_DBL 1670end fpu vfp 1671 1672begin fpu vfpv2 1673 isa VFPv2 FP_DBL 1674end fpu vfpv2 1675 1676begin fpu vfpv3 1677 isa VFPv3 FP_D32 1678end fpu vfpv3 1679 1680begin fpu vfpv3-fp16 1681 isa VFPv3 FP_D32 fp16conv 1682end fpu vfpv3-fp16 1683 1684begin fpu vfpv3-d16 1685 isa VFPv3 FP_DBL 1686end fpu vfpv3-d16 1687 1688begin fpu vfpv3-d16-fp16 1689 isa VFPv3 FP_DBL fp16conv 1690end fpu vfpv3-d16-fp16 1691 1692begin fpu vfpv3xd 1693 isa VFPv3 1694end fpu vfpv3xd 1695 1696begin fpu vfpv3xd-fp16 1697 isa VFPv3 fp16conv 1698end fpu vfpv3xd-fp16 1699 1700begin fpu neon 1701 isa VFPv3 NEON 1702end fpu neon 1703 1704begin fpu neon-vfpv3 1705 isa VFPv3 NEON 1706end fpu neon-vfpv3 1707 1708begin fpu neon-fp16 1709 isa VFPv3 NEON fp16conv 1710end fpu neon-fp16 1711 1712begin fpu vfpv4 1713 isa VFPv4 FP_D32 1714end fpu vfpv4 1715 1716begin fpu neon-vfpv4 1717 isa VFPv4 NEON 1718end fpu neon-vfpv4 1719 1720begin fpu vfpv4-d16 1721 isa VFPv4 FP_DBL 1722end fpu vfpv4-d16 1723 1724begin fpu fpv4-sp-d16 1725 isa VFPv4 1726end fpu fpv4-sp-d16 1727 1728begin fpu fpv5-sp-d16 1729 isa FPv5 1730end fpu fpv5-sp-d16 1731 1732begin fpu fpv5-d16 1733 isa FPv5 FP_DBL 1734end fpu fpv5-d16 1735 1736begin fpu fp-armv8 1737 isa FP_ARMv8 1738end fpu fp-armv8 1739 1740begin fpu neon-fp-armv8 1741 isa FP_ARMv8 NEON 1742end fpu neon-fp-armv8 1743 1744begin fpu crypto-neon-fp-armv8 1745 isa FP_ARMv8 CRYPTO 1746end fpu crypto-neon-fp-armv8 1747 1748# Compatibility aliases. 1749begin fpu vfp3 1750 isa VFPv3 FP_D32 1751end fpu vfp3 1752