arm-cpu-data.h revision 1.1.1.1
1/* This file is automatically generated.  DO NOT EDIT! */
2/* Generated from: NetBSD: mknative-gcc,v 1.103 2019/10/24 03:19:14 christos Exp  */
3/* Generated from: NetBSD: mknative.common,v 1.16 2018/04/15 15:13:37 christos Exp  */
4
5/* -*- buffer-read-only: t -*-
6   Generated automatically by parsecpu.awk from arm-cpus.in.
7   Do not edit.
8
9   Copyright (C) 2011-2018 Free Software Foundation, Inc.
10
11   This file is part of GCC.
12
13   GCC is free software; you can redistribute it and/or modify
14   it under the terms of the GNU General Public License as
15   published by the Free Software Foundation; either version 3,
16   or (at your option) any later version.
17
18   GCC is distributed in the hope that it will be useful,
19   but WITHOUT ANY WARRANTY; without even the implied warranty of
20   MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
21   GNU General Public License for more details.
22
23   You should have received a copy of the GNU General Public
24   License along with GCC; see the file COPYING3.  If not see
25   <http://www.gnu.org/licenses/>.  */
26
27static const cpu_tune all_tunes[] =
28{
29  { /* arm2.  */
30    TARGET_CPU_arm2,
31    (TF_CO_PROC | TF_NO_MODE32),
32    &arm_slowmul_tune
33  },
34  { /* arm250.  */
35    TARGET_CPU_arm250,
36    (TF_CO_PROC | TF_NO_MODE32),
37    &arm_slowmul_tune
38  },
39  { /* arm3.  */
40    TARGET_CPU_arm3,
41    (TF_CO_PROC | TF_NO_MODE32),
42    &arm_slowmul_tune
43  },
44  { /* arm6.  */
45    TARGET_CPU_arm6,
46    (TF_CO_PROC),
47    &arm_slowmul_tune
48  },
49  { /* arm60.  */
50    TARGET_CPU_arm60,
51    (TF_CO_PROC),
52    &arm_slowmul_tune
53  },
54  { /* arm600.  */
55    TARGET_CPU_arm600,
56    (TF_CO_PROC | TF_WBUF),
57    &arm_slowmul_tune
58  },
59  { /* arm610.  */
60    TARGET_CPU_arm610,
61    (TF_WBUF),
62    &arm_slowmul_tune
63  },
64  { /* arm620.  */
65    TARGET_CPU_arm620,
66    (TF_CO_PROC | TF_WBUF),
67    &arm_slowmul_tune
68  },
69  { /* arm7.  */
70    TARGET_CPU_arm7,
71    (TF_CO_PROC),
72    &arm_slowmul_tune
73  },
74  { /* arm7d.  */
75    TARGET_CPU_arm7d,
76    (TF_CO_PROC),
77    &arm_slowmul_tune
78  },
79  { /* arm7di.  */
80    TARGET_CPU_arm7di,
81    (TF_CO_PROC),
82    &arm_slowmul_tune
83  },
84  { /* arm70.  */
85    TARGET_CPU_arm70,
86    (TF_CO_PROC),
87    &arm_slowmul_tune
88  },
89  { /* arm700.  */
90    TARGET_CPU_arm700,
91    (TF_CO_PROC | TF_WBUF),
92    &arm_slowmul_tune
93  },
94  { /* arm700i.  */
95    TARGET_CPU_arm700i,
96    (TF_CO_PROC | TF_WBUF),
97    &arm_slowmul_tune
98  },
99  { /* arm710.  */
100    TARGET_CPU_arm710,
101    (TF_WBUF),
102    &arm_slowmul_tune
103  },
104  { /* arm720.  */
105    TARGET_CPU_arm720,
106    (TF_WBUF),
107    &arm_slowmul_tune
108  },
109  { /* arm710c.  */
110    TARGET_CPU_arm710c,
111    (TF_WBUF),
112    &arm_slowmul_tune
113  },
114  { /* arm7100.  */
115    TARGET_CPU_arm7100,
116    (TF_WBUF),
117    &arm_slowmul_tune
118  },
119  { /* arm7500.  */
120    TARGET_CPU_arm7500,
121    (TF_WBUF),
122    &arm_slowmul_tune
123  },
124  { /* arm7500fe.  */
125    TARGET_CPU_arm7500fe,
126    (TF_CO_PROC | TF_WBUF),
127    &arm_slowmul_tune
128  },
129  { /* arm7m.  */
130    TARGET_CPU_arm7m,
131    (TF_CO_PROC),
132    &arm_fastmul_tune
133  },
134  { /* arm7dm.  */
135    TARGET_CPU_arm7dm,
136    (TF_CO_PROC),
137    &arm_fastmul_tune
138  },
139  { /* arm7dmi.  */
140    TARGET_CPU_arm7dmi,
141    (TF_CO_PROC),
142    &arm_fastmul_tune
143  },
144  { /* arm8.  */
145    TARGET_CPU_arm8,
146    (TF_LDSCHED),
147    &arm_fastmul_tune
148  },
149  { /* arm810.  */
150    TARGET_CPU_arm810,
151    (TF_LDSCHED),
152    &arm_fastmul_tune
153  },
154  { /* strongarm.  */
155    TARGET_CPU_strongarm,
156    (TF_LDSCHED | TF_STRONG),
157    &arm_strongarm_tune
158  },
159  { /* strongarm110.  */
160    TARGET_CPU_strongarm110,
161    (TF_LDSCHED | TF_STRONG),
162    &arm_strongarm_tune
163  },
164  { /* strongarm1100.  */
165    TARGET_CPU_strongarm1100,
166    (TF_LDSCHED | TF_STRONG),
167    &arm_strongarm_tune
168  },
169  { /* strongarm1110.  */
170    TARGET_CPU_strongarm1110,
171    (TF_LDSCHED | TF_STRONG),
172    &arm_strongarm_tune
173  },
174  { /* fa526.  */
175    TARGET_CPU_fa526,
176    (TF_LDSCHED),
177    &arm_fastmul_tune
178  },
179  { /* fa626.  */
180    TARGET_CPU_fa626,
181    (TF_LDSCHED),
182    &arm_fastmul_tune
183  },
184  { /* arm7tdmi.  */
185    TARGET_CPU_arm7tdmi,
186    (TF_CO_PROC),
187    &arm_fastmul_tune
188  },
189  { /* arm7tdmi-s.  */
190    TARGET_CPU_arm7tdmis,
191    (TF_CO_PROC),
192    &arm_fastmul_tune
193  },
194  { /* arm710t.  */
195    TARGET_CPU_arm710t,
196    (TF_WBUF),
197    &arm_fastmul_tune
198  },
199  { /* arm720t.  */
200    TARGET_CPU_arm720t,
201    (TF_WBUF),
202    &arm_fastmul_tune
203  },
204  { /* arm740t.  */
205    TARGET_CPU_arm740t,
206    (TF_WBUF),
207    &arm_fastmul_tune
208  },
209  { /* arm9.  */
210    TARGET_CPU_arm9,
211    (TF_LDSCHED),
212    &arm_fastmul_tune
213  },
214  { /* arm9tdmi.  */
215    TARGET_CPU_arm9tdmi,
216    (TF_LDSCHED),
217    &arm_fastmul_tune
218  },
219  { /* arm920.  */
220    TARGET_CPU_arm920,
221    (TF_LDSCHED),
222    &arm_fastmul_tune
223  },
224  { /* arm920t.  */
225    TARGET_CPU_arm920t,
226    (TF_LDSCHED),
227    &arm_fastmul_tune
228  },
229  { /* arm922t.  */
230    TARGET_CPU_arm922t,
231    (TF_LDSCHED),
232    &arm_fastmul_tune
233  },
234  { /* arm940t.  */
235    TARGET_CPU_arm940t,
236    (TF_LDSCHED),
237    &arm_fastmul_tune
238  },
239  { /* ep9312.  */
240    TARGET_CPU_ep9312,
241    (TF_LDSCHED),
242    &arm_fastmul_tune
243  },
244  { /* arm10tdmi.  */
245    TARGET_CPU_arm10tdmi,
246    (TF_LDSCHED),
247    &arm_fastmul_tune
248  },
249  { /* arm1020t.  */
250    TARGET_CPU_arm1020t,
251    (TF_LDSCHED),
252    &arm_fastmul_tune
253  },
254  { /* arm9e.  */
255    TARGET_CPU_arm9e,
256    (TF_LDSCHED),
257    &arm_9e_tune
258  },
259  { /* arm946e-s.  */
260    TARGET_CPU_arm946es,
261    (TF_LDSCHED),
262    &arm_9e_tune
263  },
264  { /* arm966e-s.  */
265    TARGET_CPU_arm966es,
266    (TF_LDSCHED),
267    &arm_9e_tune
268  },
269  { /* arm968e-s.  */
270    TARGET_CPU_arm968es,
271    (TF_LDSCHED),
272    &arm_9e_tune
273  },
274  { /* arm10e.  */
275    TARGET_CPU_arm10e,
276    (TF_LDSCHED),
277    &arm_fastmul_tune
278  },
279  { /* arm1020e.  */
280    TARGET_CPU_arm1020e,
281    (TF_LDSCHED),
282    &arm_fastmul_tune
283  },
284  { /* arm1022e.  */
285    TARGET_CPU_arm1022e,
286    (TF_LDSCHED),
287    &arm_fastmul_tune
288  },
289  { /* xscale.  */
290    TARGET_CPU_xscale,
291    (TF_LDSCHED | TF_XSCALE),
292    &arm_xscale_tune
293  },
294  { /* iwmmxt.  */
295    TARGET_CPU_iwmmxt,
296    (TF_LDSCHED | TF_XSCALE),
297    &arm_xscale_tune
298  },
299  { /* iwmmxt2.  */
300    TARGET_CPU_iwmmxt2,
301    (TF_LDSCHED | TF_XSCALE),
302    &arm_xscale_tune
303  },
304  { /* fa606te.  */
305    TARGET_CPU_fa606te,
306    (TF_LDSCHED),
307    &arm_9e_tune
308  },
309  { /* fa626te.  */
310    TARGET_CPU_fa626te,
311    (TF_LDSCHED),
312    &arm_9e_tune
313  },
314  { /* fmp626.  */
315    TARGET_CPU_fmp626,
316    (TF_LDSCHED),
317    &arm_9e_tune
318  },
319  { /* fa726te.  */
320    TARGET_CPU_fa726te,
321    (TF_LDSCHED),
322    &arm_fa726te_tune
323  },
324  { /* arm926ej-s.  */
325    TARGET_CPU_arm926ejs,
326    (TF_LDSCHED),
327    &arm_9e_tune
328  },
329  { /* arm1026ej-s.  */
330    TARGET_CPU_arm1026ejs,
331    (TF_LDSCHED),
332    &arm_9e_tune
333  },
334  { /* arm1136j-s.  */
335    TARGET_CPU_arm1136js,
336    (TF_LDSCHED),
337    &arm_9e_tune
338  },
339  { /* arm1136jf-s.  */
340    TARGET_CPU_arm1136jfs,
341    (TF_LDSCHED),
342    &arm_9e_tune
343  },
344  { /* arm1176jz-s.  */
345    TARGET_CPU_arm1176jzs,
346    (TF_LDSCHED),
347    &arm_9e_tune
348  },
349  { /* arm1176jzf-s.  */
350    TARGET_CPU_arm1176jzfs,
351    (TF_LDSCHED),
352    &arm_9e_tune
353  },
354  { /* mpcorenovfp.  */
355    TARGET_CPU_mpcorenovfp,
356    (TF_LDSCHED),
357    &arm_9e_tune
358  },
359  { /* mpcore.  */
360    TARGET_CPU_mpcore,
361    (TF_LDSCHED),
362    &arm_9e_tune
363  },
364  { /* arm1156t2-s.  */
365    TARGET_CPU_arm1156t2s,
366    (TF_LDSCHED),
367    &arm_v6t2_tune
368  },
369  { /* arm1156t2f-s.  */
370    TARGET_CPU_arm1156t2fs,
371    (TF_LDSCHED),
372    &arm_v6t2_tune
373  },
374  { /* cortex-m1.  */
375    TARGET_CPU_cortexm1,
376    (TF_LDSCHED),
377    &arm_v6m_tune
378  },
379  { /* cortex-m0.  */
380    TARGET_CPU_cortexm0,
381    (TF_LDSCHED),
382    &arm_v6m_tune
383  },
384  { /* cortex-m0plus.  */
385    TARGET_CPU_cortexm0plus,
386    (TF_LDSCHED),
387    &arm_v6m_tune
388  },
389  { /* cortex-m1.small-multiply.  */
390    TARGET_CPU_cortexm1,
391    (TF_LDSCHED | TF_SMALLMUL),
392    &arm_v6m_tune
393  },
394  { /* cortex-m0.small-multiply.  */
395    TARGET_CPU_cortexm0,
396    (TF_LDSCHED | TF_SMALLMUL),
397    &arm_v6m_tune
398  },
399  { /* cortex-m0plus.small-multiply.  */
400    TARGET_CPU_cortexm0plus,
401    (TF_LDSCHED | TF_SMALLMUL),
402    &arm_v6m_tune
403  },
404  { /* generic-armv7-a.  */
405    TARGET_CPU_genericv7a,
406    (TF_LDSCHED),
407    &arm_cortex_tune
408  },
409  { /* cortex-a5.  */
410    TARGET_CPU_cortexa5,
411    (TF_LDSCHED),
412    &arm_cortex_a5_tune
413  },
414  { /* cortex-a7.  */
415    TARGET_CPU_cortexa7,
416    (TF_LDSCHED),
417    &arm_cortex_a7_tune
418  },
419  { /* cortex-a8.  */
420    TARGET_CPU_cortexa8,
421    (TF_LDSCHED),
422    &arm_cortex_a8_tune
423  },
424  { /* cortex-a9.  */
425    TARGET_CPU_cortexa9,
426    (TF_LDSCHED),
427    &arm_cortex_a9_tune
428  },
429  { /* cortex-a12.  */
430    TARGET_CPU_cortexa17,
431    (TF_LDSCHED),
432    &arm_cortex_a12_tune
433  },
434  { /* cortex-a15.  */
435    TARGET_CPU_cortexa15,
436    (TF_LDSCHED),
437    &arm_cortex_a15_tune
438  },
439  { /* cortex-a17.  */
440    TARGET_CPU_cortexa17,
441    (TF_LDSCHED),
442    &arm_cortex_a12_tune
443  },
444  { /* cortex-r4.  */
445    TARGET_CPU_cortexr4,
446    (TF_LDSCHED),
447    &arm_cortex_tune
448  },
449  { /* cortex-r4f.  */
450    TARGET_CPU_cortexr4f,
451    (TF_LDSCHED),
452    &arm_cortex_tune
453  },
454  { /* cortex-r5.  */
455    TARGET_CPU_cortexr5,
456    (TF_LDSCHED),
457    &arm_cortex_tune
458  },
459  { /* cortex-r7.  */
460    TARGET_CPU_cortexr7,
461    (TF_LDSCHED),
462    &arm_cortex_tune
463  },
464  { /* cortex-r8.  */
465    TARGET_CPU_cortexr7,
466    (TF_LDSCHED),
467    &arm_cortex_tune
468  },
469  { /* cortex-m7.  */
470    TARGET_CPU_cortexm7,
471    (TF_LDSCHED),
472    &arm_cortex_m7_tune
473  },
474  { /* cortex-m4.  */
475    TARGET_CPU_cortexm4,
476    (TF_LDSCHED),
477    &arm_v7m_tune
478  },
479  { /* cortex-m3.  */
480    TARGET_CPU_cortexm3,
481    (TF_LDSCHED),
482    &arm_v7m_tune
483  },
484  { /* marvell-pj4.  */
485    TARGET_CPU_marvell_pj4,
486    (TF_LDSCHED),
487    &arm_marvell_pj4_tune
488  },
489  { /* cortex-a15.cortex-a7.  */
490    TARGET_CPU_cortexa7,
491    (TF_LDSCHED),
492    &arm_cortex_a15_tune
493  },
494  { /* cortex-a17.cortex-a7.  */
495    TARGET_CPU_cortexa7,
496    (TF_LDSCHED),
497    &arm_cortex_a12_tune
498  },
499  { /* cortex-a32.  */
500    TARGET_CPU_cortexa53,
501    (TF_LDSCHED),
502    &arm_cortex_a35_tune
503  },
504  { /* cortex-a35.  */
505    TARGET_CPU_cortexa53,
506    (TF_LDSCHED),
507    &arm_cortex_a35_tune
508  },
509  { /* cortex-a53.  */
510    TARGET_CPU_cortexa53,
511    (TF_LDSCHED),
512    &arm_cortex_a53_tune
513  },
514  { /* cortex-a57.  */
515    TARGET_CPU_cortexa57,
516    (TF_LDSCHED),
517    &arm_cortex_a57_tune
518  },
519  { /* cortex-a72.  */
520    TARGET_CPU_cortexa57,
521    (TF_LDSCHED),
522    &arm_cortex_a57_tune
523  },
524  { /* cortex-a73.  */
525    TARGET_CPU_cortexa57,
526    (TF_LDSCHED),
527    &arm_cortex_a73_tune
528  },
529  { /* exynos-m1.  */
530    TARGET_CPU_exynosm1,
531    (TF_LDSCHED),
532    &arm_exynosm1_tune
533  },
534  { /* xgene1.  */
535    TARGET_CPU_xgene1,
536    (TF_LDSCHED),
537    &arm_xgene1_tune
538  },
539  { /* cortex-a57.cortex-a53.  */
540    TARGET_CPU_cortexa53,
541    (TF_LDSCHED),
542    &arm_cortex_a57_tune
543  },
544  { /* cortex-a72.cortex-a53.  */
545    TARGET_CPU_cortexa53,
546    (TF_LDSCHED),
547    &arm_cortex_a57_tune
548  },
549  { /* cortex-a73.cortex-a35.  */
550    TARGET_CPU_cortexa53,
551    (TF_LDSCHED),
552    &arm_cortex_a73_tune
553  },
554  { /* cortex-a73.cortex-a53.  */
555    TARGET_CPU_cortexa53,
556    (TF_LDSCHED),
557    &arm_cortex_a73_tune
558  },
559  { /* cortex-a55.  */
560    TARGET_CPU_cortexa53,
561    (TF_LDSCHED),
562    &arm_cortex_a53_tune
563  },
564  { /* cortex-a75.  */
565    TARGET_CPU_cortexa57,
566    (TF_LDSCHED),
567    &arm_cortex_a73_tune
568  },
569  { /* cortex-a75.cortex-a55.  */
570    TARGET_CPU_cortexa53,
571    (TF_LDSCHED),
572    &arm_cortex_a73_tune
573  },
574  { /* cortex-m23.  */
575    TARGET_CPU_cortexm23,
576    (TF_LDSCHED),
577    &arm_v6m_tune
578  },
579  { /* cortex-m33.  */
580    TARGET_CPU_cortexm33,
581    (TF_LDSCHED),
582    &arm_v7m_tune
583  },
584  { /* cortex-r52.  */
585    TARGET_CPU_cortexr52,
586    (TF_LDSCHED),
587    &arm_cortex_tune
588  },
589  {TARGET_CPU_arm_none, 0, NULL}
590};
591