1/* 64-bit multiplication support for TILEPro. 2 Copyright (C) 2011-2020 Free Software Foundation, Inc. 3 Contributed by Walter Lee (walt@tilera.com) 4 5 This file is free software; you can redistribute it and/or modify it 6 under the terms of the GNU General Public License as published by the 7 Free Software Foundation; either version 3, or (at your option) any 8 later version. 9 10 This file is distributed in the hope that it will be useful, but 11 WITHOUT ANY WARRANTY; without even the implied warranty of 12 MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the GNU 13 General Public License for more details. 14 15 Under Section 7 of GPL version 3, you are granted additional 16 permissions described in the GCC Runtime Library Exception, version 17 3.1, as published by the Free Software Foundation. 18 19 You should have received a copy of the GNU General Public License and 20 a copy of the GCC Runtime Library Exception along with this program; 21 see the files COPYING3 and COPYING.RUNTIME respectively. If not, see 22 <http://www.gnu.org/licenses/>. */ 23 24/* 64-bit multiplication support. */ 25 26 .file "softmpy.S" 27 28/* Parameters */ 29#define lo0 r9 /* low 32 bits of n0 */ 30#define hi0 r1 /* high 32 bits of n0 */ 31#define lo1 r2 /* low 32 bits of n1 */ 32#define hi1 r3 /* high 32 bits of n1 */ 33 34/* temps */ 35#define result1_a r4 36#define result1_b r5 37 38#define tmp0 r6 39#define tmp0_left_16 r7 40#define tmp1 r8 41 42 .section .text.__muldi3, "ax" 43 .align 8 44 .globl __muldi3 45 .type __muldi3, @function 46__muldi3: 47 { 48 move lo0, r0 /* so we can write "out r0" while "in r0" alive */ 49 mulhl_uu tmp0, lo1, r0 50 } 51 { 52 mulll_uu result1_a, lo1, hi0 53 } 54 { 55 move tmp1, tmp0 56 mulhla_uu tmp0, lo0, lo1 57 } 58 { 59 mulhlsa_uu result1_a, lo1, hi0 60 } 61 { 62 mulll_uu result1_b, lo0, hi1 63 slt_u tmp1, tmp0, tmp1 64 } 65 { 66 mulhlsa_uu result1_a, lo0, hi1 67 shli r0, tmp0, 16 68 } 69 { 70 move tmp0_left_16, r0 71 mulhha_uu result1_b, lo0, lo1 72 } 73 { 74 mullla_uu r0, lo1, lo0 75 shli tmp1, tmp1, 16 76 } 77 { 78 mulhlsa_uu result1_b, hi0, lo1 79 inthh tmp1, tmp1, tmp0 80 } 81 { 82 mulhlsa_uu result1_a, hi1, lo0 83 slt_u tmp0, r0, tmp0_left_16 84 } 85 /* NOTE: this will stall for a cycle here. Oh well. */ 86 { 87 add r1, tmp0, tmp1 88 add result1_a, result1_a, result1_b 89 } 90 { 91 add r1, r1, result1_a 92 jrp lr 93 } 94 .size __muldi3,.-__muldi3 95