constraints.md revision 1.11
1;; Constraint definitions for Xtensa. 2;; Copyright (C) 2006-2020 Free Software Foundation, Inc. 3;; 4;; This file is part of GCC. 5;; 6;; GCC is free software; you can redistribute it and/or modify 7;; it under the terms of the GNU General Public License as published by 8;; the Free Software Foundation; either version 3, or (at your option) 9;; any later version. 10;; 11;; GCC is distributed in the hope that it will be useful, 12;; but WITHOUT ANY WARRANTY; without even the implied warranty of 13;; MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the 14;; GNU General Public License for more details. 15;; 16;; You should have received a copy of the GNU General Public License 17;; along with GCC; see the file COPYING3. If not see 18;; <http://www.gnu.org/licenses/>. 19 20;; Register constraints. 21 22(define_register_constraint "a" "TARGET_WINDOWED_ABI ? GR_REGS : AR_REGS" 23 "General-purpose AR registers @code{a0}-@code{a15}, 24 except @code{a1} (@code{sp}).") 25 26(define_register_constraint "b" "TARGET_BOOLEANS ? BR_REGS : NO_REGS" 27 "Boolean registers @code{b0}-@code{b15}; only available if the Xtensa 28 Boolean Option is configured.") 29 30(define_register_constraint "d" "TARGET_DENSITY ? AR_REGS: NO_REGS" 31 "@internal 32 All AR registers, including sp, but only if the Xtensa Code Density 33 Option is configured.") 34 35(define_register_constraint "f" "TARGET_HARD_FLOAT ? FP_REGS : NO_REGS" 36 "Floating-point registers @code{f0}-@code{f15}; only available if the 37 Xtensa Floating-Pointer Coprocessor is configured.") 38 39(define_register_constraint "q" "TARGET_WINDOWED_ABI ? SP_REG : NO_REGS" 40 "@internal 41 The stack pointer (register @code{a1}).") 42 43(define_register_constraint "A" "TARGET_MAC16 ? ACC_REG : NO_REGS" 44 "The low 32 bits of the accumulator from the Xtensa MAC16 Option.") 45 46(define_register_constraint "B" "TARGET_SEXT ? GR_REGS : NO_REGS" 47 "@internal 48 General-purpose AR registers, but only if the Xtensa Sign Extend 49 Option is configured.") 50 51(define_register_constraint "C" "TARGET_MUL16 ? GR_REGS: NO_REGS" 52 "@internal 53 General-purpose AR registers, but only if the Xtensa 16-Bit Integer 54 Multiply Option is configured.") 55 56(define_register_constraint "D" "TARGET_DENSITY ? (TARGET_WINDOWED_ABI ? GR_REGS : AR_REGS) : NO_REGS" 57 "@internal 58 General-purpose AR registers, but only if the Xtensa Code Density 59 Option is configured.") 60 61(define_register_constraint "W" "TARGET_CONST16 ? GR_REGS: NO_REGS" 62 "@internal 63 General-purpose AR registers, but only if the Xtensa Const16 64 Option is configured.") 65 66;; Integer constant constraints. 67 68(define_constraint "I" 69 "A signed 12-bit integer constant for use with MOVI instructions." 70 (and (match_code "const_int") 71 (match_test "xtensa_simm12b (ival)"))) 72 73(define_constraint "J" 74 "A signed 8-bit integer constant for use with ADDI instructions." 75 (and (match_code "const_int") 76 (match_test "xtensa_simm8 (ival)"))) 77 78(define_constraint "K" 79 "A constant integer that can be an immediate operand of an Xtensa 80 conditional branch instruction that performs a signed comparison or 81 a comparison against zero." 82 (and (match_code "const_int") 83 (match_test "xtensa_b4const_or_zero (ival)"))) 84 85(define_constraint "L" 86 "A constant integer that can be an immediate operand of an Xtensa 87 conditional branch instruction that performs an unsigned comparison." 88 (and (match_code "const_int") 89 (match_test "xtensa_b4constu (ival)"))) 90 91(define_constraint "M" 92 "An integer constant in the range @minus{}32-95 for use with MOVI.N 93 instructions." 94 (and (match_code "const_int") 95 (match_test "ival >= -32 && ival <= 95"))) 96 97(define_constraint "N" 98 "An unsigned 8-bit integer constant shifted left by 8 bits for use 99 with ADDMI instructions." 100 (and (match_code "const_int") 101 (match_test "xtensa_simm8x256 (ival)"))) 102 103(define_constraint "O" 104 "An integer constant that can be used in ADDI.N instructions." 105 (and (match_code "const_int") 106 (match_test "ival == -1 || (ival >= 1 && ival <= 15)"))) 107 108(define_constraint "P" 109 "An integer constant that can be used as a mask value in an EXTUI 110 instruction." 111 (and (match_code "const_int") 112 (match_test "xtensa_mask_immediate (ival)"))) 113 114(define_constraint "Y" 115 "A constant that can be used in relaxed MOVI instructions." 116 (and (match_code "const_int,const_double,const,symbol_ref,label_ref") 117 (match_test "TARGET_AUTO_LITPOOLS"))) 118 119;; Memory constraints. Do not use define_memory_constraint here. Doing so 120;; causes reload to force some constants into the constant pool, but since 121;; the Xtensa constant pool can only be accessed with L32R instructions, it 122;; is always better to just copy a constant into a register. Instead, use 123;; regular constraints but add a check to allow pseudos during reload. 124 125(define_constraint "R" 126 "Memory that can be accessed with a 4-bit unsigned offset from a register." 127 (ior (and (match_code "mem") 128 (match_test "smalloffset_mem_p (op)")) 129 (and (match_code "reg") 130 (match_test "reload_in_progress 131 && REGNO (op) >= FIRST_PSEUDO_REGISTER")))) 132 133(define_constraint "T" 134 "Memory in a literal pool (addressable with an L32R instruction)." 135 (and (match_code "mem") 136 (match_test "!TARGET_CONST16 && constantpool_mem_p (op)"))) 137 138(define_constraint "U" 139 "Memory that is not in a literal pool." 140 (ior (and (match_code "mem") 141 (match_test "! constantpool_mem_p (op)")) 142 (and (match_code "reg") 143 (match_test "reload_in_progress 144 && REGNO (op) >= FIRST_PSEUDO_REGISTER")))) 145