rx.opt revision 1.9 
1; Command line options for the Renesas RX port of GCC.
2; Copyright (C) 2008-2018 Free Software Foundation, Inc.
3; Contributed by Red Hat.
4;
5; This file is part of GCC.
6;
7; GCC is free software; you can redistribute it and/or modify it under
8; the terms of the GNU General Public License as published by the Free
9; Software Foundation; either version 3, or (at your option) any later
10; version.
11;
12; GCC is distributed in the hope that it will be useful, but WITHOUT ANY
13; WARRANTY; without even the implied warranty of MERCHANTABILITY or
14; FITNESS FOR A PARTICULAR PURPOSE.  See the GNU General Public License
15; for more details.
16;
17; You should have received a copy of the GNU General Public License
18; along with GCC; see the file COPYING3.  If not see
19; <http://www.gnu.org/licenses/>.
20;---------------------------------------------------
21
22HeaderInclude
23config/rx/rx-opts.h
24
25; The default is -fpu -m32bit-doubles.
26
27m64bit-doubles
28Target RejectNegative Mask(64BIT_DOUBLES) Report
29Store doubles in 64 bits.
30
31m32bit-doubles
32Target RejectNegative InverseMask(64BIT_DOUBLES) Report
33Stores doubles in 32 bits.  This is the default.
34
35nofpu
36Target RejectNegative Alias(mnofpu)
37Disable the use of RX FPU instructions.  
38
39mnofpu
40Target RejectNegative Mask(NO_USE_FPU) Report Undocumented
41
42fpu
43Target RejectNegative InverseMask(NO_USE_FPU) Report
44Enable the use of RX FPU instructions.  This is the default.
45
46;---------------------------------------------------
47
48mcpu=
49Target RejectNegative Joined Var(rx_cpu_type) Report ToLower Enum(rx_cpu_types) Init(RX600)
50Specify the target RX cpu type.
51
52Enum
53Name(rx_cpu_types) Type(enum rx_cpu_types)
54
55EnumValue
56Enum(rx_cpu_types) String(rx610) Value(RX610)
57
58EnumValue
59Enum(rx_cpu_types) String(rx200) Value(RX200)
60
61EnumValue
62Enum(rx_cpu_types) String(rx600) Value(RX600)
63
64EnumValue
65Enum(rx_cpu_types) String(rx100) Value(RX100)
66
67;---------------------------------------------------
68
69mbig-endian-data
70Target RejectNegative Mask(BIG_ENDIAN_DATA) Report
71Data is stored in big-endian format.
72
73mlittle-endian-data
74Target RejectNegative InverseMask(BIG_ENDIAN_DATA) Report
75Data is stored in little-endian format.  (Default).
76
77;---------------------------------------------------
78
79msmall-data-limit=
80Target RejectNegative Joined UInteger Var(rx_small_data_limit) Init(0)
81Maximum size of global and static variables which can be placed into the small data area.
82
83;---------------------------------------------------
84
85msim
86Target
87Use the simulator runtime.
88
89;---------------------------------------------------
90
91mas100-syntax
92Target Mask(AS100_SYNTAX) Report
93Generate assembler output that is compatible with the Renesas AS100 assembler.  This may restrict some of the compiler's capabilities.  The default is to generate GAS compatible syntax.
94
95;---------------------------------------------------
96
97mrelax
98Target
99Enable linker relaxation.
100
101;---------------------------------------------------
102
103mmax-constant-size=
104Target RejectNegative Joined UInteger Var(rx_max_constant_size) Init(0)
105Maximum size in bytes of constant values allowed as operands.
106
107;---------------------------------------------------
108
109mint-register=
110Target RejectNegative Joined UInteger Var(rx_deferred_options) Defer
111Specifies the number of registers to reserve for interrupt handlers.
112
113;---------------------------------------------------
114
115msave-acc-in-interrupts
116Target Mask(SAVE_ACC_REGISTER)
117Specifies whether interrupt functions should save and restore the accumulator register.
118
119;---------------------------------------------------
120
121mpid
122Target Mask(PID)
123Enables Position-Independent-Data (PID) mode.
124
125;---------------------------------------------------
126
127mwarn-multiple-fast-interrupts
128Target Report Var(rx_warn_multiple_fast_interrupts) Init(1) Warning
129Warn when multiple, different, fast interrupt handlers are in the compilation unit.
130
131;---------------------------------------------------
132
133mgcc-abi
134Target RejectNegative Report Mask(GCC_ABI)
135Enable the use of the old, broken, ABI where all stacked function arguments are aligned to 32-bits.
136
137mrx-abi
138Target RejectNegative Report InverseMask(GCC_ABI)
139Enable the use the standard RX ABI where all stacked function arguments are naturally aligned.  This is the default.
140
141;---------------------------------------------------
142
143mlra
144Target Report Mask(ENABLE_LRA)
145Enable the use of the LRA register allocator.
146
147;---------------------------------------------------
148
149mallow-string-insns
150Target Report Var(rx_allow_string_insns) Init(1)
151Enables or disables the use of the SMOVF, SMOVB, SMOVU, SUNTIL, SWHILE and RMPA instructions.  Enabled by default.
152
153;---------------------------------------------------
154
155mjsr
156Target Report Mask(JSR)
157Always use JSR, never BSR, for calls.
158