riscv-c.c revision 1.1.1.3 
1/* RISC-V-specific code for C family languages.
2   Copyright (C) 2011-2019 Free Software Foundation, Inc.
3   Contributed by Andrew Waterman (andrew@sifive.com).
4
5This file is part of GCC.
6
7GCC is free software; you can redistribute it and/or modify
8it under the terms of the GNU General Public License as published by
9the Free Software Foundation; either version 3, or (at your option)
10any later version.
11
12GCC is distributed in the hope that it will be useful,
13but WITHOUT ANY WARRANTY; without even the implied warranty of
14MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
15GNU General Public License for more details.
16
17You should have received a copy of the GNU General Public License
18along with GCC; see the file COPYING3.  If not see
19<http://www.gnu.org/licenses/>.  */
20
21#define IN_TARGET_CODE 1
22
23#include "config.h"
24#include "system.h"
25#include "coretypes.h"
26#include "tm.h"
27#include "c-family/c-common.h"
28#include "cpplib.h"
29
30#define builtin_define(TXT) cpp_define (pfile, TXT)
31
32/* Implement TARGET_CPU_CPP_BUILTINS.  */
33
34void
35riscv_cpu_cpp_builtins (cpp_reader *pfile)
36{
37  builtin_define ("__riscv");
38
39  if (TARGET_RVC)
40    builtin_define ("__riscv_compressed");
41
42  if (TARGET_RVE)
43    builtin_define ("__riscv_32e");
44
45  if (TARGET_ATOMIC)
46    builtin_define ("__riscv_atomic");
47
48  if (TARGET_MUL)
49    builtin_define ("__riscv_mul");
50  if (TARGET_DIV)
51    builtin_define ("__riscv_div");
52  if (TARGET_DIV && TARGET_MUL)
53    builtin_define ("__riscv_muldiv");
54
55  builtin_define_with_int_value ("__riscv_xlen", UNITS_PER_WORD * 8);
56  if (TARGET_HARD_FLOAT)
57    builtin_define_with_int_value ("__riscv_flen", UNITS_PER_FP_REG * 8);
58
59  if (TARGET_HARD_FLOAT && TARGET_FDIV)
60    {
61      builtin_define ("__riscv_fdiv");
62      builtin_define ("__riscv_fsqrt");
63    }
64
65  switch (riscv_abi)
66    {
67    case ABI_ILP32E:
68      builtin_define ("__riscv_abi_rve");
69      gcc_fallthrough ();
70
71    case ABI_ILP32:
72    case ABI_LP64:
73      builtin_define ("__riscv_float_abi_soft");
74      break;
75
76    case ABI_ILP32F:
77    case ABI_LP64F:
78      builtin_define ("__riscv_float_abi_single");
79      break;
80
81    case ABI_ILP32D:
82    case ABI_LP64D:
83      builtin_define ("__riscv_float_abi_double");
84      break;
85    }
86
87  switch (riscv_cmodel)
88    {
89    case CM_MEDLOW:
90      builtin_define ("__riscv_cmodel_medlow");
91      break;
92
93    case CM_MEDANY:
94      builtin_define ("__riscv_cmodel_medany");
95      break;
96
97    case CM_PIC:
98      builtin_define ("__riscv_cmodel_pic");
99      break;
100    }
101}
102