1;; PIC codegen for RISC-V for GNU compiler. 2;; Copyright (C) 2011-2020 Free Software Foundation, Inc. 3;; Contributed by Andrew Waterman (andrew@sifive.com). 4 5;; This file is part of GCC. 6 7;; GCC is free software; you can redistribute it and/or modify 8;; it under the terms of the GNU General Public License as published by 9;; the Free Software Foundation; either version 3, or (at your option) 10;; any later version. 11 12;; GCC is distributed in the hope that it will be useful, 13;; but WITHOUT ANY WARRANTY; without even the implied warranty of 14;; MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the 15;; GNU General Public License for more details. 16 17;; You should have received a copy of the GNU General Public License 18;; along with GCC; see the file COPYING3. If not see 19;; <http://www.gnu.org/licenses/>. 20 21 22;; Simplify PIC loads to static variables. 23;; These should go away once we figure out how to emit auipc discretely. 24 25(define_insn "*local_pic_load<mode>" 26 [(set (match_operand:ANYI 0 "register_operand" "=r") 27 (mem:ANYI (match_operand 1 "absolute_symbolic_operand" "")))] 28 "USE_LOAD_ADDRESS_MACRO (operands[1])" 29 "<default_load>\t%0,%1" 30 [(set (attr "length") (const_int 8))]) 31 32(define_insn "*local_pic_load_s<SUBX:mode>" 33 [(set (match_operand:SUPERQI 0 "register_operand" "=r") 34 (sign_extend:SUPERQI (mem:SUBX (match_operand 1 "absolute_symbolic_operand" ""))))] 35 "USE_LOAD_ADDRESS_MACRO (operands[1])" 36 "<SUBX:load>\t%0,%1" 37 [(set (attr "length") (const_int 8))]) 38 39(define_insn "*local_pic_load_u<SUBX:mode>" 40 [(set (match_operand:SUPERQI 0 "register_operand" "=r") 41 (zero_extend:SUPERQI (mem:SUBX (match_operand 1 "absolute_symbolic_operand" ""))))] 42 "USE_LOAD_ADDRESS_MACRO (operands[1])" 43 "<SUBX:load>u\t%0,%1" 44 [(set (attr "length") (const_int 8))]) 45 46;; We can support ANYF loads into X register if there is no double support 47;; or if the target is 64-bit. 48 49(define_insn "*local_pic_load<ANYF:mode>" 50 [(set (match_operand:ANYF 0 "register_operand" "=f,*r") 51 (mem:ANYF (match_operand 1 "absolute_symbolic_operand" ""))) 52 (clobber (match_scratch:P 2 "=r,X"))] 53 "TARGET_HARD_FLOAT && USE_LOAD_ADDRESS_MACRO (operands[1]) 54 && (!TARGET_DOUBLE_FLOAT || TARGET_64BIT)" 55 "@ 56 <ANYF:load>\t%0,%1,%2 57 <softload>\t%0,%1" 58 [(set (attr "length") (const_int 8))]) 59 60;; ??? For a 32-bit target with double float, a DF load into a X reg isn't 61;; supported. ld is not valid in that case. Punt for now. Maybe add a split 62;; for this later. 63 64(define_insn "*local_pic_load_32d<ANYF:mode>" 65 [(set (match_operand:ANYF 0 "register_operand" "=f") 66 (mem:ANYF (match_operand 1 "absolute_symbolic_operand" ""))) 67 (clobber (match_scratch:P 2 "=r"))] 68 "TARGET_HARD_FLOAT && USE_LOAD_ADDRESS_MACRO (operands[1]) 69 && (TARGET_DOUBLE_FLOAT && !TARGET_64BIT)" 70 "<ANYF:load>\t%0,%1,%2" 71 [(set (attr "length") (const_int 8))]) 72 73(define_insn "*local_pic_load_sf<mode>" 74 [(set (match_operand:SOFTF 0 "register_operand" "=r") 75 (mem:SOFTF (match_operand 1 "absolute_symbolic_operand" "")))] 76 "!TARGET_HARD_FLOAT && USE_LOAD_ADDRESS_MACRO (operands[1])" 77 "<softload>\t%0,%1" 78 [(set (attr "length") (const_int 8))]) 79 80;; Simplify PIC stores to static variables. 81;; These should go away once we figure out how to emit auipc discretely. 82 83(define_insn "*local_pic_store<ANYI:mode>" 84 [(set (mem:ANYI (match_operand 0 "absolute_symbolic_operand" "")) 85 (match_operand:ANYI 1 "reg_or_0_operand" "rJ")) 86 (clobber (match_scratch:P 2 "=&r"))] 87 "USE_LOAD_ADDRESS_MACRO (operands[0])" 88 "<ANYI:store>\t%z1,%0,%2" 89 [(set (attr "length") (const_int 8))]) 90 91(define_insn "*local_pic_store<ANYF:mode>" 92 [(set (mem:ANYF (match_operand 0 "absolute_symbolic_operand" "")) 93 (match_operand:ANYF 1 "register_operand" "f,*r")) 94 (clobber (match_scratch:P 2 "=r,&r"))] 95 "TARGET_HARD_FLOAT && USE_LOAD_ADDRESS_MACRO (operands[0]) 96 && (!TARGET_DOUBLE_FLOAT || TARGET_64BIT)" 97 "@ 98 <ANYF:store>\t%1,%0,%2 99 <softstore>\t%1,%0,%2" 100 [(set (attr "length") (const_int 8))]) 101 102;; ??? For a 32-bit target with double float, a DF store from a X reg isn't 103;; supported. sd is not valid in that case. Punt for now. Maybe add a split 104;; for this later. 105 106(define_insn "*local_pic_store_32d<ANYF:mode>" 107 [(set (match_operand:ANYF 0 "register_operand" "=f") 108 (mem:ANYF (match_operand 1 "absolute_symbolic_operand" ""))) 109 (clobber (match_scratch:P 2 "=r"))] 110 "TARGET_HARD_FLOAT && USE_LOAD_ADDRESS_MACRO (operands[1]) 111 && (TARGET_DOUBLE_FLOAT && !TARGET_64BIT)" 112 "<ANYF:store>\t%1,%0,%2" 113 [(set (attr "length") (const_int 8))]) 114 115(define_insn "*local_pic_store_sf<SOFTF:mode>" 116 [(set (mem:SOFTF (match_operand 0 "absolute_symbolic_operand" "")) 117 (match_operand:SOFTF 1 "register_operand" "r")) 118 (clobber (match_scratch:P 2 "=&r"))] 119 "!TARGET_HARD_FLOAT && USE_LOAD_ADDRESS_MACRO (operands[0])" 120 "<softstore>\t%1,%0,%2" 121 [(set (attr "length") (const_int 8))]) 122