nds32.opt revision 1.5
1; Options of Andes NDS32 cpu for GNU compiler 2; Copyright (C) 2012-2019 Free Software Foundation, Inc. 3; Contributed by Andes Technology Corporation. 4; 5; This file is part of GCC. 6; 7; GCC is free software; you can redistribute it and/or modify it 8; under the terms of the GNU General Public License as published 9; by the Free Software Foundation; either version 3, or (at your 10; option) any later version. 11; 12; GCC is distributed in the hope that it will be useful, but WITHOUT 13; ANY WARRANTY; without even the implied warranty of MERCHANTABILITY 14; or FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public 15; License for more details. 16; 17; You should have received a copy of the GNU General Public License 18; along with GCC; see the file COPYING3. If not see 19; <http://www.gnu.org/licenses/>. 20 21HeaderInclude 22config/nds32/nds32-opts.h 23 24; --------------------------------------------------------------- 25; The following options are designed for aliasing and compatibility options. 26 27EB 28Target RejectNegative Alias(mbig-endian) 29Generate code in big-endian mode. 30 31EL 32Target RejectNegative Alias(mlittle-endian) 33Generate code in little-endian mode. 34 35mfp-as-gp 36Target RejectNegative Alias(mforce-fp-as-gp) 37Force performing fp-as-gp optimization. 38 39mno-fp-as-gp 40Target RejectNegative Alias(mforbid-fp-as-gp) 41Forbid performing fp-as-gp optimization. 42 43; --------------------------------------------------------------- 44 45mabi= 46Target RejectNegative Joined Enum(abi_type) Var(nds32_abi) Init(TARGET_DEFAULT_ABI) 47Specify which ABI type to generate code for: 2, 2fp+. 48 49Enum 50Name(abi_type) Type(enum abi_type) 51Known ABIs (for use with the -mabi= option): 52 53EnumValue 54Enum(abi_type) String(2) Value(NDS32_ABI_V2) 55 56EnumValue 57Enum(abi_type) String(2fp+) Value(NDS32_ABI_V2_FP_PLUS) 58 59mfloat-abi=soft 60Target RejectNegative Alias(mabi=, 2) 61Specify use soft floating point ABI which mean alias to -mabi=2. 62 63mfloat-abi=hard 64Target RejectNegative Alias(mabi=, 2fp+) 65Specify use soft floating point ABI which mean alias to -mabi=2fp+. 66 67; --------------------------------------------------------------- 68 69mreduced-regs 70Target Report RejectNegative Negative(mfull-regs) Mask(REDUCED_REGS) 71Use reduced-set registers for register allocation. 72 73mfull-regs 74Target Report RejectNegative Negative(mreduced-regs) InverseMask(REDUCED_REGS) 75Use full-set registers for register allocation. 76 77; --------------------------------------------------------------- 78 79malways-align 80Target Mask(ALWAYS_ALIGN) 81Always align function entry, jump target and return address. 82 83malign-functions 84Target Mask(ALIGN_FUNCTION) 85Align function entry to 4 byte. 86 87mbig-endian 88Target Undocumented RejectNegative Negative(mlittle-endian) Mask(BIG_ENDIAN) 89Generate code in big-endian mode. 90 91mlittle-endian 92Target Undocumented RejectNegative Negative(mbig-endian) InverseMask(BIG_ENDIAN) 93Generate code in little-endian mode. 94 95mforce-fp-as-gp 96Target Undocumented Mask(FORCE_FP_AS_GP) 97Prevent $fp being allocated during register allocation so that compiler is able to force performing fp-as-gp optimization. 98 99mforbid-fp-as-gp 100Target Undocumented Mask(FORBID_FP_AS_GP) 101Forbid using $fp to access static and global variables. This option strictly forbids fp-as-gp optimization regardless of '-mforce-fp-as-gp'. 102 103mict-model= 104Target Undocumented RejectNegative Joined Enum(nds32_ict_model_type) Var(nds32_ict_model) Init(ICT_MODEL_SMALL) 105Specify the address generation strategy for ICT call's code model. 106 107Enum 108Name(nds32_ict_model_type) Type(enum nds32_ict_model_type) 109Known cmodel types (for use with the -mict-model= option): 110 111EnumValue 112Enum(nds32_ict_model_type) String(small) Value(ICT_MODEL_SMALL) 113 114EnumValue 115Enum(nds32_ict_model_type) String(large) Value(ICT_MODEL_LARGE) 116 117mcmov 118Target Report Mask(CMOV) 119Generate conditional move instructions. 120 121mhw-abs 122Target Report Mask(HW_ABS) 123Generate hardware abs instructions. 124 125mext-perf 126Target Report Mask(EXT_PERF) 127Generate performance extension instructions. 128 129mext-perf2 130Target Report Mask(EXT_PERF2) 131Generate performance extension version 2 instructions. 132 133mext-string 134Target Report Mask(EXT_STRING) 135Generate string extension instructions. 136 137mext-dsp 138Target Report Mask(EXT_DSP) 139Generate DSP extension instructions. 140 141mv3push 142Target Report Mask(V3PUSH) 143Generate v3 push25/pop25 instructions. 144 145m16-bit 146Target Report Mask(16_BIT) 147Generate 16-bit instructions. 148 149mrelax-hint 150Target Report Mask(RELAX_HINT) 151Insert relax hint for linker to do relaxation. 152 153mvh 154Target Report Mask(VH) Condition(!TARGET_LINUX_ABI) 155Enable Virtual Hosting support. 156 157misr-vector-size= 158Target RejectNegative Joined UInteger Var(nds32_isr_vector_size) Init(NDS32_DEFAULT_ISR_VECTOR_SIZE) 159Specify the size of each interrupt vector, which must be 4 or 16. 160 161misr-secure= 162Target RejectNegative Joined UInteger Var(nds32_isr_secure_level) Init(0) 163Specify the security level of c-isr for the whole file. 164 165mcache-block-size= 166Target RejectNegative Joined UInteger Var(nds32_cache_block_size) Init(NDS32_DEFAULT_CACHE_BLOCK_SIZE) 167Specify the size of each cache block, which must be a power of 2 between 4 and 512. 168 169march= 170Target RejectNegative Joined Enum(nds32_arch_type) Var(nds32_arch_option) Init(ARCH_V3) 171Specify the name of the target architecture. 172 173Enum 174Name(nds32_arch_type) Type(enum nds32_arch_type) 175Known arch types (for use with the -march= option): 176 177EnumValue 178Enum(nds32_arch_type) String(v2) Value(ARCH_V2) 179 180EnumValue 181Enum(nds32_arch_type) String(v3) Value(ARCH_V3) 182 183EnumValue 184Enum(nds32_arch_type) String(v3j) Value(ARCH_V3J) 185 186EnumValue 187Enum(nds32_arch_type) String(v3m) Value(ARCH_V3M) 188 189EnumValue 190Enum(nds32_arch_type) String(v3f) Value(ARCH_V3F) 191 192EnumValue 193Enum(nds32_arch_type) String(v3s) Value(ARCH_V3S) 194 195mcpu= 196Target RejectNegative Joined Enum(nds32_cpu_type) Var(nds32_cpu_option) Init(CPU_N9) 197Specify the cpu for pipeline model. 198 199Enum 200Name(nds32_cpu_type) Type(enum nds32_cpu_type) 201Known cpu types (for use with the -mcpu= option): 202 203EnumValue 204Enum(nds32_cpu_type) String(n6) Value(CPU_N6) 205 206EnumValue 207Enum(nds32_cpu_type) String(n650) Value(CPU_N6) 208 209EnumValue 210Enum(nds32_cpu_type) String(n7) Value(CPU_N7) 211 212EnumValue 213Enum(nds32_cpu_type) String(n705) Value(CPU_N7) 214 215EnumValue 216Enum(nds32_cpu_type) String(n8) Value(CPU_N8) 217 218EnumValue 219Enum(nds32_cpu_type) String(n801) Value(CPU_N8) 220 221EnumValue 222Enum(nds32_cpu_type) String(sn8) Value(CPU_N8) 223 224EnumValue 225Enum(nds32_cpu_type) String(sn801) Value(CPU_N8) 226 227EnumValue 228Enum(nds32_cpu_type) String(s8) Value(CPU_N8) 229 230EnumValue 231Enum(nds32_cpu_type) String(s801) Value(CPU_N8) 232 233EnumValue 234Enum(nds32_cpu_type) String(e8) Value(CPU_E8) 235 236EnumValue 237Enum(nds32_cpu_type) String(e801) Value(CPU_E8) 238 239EnumValue 240Enum(nds32_cpu_type) String(n820) Value(CPU_E8) 241 242EnumValue 243Enum(nds32_cpu_type) String(s830) Value(CPU_E8) 244 245EnumValue 246Enum(nds32_cpu_type) String(e830) Value(CPU_E8) 247 248EnumValue 249Enum(nds32_cpu_type) String(n9) Value(CPU_N9) 250 251EnumValue 252Enum(nds32_cpu_type) String(n903) Value(CPU_N9) 253 254EnumValue 255Enum(nds32_cpu_type) String(n903a) Value(CPU_N9) 256 257EnumValue 258Enum(nds32_cpu_type) String(n968) Value(CPU_N9) 259 260EnumValue 261Enum(nds32_cpu_type) String(n968a) Value(CPU_N9) 262 263EnumValue 264Enum(nds32_cpu_type) String(n10) Value(CPU_N10) 265 266EnumValue 267Enum(nds32_cpu_type) String(n1033) Value(CPU_N10) 268 269EnumValue 270Enum(nds32_cpu_type) String(n1033a) Value(CPU_N10) 271 272EnumValue 273Enum(nds32_cpu_type) String(n1033-fpu) Value(CPU_N10) 274 275EnumValue 276Enum(nds32_cpu_type) String(n1033-spu) Value(CPU_N10) 277 278EnumValue 279Enum(nds32_cpu_type) String(n1068) Value(CPU_N10) 280 281EnumValue 282Enum(nds32_cpu_type) String(n1068a) Value(CPU_N10) 283 284EnumValue 285Enum(nds32_cpu_type) String(n1068-fpu) Value(CPU_N10) 286 287EnumValue 288Enum(nds32_cpu_type) String(n1068a-fpu) Value(CPU_N10) 289 290EnumValue 291Enum(nds32_cpu_type) String(n1068-spu) Value(CPU_N10) 292 293EnumValue 294Enum(nds32_cpu_type) String(n1068a-spu) Value(CPU_N10) 295 296EnumValue 297Enum(nds32_cpu_type) String(d10) Value(CPU_N10) 298 299EnumValue 300Enum(nds32_cpu_type) String(d1088) Value(CPU_N10) 301 302EnumValue 303Enum(nds32_cpu_type) String(d1088-fpu) Value(CPU_N10) 304 305EnumValue 306Enum(nds32_cpu_type) String(d1088-spu) Value(CPU_N10) 307 308EnumValue 309Enum(nds32_cpu_type) Undocumented String(graywolf) Value(CPU_GRAYWOLF) 310 311EnumValue 312Enum(nds32_cpu_type) String(n15) Value(CPU_GRAYWOLF) 313 314EnumValue 315Enum(nds32_cpu_type) String(d15) Value(CPU_GRAYWOLF) 316 317EnumValue 318Enum(nds32_cpu_type) String(n15s) Value(CPU_GRAYWOLF) 319 320EnumValue 321Enum(nds32_cpu_type) String(d15s) Value(CPU_GRAYWOLF) 322 323EnumValue 324Enum(nds32_cpu_type) String(n15f) Value(CPU_GRAYWOLF) 325 326EnumValue 327Enum(nds32_cpu_type) String(d15f) Value(CPU_GRAYWOLF) 328 329EnumValue 330Enum(nds32_cpu_type) String(n12) Value(CPU_N12) 331 332EnumValue 333Enum(nds32_cpu_type) String(n1213) Value(CPU_N12) 334 335EnumValue 336Enum(nds32_cpu_type) String(n1233) Value(CPU_N12) 337 338EnumValue 339Enum(nds32_cpu_type) String(n1233-fpu) Value(CPU_N12) 340 341EnumValue 342Enum(nds32_cpu_type) String(n1233-spu) Value(CPU_N12) 343 344EnumValue 345Enum(nds32_cpu_type) String(n13) Value(CPU_N13) 346 347EnumValue 348Enum(nds32_cpu_type) String(n1337) Value(CPU_N13) 349 350EnumValue 351Enum(nds32_cpu_type) String(n1337-fpu) Value(CPU_N13) 352 353EnumValue 354Enum(nds32_cpu_type) String(n1337-spu) Value(CPU_N13) 355 356EnumValue 357Enum(nds32_cpu_type) String(simple) Value(CPU_SIMPLE) 358 359mconfig-fpu= 360Target RejectNegative Joined Enum(float_reg_number) Var(nds32_fp_regnum) Init(TARGET_CONFIG_FPU_DEFAULT) 361Specify a fpu configuration value from 0 to 7; 0-3 is as FPU spec says, and 4-7 is corresponding to 0-3. 362 363Enum 364Name(float_reg_number) Type(enum float_reg_number) 365Known floating-point number of registers (for use with the -mconfig-fpu= option): 366 367EnumValue 368Enum(float_reg_number) String(0) Value(NDS32_CONFIG_FPU_0) 369 370EnumValue 371Enum(float_reg_number) String(1) Value(NDS32_CONFIG_FPU_1) 372 373EnumValue 374Enum(float_reg_number) String(2) Value(NDS32_CONFIG_FPU_2) 375 376EnumValue 377Enum(float_reg_number) String(3) Value(NDS32_CONFIG_FPU_3) 378 379EnumValue 380Enum(float_reg_number) String(4) Value(NDS32_CONFIG_FPU_4) 381 382EnumValue 383Enum(float_reg_number) String(5) Value(NDS32_CONFIG_FPU_5) 384 385EnumValue 386Enum(float_reg_number) String(6) Value(NDS32_CONFIG_FPU_6) 387 388EnumValue 389Enum(float_reg_number) String(7) Value(NDS32_CONFIG_FPU_7) 390 391mconfig-mul= 392Target RejectNegative Joined Enum(nds32_mul_type) Var(nds32_mul_config) Init(MUL_TYPE_FAST_1) 393Specify configuration of instruction mul: fast1, fast2 or slow. The default is fast1. 394 395Enum 396Name(nds32_mul_type) Type(enum nds32_mul_type) 397 398EnumValue 399Enum(nds32_mul_type) String(fast) Value(MUL_TYPE_FAST_1) 400 401EnumValue 402Enum(nds32_mul_type) String(fast1) Value(MUL_TYPE_FAST_1) 403 404EnumValue 405Enum(nds32_mul_type) String(fast2) Value(MUL_TYPE_FAST_2) 406 407EnumValue 408Enum(nds32_mul_type) String(slow) Value(MUL_TYPE_SLOW) 409 410mconfig-register-ports= 411Target RejectNegative Joined Enum(nds32_register_ports) Var(nds32_register_ports_config) Init(REG_PORT_3R2W) 412Specify how many read/write ports for n9/n10 cores. The value should be 3r2w or 2r1w. 413 414Enum 415Name(nds32_register_ports) Type(enum nds32_register_ports) 416 417EnumValue 418Enum(nds32_register_ports) String(3r2w) Value(REG_PORT_3R2W) 419 420EnumValue 421Enum(nds32_register_ports) String(2r1w) Value(REG_PORT_2R1W) 422 423mctor-dtor 424Target Report 425Enable constructor/destructor feature. 426 427mrelax 428Target Report 429Guide linker to relax instructions. 430 431mext-fpu-fma 432Target Report Mask(EXT_FPU_FMA) 433Generate floating-point multiply-accumulation instructions. 434 435mext-fpu-sp 436Target Report Mask(FPU_SINGLE) 437Generate single-precision floating-point instructions. 438 439mext-fpu-dp 440Target Report Mask(FPU_DOUBLE) 441Generate double-precision floating-point instructions. 442 443mforce-no-ext-dsp 444Target Undocumented Report Mask(FORCE_NO_EXT_DSP) 445Force disable hardware loop, even use -mext-dsp. 446 447msched-prolog-epilog 448Target Var(flag_sched_prolog_epilog) Init(0) 449Permit scheduling of a function's prologue and epilogue sequence. 450 451mret-in-naked-func 452Target Var(flag_ret_in_naked_func) Init(1) 453Generate return instruction in naked function. 454 455malways-save-lp 456Target Var(flag_always_save_lp) Init(0) 457Always save $lp in the stack. 458 459munaligned-access 460Target Report Var(flag_unaligned_access) Init(0) 461Enable unaligned word and halfword accesses to packed data. 462 463minline-asm-r15 464Target Report Var(flag_inline_asm_r15) Init(0) 465Allow use r15 for inline ASM. 466