nds32.opt revision 1.1.1.1 
1; Options of Andes NDS32 cpu for GNU compiler
2; Copyright (C) 2012-2015 Free Software Foundation, Inc.
3; Contributed by Andes Technology Corporation.
4;
5; This file is part of GCC.
6;
7; GCC is free software; you can redistribute it and/or modify it
8; under the terms of the GNU General Public License as published
9; by the Free Software Foundation; either version 3, or (at your
10; option) any later version.
11;
12; GCC is distributed in the hope that it will be useful, but WITHOUT
13; ANY WARRANTY; without even the implied warranty of MERCHANTABILITY
14; or FITNESS FOR A PARTICULAR PURPOSE.  See the GNU General Public
15; License for more details.
16;
17; You should have received a copy of the GNU General Public License
18; along with GCC; see the file COPYING3.  If not see
19; <http://www.gnu.org/licenses/>.
20
21HeaderInclude
22config/nds32/nds32-opts.h
23
24mbig-endian
25Target Report RejectNegative Negative(mlittle-endian) Mask(BIG_ENDIAN)
26Generate code in big-endian mode.
27
28mlittle-endian
29Target Report RejectNegative Negative(mbig-endian) InverseMask(BIG_ENDIAN)
30Generate code in little-endian mode.
31
32mreduced-regs
33Target Report RejectNegative Negative(mfull-regs) Mask(REDUCED_REGS)
34Use reduced-set registers for register allocation.
35
36mfull-regs
37Target Report RejectNegative Negative(mreduced-regs) InverseMask(REDUCED_REGS)
38Use full-set registers for register allocation.
39
40mcmov
41Target Report Mask(CMOV)
42Generate conditional move instructions.
43
44mperf-ext
45Target Report Mask(PERF_EXT)
46Generate performance extension instructions.
47
48mv3push
49Target Report Mask(V3PUSH)
50Generate v3 push25/pop25 instructions.
51
52m16-bit
53Target Report Mask(16_BIT)
54Generate 16-bit instructions.
55
56misr-vector-size=
57Target RejectNegative Joined UInteger Var(nds32_isr_vector_size) Init(NDS32_DEFAULT_ISR_VECTOR_SIZE)
58Specify the size of each interrupt vector, which must be 4 or 16.
59
60mcache-block-size=
61Target RejectNegative Joined UInteger Var(nds32_cache_block_size) Init(NDS32_DEFAULT_CACHE_BLOCK_SIZE)
62Specify the size of each cache block, which must be a power of 2 between 4 and 512.
63
64march=
65Target RejectNegative Joined Enum(nds32_arch_type) Var(nds32_arch_option) Init(ARCH_V3)
66Specify the name of the target architecture.
67
68Enum
69Name(nds32_arch_type) Type(enum nds32_arch_type)
70Known arch types (for use with the -march= option):
71
72EnumValue
73Enum(nds32_arch_type) String(v2) Value(ARCH_V2)
74
75EnumValue
76Enum(nds32_arch_type) String(v3) Value(ARCH_V3)
77
78EnumValue
79Enum(nds32_arch_type) String(v3m) Value(ARCH_V3M)
80
81mcmodel=
82Target RejectNegative Joined Enum(nds32_cmodel_type) Var(nds32_cmodel_option) Init(CMODEL_MEDIUM)
83Specify the address generation strategy for code model.
84
85Enum
86Name(nds32_cmodel_type) Type(enum nds32_cmodel_type)
87Known cmodel types (for use with the -mcmodel= option):
88
89EnumValue
90Enum(nds32_cmodel_type) String(small) Value(CMODEL_SMALL)
91
92EnumValue
93Enum(nds32_cmodel_type) String(medium) Value(CMODEL_MEDIUM)
94
95EnumValue
96Enum(nds32_cmodel_type) String(large) Value(CMODEL_LARGE)
97
98mctor-dtor
99Target Report
100Enable constructor/destructor feature.
101
102mrelax
103Target Report
104Guide linker to relax instructions.
105