mips.opt revision 1.1.1.1.8.2
1; Options for the MIPS port of the compiler
2;
3; Copyright (C) 2005, 2007, 2008 Free Software Foundation, Inc.
4;
5; This file is part of GCC.
6;
7; GCC is free software; you can redistribute it and/or modify it under
8; the terms of the GNU General Public License as published by the Free
9; Software Foundation; either version 3, or (at your option) any later
10; version.
11;
12; GCC is distributed in the hope that it will be useful, but WITHOUT
13; ANY WARRANTY; without even the implied warranty of MERCHANTABILITY
14; or FITNESS FOR A PARTICULAR PURPOSE.  See the GNU General Public
15; License for more details.
16;
17; You should have received a copy of the GNU General Public License
18; along with GCC; see the file COPYING3.  If not see
19; <http://www.gnu.org/licenses/>.
20
21mabi=
22Target RejectNegative Joined
23-mabi=ABI	Generate code that conforms to the given ABI
24
25mabicalls
26Target Report Mask(ABICALLS)
27Generate code that can be used in SVR4-style dynamic objects
28
29mad
30Target Report Var(TARGET_MAD)
31Use PMC-style 'mad' instructions
32
33march=
34Target RejectNegative Joined Var(mips_arch_string)
35-march=ISA	Generate code for the given ISA
36
37mbranch-cost=
38Target RejectNegative Joined UInteger Var(mips_branch_cost)
39-mbranch-cost=COST	Set the cost of branches to roughly COST instructions
40
41mbranch-likely
42Target Report Mask(BRANCHLIKELY)
43Use Branch Likely instructions, overriding the architecture default
44
45mflip-mips16
46Target Report Var(TARGET_FLIP_MIPS16)
47Switch on/off MIPS16 ASE on alternating functions for compiler testing
48
49mcheck-zero-division
50Target Report Mask(CHECK_ZERO_DIV)
51Trap on integer divide by zero
52
53mcode-readable=
54Target RejectNegative Joined
55-mcode-readable=SETTING	Specify when instructions are allowed to access code
56
57mdivide-breaks
58Target Report RejectNegative Mask(DIVIDE_BREAKS)
59Use branch-and-break sequences to check for integer divide by zero
60
61mdivide-traps
62Target Report RejectNegative InverseMask(DIVIDE_BREAKS, DIVIDE_TRAPS)
63Use trap instructions to check for integer divide by zero
64
65mdmx
66Target Report RejectNegative Var(TARGET_MDMX)
67Allow the use of MDMX instructions
68
69mdouble-float
70Target Report RejectNegative InverseMask(SINGLE_FLOAT, DOUBLE_FLOAT)
71Allow hardware floating-point instructions to cover both 32-bit and 64-bit operations
72
73mdsp
74Target Report Mask(DSP)
75Use MIPS-DSP instructions
76
77mdspr2
78Target Report Mask(DSPR2)
79Use MIPS-DSP REV 2 instructions
80
81mdebug
82Target Var(TARGET_DEBUG_MODE) Undocumented
83
84mdebugd
85Target Var(TARGET_DEBUG_D_MODE) Undocumented
86
87meb
88Target Report RejectNegative Mask(BIG_ENDIAN)
89Use big-endian byte order
90
91mel
92Target Report RejectNegative InverseMask(BIG_ENDIAN, LITTLE_ENDIAN)
93Use little-endian byte order
94
95membedded-data
96Target Report Var(TARGET_EMBEDDED_DATA)
97Use ROM instead of RAM
98
99mexplicit-relocs
100Target Report Mask(EXPLICIT_RELOCS)
101Use NewABI-style %reloc() assembly operators
102
103mextern-sdata
104Target Report Var(TARGET_EXTERN_SDATA) Init(1)
105Use -G for data that is not defined by the current object
106
107mfix-r4000
108Target Report Mask(FIX_R4000)
109Work around certain R4000 errata
110
111mfix-r4400
112Target Report Mask(FIX_R4400)
113Work around certain R4400 errata
114
115mfix-r10000
116Target Report Mask(FIX_R10000)
117Work around certain R10000 errata
118
119mfix-sb1
120Target Report Var(TARGET_FIX_SB1)
121Work around errata for early SB-1 revision 2 cores
122
123mfix-vr4120
124Target Report Var(TARGET_FIX_VR4120)
125Work around certain VR4120 errata
126
127mfix-vr4130
128Target Report Var(TARGET_FIX_VR4130)
129Work around VR4130 mflo/mfhi errata
130
131mfix4300
132Target Report Var(TARGET_4300_MUL_FIX)
133Work around an early 4300 hardware bug
134
135mfp-exceptions
136Target Report Mask(FP_EXCEPTIONS)
137FP exceptions are enabled
138
139mfp32
140Target Report RejectNegative InverseMask(FLOAT64)
141Use 32-bit floating-point registers
142
143mfp64
144Target Report RejectNegative Mask(FLOAT64)
145Use 64-bit floating-point registers
146
147mflush-func=
148Target RejectNegative Joined Var(mips_cache_flush_func) Init(CACHE_FLUSH_FUNC)
149-mflush-func=FUNC	Use FUNC to flush the cache before calling stack trampolines
150
151mfused-madd
152Target Report Mask(FUSED_MADD)
153Generate floating-point multiply-add instructions
154
155mgp32
156Target Report RejectNegative InverseMask(64BIT)
157Use 32-bit general registers
158
159mgp64
160Target Report RejectNegative Mask(64BIT)
161Use 64-bit general registers
162
163mgpopt
164Target Report Var(TARGET_GPOPT) Init(1)
165Use GP-relative addressing to access small data
166
167mplt
168Target Report Var(TARGET_PLT)
169When generating -mabicalls code, allow executables to use PLTs and copy relocations
170
171mhard-float
172Target Report RejectNegative InverseMask(SOFT_FLOAT_ABI, HARD_FLOAT_ABI)
173Allow the use of hardware floating-point ABI and instructions
174
175minterlink-mips16
176Target Report Var(TARGET_INTERLINK_MIPS16) Init(0)
177Generate code that can be safely linked with MIPS16 code.
178
179mips
180Target RejectNegative Joined
181-mipsN	Generate code for ISA level N
182
183mips16
184Target Report RejectNegative Mask(MIPS16)
185Generate MIPS16 code
186
187mips3d
188Target Report RejectNegative Mask(MIPS3D)
189Use MIPS-3D instructions
190
191mllsc
192Target Report Mask(LLSC)
193Use ll, sc and sync instructions
194
195mlocal-sdata
196Target Report Var(TARGET_LOCAL_SDATA) Init(1)
197Use -G for object-local data
198
199mlong-calls
200Target Report Var(TARGET_LONG_CALLS)
201Use indirect calls
202
203mlong32
204Target Report RejectNegative InverseMask(LONG64, LONG32)
205Use a 32-bit long type
206
207mlong64
208Target Report RejectNegative Mask(LONG64)
209Use a 64-bit long type
210
211mmcount-ra-address
212Target Report Var(TARGET_MCOUNT_RA_ADDRESS)
213Pass the address of the ra save location to _mcount in $12
214
215mmemcpy
216Target Report Mask(MEMCPY)
217Don't optimize block moves
218
219mmips-tfile
220Target
221Use the mips-tfile postpass
222
223mmt
224Target Report Var(TARGET_MT)
225Allow the use of MT instructions
226
227mno-flush-func
228Target RejectNegative
229Do not use a cache-flushing function before calling stack trampolines
230
231mno-mdmx
232Target Report RejectNegative InverseVar(MDMX)
233Do not use MDMX instructions
234
235mno-mips16
236Target Report RejectNegative InverseMask(MIPS16)
237Generate normal-mode code
238
239mno-mips3d
240Target Report RejectNegative InverseMask(MIPS3D)
241Do not use MIPS-3D instructions
242
243mpaired-single
244Target Report Mask(PAIRED_SINGLE_FLOAT)
245Use paired-single floating-point instructions
246
247mr10k-cache-barrier=
248Target Joined RejectNegative
249-mr10k-cache-barrier=SETTING	Specify when r10k cache barriers should be inserted
250
251mrelax-pic-calls
252Target Report Mask(RELAX_PIC_CALLS)
253Try to allow the linker to turn PIC calls into direct calls
254
255mshared
256Target Report Var(TARGET_SHARED) Init(1)
257When generating -mabicalls code, make the code suitable for use in shared libraries
258
259msingle-float
260Target Report RejectNegative Mask(SINGLE_FLOAT)
261Restrict the use of hardware floating-point instructions to 32-bit operations
262
263msmartmips
264Target Report Mask(SMARTMIPS)
265Use SmartMIPS instructions
266
267msoft-float
268Target Report RejectNegative Mask(SOFT_FLOAT_ABI)
269Prevent the use of all hardware floating-point instructions
270
271msplit-addresses
272Target Report Mask(SPLIT_ADDRESSES)
273Optimize lui/addiu address loads
274
275msym32
276Target Report Var(TARGET_SYM32)
277Assume all symbols have 32-bit values
278
279msynci
280Target Report Mask(SYNCI)
281Use synci instruction to invalidate i-cache
282
283mtune=
284Target RejectNegative Joined Var(mips_tune_string)
285-mtune=PROCESSOR	Optimize the output for PROCESSOR
286
287muninit-const-in-rodata
288Target Report Var(TARGET_UNINIT_CONST_IN_RODATA)
289Put uninitialized constants in ROM (needs -membedded-data)
290
291mvr4130-align
292Target Report Mask(VR4130_ALIGN)
293Perform VR4130-specific alignment optimizations
294
295mxgot
296Target Report Var(TARGET_XGOT)
297Lift restrictions on GOT size
298