i6400.md revision 1.1
1;; DFA-based pipeline description for I6400. 2;; 3;; Copyright (C) 2015-2016 Free Software Foundation, Inc. 4;; 5;; This file is part of GCC. 6;; 7;; GCC is free software; you can redistribute it and/or modify it 8;; under the terms of the GNU General Public License as published 9;; by the Free Software Foundation; either version 3, or (at your 10;; option) any later version. 11 12;; GCC is distributed in the hope that it will be useful, but WITHOUT 13;; ANY WARRANTY; without even the implied warranty of MERCHANTABILITY 14;; or FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public 15;; License for more details. 16 17;; You should have received a copy of the GNU General Public License 18;; along with GCC; see the file COPYING3. If not see 19;; <http://www.gnu.org/licenses/>. 20 21(define_automaton "i6400_int_pipe, i6400_mdu_pipe, i6400_fpu_short_pipe, 22 i6400_fpu_long_pipe") 23 24(define_cpu_unit "i6400_gpmuldiv" "i6400_mdu_pipe") 25(define_cpu_unit "i6400_agen, i6400_alu1, i6400_lsu" "i6400_int_pipe") 26(define_cpu_unit "i6400_control, i6400_ctu, i6400_alu0" "i6400_int_pipe") 27 28;; Short FPU pipeline. 29(define_cpu_unit "i6400_fpu_short" "i6400_fpu_short_pipe") 30 31;; Long FPU pipeline. 32(define_cpu_unit "i6400_fpu_long, i6400_fpu_apu" "i6400_fpu_long_pipe") 33 34(define_reservation "i6400_control_ctu" "i6400_control, i6400_ctu") 35(define_reservation "i6400_control_alu0" "i6400_control, i6400_alu0") 36(define_reservation "i6400_agen_lsu" "i6400_agen, i6400_lsu") 37(define_reservation "i6400_agen_alu1" "i6400_agen, i6400_alu1") 38 39;; 40;; FPU pipe 41;; 42 43;; fabs, fneg 44(define_insn_reservation "i6400_fpu_fabs" 1 45 (and (eq_attr "cpu" "i6400") 46 (eq_attr "type" "fabs,fneg,fmove")) 47 "i6400_fpu_short, i6400_fpu_apu") 48 49;; fadd, fsub, fcvt 50(define_insn_reservation "i6400_fpu_fadd" 4 51 (and (eq_attr "cpu" "i6400") 52 (eq_attr "type" "fadd, fcvt")) 53 "i6400_fpu_long, i6400_fpu_apu") 54 55;; fmul 56(define_insn_reservation "i6400_fpu_fmul" 5 57 (and (eq_attr "cpu" "i6400") 58 (eq_attr "type" "fmul")) 59 "i6400_fpu_long, i6400_fpu_apu") 60 61;; div, sqrt (Double Precision) 62(define_insn_reservation "i6400_fpu_div_df" 30 63 (and (eq_attr "cpu" "i6400") 64 (and (eq_attr "mode" "DF") 65 (eq_attr "type" "fdiv,frdiv,fsqrt,frsqrt"))) 66 "i6400_fpu_long+i6400_fpu_apu*30") 67 68;; div, sqrt (Single Precision) 69(define_insn_reservation "i6400_fpu_div_sf" 22 70 (and (eq_attr "cpu" "i6400") 71 (eq_attr "type" "fdiv,frdiv,fsqrt,frsqrt")) 72 "i6400_fpu_long+i6400_fpu_apu*22") 73 74;; 75;; Integer pipe 76;; 77 78;; and, lui, shifts, seb, seh 79(define_insn_reservation "i6400_int_logical" 1 80 (and (eq_attr "cpu" "i6400") 81 (eq_attr "move_type" "logical,const,andi,sll0,signext")) 82 "i6400_control_alu0 | i6400_agen_alu1") 83 84;; addi, addiu, ori, xori, add, addu, sub, nor 85(define_insn_reservation "i6400_int_add" 1 86 (and (eq_attr "cpu" "i6400") 87 (eq_attr "alu_type" "add,sub,or,xor,nor")) 88 "i6400_control_alu0 | i6400_agen_alu1") 89 90;; shifts, clo, clz, cond move, arith 91(define_insn_reservation "i6400_int_arith" 1 92 (and (eq_attr "cpu" "i6400") 93 (eq_attr "type" "shift,slt,move,clz,condmove,arith")) 94 "i6400_control_alu0 | i6400_agen_alu1") 95 96;; nop 97(define_insn_reservation "i6400_int_nop" 0 98 (and (eq_attr "cpu" "i6400") 99 (eq_attr "type" "nop")) 100 "nothing") 101 102;; mult, multu, mul 103(define_insn_reservation "i6400_int_mult" 4 104 (and (eq_attr "cpu" "i6400") 105 (eq_attr "type" "imul3,imul")) 106 "i6400_gpmuldiv") 107 108;; divide 109(define_insn_reservation "i6400_int_div" 32 110 (and (eq_attr "cpu" "i6400") 111 (eq_attr "type" "idiv")) 112 "i6400_gpmuldiv*32") 113 114;; Load lb, lbu, lh, lhu, lq, lw, lw_i2f, lwxs 115(define_insn_reservation "i6400_int_load" 3 116 (and (eq_attr "cpu" "i6400") 117 (eq_attr "move_type" "load")) 118 "i6400_agen_lsu") 119 120;; store 121(define_insn_reservation "i6400_int_store" 1 122 (and (eq_attr "cpu" "i6400") 123 (eq_attr "move_type" "store")) 124 "i6400_agen_lsu") 125 126;; prefetch 127(define_insn_reservation "i6400_int_prefetch" 3 128 (and (eq_attr "cpu" "i6400") 129 (eq_attr "type" "prefetch")) 130 "i6400_agen_lsu") 131 132;; branch and jump 133(define_insn_reservation "i6400_int_branch" 1 134 (and (eq_attr "cpu" "i6400") 135 (eq_attr "type" "branch,jump")) 136 "i6400_control_ctu") 137 138;; call 139(define_insn_reservation "i6400_int_call" 1 140 (and (eq_attr "cpu" "i6400") 141 (eq_attr "jal" "indirect,direct")) 142 "i6400_control_ctu") 143