1100616Smp;; DFA-based pipeline descriptions for MIPS32 5K processor family 259243Sobrien;; Contributed by David Ung (davidu@mips.com) 359243Sobrien;; and Nigel Stephens (nigel@mips.com) 459243Sobrien;; 559243Sobrien;; References: 659243Sobrien;; "MIPS64 5K Processor Core Family Software User's Manual, 759243Sobrien;; Doc no: MD00012, Rev 2.09, Jan 28, 2005." 859243Sobrien;; 959243Sobrien;; 5Kc - Single issue with no floating point unit. 1059243Sobrien;; 5kf - Separate floating point pipe which can dual-issue with the 1159243Sobrien;; integer pipe. 1259243Sobrien;; 1359243Sobrien;; Copyright (C) 2005-2020 Free Software Foundation, Inc. 1459243Sobrien;; 1559243Sobrien;; This file is part of GCC. 1659243Sobrien;; 1759243Sobrien;; GCC is free software; you can redistribute it and/or modify it 1859243Sobrien;; under the terms of the GNU General Public License as published 1959243Sobrien;; by the Free Software Foundation; either version 3, or (at your 2059243Sobrien;; option) any later version. 2159243Sobrien 2259243Sobrien;; GCC is distributed in the hope that it will be useful, but WITHOUT 2359243Sobrien;; ANY WARRANTY; without even the implied warranty of MERCHANTABILITY 2459243Sobrien;; or FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public 25100616Smp;; License for more details. 2659243Sobrien 2759243Sobrien;; You should have received a copy of the GNU General Public License 2859243Sobrien;; along with GCC; see the file COPYING3. If not see 2959243Sobrien;; <http://www.gnu.org/licenses/>. 3059243Sobrien 3159243Sobrien(define_automaton "r5k_cpu, r5k_mdu, r5k_fpu") 3259243Sobrien 3359243Sobrien;; Integer execution unit. 3459243Sobrien(define_cpu_unit "r5k_ixu_arith" "r5k_cpu") 3559243Sobrien(define_cpu_unit "r5k_ixu_mpydiv" "r5k_mdu") 3659243Sobrien(define_cpu_unit "r5kf_fpu_arith" "r5k_fpu") 3759243Sobrien 3859243Sobrien(define_insn_reservation "r5k_int_load" 2 3959243Sobrien (and (eq_attr "cpu" "5kc,5kf") 4059243Sobrien (eq_attr "type" "load")) 4159243Sobrien "r5k_ixu_arith") 4259243Sobrien 43100616Smp(define_insn_reservation "r5k_int_prefetch" 1 4459243Sobrien (and (eq_attr "cpu" "5kc,5kf") 4559243Sobrien (eq_attr "type" "prefetch,prefetchx")) 4659243Sobrien "r5k_ixu_arith") 4759243Sobrien 4859243Sobrien(define_insn_reservation "r5k_int_store" 1 4959243Sobrien (and (eq_attr "cpu" "5kc,5kf") 5059243Sobrien (eq_attr "type" "store")) 5159243Sobrien "r5k_ixu_arith") 5259243Sobrien 5359243Sobrien;; Divides 5469408Sache(define_insn_reservation "r5k_int_divsi" 34 5559243Sobrien (and (eq_attr "cpu" "5kc,5kf") 5659243Sobrien (and (eq_attr "type" "idiv") 5759243Sobrien (eq_attr "mode" "!DI"))) 5859243Sobrien "r5k_ixu_arith+(r5k_ixu_mpydiv*34)") 5969408Sache 6059243Sobrien(define_insn_reservation "r5k_int_divdi" 66 6159243Sobrien (and (eq_attr "cpu" "5kc,5kf") 6259243Sobrien (and (eq_attr "type" "idiv") 6359243Sobrien (eq_attr "mode" "DI"))) 6459243Sobrien "r5k_ixu_arith+(r5k_ixu_mpydiv*66)") 6559243Sobrien 6659243Sobrien;; 32x32 multiply 6759243Sobrien;; 32x16 is faster, but there's no way to detect this 6859243Sobrien(define_insn_reservation "r5k_int_mult" 2 6959243Sobrien (and (eq_attr "cpu" "5kc,5kf") 7059243Sobrien (and (eq_attr "type" "imul,imadd") 7159243Sobrien (eq_attr "mode" "SI"))) 7259243Sobrien "r5k_ixu_arith+(r5k_ixu_mpydiv*2)") 7359243Sobrien 7459243Sobrien;; 64x64 multiply 7559243Sobrien(define_insn_reservation "r5k_int_mult_64" 9 7659243Sobrien (and (eq_attr "cpu" "5kc,5kf") 7759243Sobrien (and (eq_attr "type" "imul,imadd") 7859243Sobrien (eq_attr "mode" "DI"))) 7959243Sobrien "r5k_ixu_arith+(r5k_ixu_mpydiv*2)") 8059243Sobrien 8159243Sobrien;; 3 operand MUL 32x32 8259243Sobrien(define_insn_reservation "r5k_int_mul" 4 8359243Sobrien (and (eq_attr "cpu" "5kc,5kf") 8459243Sobrien (and (eq_attr "type" "imul3") 8559243Sobrien (eq_attr "mode" "SI"))) 8659243Sobrien "r5k_ixu_arith+(r5k_ixu_mpydiv*2)") 8759243Sobrien 8859243Sobrien;; Move to HI/LO -> MADD/MSUB,MFHI/MFLO has a 1 cycle latency. 8959243Sobrien(define_insn_reservation "r5k_int_mthilo" 1 9059243Sobrien (and (eq_attr "cpu" "5kc,5kf") 9159243Sobrien (eq_attr "type" "mthi,mtlo")) 9259243Sobrien "r5k_ixu_arith+r5k_ixu_mpydiv") 9359243Sobrien 9459243Sobrien;; Move from HI/LO -> integer operation has a 2 cycle latency. 9559243Sobrien(define_insn_reservation "r5k_int_mfhilo" 2 9659243Sobrien (and (eq_attr "cpu" "5kc,5kf") 9759243Sobrien (eq_attr "type" "mfhi,mflo")) 9859243Sobrien "r5k_ixu_arith+r5k_ixu_mpydiv") 9959243Sobrien 10059243Sobrien;; All other integer insns. 10159243Sobrien(define_insn_reservation "r5k_int_alu" 1 10259243Sobrien (and (eq_attr "cpu" "5kc,5kf") 10359243Sobrien (eq_attr "type" "arith,condmove,const,logical,move,nop,shift,signext,slt")) 10459243Sobrien "r5k_ixu_arith") 10559243Sobrien 10659243Sobrien(define_insn_reservation "r5k_int_branch" 1 10759243Sobrien (and (eq_attr "cpu" "5kc,5kf") 10859243Sobrien (eq_attr "type" "branch")) 10959243Sobrien "r5k_ixu_arith") 11059243Sobrien 11159243Sobrien;; JR/JALR always cause one pipeline bubble because of interlock. 11259243Sobrien(define_insn_reservation "r5k_int_jump" 2 11359243Sobrien (and (eq_attr "cpu" "5kc,5kf") 11459243Sobrien (eq_attr "type" "jump,call")) 11559243Sobrien "r5k_ixu_arith") 11659243Sobrien 11759243Sobrien;; Any -> JR/JALR (without dependency) : 1 clock issue delay 11859243Sobrien;; Any -> JR/JALR (with dependency) : 2 clock issue delay 11959243Sobrien;; load -> JR/JALR (with dependency) : 3 clock issue delay 12059243Sobrien;; mfhilo -> JR/JALR (with dependency) : 3 clock issue delay 12159243Sobrien;; mul -> JR/JALR (with dependency) : 3 clock issue delay 12259243Sobrien(define_bypass 2 "r5k_int_alu" "r5k_int_jump") 12359243Sobrien(define_bypass 3 "r5k_int_load" "r5k_int_jump") 12459243Sobrien(define_bypass 3 "r5k_int_mfhilo" "r5k_int_jump") 12559243Sobrien(define_bypass 3 "r5k_int_mul" "r5k_int_jump") 12659243Sobrien 12759243Sobrien;; Unknown or multi - single issue 12859243Sobrien(define_insn_reservation "r5k_int_unknown" 1 12959243Sobrien (and (eq_attr "cpu" "5kc,5kf") 13059243Sobrien (eq_attr "type" "unknown,multi,atomic,syncloop")) 13159243Sobrien "r5k_ixu_arith+r5k_ixu_mpydiv") 13259243Sobrien 13359243Sobrien 13459243Sobrien;; Floating Point Instructions 13559243Sobrien;; The 5Kf is a partial dual-issue cpu which can dual issue an integer 13659243Sobrien;; and floating-point instruction in the same cycle. 13759243Sobrien 13859243Sobrien;; fadd, fabs, fneg 13959243Sobrien(define_insn_reservation "r5kf_fadd" 4 14059243Sobrien (and (eq_attr "cpu" "5kf") 14159243Sobrien (eq_attr "type" "fadd,fabs,fneg")) 14259243Sobrien "r5kf_fpu_arith") 14359243Sobrien 14459243Sobrien;; fmove, fcmove 14559243Sobrien(define_insn_reservation "r5kf_fmove" 4 14659243Sobrien (and (eq_attr "cpu" "5kf") 14759243Sobrien (eq_attr "type" "fmove")) 14859243Sobrien "r5kf_fpu_arith") 14959243Sobrien 15059243Sobrien;; fload 15159243Sobrien(define_insn_reservation "r5kf_fload" 3 15259243Sobrien (and (eq_attr "cpu" "5kf") 15359243Sobrien (eq_attr "type" "fpload,fpidxload")) 15459243Sobrien "r5kf_fpu_arith") 15559243Sobrien 15659243Sobrien;; fstore 15759243Sobrien(define_insn_reservation "r5kf_fstore" 1 15859243Sobrien (and (eq_attr "cpu" "5kf") 15959243Sobrien (eq_attr "type" "fpstore")) 16059243Sobrien "r5kf_fpu_arith") 16159243Sobrien 16259243Sobrien;; fmul, fmadd 16359243Sobrien(define_insn_reservation "r5kf_fmul_sf" 4 16459243Sobrien (and (eq_attr "cpu" "5kf") 16559243Sobrien (and (eq_attr "type" "fmul,fmadd") 16659243Sobrien (eq_attr "mode" "SF"))) 16759243Sobrien "r5kf_fpu_arith") 16859243Sobrien 16959243Sobrien(define_insn_reservation "r5kf_fmul_df" 5 17059243Sobrien (and (eq_attr "cpu" "5kf") 17159243Sobrien (and (eq_attr "type" "fmul,fmadd") 17259243Sobrien (eq_attr "mode" "DF"))) 17359243Sobrien "r5kf_fpu_arith*2") 17459243Sobrien 17559243Sobrien;; fdiv, fsqrt, frsqrt 17659243Sobrien(define_insn_reservation "r5kf_fdiv_sf" 17 17759243Sobrien (and (eq_attr "cpu" "5kf") 17859243Sobrien (and (eq_attr "type" "fdiv,fsqrt,frsqrt") 17959243Sobrien (eq_attr "mode" "SF"))) 18059243Sobrien "r5kf_fpu_arith*14") 18159243Sobrien 18259243Sobrien(define_insn_reservation "r5kf_fdiv_df" 32 18359243Sobrien (and (eq_attr "cpu" "5kf") 18459243Sobrien (and (eq_attr "type" "fdiv,fsqrt") 18559243Sobrien (eq_attr "mode" "DF"))) 18659243Sobrien "r5kf_fpu_arith*29") 18759243Sobrien 18859243Sobrien;; frsqrt 18959243Sobrien(define_insn_reservation "r5kf_frsqrt_df" 35 19059243Sobrien (and (eq_attr "cpu" "5kf") 19159243Sobrien (and (eq_attr "type" "frsqrt") 19259243Sobrien (eq_attr "mode" "DF"))) 19359243Sobrien "r5kf_fpu_arith*31") 19459243Sobrien 19559243Sobrien;; fcmp 19659243Sobrien(define_insn_reservation "r5kf_fcmp" 2 19759243Sobrien (and (eq_attr "cpu" "5kf") 19859243Sobrien (eq_attr "type" "fcmp")) 19959243Sobrien "r5kf_fpu_arith") 20059243Sobrien 20159243Sobrien;; fcmp -> movf.fmt & movt.fmt bypass (dependency must be on condition) 20259243Sobrien(define_bypass 1 "r5kf_fcmp" "r5kf_fmove") 20359243Sobrien 20459243Sobrien;; fcvt (cvt.d.s, cvt.[sd].[wl] 20559243Sobrien(define_insn_reservation "r5kf_fcvt_d2s" 4 20659243Sobrien (and (eq_attr "cpu" "5kf") 20759243Sobrien (and (eq_attr "type" "fcvt") 20859243Sobrien (eq_attr "cnv_mode" "I2S,I2D,S2D"))) 20959243Sobrien "r5kf_fpu_arith") 21059243Sobrien 21159243Sobrien;; fcvt (cvt.s.d) 21259243Sobrien(define_insn_reservation "r5kf_fcvt_s2d" 6 21359243Sobrien (and (eq_attr "cpu" "5kc") 21459243Sobrien (and (eq_attr "type" "fcvt") 21559243Sobrien (eq_attr "cnv_mode" "D2S"))) 21659243Sobrien "r5kf_fpu_arith") 21759243Sobrien 21859243Sobrien;; fcvt (cvt.[wl].[sd], etc) 21959243Sobrien(define_insn_reservation "r5kf_fcvt_f2i" 5 22059243Sobrien (and (eq_attr "cpu" "5kf") 22159243Sobrien (and (eq_attr "type" "fcvt") 22259243Sobrien (eq_attr "cnv_mode" "S2I,D2I"))) 22359243Sobrien "r5kf_fpu_arith") 22459243Sobrien 22559243Sobrien;; fxfer (mfc1, mfhc1, mtc1, mthc1) - single issue 22659243Sobrien(define_insn_reservation "r5kf_fxfer" 2 22759243Sobrien (and (eq_attr "cpu" "5kf") 22859243Sobrien (eq_attr "type" "mfc,mtc")) 22959243Sobrien "r5k_ixu_arith+r5kf_fpu_arith") 23059243Sobrien