1; Options for the MicroBlaze port of the compiler
2;
3; Copyright (C) 2009-2020 Free Software Foundation, Inc.
4;
5; Contributed by Michael Eager <eager@eagercon.com>.
6;
7; This file is part of GCC.
8;
9; GCC is free software; you can redistribute it and/or modify it under
10; the terms of the GNU General Public License as published by the Free
11; Software Foundation; either version 3, or (at your option) any later
12; version.
13;
14; GCC is distributed in the hope that it will be useful, but WITHOUT
15; ANY WARRANTY; without even the implied warranty of MERCHANTABILITY
16; or FITNESS FOR A PARTICULAR PURPOSE.  See the GNU General Public
17; License for more details.
18;
19; You should have received a copy of the GNU General Public License
20; along with GCC; see the file COPYING3.  If not see
21; <http://www.gnu.org/licenses/>.  */
22
23Zxl-mode-bootstrap
24Driver
25
26Zxl-mode-executable
27Driver
28
29Zxl-mode-novectors
30Driver
31
32Zxl-mode-xilkernel
33Driver
34
35Zxl-mode-xmdstub
36Driver
37
38msoft-float
39Target Report RejectNegative Mask(SOFT_FLOAT)
40Use software emulation for floating point (default).
41
42mhard-float
43Target Report RejectNegative InverseMask(SOFT_FLOAT, HARD_FLOAT)
44Use hardware floating point instructions.
45
46msmall-divides
47Target Mask(SMALL_DIVIDES)
48Use table lookup optimization for small signed integer divisions.
49
50mcpu=
51Target RejectNegative Joined Var(microblaze_select_cpu)
52-mcpu=PROCESSOR		Use features of and schedule code for given CPU.
53
54mmemcpy
55Target Mask(MEMCPY)
56Don't optimize block moves, use memcpy.
57
58mbig-endian
59Target Report RejectNegative InverseMask(LITTLE_ENDIAN)
60Assume target CPU is configured as big endian.
61
62mlittle-endian
63Target Report RejectNegative Mask(LITTLE_ENDIAN)
64Assume target CPU is configured as little endian.
65
66mxl-soft-mul
67Target Mask(SOFT_MUL)
68Use the soft multiply emulation (default).
69
70mxl-reorder
71Target Var(TARGET_REORDER) Init(2)
72Use reorder instructions (swap and byte reversed load/store) (default).
73
74mxl-soft-div
75Target Mask(SOFT_DIV)
76Use the software emulation for divides (default).
77
78mxl-barrel-shift
79Target Mask(BARREL_SHIFT)
80Use the hardware barrel shifter instead of emulation.
81
82mxl-pattern-compare
83Target Mask(PATTERN_COMPARE)
84Use pattern compare instructions.
85
86mxl-stack-check
87Target Mask(STACK_CHECK) Warn(%qs is deprecated; use -fstack-check)
88Check for stack overflow at runtime.
89
90mxl-gp-opt
91Target Mask(XLGPOPT)
92Use GP relative sdata/sbss sections.
93
94mno-clearbss
95Target RejectNegative Var(flag_zero_initialized_in_bss, 0) Warn(%qs is deprecated; use -fno-zero-initialized-in-bss)
96Clear the BSS to zero and place zero initialized in BSS.
97
98mxl-multiply-high
99Target Mask(MULTIPLY_HIGH)
100Use multiply high instructions for high part of 32x32 multiply.
101
102mxl-float-convert
103Target Mask(FLOAT_CONVERT)
104Use hardware floating point conversion instructions.
105
106mxl-float-sqrt
107Target Mask(FLOAT_SQRT)
108Use hardware floating point square root instruction.
109
110mxl-mode-executable
111Target Mask(XL_MODE_EXECUTABLE)
112Description for mxl-mode-executable.
113
114mxl-mode-xmdstub
115Target Mask(XL_MODE_XMDSTUB)
116Description for mxl-mode-xmdstub.
117
118mxl-mode-bootstrap
119Target Mask(XL_MODE_BOOTSTRAP)
120Description for mxl-mode-bootstrap.
121
122mxl-mode-novectors
123Target Mask(XL_MODE_NOVECTORS)
124Description for mxl-mode-novectors.
125
126mxl-prefetch
127Target Mask(PREFETCH)
128Use hardware prefetch instruction.
129
130mpic-data-is-text-relative
131Target Mask(PIC_DATA_TEXT_REL)
132Data referenced by offset from start of text instead of GOT (with -fPIC/-fPIE).
133
134mxl-mode-xilkernel
135Target
136