i386.opt revision 1.10
1; Options for the IA-32 and AMD64 ports of the compiler. 2 3; Copyright (C) 2005-2017 Free Software Foundation, Inc. 4; 5; This file is part of GCC. 6; 7; GCC is free software; you can redistribute it and/or modify it under 8; the terms of the GNU General Public License as published by the Free 9; Software Foundation; either version 3, or (at your option) any later 10; version. 11; 12; GCC is distributed in the hope that it will be useful, but WITHOUT ANY 13; WARRANTY; without even the implied warranty of MERCHANTABILITY or 14; FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License 15; for more details. 16; 17; You should have received a copy of the GNU General Public License 18; along with GCC; see the file COPYING3. If not see 19; <http://www.gnu.org/licenses/>. 20 21HeaderInclude 22config/i386/i386-opts.h 23 24; Bit flags that specify the ISA we are compiling for. 25Variable 26HOST_WIDE_INT ix86_isa_flags = TARGET_64BIT_DEFAULT | TARGET_SUBTARGET_ISA_DEFAULT 27 28Variable 29HOST_WIDE_INT ix86_isa_flags2 = 0 30 31; A mask of ix86_isa_flags that includes bit X if X was set or cleared 32; on the command line. 33Variable 34HOST_WIDE_INT ix86_isa_flags_explicit 35 36Variable 37HOST_WIDE_INT ix86_isa_flags2_explicit 38 39; Additional target flags 40Variable 41int ix86_target_flags 42 43TargetVariable 44int recip_mask = RECIP_MASK_DEFAULT 45 46Variable 47int recip_mask_explicit 48 49TargetSave 50int x_recip_mask_explicit 51 52;; Definitions to add to the cl_target_option structure 53;; -march= processor 54TargetSave 55unsigned char arch 56 57;; -mtune= processor 58TargetSave 59unsigned char tune 60 61;; -march= processor-string 62TargetSave 63const char *x_ix86_arch_string 64 65;; -mtune= processor-string 66TargetSave 67const char *x_ix86_tune_string 68 69;; CPU schedule model 70TargetSave 71unsigned char schedule 72 73;; True if processor has SSE prefetch instruction. 74TargetSave 75unsigned char prefetch_sse 76 77;; branch cost 78TargetSave 79unsigned char branch_cost 80 81;; which flags were passed by the user 82TargetSave 83HOST_WIDE_INT x_ix86_isa_flags2_explicit 84 85;; which flags were passed by the user 86TargetSave 87HOST_WIDE_INT x_ix86_isa_flags_explicit 88 89;; whether -mtune was not specified 90TargetSave 91unsigned char tune_defaulted 92 93;; whether -march was specified 94TargetSave 95unsigned char arch_specified 96 97;; -mcmodel= model 98TargetSave 99enum cmodel x_ix86_cmodel 100 101;; -mabi= 102TargetSave 103enum calling_abi x_ix86_abi 104 105;; -masm= 106TargetSave 107enum asm_dialect x_ix86_asm_dialect 108 109;; -mbranch-cost= 110TargetSave 111int x_ix86_branch_cost 112 113;; -mdump-tune-features= 114TargetSave 115int x_ix86_dump_tunes 116 117;; -mstackrealign= 118TargetSave 119int x_ix86_force_align_arg_pointer 120 121;; -mforce-drap= 122TargetSave 123int x_ix86_force_drap 124 125;; -mincoming-stack-boundary= 126TargetSave 127int x_ix86_incoming_stack_boundary_arg 128 129;; -maddress-mode= 130TargetSave 131enum pmode x_ix86_pmode 132 133;; -mpreferred-stack-boundary= 134TargetSave 135int x_ix86_preferred_stack_boundary_arg 136 137;; -mrecip= 138TargetSave 139const char *x_ix86_recip_name 140 141;; -mregparm= 142TargetSave 143int x_ix86_regparm 144 145;; -mlarge-data-threshold= 146TargetSave 147int x_ix86_section_threshold 148 149;; -msse2avx= 150TargetSave 151int x_ix86_sse2avx 152 153;; -mstack-protector-guard= 154TargetSave 155enum stack_protector_guard x_ix86_stack_protector_guard 156 157;; -mstringop-strategy= 158TargetSave 159enum stringop_alg x_ix86_stringop_alg 160 161;; -mtls-dialect= 162TargetSave 163enum tls_dialect x_ix86_tls_dialect 164 165;; -mtune-ctrl= 166TargetSave 167const char *x_ix86_tune_ctrl_string 168 169;; -mmemcpy-strategy= 170TargetSave 171const char *x_ix86_tune_memcpy_strategy 172 173;; -mmemset-strategy= 174TargetSave 175const char *x_ix86_tune_memset_strategy 176 177;; -mno-default= 178TargetSave 179int x_ix86_tune_no_default 180 181;; -mveclibabi= 182TargetSave 183enum ix86_veclibabi x_ix86_veclibabi_type 184 185;; x86 options 186m128bit-long-double 187Target RejectNegative Report Mask(128BIT_LONG_DOUBLE) Save 188sizeof(long double) is 16. 189 190m80387 191Target Report Mask(80387) Save 192Use hardware fp. 193 194m96bit-long-double 195Target RejectNegative Report InverseMask(128BIT_LONG_DOUBLE) Save 196sizeof(long double) is 12. 197 198mlong-double-80 199Target Report RejectNegative Negative(mlong-double-64) InverseMask(LONG_DOUBLE_64) Save 200Use 80-bit long double. 201 202mlong-double-64 203Target Report RejectNegative Negative(mlong-double-128) Mask(LONG_DOUBLE_64) InverseMask(LONG_DOUBLE_128) Save 204Use 64-bit long double. 205 206mlong-double-128 207Target Report RejectNegative Negative(mlong-double-80) Mask(LONG_DOUBLE_128) InverseMask(LONG_DOUBLE_64) Save 208Use 128-bit long double. 209 210maccumulate-outgoing-args 211Target Report Mask(ACCUMULATE_OUTGOING_ARGS) Save 212Reserve space for outgoing arguments in the function prologue. 213 214malign-double 215Target Report Mask(ALIGN_DOUBLE) Save 216Align some doubles on dword boundary. 217 218malign-functions= 219Target RejectNegative Joined UInteger 220Function starts are aligned to this power of 2. 221 222malign-jumps= 223Target RejectNegative Joined UInteger 224Jump targets are aligned to this power of 2. 225 226malign-loops= 227Target RejectNegative Joined UInteger 228Loop code aligned to this power of 2. 229 230malign-stringops 231Target RejectNegative Report InverseMask(NO_ALIGN_STRINGOPS, ALIGN_STRINGOPS) Save 232Align destination of the string operations. 233 234malign-data= 235Target RejectNegative Joined Var(ix86_align_data_type) Enum(ix86_align_data) Init(ix86_align_data_type_compat) 236Use the given data alignment. 237 238Enum 239Name(ix86_align_data) Type(enum ix86_align_data) 240Known data alignment choices (for use with the -malign-data= option): 241 242EnumValue 243Enum(ix86_align_data) String(compat) Value(ix86_align_data_type_compat) 244 245EnumValue 246Enum(ix86_align_data) String(abi) Value(ix86_align_data_type_abi) 247 248EnumValue 249Enum(ix86_align_data) String(cacheline) Value(ix86_align_data_type_cacheline) 250 251march= 252Target RejectNegative Joined Var(ix86_arch_string) 253Generate code for given CPU. 254 255masm= 256Target RejectNegative Joined Enum(asm_dialect) Var(ix86_asm_dialect) Init(ASM_ATT) 257Use given assembler dialect. 258 259Enum 260Name(asm_dialect) Type(enum asm_dialect) 261Known assembler dialects (for use with the -masm= option): 262 263EnumValue 264Enum(asm_dialect) String(intel) Value(ASM_INTEL) 265 266EnumValue 267Enum(asm_dialect) String(att) Value(ASM_ATT) 268 269mbranch-cost= 270Target RejectNegative Joined UInteger Var(ix86_branch_cost) 271Branches are this expensive (1-5, arbitrary units). 272 273mlarge-data-threshold= 274Target RejectNegative Joined UInteger Var(ix86_section_threshold) Init(DEFAULT_LARGE_SECTION_THRESHOLD) 275-mlarge-data-threshold=<number> Data greater than given threshold will go into .ldata section in x86-64 medium model. 276 277mcmodel= 278Target RejectNegative Joined Enum(cmodel) Var(ix86_cmodel) Init(CM_32) 279Use given x86-64 code model. 280 281Enum 282Name(cmodel) Type(enum cmodel) 283Known code models (for use with the -mcmodel= option): 284 285EnumValue 286Enum(cmodel) String(small) Value(CM_SMALL) 287 288EnumValue 289Enum(cmodel) String(medium) Value(CM_MEDIUM) 290 291EnumValue 292Enum(cmodel) String(large) Value(CM_LARGE) 293 294EnumValue 295Enum(cmodel) String(32) Value(CM_32) 296 297EnumValue 298Enum(cmodel) String(kernel) Value(CM_KERNEL) 299 300maddress-mode= 301Target RejectNegative Joined Enum(pmode) Var(ix86_pmode) Init(PMODE_SI) 302Use given address mode. 303 304Enum 305Name(pmode) Type(enum pmode) 306Known address mode (for use with the -maddress-mode= option): 307 308EnumValue 309Enum(pmode) String(short) Value(PMODE_SI) 310 311EnumValue 312Enum(pmode) String(long) Value(PMODE_DI) 313 314mcpu= 315Target RejectNegative Joined Undocumented Alias(mtune=) Warn(%<-mcpu=%> is deprecated; use %<-mtune=%> or %<-march=%> instead) 316 317mfancy-math-387 318Target RejectNegative Report InverseMask(NO_FANCY_MATH_387, USE_FANCY_MATH_387) Save 319Generate sin, cos, sqrt for FPU. 320 321mforce-drap 322Target Report Var(ix86_force_drap) 323Always use Dynamic Realigned Argument Pointer (DRAP) to realign stack. 324 325mfp-ret-in-387 326Target Report Mask(FLOAT_RETURNS) Save 327Return values of functions in FPU registers. 328 329mfpmath= 330Target RejectNegative Joined Var(ix86_fpmath) Enum(fpmath_unit) Init(FPMATH_387) Save 331Generate floating point mathematics using given instruction set. 332 333Enum 334Name(fpmath_unit) Type(enum fpmath_unit) 335Valid arguments to -mfpmath=: 336 337EnumValue 338Enum(fpmath_unit) String(387) Value(FPMATH_387) 339 340EnumValue 341Enum(fpmath_unit) String(sse) Value(FPMATH_SSE) 342 343EnumValue 344Enum(fpmath_unit) String(387,sse) Value({(enum fpmath_unit) (FPMATH_SSE | FPMATH_387)}) 345 346EnumValue 347Enum(fpmath_unit) String(387+sse) Value({(enum fpmath_unit) (FPMATH_SSE | FPMATH_387)}) 348 349EnumValue 350Enum(fpmath_unit) String(sse,387) Value({(enum fpmath_unit) (FPMATH_SSE | FPMATH_387)}) 351 352EnumValue 353Enum(fpmath_unit) String(sse+387) Value({(enum fpmath_unit) (FPMATH_SSE | FPMATH_387)}) 354 355EnumValue 356Enum(fpmath_unit) String(both) Value({(enum fpmath_unit) (FPMATH_SSE | FPMATH_387)}) 357 358mhard-float 359Target RejectNegative Mask(80387) Save 360Use hardware fp. 361 362mieee-fp 363Target Report Mask(IEEE_FP) Save 364Use IEEE math for fp comparisons. 365 366minline-all-stringops 367Target Report Mask(INLINE_ALL_STRINGOPS) Save 368Inline all known string operations. 369 370minline-stringops-dynamically 371Target Report Mask(INLINE_STRINGOPS_DYNAMICALLY) Save 372Inline memset/memcpy string operations, but perform inline version only for small blocks. 373 374mintel-syntax 375Target Undocumented Alias(masm=, intel, att) Warn(%<-mintel-syntax%> and %<-mno-intel-syntax%> are deprecated; use %<-masm=intel%> and %<-masm=att%> instead) 376;; Deprecated 377 378mms-bitfields 379Target Report Mask(MS_BITFIELD_LAYOUT) Save 380Use native (MS) bitfield layout. 381 382mno-align-stringops 383Target RejectNegative Report Mask(NO_ALIGN_STRINGOPS) Undocumented Save 384 385mno-fancy-math-387 386Target RejectNegative Report Mask(NO_FANCY_MATH_387) Undocumented Save 387 388mno-push-args 389Target RejectNegative Report Mask(NO_PUSH_ARGS) Undocumented Save 390 391mno-red-zone 392Target RejectNegative Report Mask(NO_RED_ZONE) Undocumented Save 393 394momit-leaf-frame-pointer 395Target Report Mask(OMIT_LEAF_FRAME_POINTER) Save 396Omit the frame pointer in leaf functions. 397 398mpc32 399Target RejectNegative Report 400Set 80387 floating-point precision to 32-bit. 401 402mpc64 403Target RejectNegative Report 404Set 80387 floating-point precision to 64-bit. 405 406mpc80 407Target RejectNegative Report 408Set 80387 floating-point precision to 80-bit. 409 410mpreferred-stack-boundary= 411Target RejectNegative Joined UInteger Var(ix86_preferred_stack_boundary_arg) 412Attempt to keep stack aligned to this power of 2. 413 414mincoming-stack-boundary= 415Target RejectNegative Joined UInteger Var(ix86_incoming_stack_boundary_arg) 416Assume incoming stack aligned to this power of 2. 417 418mpush-args 419Target Report InverseMask(NO_PUSH_ARGS, PUSH_ARGS) Save 420Use push instructions to save outgoing arguments. 421 422mred-zone 423Target RejectNegative Report InverseMask(NO_RED_ZONE, RED_ZONE) Save 424Use red-zone in the x86-64 code. 425 426mregparm= 427Target RejectNegative Joined UInteger Var(ix86_regparm) 428Number of registers used to pass integer arguments. 429 430mrtd 431Target Report Mask(RTD) Save 432Alternate calling convention. 433 434msoft-float 435Target InverseMask(80387) Save 436Do not use hardware fp. 437 438msseregparm 439Target RejectNegative Mask(SSEREGPARM) Save 440Use SSE register passing conventions for SF and DF mode. 441 442mstackrealign 443Target Report Var(ix86_force_align_arg_pointer) Init(-1) 444Realign stack in prologue. 445 446mstack-arg-probe 447Target Report Mask(STACK_PROBE) Save 448Enable stack probing. 449 450mmemcpy-strategy= 451Target RejectNegative Joined Var(ix86_tune_memcpy_strategy) 452Specify memcpy expansion strategy when expected size is known. 453 454mmemset-strategy= 455Target RejectNegative Joined Var(ix86_tune_memset_strategy) 456Specify memset expansion strategy when expected size is known. 457 458mstringop-strategy= 459Target RejectNegative Joined Enum(stringop_alg) Var(ix86_stringop_alg) Init(no_stringop) 460Chose strategy to generate stringop using. 461 462Enum 463Name(stringop_alg) Type(enum stringop_alg) 464Valid arguments to -mstringop-strategy=: 465 466EnumValue 467Enum(stringop_alg) String(rep_byte) Value(rep_prefix_1_byte) 468 469EnumValue 470Enum(stringop_alg) String(libcall) Value(libcall) 471 472EnumValue 473Enum(stringop_alg) String(rep_4byte) Value(rep_prefix_4_byte) 474 475EnumValue 476Enum(stringop_alg) String(rep_8byte) Value(rep_prefix_8_byte) 477 478EnumValue 479Enum(stringop_alg) String(byte_loop) Value(loop_1_byte) 480 481EnumValue 482Enum(stringop_alg) String(loop) Value(loop) 483 484EnumValue 485Enum(stringop_alg) String(unrolled_loop) Value(unrolled_loop) 486 487EnumValue 488Enum(stringop_alg) String(vector_loop) Value(vector_loop) 489 490mtls-dialect= 491Target RejectNegative Joined Var(ix86_tls_dialect) Enum(tls_dialect) Init(TLS_DIALECT_GNU) 492Use given thread-local storage dialect. 493 494Enum 495Name(tls_dialect) Type(enum tls_dialect) 496Known TLS dialects (for use with the -mtls-dialect= option): 497 498EnumValue 499Enum(tls_dialect) String(gnu) Value(TLS_DIALECT_GNU) 500 501EnumValue 502Enum(tls_dialect) String(gnu2) Value(TLS_DIALECT_GNU2) 503 504mtls-direct-seg-refs 505Target Report Mask(TLS_DIRECT_SEG_REFS) 506Use direct references against %gs when accessing tls data. 507 508mtune= 509Target RejectNegative Joined Var(ix86_tune_string) 510Schedule code for given CPU. 511 512mtune-ctrl= 513Target RejectNegative Joined Var(ix86_tune_ctrl_string) 514Fine grain control of tune features. 515 516mno-default 517Target RejectNegative Var(ix86_tune_no_default) Init(0) 518Clear all tune features. 519 520mdump-tune-features 521Target RejectNegative Var(ix86_dump_tunes) Init(0) 522 523miamcu 524Target Report Mask(IAMCU) 525Generate code that conforms to Intel MCU psABI. 526 527mabi= 528Target RejectNegative Joined Var(ix86_abi) Enum(calling_abi) Init(SYSV_ABI) 529Generate code that conforms to the given ABI. 530 531Enum 532Name(calling_abi) Type(enum calling_abi) 533Known ABIs (for use with the -mabi= option): 534 535EnumValue 536Enum(calling_abi) String(sysv) Value(SYSV_ABI) 537 538EnumValue 539Enum(calling_abi) String(ms) Value(MS_ABI) 540 541mveclibabi= 542Target RejectNegative Joined Var(ix86_veclibabi_type) Enum(ix86_veclibabi) Init(ix86_veclibabi_type_none) 543Vector library ABI to use. 544 545Enum 546Name(ix86_veclibabi) Type(enum ix86_veclibabi) 547Known vectorization library ABIs (for use with the -mveclibabi= option): 548 549EnumValue 550Enum(ix86_veclibabi) String(svml) Value(ix86_veclibabi_type_svml) 551 552EnumValue 553Enum(ix86_veclibabi) String(acml) Value(ix86_veclibabi_type_acml) 554 555mvect8-ret-in-mem 556Target Report Mask(VECT8_RETURNS) Save 557Return 8-byte vectors in memory. 558 559mrecip 560Target Report Mask(RECIP) Save 561Generate reciprocals instead of divss and sqrtss. 562 563mrecip= 564Target Report RejectNegative Joined Var(ix86_recip_name) 565Control generation of reciprocal estimates. 566 567mcld 568Target Report Mask(CLD) Save 569Generate cld instruction in the function prologue. 570 571mvzeroupper 572Target Report Mask(VZEROUPPER) Save 573Generate vzeroupper instruction before a transfer of control flow out of 574the function. 575 576mstv 577Target Report Mask(STV) Save 578Disable Scalar to Vector optimization pass transforming 64-bit integer 579computations into a vector ones. 580 581mdispatch-scheduler 582Target RejectNegative Var(flag_dispatch_scheduler) 583Do dispatch scheduling if processor is bdver1, bdver2, bdver3, bdver4 584or znver1 and Haifa scheduling is selected. 585 586mprefer-avx128 587Target Report Mask(PREFER_AVX128) SAVE 588Use 128-bit AVX instructions instead of 256-bit AVX instructions in the auto-vectorizer. 589 590;; ISA support 591 592m32 593Target RejectNegative Negative(m64) Report InverseMask(ISA_64BIT) Var(ix86_isa_flags) Save 594Generate 32bit i386 code. 595 596m64 597Target RejectNegative Negative(mx32) Report Mask(ABI_64) Var(ix86_isa_flags) Save 598Generate 64bit x86-64 code. 599 600mx32 601Target RejectNegative Negative(m16) Report Mask(ABI_X32) Var(ix86_isa_flags) Save 602Generate 32bit x86-64 code. 603 604m16 605Target RejectNegative Negative(m32) Report Mask(CODE16) InverseMask(ISA_64BIT) Var(ix86_isa_flags) Save 606Generate 16bit i386 code. 607 608mmmx 609Target Report Mask(ISA_MMX) Var(ix86_isa_flags) Save 610Support MMX built-in functions. 611 612m3dnow 613Target Report Mask(ISA_3DNOW) Var(ix86_isa_flags) Save 614Support 3DNow! built-in functions. 615 616m3dnowa 617Target Report Mask(ISA_3DNOW_A) Var(ix86_isa_flags) Save 618Support Athlon 3Dnow! built-in functions. 619 620msse 621Target Report Mask(ISA_SSE) Var(ix86_isa_flags) Save 622Support MMX and SSE built-in functions and code generation. 623 624msse2 625Target Report Mask(ISA_SSE2) Var(ix86_isa_flags) Save 626Support MMX, SSE and SSE2 built-in functions and code generation. 627 628msse3 629Target Report Mask(ISA_SSE3) Var(ix86_isa_flags) Save 630Support MMX, SSE, SSE2 and SSE3 built-in functions and code generation. 631 632mssse3 633Target Report Mask(ISA_SSSE3) Var(ix86_isa_flags) Save 634Support MMX, SSE, SSE2, SSE3 and SSSE3 built-in functions and code generation. 635 636msse4.1 637Target Report Mask(ISA_SSE4_1) Var(ix86_isa_flags) Save 638Support MMX, SSE, SSE2, SSE3, SSSE3 and SSE4.1 built-in functions and code generation. 639 640msse4.2 641Target Report Mask(ISA_SSE4_2) Var(ix86_isa_flags) Save 642Support MMX, SSE, SSE2, SSE3, SSSE3, SSE4.1 and SSE4.2 built-in functions and code generation. 643 644msse4 645Target RejectNegative Report Mask(ISA_SSE4_2) Var(ix86_isa_flags) Save 646Support MMX, SSE, SSE2, SSE3, SSSE3, SSE4.1 and SSE4.2 built-in functions and code generation. 647 648mno-sse4 649Target RejectNegative Report InverseMask(ISA_SSE4_1) Var(ix86_isa_flags) Save 650Do not support SSE4.1 and SSE4.2 built-in functions and code generation. 651 652msse5 653Target Undocumented Alias(mavx) Warn(%<-msse5%> was removed) 654;; Deprecated 655 656mavx 657Target Report Mask(ISA_AVX) Var(ix86_isa_flags) Save 658Support MMX, SSE, SSE2, SSE3, SSSE3, SSE4.1, SSE4.2 and AVX built-in functions and code generation. 659 660mavx2 661Target Report Mask(ISA_AVX2) Var(ix86_isa_flags) Save 662Support MMX, SSE, SSE2, SSE3, SSSE3, SSE4.1, SSE4.2, AVX and AVX2 built-in functions and code generation. 663 664mavx512f 665Target Report Mask(ISA_AVX512F) Var(ix86_isa_flags) Save 666Support MMX, SSE, SSE2, SSE3, SSSE3, SSE4.1, SSE4.2, AVX, AVX2 and AVX512F built-in functions and code generation. 667 668mavx512pf 669Target Report Mask(ISA_AVX512PF) Var(ix86_isa_flags) Save 670Support MMX, SSE, SSE2, SSE3, SSSE3, SSE4.1, SSE4.2, AVX, AVX2 and AVX512F and AVX512PF built-in functions and code generation. 671 672mavx512er 673Target Report Mask(ISA_AVX512ER) Var(ix86_isa_flags) Save 674Support MMX, SSE, SSE2, SSE3, SSSE3, SSE4.1, SSE4.2, AVX, AVX2 and AVX512F and AVX512ER built-in functions and code generation. 675 676mavx512cd 677Target Report Mask(ISA_AVX512CD) Var(ix86_isa_flags) Save 678Support MMX, SSE, SSE2, SSE3, SSSE3, SSE4.1, SSE4.2, AVX, AVX2 and AVX512F and AVX512CD built-in functions and code generation. 679 680mavx512dq 681Target Report Mask(ISA_AVX512DQ) Var(ix86_isa_flags) Save 682Support MMX, SSE, SSE2, SSE3, SSSE3, SSE4.1, SSE4.2, AVX, AVX2 and AVX512F and AVX512DQ built-in functions and code generation. 683 684mavx512bw 685Target Report Mask(ISA_AVX512BW) Var(ix86_isa_flags) Save 686Support MMX, SSE, SSE2, SSE3, SSSE3, SSE4.1, SSE4.2, AVX, AVX2 and AVX512F and AVX512BW built-in functions and code generation. 687 688mavx512vl 689Target Report Mask(ISA_AVX512VL) Var(ix86_isa_flags) Save 690Support MMX, SSE, SSE2, SSE3, SSSE3, SSE4.1, SSE4.2, AVX, AVX2 and AVX512F and AVX512VL built-in functions and code generation. 691 692mavx512ifma 693Target Report Mask(ISA_AVX512IFMA) Var(ix86_isa_flags) Save 694Support MMX, SSE, SSE2, SSE3, SSSE3, SSE4.1, SSE4.2, AVX, AVX2 and AVX512F and AVX512IFMA built-in functions and code generation. 695 696mavx512vbmi 697Target Report Mask(ISA_AVX512VBMI) Var(ix86_isa_flags) Save 698Support MMX, SSE, SSE2, SSE3, SSSE3, SSE4.1, SSE4.2, AVX, AVX2 and AVX512F and AVX512VBMI built-in functions and code generation. 699 700mavx5124fmaps 701Target Report Mask(ISA_AVX5124FMAPS) Var(ix86_isa_flags2) Save 702Support MMX, SSE, SSE2, SSE3, SSSE3, SSE4.1, SSE4.2, AVX, AVX2, AVX512F and AVX5124FMAPS built-in functions and code generation. 703 704mavx5124vnniw 705Target Report Mask(ISA_AVX5124VNNIW) Var(ix86_isa_flags2) Save 706Support MMX, SSE, SSE2, SSE3, SSSE3, SSE4.1, SSE4.2, AVX, AVX2, AVX512F and AVX5124VNNIW built-in functions and code generation. 707 708mavx512vpopcntdq 709Target Report Mask(ISA_AVX512VPOPCNTDQ) Var(ix86_isa_flags2) Save 710Support MMX, SSE, SSE2, SSE3, SSSE3, SSE4.1, SSE4.2, AVX, AVX2, AVX512F and AVX512VPOPCNTDQ built-in functions and code generation. 711 712mfma 713Target Report Mask(ISA_FMA) Var(ix86_isa_flags) Save 714Support MMX, SSE, SSE2, SSE3, SSSE3, SSE4.1, SSE4.2, AVX and FMA built-in functions and code generation. 715 716msse4a 717Target Report Mask(ISA_SSE4A) Var(ix86_isa_flags) Save 718Support MMX, SSE, SSE2, SSE3 and SSE4A built-in functions and code generation. 719 720mfma4 721Target Report Mask(ISA_FMA4) Var(ix86_isa_flags) Save 722Support FMA4 built-in functions and code generation. 723 724mxop 725Target Report Mask(ISA_XOP) Var(ix86_isa_flags) Save 726Support XOP built-in functions and code generation. 727 728mlwp 729Target Report Mask(ISA_LWP) Var(ix86_isa_flags) Save 730Support LWP built-in functions and code generation. 731 732mabm 733Target Report Mask(ISA_ABM) Var(ix86_isa_flags) Save 734Support code generation of Advanced Bit Manipulation (ABM) instructions. 735 736mpopcnt 737Target Report Mask(ISA_POPCNT) Var(ix86_isa_flags) Save 738Support code generation of popcnt instruction. 739 740msgx 741Target Report Mask(ISA_SGX) Var(ix86_isa_flags2) Save 742Support SGX built-in functions and code generation. 743 744mrdpid 745Target Report Mask(ISA_RDPID) Var(ix86_isa_flags2) Save 746Support RDPID built-in functions and code generation. 747 748mbmi 749Target Report Mask(ISA_BMI) Var(ix86_isa_flags) Save 750Support BMI built-in functions and code generation. 751 752mbmi2 753Target Report Mask(ISA_BMI2) Var(ix86_isa_flags) Save 754Support BMI2 built-in functions and code generation. 755 756mlzcnt 757Target Report Mask(ISA_LZCNT) Var(ix86_isa_flags) Save 758Support LZCNT built-in function and code generation. 759 760mhle 761Target Report Mask(ISA_HLE) Var(ix86_isa_flags) Save 762Support Hardware Lock Elision prefixes. 763 764mrdseed 765Target Report Mask(ISA_RDSEED) Var(ix86_isa_flags) Save 766Support RDSEED instruction. 767 768mprfchw 769Target Report Mask(ISA_PRFCHW) Var(ix86_isa_flags) Save 770Support PREFETCHW instruction. 771 772madx 773Target Report Mask(ISA_ADX) Var(ix86_isa_flags) Save 774Support flag-preserving add-carry instructions. 775 776mclflushopt 777Target Report Mask(ISA_CLFLUSHOPT) Var(ix86_isa_flags) Save 778Support CLFLUSHOPT instructions. 779 780mclwb 781Target Report Mask(ISA_CLWB) Var(ix86_isa_flags) Save 782Support CLWB instruction. 783 784mpcommit 785Target Undocumented Warn(%<-mpcommit%> was deprecated) 786;; Deprecated 787 788mfxsr 789Target Report Mask(ISA_FXSR) Var(ix86_isa_flags) Save 790Support FXSAVE and FXRSTOR instructions. 791 792mxsave 793Target Report Mask(ISA_XSAVE) Var(ix86_isa_flags) Save 794Support XSAVE and XRSTOR instructions. 795 796mxsaveopt 797Target Report Mask(ISA_XSAVEOPT) Var(ix86_isa_flags) Save 798Support XSAVEOPT instruction. 799 800mxsavec 801Target Report Mask(ISA_XSAVEC) Var(ix86_isa_flags) Save 802Support XSAVEC instructions. 803 804mxsaves 805Target Report Mask(ISA_XSAVES) Var(ix86_isa_flags) Save 806Support XSAVES and XRSTORS instructions. 807 808mtbm 809Target Report Mask(ISA_TBM) Var(ix86_isa_flags) Save 810Support TBM built-in functions and code generation. 811 812mcx16 813Target Report Mask(ISA_CX16) Var(ix86_isa_flags) Save 814Support code generation of cmpxchg16b instruction. 815 816msahf 817Target Report Mask(ISA_SAHF) Var(ix86_isa_flags) Save 818Support code generation of sahf instruction in 64bit x86-64 code. 819 820mmovbe 821Target Report Mask(ISA_MOVBE) Var(ix86_isa_flags) Save 822Support code generation of movbe instruction. 823 824mcrc32 825Target Report Mask(ISA_CRC32) Var(ix86_isa_flags) Save 826Support code generation of crc32 instruction. 827 828maes 829Target Report Mask(ISA_AES) Var(ix86_isa_flags) Save 830Support AES built-in functions and code generation. 831 832msha 833Target Report Mask(ISA_SHA) Var(ix86_isa_flags) Save 834Support SHA1 and SHA256 built-in functions and code generation. 835 836mpclmul 837Target Report Mask(ISA_PCLMUL) Var(ix86_isa_flags) Save 838Support PCLMUL built-in functions and code generation. 839 840msse2avx 841Target Report Var(ix86_sse2avx) 842Encode SSE instructions with VEX prefix. 843 844mfsgsbase 845Target Report Mask(ISA_FSGSBASE) Var(ix86_isa_flags) Save 846Support FSGSBASE built-in functions and code generation. 847 848mrdrnd 849Target Report Mask(ISA_RDRND) Var(ix86_isa_flags) Save 850Support RDRND built-in functions and code generation. 851 852mf16c 853Target Report Mask(ISA_F16C) Var(ix86_isa_flags) Save 854Support F16C built-in functions and code generation. 855 856mprefetchwt1 857Target Report Mask(ISA_PREFETCHWT1) Var(ix86_isa_flags) Save 858Support PREFETCHWT1 built-in functions and code generation. 859 860mfentry 861Target Report Var(flag_fentry) Init(-1) 862Emit profiling counter call at function entry before prologue. 863 864mrecord-mcount 865Target Report Var(flag_record_mcount) Init(0) 866Generate __mcount_loc section with all mcount or __fentry__ calls. 867 868mnop-mcount 869Target Report Var(flag_nop_mcount) Init(0) 870Generate mcount/__fentry__ calls as nops. To activate they need to be 871patched in. 872 873mskip-rax-setup 874Target Report Var(flag_skip_rax_setup) Init(0) 875Skip setting up RAX register when passing variable arguments. 876 877m8bit-idiv 878Target Report Mask(USE_8BIT_IDIV) Save 879Expand 32bit/64bit integer divide into 8bit unsigned integer divide with run-time check. 880 881mavx256-split-unaligned-load 882Target Report Mask(AVX256_SPLIT_UNALIGNED_LOAD) Save 883Split 32-byte AVX unaligned load. 884 885mavx256-split-unaligned-store 886Target Report Mask(AVX256_SPLIT_UNALIGNED_STORE) Save 887Split 32-byte AVX unaligned store. 888 889mrtm 890Target Report Mask(ISA_RTM) Var(ix86_isa_flags) Save 891Support RTM built-in functions and code generation. 892 893mmpx 894Target Report Mask(ISA_MPX) Var(ix86_isa_flags) Save 895Support MPX code generation. 896 897mmwaitx 898Target Report Mask(ISA_MWAITX) Var(ix86_isa_flags) Save 899Support MWAITX and MONITORX built-in functions and code generation. 900 901mclzero 902Target Report Mask(ISA_CLZERO) Var(ix86_isa_flags) Save 903Support CLZERO built-in functions and code generation. 904 905mpku 906Target Report Mask(ISA_PKU) Var(ix86_isa_flags) Save 907Support PKU built-in functions and code generation. 908 909mstack-protector-guard= 910Target RejectNegative Joined Enum(stack_protector_guard) Var(ix86_stack_protector_guard) Init(SSP_TLS) 911Use given stack-protector guard. 912 913Enum 914Name(stack_protector_guard) Type(enum stack_protector_guard) 915Known stack protector guard (for use with the -mstack-protector-guard= option): 916 917EnumValue 918Enum(stack_protector_guard) String(tls) Value(SSP_TLS) 919 920EnumValue 921Enum(stack_protector_guard) String(global) Value(SSP_GLOBAL) 922 923mmitigate-rop 924Target Var(flag_mitigate_rop) Init(0) 925Attempt to avoid generating instruction sequences containing ret bytes. 926 927mgeneral-regs-only 928Target Report RejectNegative Mask(GENERAL_REGS_ONLY) Var(ix86_target_flags) Save 929Generate code which uses only the general registers. 930 931mindirect-branch= 932Target Report RejectNegative Joined Enum(indirect_branch) Var(ix86_indirect_branch) Init(indirect_branch_keep) 933Convert indirect call and jump to call and return thunks. 934 935mfunction-return= 936Target Report RejectNegative Joined Enum(indirect_branch) Var(ix86_function_return) Init(indirect_branch_keep) 937Convert function return to call and return thunk. 938 939Enum 940Name(indirect_branch) Type(enum indirect_branch) 941Known indirect branch choices (for use with the -mindirect-branch=/-mfunction-return= options): 942 943EnumValue 944Enum(indirect_branch) String(keep) Value(indirect_branch_keep) 945 946EnumValue 947Enum(indirect_branch) String(thunk) Value(indirect_branch_thunk) 948 949EnumValue 950Enum(indirect_branch) String(thunk-inline) Value(indirect_branch_thunk_inline) 951 952EnumValue 953Enum(indirect_branch) String(thunk-extern) Value(indirect_branch_thunk_extern) 954 955mindirect-branch-register 956Target Report Var(ix86_indirect_branch_register) Init(0) 957Force indirect call and jump via register. 958